pre-check passing
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
deleted file mode 100644
index a5af6ad..0000000
--- a/gds/user_analog_project_wrapper.gds
+++ /dev/null
Binary files differ
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz
index 7d4426a..b8e6825 100644
--- a/gds/user_analog_project_wrapper.gds.gz
+++ b/gds/user_analog_project_wrapper.gds.gz
Binary files differ
diff --git a/mag/C4.mag b/mag/C4.mag
index 8146a02..39c2e34 100644
--- a/mag/C4.mag
+++ b/mag/C4.mag
@@ -1,7 +1,7 @@
magic
tech sky130B
magscale 1 2
-timestamp 1654654453
+timestamp 1654659034
<< nwell >>
rect 38 421 240 596
rect 18 166 220 421
@@ -390,12 +390,12 @@
port 10 e
flabel metal1 -23 614 20 662 1 FreeSans 400 0 0 0 vdd
port 8 n
-flabel space -178 -254 226 -157 5 FreeSans 400 0 0 0 vss
-port 7 s
flabel poly -263 -45 -197 21 7 FreeSans 400 0 0 0 vtl
port 5 w
flabel metal2 -1956 584 -1878 659 7 FreeSans 400 0 0 0 vin
port 9 w
flabel poly 194 268 260 334 7 FreeSans 400 0 0 0 vth
port 6 w
+flabel metal1 -22 -240 45 -170 5 FreeSans 400 0 0 0 vss
+port 11 s
<< end >>
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 8c22bd9..a7a9b8e 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
@@ -1,9 +1,45 @@
magic
tech sky130B
magscale 1 2
-timestamp 1654654453
-<< pwell >>
-rect 250868 656547 251483 656913
+timestamp 1654665543
+<< dnwell >>
+rect 237967 654480 254385 659516
+<< nwell >>
+rect 237887 659310 254465 659596
+rect 237887 654686 238173 659310
+rect 254179 654686 254465 659310
+rect 237887 654400 254465 654686
+<< nsubdiff >>
+rect 237924 659539 254428 659559
+rect 237924 659505 238004 659539
+rect 254348 659505 254428 659539
+rect 237924 659485 254428 659505
+rect 237924 659479 237998 659485
+rect 237924 654517 237944 659479
+rect 237978 654517 237998 659479
+rect 237924 654511 237998 654517
+rect 254354 659479 254428 659485
+rect 254354 654517 254374 659479
+rect 254408 654517 254428 659479
+rect 254354 654511 254428 654517
+rect 237924 654491 254428 654511
+rect 237924 654457 238004 654491
+rect 254348 654457 254428 654491
+rect 237924 654437 254428 654457
+<< nsubdiffcont >>
+rect 238004 659505 254348 659539
+rect 237944 654517 237978 659479
+rect 254374 654517 254408 659479
+rect 238004 654457 254348 654491
+<< locali >>
+rect 237944 659505 238004 659539
+rect 254348 659505 254408 659539
+rect 237944 659479 237978 659505
+rect 254374 659479 254408 659505
+rect 237944 654491 237978 654517
+rect 254374 654491 254408 654517
+rect 237944 654457 238004 654491
+rect 254348 654457 254408 654491
<< viali >>
rect 243709 657061 243743 657095
rect 250501 656568 250535 656603
@@ -95,17 +131,24 @@
rect 250544 656557 250555 656611
rect 250481 656548 250555 656557
rect 244665 656453 245790 656520
+rect 573060 656453 574329 656454
rect 244665 656443 574386 656453
rect 244665 656337 572978 656443
rect 574376 656337 574386 656443
rect 244665 656327 574386 656337
rect 244665 656325 245729 656327
+rect 573060 548412 574329 656327
rect 581952 551915 582055 656985
rect 581942 551868 582056 551915
rect 581942 551782 582055 551868
rect 581942 551689 581952 551782
rect 582045 551689 582055 551782
rect 581942 551679 582055 551689
+rect 573060 548053 574368 548412
+rect 573058 547773 574371 548053
+rect 573058 546500 573078 547773
+rect 574351 546500 574371 547773
+rect 573058 546480 574371 546500
rect 582187 536382 582263 696005
rect 582187 536318 582193 536382
rect 582257 536318 582263 536382
@@ -154,6 +197,7 @@
rect 250490 656557 250544 656568
rect 572978 656337 574376 656443
rect 581952 551689 582045 551782
+rect 573078 546500 574351 547773
rect 582193 536318 582257 536382
rect 582311 536318 582375 536382
rect 582432 536319 582496 536383
@@ -368,16 +412,11 @@
rect 225043 338754 225176 427121
rect 251643 426642 252354 427129
rect 261364 426642 262077 549780
-rect 581942 451020 582055 551689
-rect 582183 536382 582265 536393
-rect 582183 536318 582193 536382
-rect 582257 536318 582265 536382
-rect 581942 451002 582054 451020
-rect 581942 450910 581952 451002
-rect 582044 450910 582054 451002
-rect 581942 450900 582054 450910
rect 251643 425931 262077 426642
rect 261364 425930 262077 425931
+rect 573064 547773 574377 547790
+rect 573064 546500 573078 547773
+rect 574351 546500 574377 547773
rect 250770 425754 250880 425755
rect 226412 425744 251381 425754
rect 226412 425412 250988 425744
@@ -394,6 +433,15 @@
rect 38 295430 48 295522
rect 470 295430 226769 295522
rect 38 295420 226769 295430
+rect 573064 217110 574377 546500
+rect 581942 451020 582055 551689
+rect 582183 536382 582265 536393
+rect 582183 536318 582193 536382
+rect 582257 536318 582265 536382
+rect 581942 451002 582054 451020
+rect 581942 450910 581952 451002
+rect 582044 450910 582054 451002
+rect 581942 450900 582054 450910
rect 582183 406392 582265 536318
rect 582303 536382 582385 536393
rect 582303 536318 582311 536382
@@ -431,6 +479,14 @@
rect 582183 269256 583547 269320
rect 583611 269256 583620 269320
rect 582183 269248 583620 269256
+rect 573062 184286 574378 217110
+rect 582228 184290 583226 184292
+rect 581972 184286 583226 184290
+rect 573062 184272 583226 184286
+rect 573062 182970 582448 184272
+rect 581972 182956 582448 182970
+rect 583206 182956 583226 184272
+rect 581972 182936 583226 182956
rect 524 -800 636 480
rect 1706 -800 1818 480
rect 2888 -800 3000 480
@@ -952,13 +1008,14 @@
rect 261434 551164 262034 551706
rect 396 425092 474 425192
rect 372 381870 475 381971
-rect 581952 450910 582044 451002
rect 174 338652 470 338744
rect 48 295430 470 295522
+rect 581952 450910 582044 451002
rect 583552 405320 583616 405384
rect 583548 358898 583612 358962
rect 583548 313679 583612 313743
rect 583547 269256 583611 269320
+rect 582448 182956 583206 184272
<< metal3 >>
rect 16194 702300 21194 704800
rect 68194 702300 73194 704800
@@ -1204,7 +1261,10 @@
rect 572970 184324 574395 193001
rect 582340 191430 584800 196230
rect 582340 184324 584800 186230
-rect 572970 182899 584800 184324
+rect 572970 184272 584800 184324
+rect 572970 182956 582448 184272
+rect 583206 182956 584800 184272
+rect 572970 182899 584800 182956
rect 582340 181430 584800 182899
rect -800 172888 1660 177688
rect -800 162888 1660 167688
@@ -1294,7 +1354,7 @@
transform 1 0 562058 0 1 685450
box 0 0 864 800
use C4 C4_0
-timestamp 1654654453
+timestamp 1654659034
transform 1 0 243509 0 1 656777
box -3132 -258 1273 678
use FG_pfet FG_pfet_0
diff --git a/netgen/comp.out b/netgen/comp.out
deleted file mode 100644
index 42163df..0000000
--- a/netgen/comp.out
+++ /dev/null
@@ -1,2097 +0,0 @@
-Equate elements: no current cell.
-Equate elements: no current cell.
-Equate elements: no current cell.
-Equate elements: no current cell.
-Equate elements: no current cell.
-Equate elements: no current cell.
-Equate elements: no current cell.
-
-Class sky130_fd_sc_hvl__buf_8(0): Merged 18 parallel devices.
-Class sky130_fd_sc_hvl__buf_8(1): Merged 18 parallel devices.
-Subcircuit summary:
-Circuit 1: sky130_fd_sc_hvl__buf_8 |Circuit 2: sky130_fd_sc_hvl__buf_8
--------------------------------------------|-------------------------------------------
-sky130_fd_pr__nfet_g5v0d10v5 (2) |sky130_fd_pr__nfet_g5v0d10v5 (2)
-sky130_fd_pr__pfet_g5v0d10v5 (2) |sky130_fd_pr__pfet_g5v0d10v5 (2)
-Number of devices: 4 |Number of devices: 4
-Number of nets: 7 |Number of nets: 7
----------------------------------------------------------------------------------------
-Circuits match uniquely.
-Netlists match uniquely.
-
-Subcircuit pins:
-Circuit 1: sky130_fd_sc_hvl__buf_8 |Circuit 2: sky130_fd_sc_hvl__buf_8
--------------------------------------------|-------------------------------------------
-A |A
-VPWR |VPWR
-VPB |VPB
-X |X
-VGND |VGND
-VNB |VNB
----------------------------------------------------------------------------------------
-Cell pin lists are equivalent.
-Device classes sky130_fd_sc_hvl__buf_8 and sky130_fd_sc_hvl__buf_8 are equivalent.
-
-Subcircuit summary:
-Circuit 1: sky130_fd_sc_hvl__schmittbuf_1 |Circuit 2: sky130_fd_sc_hvl__schmittbuf_1
--------------------------------------------|-------------------------------------------
-sky130_fd_pr__nfet_g5v0d10v5 (4) |sky130_fd_pr__nfet_g5v0d10v5 (4)
-sky130_fd_pr__pfet_g5v0d10v5 (4) |sky130_fd_pr__pfet_g5v0d10v5 (4)
-sky130_fd_pr__res_generic_nd__hv (1) |sky130_fd_pr__res_generic_nd__hv (1)
-sky130_fd_pr__res_generic_pd__hv (1) |sky130_fd_pr__res_generic_pd__hv (1)
-Number of devices: 10 |Number of devices: 10
-Number of nets: 11 |Number of nets: 11
----------------------------------------------------------------------------------------
-Circuits match uniquely.
-Netlists match uniquely.
-
-Subcircuit pins:
-Circuit 1: sky130_fd_sc_hvl__schmittbuf_1 |Circuit 2: sky130_fd_sc_hvl__schmittbuf_1
--------------------------------------------|-------------------------------------------
-A |A
-VPB |VPB
-VNB |VNB
-VGND |VGND
-VPWR |VPWR
-X |X
----------------------------------------------------------------------------------------
-Cell pin lists are equivalent.
-Device classes sky130_fd_sc_hvl__schmittbuf_1 and sky130_fd_sc_hvl__schmittbuf_1 are equivalent.
-
-Class sky130_fd_sc_hvl__inv_8(0): Merged 14 parallel devices.
-Class sky130_fd_sc_hvl__inv_8(1): Merged 14 parallel devices.
-Subcircuit summary:
-Circuit 1: sky130_fd_sc_hvl__inv_8 |Circuit 2: sky130_fd_sc_hvl__inv_8
--------------------------------------------|-------------------------------------------
-sky130_fd_pr__pfet_g5v0d10v5 (1) |sky130_fd_pr__pfet_g5v0d10v5 (1)
-sky130_fd_pr__nfet_g5v0d10v5 (1) |sky130_fd_pr__nfet_g5v0d10v5 (1)
-Number of devices: 2 |Number of devices: 2
-Number of nets: 6 |Number of nets: 6
----------------------------------------------------------------------------------------
-Circuits match uniquely.
-Netlists match uniquely.
-
-Subcircuit pins:
-Circuit 1: sky130_fd_sc_hvl__inv_8 |Circuit 2: sky130_fd_sc_hvl__inv_8
--------------------------------------------|-------------------------------------------
-VPWR |VPWR
-VPB |VPB
-VGND |VGND
-VNB |VNB
-A |A
-Y |Y
----------------------------------------------------------------------------------------
-Cell pin lists are equivalent.
-Device classes sky130_fd_sc_hvl__inv_8 and sky130_fd_sc_hvl__inv_8 are equivalent.
-Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_2_W5U4AW in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_TGFUGS in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_3YBPVB in circuit example_por (0)(4 instances)
-Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YUHPXE in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_PKVMTM in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_WRT4AW in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YEUEBV in circuit example_por (0)(1 instance)
-Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YUHPBG in circuit example_por (0)(1 instance)
-
-Class example_por(0): Merged 20 parallel devices.
-Class example_por(0): Merged 24 series devices.
-Subcircuit summary:
-Circuit 1: example_por |Circuit 2: example_por
--------------------------------------------|-------------------------------------------
-sky130_fd_pr__cap_mim_m3_2 (1) |sky130_fd_pr__cap_mim_m3_2 (1)
-sky130_fd_sc_hvl__buf_8 (2) |sky130_fd_sc_hvl__buf_8 (2)
-sky130_fd_pr__pfet_g5v0d10v5 (8) |sky130_fd_pr__pfet_g5v0d10v5 (8)
-sky130_fd_pr__nfet_g5v0d10v5 (3) |sky130_fd_pr__nfet_g5v0d10v5 (3)
-sky130_fd_pr__res_xhigh_po_0p69 (3) |sky130_fd_pr__res_xhigh_po_0p69 (3)
-sky130_fd_sc_hvl__schmittbuf_1 (1) |sky130_fd_sc_hvl__schmittbuf_1 (1)
-sky130_fd_pr__cap_mim_m3_1 (1) |sky130_fd_pr__cap_mim_m3_1 (1)
-sky130_fd_sc_hvl__inv_8 (1) |sky130_fd_sc_hvl__inv_8 (1)
-Number of devices: 20 |Number of devices: 20
-Number of nets: 16 |Number of nets: 16
----------------------------------------------------------------------------------------
-Circuits match uniquely.
-Netlists match uniquely.
-
-Subcircuit pins:
-Circuit 1: example_por |Circuit 2: example_por
--------------------------------------------|-------------------------------------------
-vdd3v3 |vdd3v3
-porb_h |porb_h
-porb_l |porb_l
-por_l |por_l
-vdd1v8 |vdd1v8
-vss |vss
----------------------------------------------------------------------------------------
-Cell pin lists are equivalent.
-Device classes example_por and example_por are equivalent.
-Flattening unmatched subcell user_analog_proj_example in circuit user_analog_project_wrapper (0)(1 instance)
-
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[0]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[10]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[11]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[12]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[13]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[14]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[15]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[16]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[17]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[1]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[2]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[4]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[5]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[6]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[8]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[9]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[0]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[10]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[11]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[12]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[13]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[14]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[15]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[16]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[17]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[1]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[2]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[3]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[4]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[5]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[6]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[7]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[8]
-Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[9]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[0]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[10]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[1]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[2]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[3]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[7]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[8]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[9]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[5]
-Cell user_analog_project_wrapper(0) disconnected node: io_analog[6]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[0]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[10]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[11]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[12]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[13]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[14]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[15]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[16]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[17]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[18]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[19]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[1]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[20]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[21]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[22]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[23]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[24]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[25]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[26]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[2]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[3]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[4]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[5]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[6]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[7]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[8]
-Cell user_analog_project_wrapper(0) disconnected node: io_in[9]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[0]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[10]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[11]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[12]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[13]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[14]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[15]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[16]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[17]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[18]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[19]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[1]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[20]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[21]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[22]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[23]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[24]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[25]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[26]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[2]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[3]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[4]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[5]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[6]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[7]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[8]
-Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[9]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[0]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[10]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[13]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[14]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[17]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[18]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[19]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[1]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[20]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[21]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[22]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[23]
-Cell user_analog_project_wrapper(0) disconnected node: io_oeb[24]
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-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[123]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[124]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[125]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[126]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[127]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[12]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[13]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[14]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[15]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[16]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[17]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[18]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[19]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[1]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[20]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[21]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[22]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[23]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[24]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[25]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[26]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[27]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[28]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[29]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[2]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[30]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[31]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[32]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[33]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[34]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[35]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[36]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[37]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[38]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[39]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[3]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[40]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[41]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[42]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[43]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[44]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[45]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[46]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[47]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[48]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[49]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[4]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[50]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[51]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[52]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[53]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[54]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[55]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[56]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[57]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[58]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[59]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[5]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[60]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[61]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[62]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[63]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[64]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[65]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[66]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[67]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[68]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[69]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[6]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[70]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[71]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[72]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[73]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[74]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[75]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[76]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[77]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[78]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[79]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[7]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[80]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[81]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[82]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[83]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[84]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[85]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[86]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[87]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[88]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[89]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[8]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[90]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[91]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[92]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[93]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[94]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[95]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[96]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[97]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[98]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[99]
-Cell user_analog_project_wrapper(0) disconnected node: la_oenb[9]
-Cell user_analog_project_wrapper(0) disconnected node: user_clock2
-Cell user_analog_project_wrapper(0) disconnected node: user_irq[0]
-Cell user_analog_project_wrapper(0) disconnected node: user_irq[1]
-Cell user_analog_project_wrapper(0) disconnected node: user_irq[2]
-Cell user_analog_project_wrapper(0) disconnected node: vccd2
-Cell user_analog_project_wrapper(0) disconnected node: vdda2
-Cell user_analog_project_wrapper(0) disconnected node: vssa2
-Cell user_analog_project_wrapper(0) disconnected node: vssd2
-Cell user_analog_project_wrapper(0) disconnected node: wb_clk_i
-Cell user_analog_project_wrapper(0) disconnected node: wb_rst_i
-Cell user_analog_project_wrapper(0) disconnected node: wbs_ack_o
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[0]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[10]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[11]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[12]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[13]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[14]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[15]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[16]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[17]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[18]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[19]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[1]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[20]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[21]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[22]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[23]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[24]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[25]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[26]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[27]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[28]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[29]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[2]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[30]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[31]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[3]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[4]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[5]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[6]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[7]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[8]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_adr_i[9]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_cyc_i
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[0]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[10]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[11]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[12]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[13]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[14]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[15]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[16]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[17]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[18]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[19]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[1]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[20]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[21]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[22]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[23]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[24]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[25]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[26]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[27]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[28]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[29]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[2]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[30]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[31]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[3]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[4]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[5]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[6]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[7]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[8]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_i[9]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[0]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[10]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[11]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[12]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[13]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[14]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[15]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[16]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[17]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[18]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[19]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[1]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[20]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[21]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[22]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[23]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[24]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[25]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[26]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[27]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[28]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[29]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[2]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[30]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[31]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[3]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[4]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[5]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[6]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[7]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[8]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_dat_o[9]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_sel_i[0]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_sel_i[1]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_sel_i[2]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_sel_i[3]
-Cell user_analog_project_wrapper(0) disconnected node: wbs_stb_i
-Cell user_analog_project_wrapper(0) disconnected node: wbs_we_i
-Cell user_analog_project_wrapper(1) disconnected node: vdda2
-Cell user_analog_project_wrapper(1) disconnected node: vssa2
-Cell user_analog_project_wrapper(1) disconnected node: vccd2
-Cell user_analog_project_wrapper(1) disconnected node: vssd2
-Cell user_analog_project_wrapper(1) disconnected node: wb_clk_i
-Cell user_analog_project_wrapper(1) disconnected node: wb_rst_i
-Cell user_analog_project_wrapper(1) disconnected node: wbs_stb_i
-Cell user_analog_project_wrapper(1) disconnected node: wbs_cyc_i
-Cell user_analog_project_wrapper(1) disconnected node: wbs_we_i
-Cell user_analog_project_wrapper(1) disconnected node: wbs_sel_i[3]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_sel_i[2]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_sel_i[1]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_sel_i[0]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[31]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[30]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[29]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[28]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[27]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[26]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[25]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[24]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[23]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[22]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[21]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[20]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[19]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[18]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[17]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[16]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[15]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[14]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[13]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[12]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[11]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[10]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[9]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[8]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[7]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[6]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[5]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[4]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[3]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[2]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[1]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_i[0]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[31]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[30]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[29]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[28]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[27]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[26]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[25]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[24]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[23]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[22]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[21]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[20]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[19]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[18]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[17]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[16]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[15]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[14]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[13]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[12]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[11]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[10]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[9]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[8]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[7]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[6]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[5]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[4]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[3]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[2]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[1]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_adr_i[0]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_ack_o
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[31]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[30]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[29]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[28]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[27]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[26]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[25]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[24]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[23]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[22]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[21]
-Cell user_analog_project_wrapper(1) disconnected node: wbs_dat_o[20]
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-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[91]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[90]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[89]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[88]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[87]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[86]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[85]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[84]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[83]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[82]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[81]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[80]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[79]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[78]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[77]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[76]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[75]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[74]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[73]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[72]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[71]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[70]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[69]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[68]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[67]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[66]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[65]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[64]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[63]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[62]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[61]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[60]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[59]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[58]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[57]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[56]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[55]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[54]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[53]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[52]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[51]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[50]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[49]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[48]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[47]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[46]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[45]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[44]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[43]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[42]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[41]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[40]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[39]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[38]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[37]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[36]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[35]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[34]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[33]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[32]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[31]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[30]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[29]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[28]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[27]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[26]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[25]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[24]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[23]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[22]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[21]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[20]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[19]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[18]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[17]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[16]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[15]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[14]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[13]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[12]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[11]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[10]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[9]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[8]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[7]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[6]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[5]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[4]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[3]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[2]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[1]
-Cell user_analog_project_wrapper(1) disconnected node: la_oenb[0]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[26]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[25]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[24]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[23]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[22]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[21]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[20]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[19]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[18]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[17]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[16]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[15]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[14]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[13]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[12]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[11]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[10]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[9]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[8]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[7]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[6]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[5]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[4]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[3]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[2]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[1]
-Cell user_analog_project_wrapper(1) disconnected node: io_in[0]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[26]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[25]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[24]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[23]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[22]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[21]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[20]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[19]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[18]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[17]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[16]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[15]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[14]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[13]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[12]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[11]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[10]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[9]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[8]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[7]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[6]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[5]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[4]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[3]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[2]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[1]
-Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[0]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[26]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[25]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[24]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[23]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[22]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[21]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[20]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[19]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[18]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[17]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[14]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[13]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[10]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[9]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[8]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[7]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[6]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[5]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[4]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[3]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[2]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[1]
-Cell user_analog_project_wrapper(1) disconnected node: io_out[0]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[26]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[25]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[24]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[23]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[22]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[21]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[20]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[19]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[18]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[17]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[14]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[13]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[10]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[9]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[8]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[7]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[6]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[5]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[4]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[3]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[2]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[1]
-Cell user_analog_project_wrapper(1) disconnected node: io_oeb[0]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[17]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[16]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[15]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[14]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[13]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[12]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[11]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[10]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[9]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[8]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[6]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[5]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[4]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[2]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[1]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[0]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[17]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[16]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[15]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[14]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[13]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[12]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[11]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[10]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[9]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[8]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[7]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[6]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[5]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[4]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[3]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[2]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[1]
-Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[0]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[10]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[9]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[8]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[7]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[6]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[5]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[3]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[2]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[1]
-Cell user_analog_project_wrapper(1) disconnected node: io_analog[0]
-Cell user_analog_project_wrapper(1) disconnected node: user_clock2
-Cell user_analog_project_wrapper(1) disconnected node: user_irq[2]
-Cell user_analog_project_wrapper(1) disconnected node: user_irq[1]
-Cell user_analog_project_wrapper(1) disconnected node: user_irq[0]
-Subcircuit summary:
-Circuit 1: user_analog_project_wrapper |Circuit 2: user_analog_project_wrapper
--------------------------------------------|-------------------------------------------
-example_por (2) |example_por (2)
-sky130_fd_pr__res_generic_m3 (10) |sky130_fd_pr__res_generic_m3 (10)
-Number of devices: 12 |Number of devices: 12
-Number of nets: 21 |Number of nets: 21
----------------------------------------------------------------------------------------
-Resolving automorphisms by property value.
-Resolving automorphisms by pin name.
-Netlists match uniquely.
-Circuits match correctly.
-
-Subcircuit pins:
-Circuit 1: user_analog_project_wrapper |Circuit 2: user_analog_project_wrapper
--------------------------------------------|-------------------------------------------
-vssd1 |vssd1
-vssa1 |vssa1
-vccd1 |vccd1
-io_analog[4] |io_analog[4]
-vdda1 |vdda1
-gpio_analog[3] |gpio_analog[3]
-io_out[11] |io_out[11]
-io_out[12] |io_out[12]
-gpio_analog[7] |gpio_analog[7]
-io_out[15] |io_out[15]
-io_out[16] |io_out[16]
-io_clamp_low[2] |io_clamp_low[2]
-io_clamp_high[2] |io_clamp_high[2]
-io_clamp_low[1] |io_clamp_low[1]
-io_clamp_high[1] |io_clamp_high[1]
-io_clamp_low[0] |io_clamp_low[0]
-io_clamp_high[0] |io_clamp_high[0]
-io_oeb[12] |io_oeb[12]
-io_oeb[16] |io_oeb[16]
-io_oeb[11] |io_oeb[11]
-io_oeb[15] |io_oeb[15]
-gpio_analog[0] |gpio_analog[0]
-gpio_analog[10] |gpio_analog[10]
-gpio_analog[11] |gpio_analog[11]
-gpio_analog[12] |gpio_analog[12]
-gpio_analog[13] |gpio_analog[13]
-gpio_analog[14] |gpio_analog[14]
-gpio_analog[15] |gpio_analog[15]
-gpio_analog[16] |gpio_analog[16]
-gpio_analog[17] |gpio_analog[17]
-gpio_analog[1] |gpio_analog[1]
-gpio_analog[2] |gpio_analog[2]
-gpio_analog[4] |gpio_analog[4]
-gpio_analog[5] |gpio_analog[5]
-gpio_analog[6] |gpio_analog[6]
-gpio_analog[8] |gpio_analog[8]
-gpio_analog[9] |gpio_analog[9]
-gpio_noesd[0] |gpio_noesd[0]
-gpio_noesd[10] |gpio_noesd[10]
-gpio_noesd[11] |gpio_noesd[11]
-gpio_noesd[12] |gpio_noesd[12]
-gpio_noesd[13] |gpio_noesd[13]
-gpio_noesd[14] |gpio_noesd[14]
-gpio_noesd[15] |gpio_noesd[15]
-gpio_noesd[16] |gpio_noesd[16]
-gpio_noesd[17] |gpio_noesd[17]
-gpio_noesd[1] |gpio_noesd[1]
-gpio_noesd[2] |gpio_noesd[2]
-gpio_noesd[3] |gpio_noesd[3]
-gpio_noesd[4] |gpio_noesd[4]
-gpio_noesd[5] |gpio_noesd[5]
-gpio_noesd[6] |gpio_noesd[6]
-gpio_noesd[7] |gpio_noesd[7]
-gpio_noesd[8] |gpio_noesd[8]
-gpio_noesd[9] |gpio_noesd[9]
-io_analog[0] |io_analog[0]
-io_analog[10] |io_analog[10]
-io_analog[1] |io_analog[1]
-io_analog[2] |io_analog[2]
-io_analog[3] |io_analog[3]
-io_analog[7] |io_analog[7]
-io_analog[8] |io_analog[8]
-io_analog[9] |io_analog[9]
-io_analog[5] |io_analog[5]
-io_analog[6] |io_analog[6]
-io_in[0] |io_in[0]
-io_in[10] |io_in[10]
-io_in[11] |io_in[11]
-io_in[12] |io_in[12]
-io_in[13] |io_in[13]
-io_in[14] |io_in[14]
-io_in[15] |io_in[15]
-io_in[16] |io_in[16]
-io_in[17] |io_in[17]
-io_in[18] |io_in[18]
-io_in[19] |io_in[19]
-io_in[1] |io_in[1]
-io_in[20] |io_in[20]
-io_in[21] |io_in[21]
-io_in[22] |io_in[22]
-io_in[23] |io_in[23]
-io_in[24] |io_in[24]
-io_in[25] |io_in[25]
-io_in[26] |io_in[26]
-io_in[2] |io_in[2]
-io_in[3] |io_in[3]
-io_in[4] |io_in[4]
-io_in[5] |io_in[5]
-io_in[6] |io_in[6]
-io_in[7] |io_in[7]
-io_in[8] |io_in[8]
-io_in[9] |io_in[9]
-io_in_3v3[0] |io_in_3v3[0]
-io_in_3v3[10] |io_in_3v3[10]
-io_in_3v3[11] |io_in_3v3[11]
-io_in_3v3[12] |io_in_3v3[12]
-io_in_3v3[13] |io_in_3v3[13]
-io_in_3v3[14] |io_in_3v3[14]
-io_in_3v3[15] |io_in_3v3[15]
-io_in_3v3[16] |io_in_3v3[16]
-io_in_3v3[17] |io_in_3v3[17]
-io_in_3v3[18] |io_in_3v3[18]
-io_in_3v3[19] |io_in_3v3[19]
-io_in_3v3[1] |io_in_3v3[1]
-io_in_3v3[20] |io_in_3v3[20]
-io_in_3v3[21] |io_in_3v3[21]
-io_in_3v3[22] |io_in_3v3[22]
-io_in_3v3[23] |io_in_3v3[23]
-io_in_3v3[24] |io_in_3v3[24]
-io_in_3v3[25] |io_in_3v3[25]
-io_in_3v3[26] |io_in_3v3[26]
-io_in_3v3[2] |io_in_3v3[2]
-io_in_3v3[3] |io_in_3v3[3]
-io_in_3v3[4] |io_in_3v3[4]
-io_in_3v3[5] |io_in_3v3[5]
-io_in_3v3[6] |io_in_3v3[6]
-io_in_3v3[7] |io_in_3v3[7]
-io_in_3v3[8] |io_in_3v3[8]
-io_in_3v3[9] |io_in_3v3[9]
-io_oeb[0] |io_oeb[0]
-io_oeb[10] |io_oeb[10]
-io_oeb[13] |io_oeb[13]
-io_oeb[14] |io_oeb[14]
-io_oeb[17] |io_oeb[17]
-io_oeb[18] |io_oeb[18]
-io_oeb[19] |io_oeb[19]
-io_oeb[1] |io_oeb[1]
-io_oeb[20] |io_oeb[20]
-io_oeb[21] |io_oeb[21]
-io_oeb[22] |io_oeb[22]
-io_oeb[23] |io_oeb[23]
-io_oeb[24] |io_oeb[24]
-io_oeb[25] |io_oeb[25]
-io_oeb[26] |io_oeb[26]
-io_oeb[2] |io_oeb[2]
-io_oeb[3] |io_oeb[3]
-io_oeb[4] |io_oeb[4]
-io_oeb[5] |io_oeb[5]
-io_oeb[6] |io_oeb[6]
-io_oeb[7] |io_oeb[7]
-io_oeb[8] |io_oeb[8]
-io_oeb[9] |io_oeb[9]
-io_out[0] |io_out[0]
-io_out[10] |io_out[10]
-io_out[13] |io_out[13]
-io_out[14] |io_out[14]
-io_out[17] |io_out[17]
-io_out[18] |io_out[18]
-io_out[19] |io_out[19]
-io_out[1] |io_out[1]
-io_out[20] |io_out[20]
-io_out[21] |io_out[21]
-io_out[22] |io_out[22]
-io_out[23] |io_out[23]
-io_out[24] |io_out[24]
-io_out[25] |io_out[25]
-io_out[26] |io_out[26]
-io_out[2] |io_out[2]
-io_out[3] |io_out[3]
-io_out[4] |io_out[4]
-io_out[5] |io_out[5]
-io_out[6] |io_out[6]
-io_out[7] |io_out[7]
-io_out[8] |io_out[8]
-io_out[9] |io_out[9]
-la_data_in[0] |la_data_in[0]
-la_data_in[100] |la_data_in[100]
-la_data_in[101] |la_data_in[101]
-la_data_in[102] |la_data_in[102]
-la_data_in[103] |la_data_in[103]
-la_data_in[104] |la_data_in[104]
-la_data_in[105] |la_data_in[105]
-la_data_in[106] |la_data_in[106]
-la_data_in[107] |la_data_in[107]
-la_data_in[108] |la_data_in[108]
-la_data_in[109] |la_data_in[109]
-la_data_in[10] |la_data_in[10]
-la_data_in[110] |la_data_in[110]
-la_data_in[111] |la_data_in[111]
-la_data_in[112] |la_data_in[112]
-la_data_in[113] |la_data_in[113]
-la_data_in[114] |la_data_in[114]
-la_data_in[115] |la_data_in[115]
-la_data_in[116] |la_data_in[116]
-la_data_in[117] |la_data_in[117]
-la_data_in[118] |la_data_in[118]
-la_data_in[119] |la_data_in[119]
-la_data_in[11] |la_data_in[11]
-la_data_in[120] |la_data_in[120]
-la_data_in[121] |la_data_in[121]
-la_data_in[122] |la_data_in[122]
-la_data_in[123] |la_data_in[123]
-la_data_in[124] |la_data_in[124]
-la_data_in[125] |la_data_in[125]
-la_data_in[126] |la_data_in[126]
-la_data_in[127] |la_data_in[127]
-la_data_in[12] |la_data_in[12]
-la_data_in[13] |la_data_in[13]
-la_data_in[14] |la_data_in[14]
-la_data_in[15] |la_data_in[15]
-la_data_in[16] |la_data_in[16]
-la_data_in[17] |la_data_in[17]
-la_data_in[18] |la_data_in[18]
-la_data_in[19] |la_data_in[19]
-la_data_in[1] |la_data_in[1]
-la_data_in[20] |la_data_in[20]
-la_data_in[21] |la_data_in[21]
-la_data_in[22] |la_data_in[22]
-la_data_in[23] |la_data_in[23]
-la_data_in[24] |la_data_in[24]
-la_data_in[25] |la_data_in[25]
-la_data_in[26] |la_data_in[26]
-la_data_in[27] |la_data_in[27]
-la_data_in[28] |la_data_in[28]
-la_data_in[29] |la_data_in[29]
-la_data_in[2] |la_data_in[2]
-la_data_in[30] |la_data_in[30]
-la_data_in[31] |la_data_in[31]
-la_data_in[32] |la_data_in[32]
-la_data_in[33] |la_data_in[33]
-la_data_in[34] |la_data_in[34]
-la_data_in[35] |la_data_in[35]
-la_data_in[36] |la_data_in[36]
-la_data_in[37] |la_data_in[37]
-la_data_in[38] |la_data_in[38]
-la_data_in[39] |la_data_in[39]
-la_data_in[3] |la_data_in[3]
-la_data_in[40] |la_data_in[40]
-la_data_in[41] |la_data_in[41]
-la_data_in[42] |la_data_in[42]
-la_data_in[43] |la_data_in[43]
-la_data_in[44] |la_data_in[44]
-la_data_in[45] |la_data_in[45]
-la_data_in[46] |la_data_in[46]
-la_data_in[47] |la_data_in[47]
-la_data_in[48] |la_data_in[48]
-la_data_in[49] |la_data_in[49]
-la_data_in[4] |la_data_in[4]
-la_data_in[50] |la_data_in[50]
-la_data_in[51] |la_data_in[51]
-la_data_in[52] |la_data_in[52]
-la_data_in[53] |la_data_in[53]
-la_data_in[54] |la_data_in[54]
-la_data_in[55] |la_data_in[55]
-la_data_in[56] |la_data_in[56]
-la_data_in[57] |la_data_in[57]
-la_data_in[58] |la_data_in[58]
-la_data_in[59] |la_data_in[59]
-la_data_in[5] |la_data_in[5]
-la_data_in[60] |la_data_in[60]
-la_data_in[61] |la_data_in[61]
-la_data_in[62] |la_data_in[62]
-la_data_in[63] |la_data_in[63]
-la_data_in[64] |la_data_in[64]
-la_data_in[65] |la_data_in[65]
-la_data_in[66] |la_data_in[66]
-la_data_in[67] |la_data_in[67]
-la_data_in[68] |la_data_in[68]
-la_data_in[69] |la_data_in[69]
-la_data_in[6] |la_data_in[6]
-la_data_in[70] |la_data_in[70]
-la_data_in[71] |la_data_in[71]
-la_data_in[72] |la_data_in[72]
-la_data_in[73] |la_data_in[73]
-la_data_in[74] |la_data_in[74]
-la_data_in[75] |la_data_in[75]
-la_data_in[76] |la_data_in[76]
-la_data_in[77] |la_data_in[77]
-la_data_in[78] |la_data_in[78]
-la_data_in[79] |la_data_in[79]
-la_data_in[7] |la_data_in[7]
-la_data_in[80] |la_data_in[80]
-la_data_in[81] |la_data_in[81]
-la_data_in[82] |la_data_in[82]
-la_data_in[83] |la_data_in[83]
-la_data_in[84] |la_data_in[84]
-la_data_in[85] |la_data_in[85]
-la_data_in[86] |la_data_in[86]
-la_data_in[87] |la_data_in[87]
-la_data_in[88] |la_data_in[88]
-la_data_in[89] |la_data_in[89]
-la_data_in[8] |la_data_in[8]
-la_data_in[90] |la_data_in[90]
-la_data_in[91] |la_data_in[91]
-la_data_in[92] |la_data_in[92]
-la_data_in[93] |la_data_in[93]
-la_data_in[94] |la_data_in[94]
-la_data_in[95] |la_data_in[95]
-la_data_in[96] |la_data_in[96]
-la_data_in[97] |la_data_in[97]
-la_data_in[98] |la_data_in[98]
-la_data_in[99] |la_data_in[99]
-la_data_in[9] |la_data_in[9]
-la_data_out[0] |la_data_out[0]
-la_data_out[100] |la_data_out[100]
-la_data_out[101] |la_data_out[101]
-la_data_out[102] |la_data_out[102]
-la_data_out[103] |la_data_out[103]
-la_data_out[104] |la_data_out[104]
-la_data_out[105] |la_data_out[105]
-la_data_out[106] |la_data_out[106]
-la_data_out[107] |la_data_out[107]
-la_data_out[108] |la_data_out[108]
-la_data_out[109] |la_data_out[109]
-la_data_out[10] |la_data_out[10]
-la_data_out[110] |la_data_out[110]
-la_data_out[111] |la_data_out[111]
-la_data_out[112] |la_data_out[112]
-la_data_out[113] |la_data_out[113]
-la_data_out[114] |la_data_out[114]
-la_data_out[115] |la_data_out[115]
-la_data_out[116] |la_data_out[116]
-la_data_out[117] |la_data_out[117]
-la_data_out[118] |la_data_out[118]
-la_data_out[119] |la_data_out[119]
-la_data_out[11] |la_data_out[11]
-la_data_out[120] |la_data_out[120]
-la_data_out[121] |la_data_out[121]
-la_data_out[122] |la_data_out[122]
-la_data_out[123] |la_data_out[123]
-la_data_out[124] |la_data_out[124]
-la_data_out[125] |la_data_out[125]
-la_data_out[126] |la_data_out[126]
-la_data_out[127] |la_data_out[127]
-la_data_out[12] |la_data_out[12]
-la_data_out[13] |la_data_out[13]
-la_data_out[14] |la_data_out[14]
-la_data_out[15] |la_data_out[15]
-la_data_out[16] |la_data_out[16]
-la_data_out[17] |la_data_out[17]
-la_data_out[18] |la_data_out[18]
-la_data_out[19] |la_data_out[19]
-la_data_out[1] |la_data_out[1]
-la_data_out[20] |la_data_out[20]
-la_data_out[21] |la_data_out[21]
-la_data_out[22] |la_data_out[22]
-la_data_out[23] |la_data_out[23]
-la_data_out[24] |la_data_out[24]
-la_data_out[25] |la_data_out[25]
-la_data_out[26] |la_data_out[26]
-la_data_out[27] |la_data_out[27]
-la_data_out[28] |la_data_out[28]
-la_data_out[29] |la_data_out[29]
-la_data_out[2] |la_data_out[2]
-la_data_out[30] |la_data_out[30]
-la_data_out[31] |la_data_out[31]
-la_data_out[32] |la_data_out[32]
-la_data_out[33] |la_data_out[33]
-la_data_out[34] |la_data_out[34]
-la_data_out[35] |la_data_out[35]
-la_data_out[36] |la_data_out[36]
-la_data_out[37] |la_data_out[37]
-la_data_out[38] |la_data_out[38]
-la_data_out[39] |la_data_out[39]
-la_data_out[3] |la_data_out[3]
-la_data_out[40] |la_data_out[40]
-la_data_out[41] |la_data_out[41]
-la_data_out[42] |la_data_out[42]
-la_data_out[43] |la_data_out[43]
-la_data_out[44] |la_data_out[44]
-la_data_out[45] |la_data_out[45]
-la_data_out[46] |la_data_out[46]
-la_data_out[47] |la_data_out[47]
-la_data_out[48] |la_data_out[48]
-la_data_out[49] |la_data_out[49]
-la_data_out[4] |la_data_out[4]
-la_data_out[50] |la_data_out[50]
-la_data_out[51] |la_data_out[51]
-la_data_out[52] |la_data_out[52]
-la_data_out[53] |la_data_out[53]
-la_data_out[54] |la_data_out[54]
-la_data_out[55] |la_data_out[55]
-la_data_out[56] |la_data_out[56]
-la_data_out[57] |la_data_out[57]
-la_data_out[58] |la_data_out[58]
-la_data_out[59] |la_data_out[59]
-la_data_out[5] |la_data_out[5]
-la_data_out[60] |la_data_out[60]
-la_data_out[61] |la_data_out[61]
-la_data_out[62] |la_data_out[62]
-la_data_out[63] |la_data_out[63]
-la_data_out[64] |la_data_out[64]
-la_data_out[65] |la_data_out[65]
-la_data_out[66] |la_data_out[66]
-la_data_out[67] |la_data_out[67]
-la_data_out[68] |la_data_out[68]
-la_data_out[69] |la_data_out[69]
-la_data_out[6] |la_data_out[6]
-la_data_out[70] |la_data_out[70]
-la_data_out[71] |la_data_out[71]
-la_data_out[72] |la_data_out[72]
-la_data_out[73] |la_data_out[73]
-la_data_out[74] |la_data_out[74]
-la_data_out[75] |la_data_out[75]
-la_data_out[76] |la_data_out[76]
-la_data_out[77] |la_data_out[77]
-la_data_out[78] |la_data_out[78]
-la_data_out[79] |la_data_out[79]
-la_data_out[7] |la_data_out[7]
-la_data_out[80] |la_data_out[80]
-la_data_out[81] |la_data_out[81]
-la_data_out[82] |la_data_out[82]
-la_data_out[83] |la_data_out[83]
-la_data_out[84] |la_data_out[84]
-la_data_out[85] |la_data_out[85]
-la_data_out[86] |la_data_out[86]
-la_data_out[87] |la_data_out[87]
-la_data_out[88] |la_data_out[88]
-la_data_out[89] |la_data_out[89]
-la_data_out[8] |la_data_out[8]
-la_data_out[90] |la_data_out[90]
-la_data_out[91] |la_data_out[91]
-la_data_out[92] |la_data_out[92]
-la_data_out[93] |la_data_out[93]
-la_data_out[94] |la_data_out[94]
-la_data_out[95] |la_data_out[95]
-la_data_out[96] |la_data_out[96]
-la_data_out[97] |la_data_out[97]
-la_data_out[98] |la_data_out[98]
-la_data_out[99] |la_data_out[99]
-la_data_out[9] |la_data_out[9]
-la_oenb[0] |la_oenb[0]
-la_oenb[100] |la_oenb[100]
-la_oenb[101] |la_oenb[101]
-la_oenb[102] |la_oenb[102]
-la_oenb[103] |la_oenb[103]
-la_oenb[104] |la_oenb[104]
-la_oenb[105] |la_oenb[105]
-la_oenb[106] |la_oenb[106]
-la_oenb[107] |la_oenb[107]
-la_oenb[108] |la_oenb[108]
-la_oenb[109] |la_oenb[109]
-la_oenb[10] |la_oenb[10]
-la_oenb[110] |la_oenb[110]
-la_oenb[111] |la_oenb[111]
-la_oenb[112] |la_oenb[112]
-la_oenb[113] |la_oenb[113]
-la_oenb[114] |la_oenb[114]
-la_oenb[115] |la_oenb[115]
-la_oenb[116] |la_oenb[116]
-la_oenb[117] |la_oenb[117]
-la_oenb[118] |la_oenb[118]
-la_oenb[119] |la_oenb[119]
-la_oenb[11] |la_oenb[11]
-la_oenb[120] |la_oenb[120]
-la_oenb[121] |la_oenb[121]
-la_oenb[122] |la_oenb[122]
-la_oenb[123] |la_oenb[123]
-la_oenb[124] |la_oenb[124]
-la_oenb[125] |la_oenb[125]
-la_oenb[126] |la_oenb[126]
-la_oenb[127] |la_oenb[127]
-la_oenb[12] |la_oenb[12]
-la_oenb[13] |la_oenb[13]
-la_oenb[14] |la_oenb[14]
-la_oenb[15] |la_oenb[15]
-la_oenb[16] |la_oenb[16]
-la_oenb[17] |la_oenb[17]
-la_oenb[18] |la_oenb[18]
-la_oenb[19] |la_oenb[19]
-la_oenb[1] |la_oenb[1]
-la_oenb[20] |la_oenb[20]
-la_oenb[21] |la_oenb[21]
-la_oenb[22] |la_oenb[22]
-la_oenb[23] |la_oenb[23]
-la_oenb[24] |la_oenb[24]
-la_oenb[25] |la_oenb[25]
-la_oenb[26] |la_oenb[26]
-la_oenb[27] |la_oenb[27]
-la_oenb[28] |la_oenb[28]
-la_oenb[29] |la_oenb[29]
-la_oenb[2] |la_oenb[2]
-la_oenb[30] |la_oenb[30]
-la_oenb[31] |la_oenb[31]
-la_oenb[32] |la_oenb[32]
-la_oenb[33] |la_oenb[33]
-la_oenb[34] |la_oenb[34]
-la_oenb[35] |la_oenb[35]
-la_oenb[36] |la_oenb[36]
-la_oenb[37] |la_oenb[37]
-la_oenb[38] |la_oenb[38]
-la_oenb[39] |la_oenb[39]
-la_oenb[3] |la_oenb[3]
-la_oenb[40] |la_oenb[40]
-la_oenb[41] |la_oenb[41]
-la_oenb[42] |la_oenb[42]
-la_oenb[43] |la_oenb[43]
-la_oenb[44] |la_oenb[44]
-la_oenb[45] |la_oenb[45]
-la_oenb[46] |la_oenb[46]
-la_oenb[47] |la_oenb[47]
-la_oenb[48] |la_oenb[48]
-la_oenb[49] |la_oenb[49]
-la_oenb[4] |la_oenb[4]
-la_oenb[50] |la_oenb[50]
-la_oenb[51] |la_oenb[51]
-la_oenb[52] |la_oenb[52]
-la_oenb[53] |la_oenb[53]
-la_oenb[54] |la_oenb[54]
-la_oenb[55] |la_oenb[55]
-la_oenb[56] |la_oenb[56]
-la_oenb[57] |la_oenb[57]
-la_oenb[58] |la_oenb[58]
-la_oenb[59] |la_oenb[59]
-la_oenb[5] |la_oenb[5]
-la_oenb[60] |la_oenb[60]
-la_oenb[61] |la_oenb[61]
-la_oenb[62] |la_oenb[62]
-la_oenb[63] |la_oenb[63]
-la_oenb[64] |la_oenb[64]
-la_oenb[65] |la_oenb[65]
-la_oenb[66] |la_oenb[66]
-la_oenb[67] |la_oenb[67]
-la_oenb[68] |la_oenb[68]
-la_oenb[69] |la_oenb[69]
-la_oenb[6] |la_oenb[6]
-la_oenb[70] |la_oenb[70]
-la_oenb[71] |la_oenb[71]
-la_oenb[72] |la_oenb[72]
-la_oenb[73] |la_oenb[73]
-la_oenb[74] |la_oenb[74]
-la_oenb[75] |la_oenb[75]
-la_oenb[76] |la_oenb[76]
-la_oenb[77] |la_oenb[77]
-la_oenb[78] |la_oenb[78]
-la_oenb[79] |la_oenb[79]
-la_oenb[7] |la_oenb[7]
-la_oenb[80] |la_oenb[80]
-la_oenb[81] |la_oenb[81]
-la_oenb[82] |la_oenb[82]
-la_oenb[83] |la_oenb[83]
-la_oenb[84] |la_oenb[84]
-la_oenb[85] |la_oenb[85]
-la_oenb[86] |la_oenb[86]
-la_oenb[87] |la_oenb[87]
-la_oenb[88] |la_oenb[88]
-la_oenb[89] |la_oenb[89]
-la_oenb[8] |la_oenb[8]
-la_oenb[90] |la_oenb[90]
-la_oenb[91] |la_oenb[91]
-la_oenb[92] |la_oenb[92]
-la_oenb[93] |la_oenb[93]
-la_oenb[94] |la_oenb[94]
-la_oenb[95] |la_oenb[95]
-la_oenb[96] |la_oenb[96]
-la_oenb[97] |la_oenb[97]
-la_oenb[98] |la_oenb[98]
-la_oenb[99] |la_oenb[99]
-la_oenb[9] |la_oenb[9]
-user_clock2 |user_clock2
-user_irq[0] |user_irq[0]
-user_irq[1] |user_irq[1]
-user_irq[2] |user_irq[2]
-vccd2 |vccd2
-vdda2 |vdda2
-vssa2 |vssa2
-vssd2 |vssd2
-wb_clk_i |wb_clk_i
-wb_rst_i |wb_rst_i
-wbs_ack_o |wbs_ack_o
-wbs_adr_i[0] |wbs_adr_i[0]
-wbs_adr_i[10] |wbs_adr_i[10]
-wbs_adr_i[11] |wbs_adr_i[11]
-wbs_adr_i[12] |wbs_adr_i[12]
-wbs_adr_i[13] |wbs_adr_i[13]
-wbs_adr_i[14] |wbs_adr_i[14]
-wbs_adr_i[15] |wbs_adr_i[15]
-wbs_adr_i[16] |wbs_adr_i[16]
-wbs_adr_i[17] |wbs_adr_i[17]
-wbs_adr_i[18] |wbs_adr_i[18]
-wbs_adr_i[19] |wbs_adr_i[19]
-wbs_adr_i[1] |wbs_adr_i[1]
-wbs_adr_i[20] |wbs_adr_i[20]
-wbs_adr_i[21] |wbs_adr_i[21]
-wbs_adr_i[22] |wbs_adr_i[22]
-wbs_adr_i[23] |wbs_adr_i[23]
-wbs_adr_i[24] |wbs_adr_i[24]
-wbs_adr_i[25] |wbs_adr_i[25]
-wbs_adr_i[26] |wbs_adr_i[26]
-wbs_adr_i[27] |wbs_adr_i[27]
-wbs_adr_i[28] |wbs_adr_i[28]
-wbs_adr_i[29] |wbs_adr_i[29]
-wbs_adr_i[2] |wbs_adr_i[2]
-wbs_adr_i[30] |wbs_adr_i[30]
-wbs_adr_i[31] |wbs_adr_i[31]
-wbs_adr_i[3] |wbs_adr_i[3]
-wbs_adr_i[4] |wbs_adr_i[4]
-wbs_adr_i[5] |wbs_adr_i[5]
-wbs_adr_i[6] |wbs_adr_i[6]
-wbs_adr_i[7] |wbs_adr_i[7]
-wbs_adr_i[8] |wbs_adr_i[8]
-wbs_adr_i[9] |wbs_adr_i[9]
-wbs_cyc_i |wbs_cyc_i
-wbs_dat_i[0] |wbs_dat_i[0]
-wbs_dat_i[10] |wbs_dat_i[10]
-wbs_dat_i[11] |wbs_dat_i[11]
-wbs_dat_i[12] |wbs_dat_i[12]
-wbs_dat_i[13] |wbs_dat_i[13]
-wbs_dat_i[14] |wbs_dat_i[14]
-wbs_dat_i[15] |wbs_dat_i[15]
-wbs_dat_i[16] |wbs_dat_i[16]
-wbs_dat_i[17] |wbs_dat_i[17]
-wbs_dat_i[18] |wbs_dat_i[18]
-wbs_dat_i[19] |wbs_dat_i[19]
-wbs_dat_i[1] |wbs_dat_i[1]
-wbs_dat_i[20] |wbs_dat_i[20]
-wbs_dat_i[21] |wbs_dat_i[21]
-wbs_dat_i[22] |wbs_dat_i[22]
-wbs_dat_i[23] |wbs_dat_i[23]
-wbs_dat_i[24] |wbs_dat_i[24]
-wbs_dat_i[25] |wbs_dat_i[25]
-wbs_dat_i[26] |wbs_dat_i[26]
-wbs_dat_i[27] |wbs_dat_i[27]
-wbs_dat_i[28] |wbs_dat_i[28]
-wbs_dat_i[29] |wbs_dat_i[29]
-wbs_dat_i[2] |wbs_dat_i[2]
-wbs_dat_i[30] |wbs_dat_i[30]
-wbs_dat_i[31] |wbs_dat_i[31]
-wbs_dat_i[3] |wbs_dat_i[3]
-wbs_dat_i[4] |wbs_dat_i[4]
-wbs_dat_i[5] |wbs_dat_i[5]
-wbs_dat_i[6] |wbs_dat_i[6]
-wbs_dat_i[7] |wbs_dat_i[7]
-wbs_dat_i[8] |wbs_dat_i[8]
-wbs_dat_i[9] |wbs_dat_i[9]
-wbs_dat_o[0] |wbs_dat_o[0]
-wbs_dat_o[10] |wbs_dat_o[10]
-wbs_dat_o[11] |wbs_dat_o[11]
-wbs_dat_o[12] |wbs_dat_o[12]
-wbs_dat_o[13] |wbs_dat_o[13]
-wbs_dat_o[14] |wbs_dat_o[14]
-wbs_dat_o[15] |wbs_dat_o[15]
-wbs_dat_o[16] |wbs_dat_o[16]
-wbs_dat_o[17] |wbs_dat_o[17]
-wbs_dat_o[18] |wbs_dat_o[18]
-wbs_dat_o[19] |wbs_dat_o[19]
-wbs_dat_o[1] |wbs_dat_o[1]
-wbs_dat_o[20] |wbs_dat_o[20]
-wbs_dat_o[21] |wbs_dat_o[21]
-wbs_dat_o[22] |wbs_dat_o[22]
-wbs_dat_o[23] |wbs_dat_o[23]
-wbs_dat_o[24] |wbs_dat_o[24]
-wbs_dat_o[25] |wbs_dat_o[25]
-wbs_dat_o[26] |wbs_dat_o[26]
-wbs_dat_o[27] |wbs_dat_o[27]
-wbs_dat_o[28] |wbs_dat_o[28]
-wbs_dat_o[29] |wbs_dat_o[29]
-wbs_dat_o[2] |wbs_dat_o[2]
-wbs_dat_o[30] |wbs_dat_o[30]
-wbs_dat_o[31] |wbs_dat_o[31]
-wbs_dat_o[3] |wbs_dat_o[3]
-wbs_dat_o[4] |wbs_dat_o[4]
-wbs_dat_o[5] |wbs_dat_o[5]
-wbs_dat_o[6] |wbs_dat_o[6]
-wbs_dat_o[7] |wbs_dat_o[7]
-wbs_dat_o[8] |wbs_dat_o[8]
-wbs_dat_o[9] |wbs_dat_o[9]
-wbs_sel_i[0] |wbs_sel_i[0]
-wbs_sel_i[1] |wbs_sel_i[1]
-wbs_sel_i[2] |wbs_sel_i[2]
-wbs_sel_i[3] |wbs_sel_i[3]
-wbs_stb_i |wbs_stb_i
-wbs_we_i |wbs_we_i
----------------------------------------------------------------------------------------
-Cell pin lists are equivalent.
-Device classes user_analog_project_wrapper and user_analog_project_wrapper are equivalent.
-Circuits match uniquely.
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index 90aae55..19d739f 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice
@@ -89,10 +89,10 @@
+ io_clamp_high[2] io_clamp_high[1] io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_clock2
+ user_irq[2] user_irq[1] user_irq[0]
x1 io_analog[4] io_analog[5] io_analog[1] io_analog[2] io_analog[3] io_analog[0] vssa1 1T1R_2x2
-x2 vssa1 vssa1 vccd1 vccd1 gpio_analog[7] gpio_analog[8] gpio_analog[6] sky130_sc_ams__ota_1
-x3 io_in[13] io_analog[7] io_analog[6] vccd1 vccd1 vssa1 vssa1 io_out[13]
-+ sky130_sc_ams__comparator_1
x4 io_analog[10] io_analog[8] vssa2 io_analog[9] FG_pfet
+x5 gpio_analog[7] gpio_analog[8] io_analog[6] net1 vccd1 vssd1 C4
+x3 vccd1 vccd1 vssd1 vssd1 net1 gpio_noesd[4] gpio_noesd[4] sky130_sc_ams__ota_1
+x8 gpio_analog[10] net3 net2 gpio_analog[11] gpio_analog[12] gpio_analog[9] hv_tgate
.ends
@@ -318,4 +318,61 @@
+ sa=0 sb=0 sd=0 mult=1 m=1
.ends
+* expanding symbol: hv_tgate.sym # of pins=6
+** sym_path: /home/charana/IC/design/mixed-signal-re-ram-mpw-6/xschem/hv_tgate.sym
+** sch_path: /home/charana/IC/design/mixed-signal-re-ram-mpw-6/xschem/hv_tgate.sch
+.subckt hv_tgate S_NOT VGND VHVPWR A B S
+*.ipin S
+*.ipin S_NOT
+*.iopin VHVPWR
+*.iopin A
+*.iopin B
+*.iopin VGND
+XM1 A pgate B VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=10 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=10 m=10
+XM2 A pgate B VHVPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=10 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=10 m=10
+XM9 pgate pgate VHVPWR VHVPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=10 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM4 VHVPWR pgate pgate VHVPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=10 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+Xx3 pgate S VGND VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=10 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+Xx6 pgate S_NOT VGND VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=10 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+.ends
+
+
+* expanding symbol: C4.sym # of pins=6
+** sym_path: /home/charana/IC/design/mixed-signal-re-ram-mpw-6/xschem/C4.sym
+** sch_path: /home/charana/IC/design/mixed-signal-re-ram-mpw-6/xschem/C4.sch
+.subckt C4 vth vtl vin vout 1v8 vssa
+*.ipin vth
+*.ipin vtl
+*.ipin vin
+*.opin vout
+*.iopin vssa
+*.iopin 1v8
+XM2 net1 vtl vssa vssa sky130_fd_pr__nfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM1 1v8 vout net1 vssa sky130_fd_pr__nfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM4 vout net1 vssa vssa sky130_fd_pr__nfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM3 vout vth 1v8 1v8 sky130_fd_pr__pfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XC2 net1 vin sky130_fd_pr__cap_mim_m3_1 W=5.5 L=4.4 MF=1 m=1
+XC1 1v8 net1 sky130_fd_pr__cap_mim_m3_1 W=5.5 L=4.4 MF=1 m=1
+XC3 vout vssa sky130_fd_pr__cap_mim_m3_1 W=3.22 L=4.38 MF=1 m=1
+.ends
.end
diff --git a/xschem/C4.spice b/xschem/C4.spice
deleted file mode 100644
index 4b3ffd1..0000000
--- a/xschem/C4.spice
+++ /dev/null
@@ -1,110 +0,0 @@
-** sch_path: /home/charana/IC/design/mixed-signal-re-ram-mpw-6/xschem/C4.sch
-**.subckt C4 vth vtl vin vout vssa 1v8
-*.ipin vth
-*.ipin vtl
-*.ipin vin
-*.opin vout
-*.iopin vssa
-*.iopin 1v8
-XM2 net1 vtl vssa vssa sky130_fd_pr__nfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM1 1v8 net2 net1 vssa sky130_fd_pr__nfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM4 net2 net1 vssa vssa sky130_fd_pr__nfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM3 net2 vth 1v8 1v8 sky130_fd_pr__pfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XC2 net1 vin sky130_fd_pr__cap_mim_m3_1 W=3 L=3 MF=100 m=100
-XC1 1v8 net1 sky130_fd_pr__cap_mim_m3_1 W=3 L=3 MF=100 m=100
-XC3 net2 vssa sky130_fd_pr__cap_mim_m3_1 W=3 L=3 MF=100 m=100
-x1 1v8 1v8 vssa vssa net2 vout vout sky130_sc_ams__ota_1
-**.ends
-
-* expanding symbol: sky130_sc_ams__ota_1.sym # of pins=7
-** sym_path: /home/charana/IC/design/mixed-signal-re-ram-mpw-6/xschem/sky130_sc_ams__ota_1.sym
-** sch_path: /home/charana/IC/design/mixed-signal-re-ram-mpw-6/xschem/sky130_sc_ams__ota_1.sch
-.subckt sky130_sc_ams__ota_1 VPWR VPB VNB VGND Vin1 Vin2 Iout
-*.ipin Vin1
-*.ipin Vin2
-*.ipin VGND
-*.ipin VNB
-*.ipin VPB
-*.ipin VPWR
-*.opin Iout
-XM7 Iout net2 VPWR VPB sky130_fd_pr__pfet_01v8 L=0.30 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM8 net3 net1 VPWR VPB sky130_fd_pr__pfet_01v8 L=0.15 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM9 net2 net2 VPWR VPB sky130_fd_pr__pfet_01v8 L=0.15 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM1 net5 net4 VGND VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM10 net4 net4 VGND VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM11 net6 net4 net8 VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=8 m=8
-XM12 net6 net6 VPWR VPB sky130_fd_pr__pfet_01v8 L=0.15 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM13 net4 net6 VPWR VPB sky130_fd_pr__pfet_01v8 L=0.15 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM14 net6 net7 net4 VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM16 net7 net4 VGND VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM2 net1 Vin2 net5 VNB sky130_fd_pr__nfet_01v8 L=0.15 W=1.06 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM3 net2 Vin1 net5 VNB sky130_fd_pr__nfet_01v8 L=0.15 W=1.06 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM17 net3 VGND VGND VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=2 m=2
-XM18 net1 VGND VGND VNB sky130_fd_pr__nfet_01v8 L=0.15 W=1.06 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=2 m=2
-XM19 net2 VPWR VPWR VPB sky130_fd_pr__pfet_01v8 L=0.15 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=2 m=2
-XM20 net1 VPWR VPWR VPB sky130_fd_pr__pfet_01v8 L=0.15 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=2 m=2
-XM4 net3 net3 VGND VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM21 net4 VGND VGND VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=2 m=2
-XM22 net6 VPWR VPWR VPB sky130_fd_pr__pfet_01v8 L=0.15 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=2 m=2
-XM15 net7 net7 VPWR VPB sky130_fd_pr__pfet_01v8 L=4.20 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM23 net6 VGND VGND VNB sky130_fd_pr__nfet_01v8 L=0.15 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=2 m=2
-XR2 VGND net8 VNB sky130_fd_pr__res_xhigh_po W=1.41 L=0.70 mult=1 m=1
-XM6 net1 net1 VPWR VPB sky130_fd_pr__pfet_01v8 L=0.15 W=0.61 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-XM5 Iout net3 VGND VNB sky130_fd_pr__nfet_01v8 L=0.30 W=0.70 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=4 m=4
-.ends
-
-.end
diff --git a/xschem/analog_wrapper_tb.spice b/xschem/analog_wrapper_tb.spice
deleted file mode 100644
index 523a509..0000000
--- a/xschem/analog_wrapper_tb.spice
+++ /dev/null
@@ -1,283 +0,0 @@
-**.subckt analog_wrapper_tb
-x1 net1 net6 GND net7 net2 net8 net9 net10 net16 net17 net18 net19 net20 net21[3] net21[2] net21[1]
-+ net21[0] net22[31] net22[30] net22[29] net22[28] net22[27] net22[26] net22[25] net22[24] net22[23] net22[22]
-+ net22[21] net22[20] net22[19] net22[18] net22[17] net22[16] net22[15] net22[14] net22[13] net22[12] net22[11]
-+ net22[10] net22[9] net22[8] net22[7] net22[6] net22[5] net22[4] net22[3] net22[2] net22[1] net22[0] net23[31]
-+ net23[30] net23[29] net23[28] net23[27] net23[26] net23[25] net23[24] net23[23] net23[22] net23[21] net23[20]
-+ net23[19] net23[18] net23[17] net23[16] net23[15] net23[14] net23[13] net23[12] net23[11] net23[10] net23[9]
-+ net23[8] net23[7] net23[6] net23[5] net23[4] net23[3] net23[2] net23[1] net23[0] net11 net12[31] net12[30]
-+ net12[29] net12[28] net12[27] net12[26] net12[25] net12[24] net12[23] net12[22] net12[21] net12[20] net12[19]
-+ net12[18] net12[17] net12[16] net12[15] net12[14] net12[13] net12[12] net12[11] net12[10] net12[9] net12[8]
-+ net12[7] net12[6] net12[5] net12[4] net12[3] net12[2] net12[1] net12[0] net24[127] net24[126] net24[125]
-+ net24[124] net24[123] net24[122] net24[121] net24[120] net24[119] net24[118] net24[117] net24[116] net24[115]
-+ net24[114] net24[113] net24[112] net24[111] net24[110] net24[109] net24[108] net24[107] net24[106] net24[105]
-+ net24[104] net24[103] net24[102] net24[101] net24[100] net24[99] net24[98] net24[97] net24[96] net24[95]
-+ net24[94] net24[93] net24[92] net24[91] net24[90] net24[89] net24[88] net24[87] net24[86] net24[85] net24[84]
-+ net24[83] net24[82] net24[81] net24[80] net24[79] net24[78] net24[77] net24[76] net24[75] net24[74] net24[73]
-+ net24[72] net24[71] net24[70] net24[69] net24[68] net24[67] net24[66] net24[65] net24[64] net24[63] net24[62]
-+ net24[61] net24[60] net24[59] net24[58] net24[57] net24[56] net24[55] net24[54] net24[53] net24[52] net24[51]
-+ net24[50] net24[49] net24[48] net24[47] net24[46] net24[45] net24[44] net24[43] net24[42] net24[41] net24[40]
-+ net24[39] net24[38] net24[37] net24[36] net24[35] net24[34] net24[33] net24[32] net24[31] net24[30] net24[29]
-+ net24[28] net24[27] net24[26] net24[25] net24[24] net24[23] net24[22] net24[21] net24[20] net24[19] net24[18]
-+ net24[17] net24[16] net24[15] net24[14] net24[13] net24[12] net24[11] net24[10] net24[9] net24[8] net24[7]
-+ net24[6] net24[5] net24[4] net24[3] net24[2] net24[1] net24[0] net13[127] net13[126] net13[125] net13[124]
-+ net13[123] net13[122] net13[121] net13[120] net13[119] net13[118] net13[117] net13[116] net13[115] net13[114]
-+ net13[113] net13[112] net13[111] net13[110] net13[109] net13[108] net13[107] net13[106] net13[105] net13[104]
-+ net13[103] net13[102] net13[101] net13[100] net13[99] net13[98] net13[97] net13[96] net13[95] net13[94]
-+ net13[93] net13[92] net13[91] net13[90] net13[89] net13[88] net13[87] net13[86] net13[85] net13[84] net13[83]
-+ net13[82] net13[81] net13[80] net13[79] net13[78] net13[77] net13[76] net13[75] net13[74] net13[73] net13[72]
-+ net13[71] net13[70] net13[69] net13[68] net13[67] net13[66] net13[65] net13[64] net13[63] net13[62] net13[61]
-+ net13[60] net13[59] net13[58] net13[57] net13[56] net13[55] net13[54] net13[53] net13[52] net13[51] net13[50]
-+ net13[49] net13[48] net13[47] net13[46] net13[45] net13[44] net13[43] net13[42] net13[41] net13[40] net13[39]
-+ net13[38] net13[37] net13[36] net13[35] net13[34] net13[33] net13[32] net13[31] net13[30] net13[29] net13[28]
-+ net13[27] net13[26] net13[25] net13[24] net13[23] net13[22] net13[21] net13[20] net13[19] net13[18] net13[17]
-+ net13[16] net13[15] net13[14] net13[13] net13[12] net13[11] net13[10] net13[9] net13[8] net13[7] net13[6]
-+ net13[5] net13[4] net13[3] net13[2] net13[1] net13[0] net25[127] net25[126] net25[125] net25[124] net25[123]
-+ net25[122] net25[121] net25[120] net25[119] net25[118] net25[117] net25[116] net25[115] net25[114] net25[113]
-+ net25[112] net25[111] net25[110] net25[109] net25[108] net25[107] net25[106] net25[105] net25[104] net25[103]
-+ net25[102] net25[101] net25[100] net25[99] net25[98] net25[97] net25[96] net25[95] net25[94] net25[93]
-+ net25[92] net25[91] net25[90] net25[89] net25[88] net25[87] net25[86] net25[85] net25[84] net25[83] net25[82]
-+ net25[81] net25[80] net25[79] net25[78] net25[77] net25[76] net25[75] net25[74] net25[73] net25[72] net25[71]
-+ net25[70] net25[69] net25[68] net25[67] net25[66] net25[65] net25[64] net25[63] net25[62] net25[61] net25[60]
-+ net25[59] net25[58] net25[57] net25[56] net25[55] net25[54] net25[53] net25[52] net25[51] net25[50] net25[49]
-+ net25[48] net25[47] net25[46] net25[45] net25[44] net25[43] net25[42] net25[41] net25[40] net25[39] net25[38]
-+ net25[37] net25[36] net25[35] net25[34] net25[33] net25[32] net25[31] net25[30] net25[29] net25[28] net25[27]
-+ net25[26] net25[25] net25[24] net25[23] net25[22] net25[21] net25[20] net25[19] net25[18] net25[17] net25[16]
-+ net25[15] net25[14] net25[13] net25[12] net25[11] net25[10] net25[9] net25[8] net25[7] net25[6] net25[5]
-+ net25[4] net25[3] net25[2] net25[1] net25[0] net26[26] net26[25] net26[24] net26[23] net26[22] net26[21]
-+ net26[20] net26[19] net26[18] net26[17] net26[16] net26[15] net26[14] net26[13] net26[12] net26[11] net26[10]
-+ net26[9] net26[8] net26[7] net26[6] net26[5] net26[4] net26[3] net26[2] net26[1] net26[0] net27[26]
-+ net27[25] net27[24] net27[23] net27[22] net27[21] net27[20] net27[19] net27[18] net27[17] net27[16] net27[15]
-+ net27[14] net27[13] net27[12] net27[11] net27[10] net27[9] net27[8] net27[7] net27[6] net27[5] net27[4]
-+ net27[3] net27[2] net27[1] net27[0] net29[26] net29[25] net29[24] net29[23] net29[22] net29[21] net29[20]
-+ net29[19] net29[18] net29[17] net29[16] net29[15] net29[14] net29[13] net29[12] net29[11] net29[10] net29[9]
-+ net29[8] net29[7] net29[6] net29[5] net29[4] net29[3] net29[2] net29[1] net29[0] net30[26] net30[25]
-+ net30[24] net30[23] net30[22] net30[21] net30[20] net30[19] net30[18] net30[17] net30[16] net30[15] net30[14]
-+ net30[13] net30[12] net30[11] net30[10] net30[9] net30[8] net30[7] net30[6] net30[5] net30[4] net30[3]
-+ net30[2] net30[1] net30[0] net31[17] net31[16] net31[15] net31[14] net31[13] net31[12] net31[11] net31[10]
-+ net31[9] net31[8] net31[7] net31[6] net31[5] net31[4] net31[3] net31[2] net31[1] net31[0] net14[17]
-+ net14[16] net14[15] net14[14] net14[13] net14[12] net14[11] net14[10] net14[9] net14[8] net14[7] net14[6]
-+ net14[5] net14[4] net14[3] net14[2] net14[1] net14[0] net3[10] net3[9] net3[8] net3[7] net3[6] net3[5]
-+ net3[4] net3[3] net3[2] net3[1] net3[0] net4[2] net4[1] net4[0] net5[2] net5[1] net5[0] net28 net15[2]
-+ net15[1] net15[0] user_analog_project_wrapper
-V1 net1 GND PWL(0.0 0 400u 0 5.4m 3.3)
-V2 net2 GND PWL(0.0 0 300u 0 5.3 1.8)
-V3 io_analog[4] GND PWL(0.0 0 100u 0 5m 3.3)
-**** begin user architecture code
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
-
-.control
-tran 10u 20m
-plot V("io_out[11]") V("io_out[12]") V("io_out[15]") V("io_out[16]") V("gpio_analog[3]")
-+ V("gpio_analog[7]")
-.endc
-
-**** end user architecture code
-**.ends
-
-* expanding symbol: user_analog_project_wrapper.sym # of pins=32
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/user_analog_project_wrapper.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/user_analog_project_wrapper.sch
-.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
-+ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
-+ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
-+ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
-+ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
-+ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
-+ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
-+ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
-+ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
-+ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
-+ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
-+ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
-+ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
-+ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
-+ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
-+ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
-+ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
-+ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
-+ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
-+ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
-+ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
-+ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
-+ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
-+ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
-+ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
-+ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
-+ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
-+ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
-+ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
-+ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
-+ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
-+ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
-+ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
-+ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
-+ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
-+ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
-+ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
-+ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
-+ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
-+ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
-+ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
-+ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
-+ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
-+ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
-+ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
-+ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
-+ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
-+ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
-+ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
-+ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
-+ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0]
-+ la_oenb[127] la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120]
-+ la_oenb[119] la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112]
-+ la_oenb[111] la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104]
-+ la_oenb[103] la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95]
-+ la_oenb[94] la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86]
-+ la_oenb[85] la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77]
-+ la_oenb[76] la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68]
-+ la_oenb[67] la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59]
-+ la_oenb[58] la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50]
-+ la_oenb[49] la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41]
-+ la_oenb[40] la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32]
-+ la_oenb[31] la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23]
-+ la_oenb[22] la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14]
-+ la_oenb[13] la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5]
-+ la_oenb[4] la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0] io_in[26] io_in[25] io_in[24] io_in[23] io_in[22]
-+ io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15] io_in[14] io_in[13] io_in[12] io_in[11]
-+ io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4] io_in[3] io_in[2] io_in[1] io_in[0]
-+ io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22] io_in_3v3[21] io_in_3v3[20] io_in_3v3[19]
-+ io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14] io_in_3v3[13] io_in_3v3[12] io_in_3v3[11]
-+ io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6] io_in_3v3[5] io_in_3v3[4] io_in_3v3[3]
-+ io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] io_out[26] io_out[25] io_out[24] io_out[23] io_out[22] io_out[21]
-+ io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15] io_out[14] io_out[13] io_out[12] io_out[11]
-+ io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5] io_out[4] io_out[3] io_out[2] io_out[1] io_out[0]
-+ io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22] io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17]
-+ io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12] io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7]
-+ io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2] io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16]
-+ gpio_analog[15] gpio_analog[14] gpio_analog[13] gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9]
-+ gpio_analog[8] gpio_analog[7] gpio_analog[6] gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2]
-+ gpio_analog[1] gpio_analog[0] gpio_noesd[17] gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13]
-+ gpio_noesd[12] gpio_noesd[11] gpio_noesd[10] gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5]
-+ gpio_noesd[4] gpio_noesd[3] gpio_noesd[2] gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8]
-+ io_analog[7] io_analog[6] io_analog[5] io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0]
-+ io_clamp_high[2] io_clamp_high[1] io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_clock2
-+ user_irq[2] user_irq[1] user_irq[0]
-*.iopin vdda1
-*.iopin vdda2
-*.iopin vssa1
-*.iopin vssa2
-*.iopin vccd1
-*.iopin vccd2
-*.iopin vssd1
-*.iopin vssd2
-*.ipin wb_clk_i
-*.ipin wb_rst_i
-*.ipin wbs_stb_i
-*.ipin wbs_cyc_i
-*.ipin wbs_we_i
-*.ipin wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
-*.ipin
-*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
-*.ipin
-*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0]
-*.opin wbs_ack_o
-*.opin
-*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
-*.ipin
-*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
-*.opin
-*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
-*.ipin
-*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
-*.ipin
-*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0]
-*.ipin user_clock2
-*.opin
-*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
-*.opin
-*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
-*.iopin
-*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
-*.iopin
-*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
-*.iopin
-*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0]
-*.iopin io_clamp_high[2],io_clamp_high[1],io_clamp_high[0]
-*.iopin io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
-*.opin user_irq[2],user_irq[1],user_irq[0]
-*.ipin
-*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
-x1 vdda1 vccd1 gpio_analog[3] io_out[11] io_out[12] vssa1 example_por
-x2 io_analog[4] vccd1 gpio_analog[7] io_out[15] io_out[16] vssa1 example_por
-R1 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
-R2 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
-R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
-R5 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
-R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
-R7 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
-R8 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 W=0.56 L=0.49 m=1
-R9 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m3 W=0.56 L=0.31 m=1
-R11 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 W=0.56 L=0.58 m=1
-R12 vssd1 io_oeb[15] sky130_fd_pr__res_generic_m3 W=0.56 L=0.6 m=1
-.ends
-
-
-* expanding symbol: example_por.sym # of pins=6
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
-.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
-*.iopin vdd3v3
-*.iopin vss
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-*.iopin vdd1v8
-XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
-XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
-XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
-XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
-XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
-x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
-x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
-x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
-x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
-.ends
-
-.GLOBAL GND
-** flattened .save nodes
-.end
diff --git a/xschem/current_test.spice b/xschem/current_test.spice
deleted file mode 100644
index 8e4162d..0000000
--- a/xschem/current_test.spice
+++ /dev/null
@@ -1,86 +0,0 @@
-*---------------------------------------------------------------------------
-* SPDX-FileCopyrightText: 2020 Efabless Corporation
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-* https://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*
-* SPDX-License-Identifier: Apache-2.0
-*---------------------------------------------------------------------------
-* Simple POR circuit for Caravel current mirror test
-*-------------------------------------------------------------------
-
-.param mc_mm_switch=0
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-
-* Note: 20 resistors of length 25um connected in series
-Xres1 vdda vin vss sky130_fd_pr__res_xhigh_po_0p69 l=500
-Xres2 vin vss vss sky130_fd_pr__res_xhigh_po_0p69 l=149
-
-* voltage sources at 0V for measuring current in each branch
-
-Vm1 vssm1 vss DC=0
-Vm2 vdda vddm2 DC=0
-Vm3 vdda vddm3 DC=0
-Vm4 vssm4 vss DC=0
-Vm5 vssm5 vss DC=0
-Vm6 vdda vddm6 DC=0
-Vm7 vdda vddm7 DC=0
-
-* D G S B
-Xm1 casc1 vin vssm1 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=1
-Xc1 mir1 casc1 casc1 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xm2 mir1 mir1 vddm2 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=8
-Xm3 mir2 mir1 vddm3 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xc2 casc2 casc1 mir2 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xm4 casc2 casc2 vssm4 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=7
-Xm5 casc3 casc2 vssm5 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=1
-Xc3 mir3 casc3 casc3 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xm6 mir3 mir3 vddm6 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=7
-Xm7 mir4 mir3 vddm7 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-Xc4 vcap casc3 mir4 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
-
-* Check branch currents in each mirror branch.
-* 1st branch should be 240nA
-* 2nd branch should be 30nA
-* 3rd branch should be 4.3nA
-* 4th branch should be 612pA
-*
-* Result: vin sits at 0.7590 (close to 0.7575 target)
-* I(Vm1/2) = 202.80 nA
-* I(Vm3/4) = 26.10 nA (should be /8) actually /7.77
-* I(Vm5/6) = 4.58 nA (should be /7) actually /5.70
-* I(Vm7) = 0.67 nA (should be /7) actually /6.80
-
-*----------------------------
-* Testbench circuit
-*----------------------------
-Vpwr vdda vss DC=3.3
-Rgnd vss 0 0.01
-Rload vcap vss 1MEG
-*----------------------------
-
-*----------------------------
-* Testbench control
-*----------------------------
-.control
-op
-print V(vin)
-print I(Vm1)
-print I(Vm2)
-print I(Vm3)
-print I(Vm4)
-print I(Vm5)
-print I(Vm6)
-print I(Vm7)
-.endc
-
-.end
-
diff --git a/xschem/example_por_tb.spice b/xschem/example_por_tb.spice
deleted file mode 100644
index fa82f74..0000000
--- a/xschem/example_por_tb.spice
+++ /dev/null
@@ -1,78 +0,0 @@
-**.subckt example_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l
-*.opin vdd3v3
-*.opin vdd1v8
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND example_por
-V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3)
-V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8)
-**** begin user architecture code
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
-
-.control
-tran 1u 20m
-plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l)
-.endc
-
-**** end user architecture code
-**.ends
-
-* expanding symbol: example_por.sym # of pins=6
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
-.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
-*.iopin vdd3v3
-*.iopin vss
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-*.iopin vdd1v8
-XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
-XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
-XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
-XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
-XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1
-XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
-XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
-x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
-x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
-x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
-x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
-.ends
-
-.GLOBAL GND
-** flattened .save nodes
-.end
diff --git a/xschem/sky130_sc_ams__ota_1.spice b/xschem/sky130_sc_ams__ota_1.spice
deleted file mode 100644
index 6c6fd48..0000000
--- a/xschem/sky130_sc_ams__ota_1.spice
+++ /dev/null
@@ -1,88 +0,0 @@
-.include /home/charana/IC/OpenLane/pdks/sky130A/libs.ref/sky130_fd_pr/spice/sky130_fd_pr__nfet_01v8__tt.pm3.spice
-* SPICE3 file created from sky130_sd_ams__ota_1.ext - technology: sky130A
-.subckt sky130_sd_ams__ota_1 Vin1 Vin2 VGND VNB VPB VPWR Iout
-X0 a_599_75# a_1367_29# a_1311_55# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X1 Iout a_4632_123# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=300000u
-X2 a_4632_123# a_4632_123# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X3 VGND a_1367_29# a_3603_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X4 a_3603_47# a_1367_29# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X5 VPWR a_2270_413# a_2270_413# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=4.2e+06u
-X6 a_599_75# a_1367_29# a_1311_55# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X7 VGND a_3603_375# a_3603_375# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X8 a_3603_375# a_3431_375# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X9 a_1311_55# a_2270_413# a_1367_29# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X10 a_3431_375# Vin2 a_3603_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X11 VGND a_3603_375# Iout VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=300000u
-X12 VPWR a_1311_55# a_1311_55# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X13 a_3603_375# a_3431_375# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X14 VPWR a_3431_375# a_3603_375# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X15 VGND VGND a_3431_375# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X16 VPWR a_1311_55# a_1311_55# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X17 a_3431_375# a_3431_375# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X18 a_1367_29# a_1367_29# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X19 a_1367_29# a_1311_55# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X20 Iout a_4632_123# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=300000u
-X21 a_4632_123# a_4632_123# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X22 a_1367_29# a_1367_29# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X23 VPWR a_4632_123# a_4632_123# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X24 a_3603_47# a_1367_29# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X25 a_599_75# a_1367_29# a_1311_55# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X26 a_3431_375# VGND VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X27 a_1367_29# a_2270_413# a_1311_55# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X28 a_1367_29# VGND VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X29 a_3603_47# Vin2 a_3431_375# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X30 a_3603_375# VGND VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X31 a_1367_29# a_1311_55# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X32 VPWR a_3431_375# a_3603_375# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X33 a_599_75# a_1367_29# a_1311_55# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X34 VPWR a_1311_55# a_1367_29# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X35 VPWR VPWR a_3431_375# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X36 VGND a_599_75# VNB sky130_fd_pr__res_xhigh_po w=1.41e+06u l=700000u
-X37 VGND VGND a_1311_55# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X38 VGND a_1367_29# a_3603_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X39 a_4632_123# VPWR VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X40 VPWR a_4632_123# Iout VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=300000u
-X41 VPWR VPWR a_4632_123# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X42 a_1311_55# a_1367_29# a_599_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X43 VGND a_3603_375# Iout VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=300000u
-X44 VGND a_1367_29# a_2270_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X45 VGND VGND a_3603_375# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X46 a_1311_55# a_1367_29# a_599_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X47 a_1311_55# a_2270_413# a_1367_29# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X48 VGND a_1367_29# a_1367_29# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X49 a_3603_47# Vin2 a_3431_375# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X50 a_3603_47# Vin1 a_4632_123# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X51 a_3431_375# a_3431_375# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X52 a_4632_123# Vin1 a_3603_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X53 VPWR a_1311_55# a_1367_29# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X54 a_1311_55# a_1367_29# a_599_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X55 a_2270_413# a_1367_29# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X56 a_1311_55# a_1311_55# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X57 VPWR VPWR a_1311_55# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X58 VPWR a_4632_123# a_4632_123# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X59 VPWR a_4632_123# Iout VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=300000u
-X60 a_3603_375# a_3603_375# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X61 Iout a_3603_375# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=300000u
-X62 a_1311_55# a_1367_29# a_599_75# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X63 a_2270_413# a_1367_29# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X64 a_3431_375# VPWR VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X65 VGND a_1367_29# a_2270_413# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X66 a_4632_123# Vin1 a_3603_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X67 a_3603_375# a_3603_375# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X68 a_1311_55# VPWR VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X69 VPWR a_3431_375# a_3431_375# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X70 VPWR a_3431_375# a_3431_375# VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X71 a_1367_29# a_2270_413# a_1311_55# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X72 VGND a_1367_29# a_1367_29# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X73 a_3603_47# Vin1 a_4632_123# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X74 Iout a_3603_375# VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=300000u
-X75 a_3431_375# Vin2 a_3603_47# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.06e+06u l=150000u
-X76 a_1311_55# a_1311_55# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=610000u l=150000u
-X77 a_1311_55# VGND VGND VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X78 VGND VGND a_1367_29# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-X79 VGND a_3603_375# a_3603_375# VNB sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=700000u l=150000u
-C0 a_599_75# a_1311_55# 2.09fF
-C1 a_3603_47# VGND 2.61fF
-C2 a_1367_29# VGND 2.16fF
-C3 a_1367_29# VNB 2.36fF
-.ends
diff --git a/xschem/threshold_test_tb.spice b/xschem/threshold_test_tb.spice
deleted file mode 100644
index 3e9804c..0000000
--- a/xschem/threshold_test_tb.spice
+++ /dev/null
@@ -1,46 +0,0 @@
-*---------------------------------------------------------------------------
-* SPDX-FileCopyrightText: 2020 Efabless Corporation
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-* https://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*
-* SPDX-License-Identifier: Apache-2.0
-*---------------------------------------------------------------------------
-* Threshold test for POR circuit
-* Determine gate voltage at which the HV NFET draws 240nA nominal
-*
-* Result: 0.7575V
-*-------------------------------------------------------------------
-
-.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
-
-*----------------------------
-* Testbench circuit
-*----------------------------
-Rtest vdda mir1 1MEG
-Xm1 mir1 vin vss vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8
-
-Vgate vin vss DC=0
-Vpwr vdda vss DC=3.3
-Rgnd vss 0 0.1
-
-*----------------------------
-* Testbench control
-*----------------------------
-.control
-* DC sweep from 0.7 to 0.8V
-dc Vgate 0.7 0.8 0.001
-wrdata test.data Vpwr#branch vin
-
-.endc
-
-.end
-
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch
index 87850cc..65bcd4d 100644
--- a/xschem/user_analog_project_wrapper.sch
+++ b/xschem/user_analog_project_wrapper.sch
@@ -24,9 +24,9 @@
N 120 -1000 140 -1000 {
lab=gpio_analog[8]}
N 120 -980 140 -980 {
-lab=#net1}
+lab=io_analog[6]}
N 440 -1020 480 -1020 {
-lab=#net2}
+lab=#net1}
N 440 -1000 480 -1000 {
lab=vccd1}
N 440 -980 480 -980 {
@@ -40,33 +40,33 @@
N 1080 -1219 1080 -1119 {
lab=vccd1}
N 1070 -939 1070 -879 {
-lab=vssa1}
+lab=vssd1}
N 1070 -879 1090 -879 {
-lab=vssa1}
+lab=vssd1}
N 1090 -939 1090 -879 {
-lab=vssa1}
+lab=vssd1}
N 1080 -879 1080 -819 {
-lab=vssa1}
+lab=vssd1}
N 1160 -999 1230 -999 {
lab=gpio_noesd[4]}
N 910 -1019 1000 -1019 {
-lab=#net2}
+lab=#net1}
N 910 -979 1000 -979 {
lab=gpio_noesd[4]}
-N 357.0999999999999 -261.73 357.0999999999999 -226.37 {
-lab=#net3}
-N 357 -497 357 -452 { lab=#net4}
-N 357 -292 357 -262 { lab=#net5}
+N 357 -497 357 -452 { lab=#net2}
N 222 -372 267 -372 { lab=gpio_analog[11]}
N 327 -452 327 -422 { lab=gpio_analog[9]}
-N 327 -317 327 -292 { lab=gpio_analog[10]}
N 387 -372 437 -372 { lab=gpio_analog[12]}
N 480 -1020 845 -1020 {
-lab=#net2}
+lab=#net1}
N 845 -1020 910 -1020 {
-lab=#net2}
+lab=#net1}
N 910 -1020 910 -1019 {
-lab=#net2}
+lab=#net1}
+N 357 -292 357 -226 {
+lab=#net3}
+N 327 -322 327 -291 {
+lab=gpio_analog[10]}
C {devices/lab_pin.sym} -430 -540 2 0 {name=l1 lab=io_analog[1]}
C {devices/lab_pin.sym} -510 -540 0 0 {name=l2 lab=io_analog[0]}
C {devices/lab_pin.sym} -580 -380 0 0 {name=l3 lab=io_analog[4]}
@@ -132,6 +132,5 @@
C {devices/lab_pin.sym} 437 -372 2 0 {name=l54 sig_type=std_logic lab=gpio_analog[12]}
C {devices/lab_pin.sym} 1080 -1219 0 0 {name=l55 sig_type=std_logic lab=vccd1
}
-C {devices/lab_pin.sym} 120.5 -980.55 0 0 {name=l12 sig_type=std_logic lab=io_analog[6]
-}
C {devices/lab_pin.sym} 910 -979 2 1 {name=l7 sig_type=std_logic lab=gpio_noesd[4]}
+C {devices/lab_pin.sym} 120 -980 0 0 {name=l8 sig_type=std_logic lab=io_analog[6]}
