- minimize dv makefiles by exporting variables when running docker
- add dv_all target to run all simulation targets
- gitignore simulation artificats
- increase la_test1 test duration
diff --git a/Makefile b/Makefile
index fa42afe..9e50d32 100644
--- a/Makefile
+++ b/Makefile
@@ -54,14 +54,20 @@
DV_PATTERNS = $(foreach dv, $(PATTERNS), verify-$(dv))
TARGET_PATH=$(shell pwd)
VERIFY_COMMAND="cd ${TARGET_PATH}/verilog/dv/$* && export SIM=${SIM} && make"
-$(DV_PATTERNS): verify-% : ./verilog/dv/%
+
+.PHONY: dv_all
+dv_all:$(DV_PATTERNS)
+
+$(DV_PATTERNS): verify-% : ./verilog/dv/% check-env
docker run -v ${TARGET_PATH}:${TARGET_PATH} -v ${PDK_ROOT}:${PDK_ROOT} \
- -v ${CARAVEL_ROOT}:${CARAVEL_ROOT} \
- -e TARGET_PATH=${TARGET_PATH} -e PDK_ROOT=${PDK_ROOT} \
- -e CARAVEL_ROOT=${CARAVEL_ROOT} \
- -e MCW_ROOT=$(MCW_ROOT) \
- -u $(id -u $$USER):$(id -g $$USER) efabless/dv_setup:latest \
- sh -c $(VERIFY_COMMAND)
+ -v ${CARAVEL_ROOT}:${CARAVEL_ROOT} \
+ -e TARGET_PATH=${TARGET_PATH} -e PDK_ROOT=${PDK_ROOT} \
+ -e CARAVEL_ROOT=${CARAVEL_ROOT} \
+ -e TOOLS=/opt/riscv32i \
+ -e DESIGNS=$(TARGET_PATH) \
+ -e MCW_ROOT=$(MCW_ROOT) \
+ -u $$(id -u $$USER):$$(id -g $$USER) efabless/dv_setup:latest \
+ sh -c $(VERIFY_COMMAND)
# Openlane Makefile Targets
BLOCKS = $(shell cd openlane && find * -maxdepth 0 -type d)
