Sign in
foss-eda-tools
/
third_party
/
shuttle
/
sky130
/
mpw-006
/
slot-024
/
a63e2e65ead8c1deabfa2555967b0ba87c11df1b
commit
a63e2e65ead8c1deabfa2555967b0ba87c11df1b
[
log
]
[
tgz
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author
manarabdelaty <manarabdelatty@aucegypt.edu>
Thu Apr 08 20:32:40 2021 +0200
committer
manarabdelaty <manarabdelatty@aucegypt.edu>
Thu Apr 08 20:32:40 2021 +0200
tree
a4638ec7f62a75c6018059bf4cadf1f40182065f
parent
47e72012fe96473a20c94639c502a6ced7e9a834
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diff
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Makefile and RTL updates to run GL sim
verilog/dv/io_ports/Makefile
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diff
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verilog/dv/la_test1/Makefile
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diff
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verilog/dv/la_test2/Makefile
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diff
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verilog/rtl/uprj_netlists.v
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diff
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verilog/rtl/user_proj_example.v
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diff
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5 files changed
tree: a4638ec7f62a75c6018059bf4cadf1f40182065f
.github/
def/
gds/
lef/
mag/
maglef/
openlane/
signoff/
spi/
verilog/
caravel
Makefile
⇨
caravel/Makefile
.gitmodules
info.yaml
LICENSE
README.md
README.md
Caravel Project Example