commit: fb87c6f241c1d7d708d69a0e101abd10768b3f5f
[log] [tgz]
author: getziadz <getziadz@pm.me>
Thu May 12 15:26:53 2022 -0400
committer: getziadz <getziadz@pm.me>
Thu May 12 15:26:53 2022 -0400
tree: 4c996577e349245a10d36ad1f8f2ea8b3f13a36f
parent: cfc0fee252be639213c99554b3c5b00ea2bead56 [diff]

Add Updated README.md

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tree: 4c996577e349245a10d36ad1f8f2ea8b3f13a36f

README.md

ORDER PRGA Tapeout

This repository is a branch of the caravel_user_project repository, modified for the tapeout of a 512-LUT4 FPGA generated using PRGA.

A 512-LUT4 FPGA generated using PRGA (Princeton Reconfigurable Gate Array)

An 8x8 array of CLBs, each containing 8 LUT4s and 8 DFFs and a local programmable crossbar for intra-CLB routing
24-track routing channel with L1 tracks
Capable of implementing 16 out of 30 ISCAS'89 circuits

Design

We used a three level hierarchical design:

1x Caravel user project wrapper
- 1x PRGA top
  - 64x CLB tile