Change GPIO modes and rebuild

diff --git a/gds/user_project.gds.gz b/gds/user_project.gds.gz
index 17cfcba..1a0e70a 100644
--- a/gds/user_project.gds.gz
+++ b/gds/user_project.gds.gz
Binary files differ

diff --git a/gds/user_project_wrapper.gds.gz b/gds/user_project_wrapper.gds.gz
index 85b0689..354beb2 100644
--- a/gds/user_project_wrapper.gds.gz
+++ b/gds/user_project_wrapper.gds.gz
Binary files differ

diff --git a/mag/user_project.mag.gz b/mag/user_project.mag.gz
index 1ec9c1c..c41eea3 100644
--- a/mag/user_project.mag.gz
+++ b/mag/user_project.mag.gz
Binary files differ

diff --git a/mag/user_project_wrapper.mag b/mag/user_project_wrapper.mag
index 8d54dbe..708fc25 100644
--- a/mag/user_project_wrapper.mag
+++ b/mag/user_project_wrapper.mag

@@ -1,7 +1,7 @@
 magic
 tech sky130A
 magscale 1 2
-timestamp 1647846298
+timestamp 1647896748
 << locali >>
 rect 205097 506651 205131 507569
 rect 218529 506719 218563 507637
@@ -62477,7 +62477,7 @@
 rect 592618 -7622 592650 -7386
 rect -8726 -7654 592650 -7622
 use user_project  mprj
-timestamp 1647846298
+timestamp 1647896748
 transform 1 0 165800 0 1 200800
 box 198 0 254274 307139
 << labels >>

diff --git a/maglef/user_project.mag b/maglef/user_project.mag
index 50e79b9..35300db 100644
--- a/maglef/user_project.mag
+++ b/maglef/user_project.mag

@@ -1,7 +1,7 @@
 magic
 tech sky130A
 magscale 1 2
-timestamp 1647835980
+timestamp 1647895912
 << obsli1 >>
 rect 857 1649 253707 304657
 << obsm1 >>

diff --git a/maglef/user_project_wrapper.mag b/maglef/user_project_wrapper.mag
index e0b522e..e5fa6bd 100644
--- a/maglef/user_project_wrapper.mag
+++ b/maglef/user_project_wrapper.mag

@@ -1,7 +1,7 @@
 magic
 tech sky130A
 magscale 1 2
-timestamp 1647846590
+timestamp 1647897003
 << obsli1 >>
 rect 164801 3145 428691 509235
 << obsm1 >>

diff --git a/signoff/user_project/final_summary_report.csv b/signoff/user_project/final_summary_report.csv
index a352eb9..75d4105 100644
--- a/signoff/user_project/final_summary_report.csv
+++ b/signoff/user_project/final_summary_report.csv

@@ -1,2 +1,2 @@
 ,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
-0,/project/openlane/user_project,user_project,user_project,flow_completed,7h38m10s,-1,71530.54154775557,1.954409920225,17882.63538693889,25.54,2130.55,34950,0,0,0,0,0,0,-1,-1,-1,-1,-1,5576186,694649,-147.13,-247.98,-1,0.0,-1,-3928.02,-6781.95,-1,0.0,-1,2787120903.0,3.67,61.36,59.82,20.75,6.72,-1,97840,519032,47551,468469,0,0,0,51497,0,0,0,0,0,0,0,4,2423,5529,32,1112,27063,0,28175,25.0,40,39,AREA 0,5,25,1.2,153.6,153.18,0.27,0.0,sky130_fd_sc_hd,4,4
+0,/project/openlane/user_project,user_project,user_project,flow_completed,4h8m17s,-1,71530.54154775557,1.954409920225,17882.63538693889,25.54,2246.05,34950,0,0,0,0,0,0,-1,-1,-1,-1,-1,5576186,694649,-147.13,-247.98,-1,0.0,-1,-3928.02,-6781.95,-1,0.0,-1,2787120903.0,3.67,61.36,59.82,20.75,6.72,-1,97840,519032,47551,468469,0,0,0,51497,0,0,0,0,0,0,0,4,2423,5529,32,1112,27063,0,28175,25.0,40,39,AREA 0,5,25,1.2,153.6,153.18,0.27,0.0,sky130_fd_sc_hd,4,4

diff --git a/signoff/user_project_wrapper/final_summary_report.csv b/signoff/user_project_wrapper/final_summary_report.csv
index c7fe0c1..a06e5ce 100644
--- a/signoff/user_project_wrapper/final_summary_report.csv
+++ b/signoff/user_project_wrapper/final_summary_report.csv

@@ -1,2 +1,2 @@
 ,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
-0,/project/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h8m37s,-1,0.19458281444582815,10.2784,0.09729140722291407,-1,499.43,1,0,0,0,0,0,0,-1,-1,-1,-1,-1,1004206,2123,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40141.04,1.57,3.34,0.05,0.0,-1,27,645,27,645,0,0,0,1,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,90.9090909090909,11,10,AREA 0,5,50,1,180,180,0.55,0.0,sky130_fd_sc_hd,4,0
+0,/project/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h6m57s,-1,0.19458281444582815,10.2784,0.09729140722291407,-1,500.82,1,0,0,0,0,0,0,-1,-1,-1,-1,-1,1004206,2123,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40141.04,1.57,3.34,0.05,0.0,-1,27,645,27,645,0,0,0,1,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,90.9090909090909,11,10,AREA 0,5,50,1,180,180,0.55,0.0,sky130_fd_sc_hd,4,0

diff --git a/verilog/rtl/user_defines.v b/verilog/rtl/user_defines.v
new file mode 100644
index 0000000..170922f
--- /dev/null
+++ b/verilog/rtl/user_defines.v

@@ -0,0 +1,87 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+
+`ifndef __USER_DEFINES_H
+// User GPIO initial configuration parameters
+`define __USER_DEFINES_H
+
+// Useful GPIO mode values.  These match the names used in defs.h.
+`define GPIO_MODE_MGMT_STD_INPUT_NOPULL    13'h0403
+`define GPIO_MODE_MGMT_STD_INPUT_PULLDOWN  13'h0803
+`define GPIO_MODE_MGMT_STD_INPUT_PULLUP    13'h0c03
+`define GPIO_MODE_MGMT_STD_OUTPUT          13'h1809
+`define GPIO_MODE_MGMT_STD_BIDIRECTIONAL   13'h1801
+`define GPIO_MODE_MGMT_STD_ANALOG          13'h000b
+
+`define GPIO_MODE_USER_STD_INPUT_NOPULL    13'h0402
+`define GPIO_MODE_USER_STD_INPUT_PULLDOWN  13'h0802
+`define GPIO_MODE_USER_STD_INPUT_PULLUP    13'h0c02
+`define GPIO_MODE_USER_STD_OUTPUT          13'h1808
+`define GPIO_MODE_USER_STD_BIDIRECTIONAL   13'h1800
+`define GPIO_MODE_USER_STD_OUT_MONITORED   13'h1802
+`define GPIO_MODE_USER_STD_ANALOG          13'h000a
+
+// The power-on configuration for GPIO 0 to 4 is fixed and cannot be
+// modified (allowing the SPI and debug to always be accessible unless
+// overridden by a flash program).
+
+// The values below can be any of the standard types defined above,
+// or they can be any 13-bit value if the user wants a non-standard
+// startup state for the GPIO.  By default, every GPIO from 5 to 37
+// is set to power up as an input controlled by the management SoC.
+// Users may want to redefine these so that the user project powers
+// up in a state that can be used immediately without depending on
+// the management SoC to run a startup program to configure the GPIOs.
+
+`define USER_CONFIG_GPIO_5_INIT  `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_6_INIT  `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_7_INIT  `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_8_INIT  `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_9_INIT  `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_10_INIT `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_11_INIT `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_12_INIT `GPIO_MODE_USER_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_13_INIT `GPIO_MODE_USER_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_14_INIT `GPIO_MODE_USER_STD_INPUT_PULLDOWN
+
+// Configurations of GPIO 15 to 25 are used on caravel but not caravan.
+`define USER_CONFIG_GPIO_15_INIT `GPIO_MODE_USER_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_16_INIT `GPIO_MODE_USER_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_17_INIT `GPIO_MODE_USER_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_18_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_19_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_20_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_21_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_22_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_23_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_24_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_25_INIT `GPIO_MODE_USER_STD_OUTPUT
+
+`define USER_CONFIG_GPIO_26_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_27_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_28_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_29_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_30_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_31_INIT `GPIO_MODE_USER_STD_OUTPUT
+`define USER_CONFIG_GPIO_32_INIT `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_33_INIT `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_34_INIT `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_35_INIT `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_36_INIT `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+`define USER_CONFIG_GPIO_37_INIT `GPIO_MODE_MGMT_STD_INPUT_NOPULL
+
+`endif // __USER_DEFINES_H