tree: 3b8b478a872a5716b1332bf7333f27d0e302820a [path history] [tgz]
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. openlane/
  8. sdc/
  9. sdf/
  10. signoff/
  11. spef/
  12. spi/
  13. verilog/
  14. .gitignore
  15. LICENSE
  16. Makefile
  17. README.md
README.md

Azadi-III_DFT

License UPRJ_CI Caravel Build

Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, QSPI and timer.