commit	55a900ce974b9efaf7fb007f990c4ec5ee0f4df8	[log] [tgz]
author	Rameen Anwar <ramianwer1996@gmail.com>	Fri Jun 03 15:09:27 2022 +0500
committer	Rameen Anwar <ramianwer1996@gmail.com>	Fri Jun 03 15:09:27 2022 +0500
tree	9ca9cef183126131ccde15ebc70777ea646f7416
parent	df9977aa84f8f075ae042beb1c8b8ac08b9ded7c [diff]

second commit of reducing area

def/azadi_soc_top_caravel.def[diff]
def/user_project_wrapper.def[diff]
gds/azadi_soc_top_caravel.gds.gz[diff]
gds/user_project_wrapper.gds.gz[diff]
lef/azadi_soc_top_caravel.lef[diff]
lef/user_project_wrapper.lef[diff]
mag/user_project_wrapper.mag[diff]
sdf/user_project_wrapper.sdf[diff]
verilog/gl/azadi_soc_top_caravel.v[diff]

9 files changed

tree: 9ca9cef183126131ccde15ebc70777ea646f7416

.github/
def/
docs/
gds/
lef/
mag/
openlane/
sdc/
sdf/
signoff/
spef/
spi/
verilog/
.gitignore
LICENSE
Makefile
README.md

README.md

Azadi-III_DFT

Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, QSPI and timer.