commit | f5d6f0cc007b9a973fd1d7fc346cda40c911013d | [log] [tgz] |
---|---|---|
author | dineshannayya <dinesh.annayya@gmail.com> | Mon Sep 05 16:40:55 2022 +0530 |
committer | dineshannayya <dinesh.annayya@gmail.com> | Mon Sep 05 16:40:55 2022 +0530 |
tree | 867f4047dd831782194e9e5f6b0b022309a48bf5 | |
parent | 9e72593103dbe37327495fc2cea6009f42a200a0 [diff] |
defualt skew value fix
diff --git a/gds/user_project_wrapper.gds.gz b/gds/user_project_wrapper.gds.gz index 90542f5..8ddef2d 100644 --- a/gds/user_project_wrapper.gds.gz +++ b/gds/user_project_wrapper.gds.gz Binary files differ
diff --git a/lef/user_project_wrapper.lef.gz b/lef/user_project_wrapper.lef.gz index efc5da6..aa0d2c5 100644 --- a/lef/user_project_wrapper.lef.gz +++ b/lef/user_project_wrapper.lef.gz Binary files differ
diff --git a/spef/user_project_wrapper.spef.gz b/spef/user_project_wrapper.spef.gz index 5cd0478..935bc18 100644 --- a/spef/user_project_wrapper.spef.gz +++ b/spef/user_project_wrapper.spef.gz Binary files differ
diff --git a/spef/wb_host.spef.gz b/spef/wb_host.spef.gz index 5c0042f..9434fbf 100644 --- a/spef/wb_host.spef.gz +++ b/spef/wb_host.spef.gz Binary files differ
diff --git a/verilog/gl/user_project_wrapper.v.gz b/verilog/gl/user_project_wrapper.v.gz index 1090261..09b8a2e 100644 --- a/verilog/gl/user_project_wrapper.v.gz +++ b/verilog/gl/user_project_wrapper.v.gz Binary files differ
diff --git a/verilog/gl/wb_host.v.gz b/verilog/gl/wb_host.v.gz index c014331..1e4b933 100644 --- a/verilog/gl/wb_host.v.gz +++ b/verilog/gl/wb_host.v.gz Binary files differ
diff --git a/verilog/rtl/user_params.svh b/verilog/rtl/user_params.svh index 7664338..3436cae 100644 --- a/verilog/rtl/user_params.svh +++ b/verilog/rtl/user_params.svh
@@ -8,7 +8,7 @@ // Software Reg-2: Poject Revison 5.1 = 0005200 parameter CHIP_REVISION = 32'h0005_3000; -parameter SKEW_RESET_VAL = 32'b0000_0000_1000_0111_1001_1000_1001_1000; +parameter SKEW_RESET_VAL = 32'b0000_1000_1000_0111_1001_1000_1001_1000; parameter PSTRAP_DEFAULT_VALUE = 15'b000_0111_1011_0000;