commit 0178b5209153db01257fa4bb0fca44bfad80840a
author dineshannayya <dinesh.annayya@gmail.com> Mon Jul 25 21:18:56 2022 +0530
committer dineshannayya <dinesh.annayya@gmail.com> Mon Jul 25 21:18:56 2022 +0530
tree 9a15aa004b64cad932052600151530fc383df84c
parent fc852dbdb1c3c81f0b91fe7b96b762667cbbca98

lvs issue for mpw7 tool set

openlane/ycr_iconnect/config.tcl

diff --git a/openlane/ycr_iconnect/config.tcl b/openlane/ycr_iconnect/config.tcl
index 149966d..ceb1b04 100644
--- a/openlane/ycr_iconnect/config.tcl
+++ b/openlane/ycr_iconnect/config.tcl
@@ -65,11 +65,20 @@
 #set ::env(PDN_CFG) $script_dir/pdn_cfg.tcl
 #set ::env(MACRO_PLACEMENT_CFG) $script_dir/macro_placement.cfg
 set ::env(PL_TARGET_DENSITY) 0.20
-set ::env(CELL_PAD) "14"
+set ::env(CELL_PAD) "2"
+
+set ::env(GLB_RT_ADJUSTMENT) {0.2}
 
 #set ::env(PL_ROUTABILITY_DRIVEN) "1"
 set ::env(PL_TIME_DRIVEN) "1"
 
+set ::env(PL_RESIZER_BUFFER_INPUT_PORTS) {1}
+set ::env(PL_RESIZER_BUFFER_OUTPUT_PORTS) {1}
+set ::env(PL_RESIZER_DESIGN_OPTIMIZATIONS) {1}
+set ::env(PL_RESIZER_TIMING_OPTIMIZATIONS) {1}
+set ::env(GLB_OPTIMIZE_MIRRORING) {1}
+set ::env(GLB_RESIZER_TIMING_OPTIMIZATIONS) {1}
+
 ### PDN
 #set ::env(FP_PDN_CHECK_NODES) "0"
 #set ::env(FP_PDN_HORIZONTAL_HALO) "10"