docker name update
diff --git a/Makefile b/Makefile index 7c36e24..27f6cea 100644 --- a/Makefile +++ b/Makefile
@@ -64,7 +64,7 @@ # Install DV setup .PHONY: simenv simenv: - docker pull dineshannayya/dv_setup:latest + docker pull riscduino/dv_setup:latest PATTERNS=$(shell cd verilog/dv && find * -maxdepth 0 -type d) DV_PATTERNS = $(foreach dv, $(PATTERNS), verify-$(dv)) @@ -74,7 +74,7 @@ $(DV_PATTERNS): verify-% : ./verilog/dv/% check-coremark_repo check-riscv_comp_repo check-riscv_test_repo docker run -v ${TARGET_PATH}:${TARGET_PATH} \ -e TARGET_PATH=${TARGET_PATH} \ - -u $(id -u $$USER):$(id -g $$USER) dineshannayya/dv_setup:mpw5 \ + -u $(id -u $$USER):$(id -g $$USER) riscduino/dv_setup:mpw5 \ sh -c $(VERIFY_COMMAND) # Openlane Makefile Targets
diff --git a/openlane/Makefile b/openlane/Makefile index a960416..d5f37cb 100644 --- a/openlane/Makefile +++ b/openlane/Makefile
@@ -20,7 +20,7 @@ CLEAN = $(foreach block,$(BLOCKS), clean-$(block)) OPENLANE_TAG ?= mpw4 -OPENLANE_IMAGE_NAME ?= dineshannayya/openlane:$(OPENLANE_TAG) +OPENLANE_IMAGE_NAME ?= riscduino/openlane:$(OPENLANE_TAG) OPENLANE_BASIC_COMMAND = "cd /project/openlane && flow.tcl -design ./$* -save_path .. -save -tag $* -overwrite" OPENLANE_INTERACTIVE_COMMAND = "cd /project/openlane && flow.tcl -it -file ./$*/interactive.tcl -design ./$* -save_path .. -save -tag $* -overwrite"