| commit | ae69ff76062933d1ef647c52cb1716736ad0f797 | [log] [tgz] |
|---|---|---|
| author | Janavind <88816771+Janavind@users.noreply.github.com> | Mon Apr 25 16:40:31 2022 -0400 |
| committer | GitHub <noreply@github.com> | Mon Apr 25 16:40:31 2022 -0400 |
| tree | cb734998a555a6a780dcff60f67433adb63edeb6 | |
| parent | 2fc89b14ecdd187657a7fae3c99e8ffd38b21e4e [diff] |
Delete my_alu_xor.v
It's a digital alu_xor having two copies of ALUs, namely: alu1 and alu2 that perfoms basic arithmetic operations addition, and subtraction, and logical operations AND and OR. The outputs generated by both the ALUs are XORed to yield any discrepancies between the designs. Any difference in the result turns out to be conditions relating to faults.
Tests to be carried out: (Post fabrication)
This design helps to study the characteristics of various faults injected in any integrated circuits. ALU1 acts as the golden reference circuit, and ALU2 acts as the Device Under Test (DUT), functionally similar to ALU1. Finally, the results are XORed to find any discrepancies between the results from two ALUs. The injected fault propagating through the final output classifies as user-visible faults, otherwise classified as silent data corruption or benign soft errors.
As Latch-up conditions are one of the most vital phenomena considered for space applications, this project also focuses on testing the over-current or over-voltage that the design can withstand under extreme stress and temperature conditions.
BLOCK DIAGRAM
References
Refer to README for a quick start of how to use caravel_user_project
Refer to README for the sample project documentation.