init
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..261eeb9
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,201 @@
+ Apache License
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+ http://www.apache.org/licenses/
+
+ TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
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+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..4e877be
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,140 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+CARAVEL_ROOT?=$(PWD)/caravel
+PRECHECK_ROOT?=${HOME}/mpw_precheck
+SIM ?= RTL
+
+# Install lite version of caravel, (1): caravel-lite, (0): caravel
+CARAVEL_LITE?=1
+
+ifeq ($(CARAVEL_LITE),1)
+ CARAVEL_NAME := caravel-lite
+ CARAVEL_REPO := https://github.com/efabless/caravel-lite
+ CARAVEL_TAG := 'mpw-5a'
+else
+ CARAVEL_NAME := caravel
+ CARAVEL_REPO := https://github.com/efabless/caravel
+ CARAVEL_TAG := 'mpw-5a'
+endif
+
+# Include Caravel Makefile Targets
+.PHONY: % : check-caravel
+%:
+ export CARAVEL_ROOT=$(CARAVEL_ROOT) && $(MAKE) -f $(CARAVEL_ROOT)/Makefile $@
+
+# Verify Target for running simulations
+.PHONY: verify
+verify:
+ cd ./verilog/dv/ && \
+ export SIM=${SIM} && \
+ $(MAKE) -j$(THREADS)
+
+# Install DV setup
+.PHONY: simenv
+simenv:
+ docker pull efabless/dv_setup:latest
+
+PATTERNS=$(shell cd verilog/dv && find * -maxdepth 0 -type d)
+DV_PATTERNS = $(foreach dv, $(PATTERNS), verify-$(dv))
+TARGET_PATH=$(shell pwd)
+VERIFY_COMMAND="cd ${TARGET_PATH}/verilog/dv/$* && export SIM=${SIM} && make"
+$(DV_PATTERNS): verify-% : ./verilog/dv/%
+ docker run -v ${TARGET_PATH}:${TARGET_PATH} -v ${PDK_ROOT}:${PDK_ROOT} \
+ -v ${CARAVEL_ROOT}:${CARAVEL_ROOT} \
+ -e TARGET_PATH=${TARGET_PATH} -e PDK_ROOT=${PDK_ROOT} \
+ -e CARAVEL_ROOT=${CARAVEL_ROOT} \
+ -u $(id -u $$USER):$(id -g $$USER) efabless/dv_setup:latest \
+ sh -c $(VERIFY_COMMAND)
+
+# Openlane Makefile Targets
+BLOCKS = $(shell cd openlane && find * -maxdepth 0 -type d)
+.PHONY: $(BLOCKS)
+$(BLOCKS): %:
+ cd openlane && $(MAKE) $*
+
+# Install caravel
+.PHONY: install
+install:
+ @echo "Installing $(CARAVEL_NAME).."
+ @git clone -b $(CARAVEL_TAG) $(CARAVEL_REPO) $(CARAVEL_ROOT)
+
+# Create symbolic links to caravel's main files
+.PHONY: simlink
+simlink: check-caravel
+### Symbolic links relative path to $CARAVEL_ROOT
+ $(eval MAKEFILE_PATH := $(shell realpath --relative-to=openlane $(CARAVEL_ROOT)/openlane/Makefile))
+ mkdir -p openlane
+ cd openlane &&\
+ ln -sf $(MAKEFILE_PATH) Makefile
+
+# Update Caravel
+.PHONY: update_caravel
+update_caravel: check-caravel
+ cd $(CARAVEL_ROOT)/ && git checkout $(CARAVEL_TAG) && git pull
+
+# Uninstall Caravel
+.PHONY: uninstall
+uninstall:
+ rm -rf $(CARAVEL_ROOT)
+
+# Install Openlane
+.PHONY: openlane
+openlane:
+ cd openlane && $(MAKE) openlane
+
+# Install Pre-check
+# Default installs to the user home directory, override by "export PRECHECK_ROOT=<precheck-installation-path>"
+.PHONY: precheck
+precheck:
+ @git clone --depth=1 --branch mpw-5a https://github.com/efabless/mpw_precheck.git $(PRECHECK_ROOT)
+ @docker pull efabless/mpw_precheck:latest
+
+.PHONY: run-precheck
+run-precheck: check-pdk check-precheck
+ $(eval INPUT_DIRECTORY := $(shell pwd))
+ cd $(PRECHECK_ROOT) && \
+ docker run -v $(PRECHECK_ROOT):$(PRECHECK_ROOT) -v $(INPUT_DIRECTORY):$(INPUT_DIRECTORY) -v $(PDK_ROOT):$(PDK_ROOT) -e INPUT_DIRECTORY=$(INPUT_DIRECTORY) -e PDK_ROOT=$(PDK_ROOT) \
+ -u $(shell id -u $(USER)):$(shell id -g $(USER)) efabless/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_root $(PDK_ROOT)"
+
+# Clean
+.PHONY: clean
+clean:
+ cd ./verilog/dv/ && \
+ $(MAKE) -j$(THREADS) clean
+
+check-caravel:
+ @if [ ! -d "$(CARAVEL_ROOT)" ]; then \
+ echo "Caravel Root: "$(CARAVEL_ROOT)" doesn't exists, please export the correct path before running make. "; \
+ exit 1; \
+ fi
+
+check-precheck:
+ @if [ ! -d "$(PRECHECK_ROOT)" ]; then \
+ echo "Pre-check Root: "$(PRECHECK_ROOT)" doesn't exists, please export the correct path before running make. "; \
+ exit 1; \
+ fi
+
+check-pdk:
+ @if [ ! -d "$(PDK_ROOT)" ]; then \
+ echo "PDK Root: "$(PDK_ROOT)" doesn't exists, please export the correct path before running make. "; \
+ exit 1; \
+ fi
+
+.PHONY: help
+help:
+ cd $(CARAVEL_ROOT) && $(MAKE) help
+ @$(MAKE) -pRrq -f $(lastword $(MAKEFILE_LIST)) : 2>/dev/null | awk -v RS= -F: '/^# File/,/^# Finished Make data base/ {if ($$1 !~ "^[#.]") {print $$1}}' | sort | egrep -v -e '^[^[:alnum:]]' -e '^$@$$'
diff --git a/README.md b/README.md
index ee09cb4..497aefe 100644
--- a/README.md
+++ b/README.md
@@ -1,2 +1 @@
-# mpw5_ask-modulator_impedance-transformer
-test
+https://github.com/hugodiasg/temp-sensor
diff --git a/caravel b/caravel
new file mode 160000
index 0000000..05a73d7
--- /dev/null
+++ b/caravel
@@ -0,0 +1 @@
+Subproject commit 05a73d70b12b1f0ee9e2043f6b46d43e42031bec
diff --git a/docs/Makefile b/docs/Makefile
new file mode 100644
index 0000000..c715218
--- /dev/null
+++ b/docs/Makefile
@@ -0,0 +1,37 @@
+
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+# Minimal makefile for Sphinx documentation
+#
+
+# You can set these variables from the command line, and also
+# from the environment for the first two.
+SPHINXOPTS ?=
+SPHINXBUILD ?= sphinx-build
+SOURCEDIR = source
+BUILDDIR = build
+
+# Put it first so that "make" without argument is like "make help".
+help:
+ @$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
+.PHONY: help Makefile
+
+# Catch-all target: route all unknown targets to Sphinx using the new
+# "make mode" option. $(O) is meant as a shortcut for $(SPHINXOPTS).
+%: Makefile
+ @$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
diff --git a/docs/environment.yml b/docs/environment.yml
new file mode 100644
index 0000000..2bddf94
--- /dev/null
+++ b/docs/environment.yml
@@ -0,0 +1,23 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+name: caravel-docs
+channels:
+- defaults
+dependencies:
+- python>=3.8
+- pip:
+ - -r file:requirements.txt
diff --git a/docs/requirements.txt b/docs/requirements.txt
new file mode 100644
index 0000000..f5c5383
--- /dev/null
+++ b/docs/requirements.txt
@@ -0,0 +1,6 @@
+git+https://github.com/SymbiFlow/sphinx_materialdesign_theme.git#egg=sphinx-symbiflow-theme
+
+docutils
+sphinx
+sphinx-autobuild
+sphinxcontrib-wavedrom
diff --git a/docs/source/conf.py b/docs/source/conf.py
new file mode 100644
index 0000000..f960f13
--- /dev/null
+++ b/docs/source/conf.py
@@ -0,0 +1,89 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+# Configuration file for the Sphinx documentation builder.
+#
+# This file only contains a selection of the most common options. For a full
+# list see the documentation:
+# https://www.sphinx-doc.org/en/master/usage/configuration.html
+
+# -- Path setup --------------------------------------------------------------
+
+# If extensions (or modules to document with autodoc) are in another directory,
+# add these directories to sys.path here. If the directory is relative to the
+# documentation root, use os.path.abspath to make it absolute, like shown here.
+#
+# import os
+# import sys
+# sys.path.insert(0, os.path.abspath('.'))
+
+
+# -- Project information -----------------------------------------------------
+
+project = 'CIIC Harness'
+copyright = '2020, efabless'
+author = 'efabless'
+
+
+# -- General configuration ---------------------------------------------------
+
+# Add any Sphinx extension module names here, as strings. They can be
+# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
+# ones.
+extensions = [
+ 'sphinxcontrib.wavedrom',
+ 'sphinx.ext.mathjax',
+ 'sphinx.ext.todo'
+]
+
+# Add any paths that contain templates here, relative to this directory.
+templates_path = ['_templates']
+
+# List of patterns, relative to source directory, that match files and
+# directories to ignore when looking for source files.
+# This pattern also affects html_static_path and html_extra_path.
+exclude_patterns = [
+ 'build',
+ 'Thumbs.db',
+ # Files included in other rst files.
+ 'introduction.rst',
+]
+
+
+# -- Options for HTML output -------------------------------------------------
+"""
+html_theme_options = {
+ 'header_links' : [
+ ("Home", 'index', False, 'home'),
+ ("GitHub", "https://github.com/efabless/caravel", True, 'code'),
+ ],
+ 'hide_symbiflow_links': True,
+ 'license_url' : 'https://www.apache.org/licenses/LICENSE-2.0',
+}
+"""
+# The theme to use for HTML and HTML Help pages. See the documentation for
+# a list of builtin themes.
+#
+html_theme = 'sphinx_rtd_theme'
+
+# Add any paths that contain custom static files (such as style sheets) here,
+# relative to this directory. They are copied after the builtin static files,
+# so a file named "default.css" will overwrite the builtin "default.css".
+html_static_path = ['_static']
+
+todo_include_todos = False
+
+numfig = True
diff --git a/docs/source/index.rst b/docs/source/index.rst
new file mode 100644
index 0000000..0a7c0c7
--- /dev/null
+++ b/docs/source/index.rst
@@ -0,0 +1,322 @@
+.. raw:: html
+
+ <!---
+ # SPDX-FileCopyrightText: 2020 Efabless Corporation
+ #
+ # Licensed under the Apache License, Version 2.0 (the "License");
+ # you may not use this file except in compliance with the License.
+ # You may obtain a copy of the License at
+ #
+ # http://www.apache.org/licenses/LICENSE-2.0
+ #
+ # Unless required by applicable law or agreed to in writing, software
+ # distributed under the License is distributed on an "AS IS" BASIS,
+ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ # See the License for the specific language governing permissions and
+ # limitations under the License.
+ #
+ # SPDX-License-Identifier: Apache-2.0
+ -->
+
+Caravel Analog User Project
+===========================
+
+|License| |User CI| |Caravan Build|
+
+Table of contents
+=================
+
+- `Overview <#overview>`__
+- `Install Caravel <#install-caravel>`__
+- `Caravel Integration <#caravel-integration>`__
+
+ - `User Project: Power on Reset <#user-project-power-on-reset>`_
+ - `Verilog Integration <#verilog-integration>`__
+
+- `Running Full Chip Simulation <#running-full-chip-simulation>`__
+- `Analog Design Flow <#analog-design-flow>`__
+- `Other Miscellaneous Targets <#other-miscellaneous-targets>`_
+- `Checklist for Open-MPW
+ Submission <#checklist-for-open-mpw-submission>`__
+
+Overview
+========
+
+This repo contains a sample user project that utilizes the caravan chip (analog version of `caravel <https://github.com/efabless/caravel.git>`__) user space. The user project is a simple power-on-reset that showcases how to make use of caravan's user space utilities like IO pads, logic analyzer probes, and wishbone port. The repo also demonstrates the recommended structure for the open-mpw **analog** projects.
+
+Install Caravel
+===============
+
+To setup caravel, run the following:
+
+.. code:: bash
+
+ # By default, CARAVEL_ROOT is set to $(pwd)/caravel
+ # If you want to install caravel at a different location, run "export CARAVEL_ROOT=<caravel-path>"
+ # Disable submodule installation if needed by, run "export SUBMODULE=0"
+
+ git clone https://github.com/efabless/caravel_user_project_analog.git
+ cd caravel_user_project_analog
+ make install
+
+To update the installed caravel to the latest, run:
+
+.. code:: bash
+
+ make update_caravel
+
+To remove caravel, run
+
+.. code:: bash
+
+ make uninstall
+
+By default
+`caravel-lite <https://github.com/efabless/caravel-lite.git>`__ is
+installed. To install the full version of caravel, run this prior to
+calling make install.
+
+.. code:: bash
+
+ export CARAVEL_LITE=0
+
+Caravel Integration
+=====================
+
+
+User Project: Power on Reset
+----------------------------
+
+This is an example user analog project which breaks out the power-on-reset
+circuit used by the management SoC for power-up behavior so that the circuit
+input and output can be independently controlled and measured.
+
+The power-on-reset circuit itself is a simple, non-temperature-compensated
+analog delay calibrated to 15ms under nominal conditions, with a Schmitt
+trigger inverter to provide hysteresis around the trigger point to provide
+a clean output reset signal.
+
+The circuit provides a single high-voltage (3.3V domain) sense-inverted reset
+signal "porb_h" and complementary low-voltage (1.8V domain) reset signals
+"por_l" and "porb_l".
+
+The only input to the circuit is the 3.3V domain power supply itself.
+
+
+Verilog Integration
+-------------------
+
+You need to create a wrapper around your macro that adheres to the
+template at
+`user\_analog_project\_wrapper <https://github.com/efabless/caravel/blob/master/verilog/rtl/__user_analog_project_wrapper.v>`__.
+The wrapper top module must be named ``user_analog_project_wrapper`` and must
+have the same input and output ports as the analog wrapper template. The wrapper gives access to the
+user space utilities provided by caravel like IO ports, logic analyzer
+probes, and wishbone bus connection to the management SoC.
+
+The verilog modules instantiated in the wrapper module should represent
+the analog project; they need not be more than empty blocks, but it is
+encouraged to write a simple behavioral description of the analog circuit
+in standard verilog, using real-valued wires when necessary. This allows
+the whole system to be run in a verilog testbench and verify the connectivity
+to the padframe and management SoC, even if the testbench C code does nothing
+more than set the mode of each GPIO pin. The example top-level verilog code
+emulates the behavior of the power-on-reset delay after applying a valid
+power supply to the circuit.
+
+
+Building the PDK
+================
+
+Make sure you have `Magic VLSI Layout Tool <http://opencircuitdesign.com/magic/index.html>`__ `version 8.3.265 <https://github.com/RTimothyEdwards/magic/tree/8.3.265>`__ installed on your machine before building the pdk.
+
+.. code:: bash
+
+ # set PDK_ROOT to the path you wish to use for the pdk
+ export PDK_ROOT=<pdk-installation-path>
+
+ # you can optionally specify skywater-pdk and open-pdks commit used
+ # by setting and exporting SKYWATER_COMMIT and OPEN_PDKS_COMMIT
+ # if you do not set them, they default to the last verfied commits tested for this project
+
+ make pdk
+
+
+
+Running Full Chip Simulation
+============================
+
+First, you will need to install the simulation environment, by
+
+.. code:: bash
+
+ make simenv
+
+This will pull a docker image with the needed tools installed.
+
+To install the simulation environment locally, refer to `README <https://github.com/efabless/caravel_user_project_analog/blob/main/verilog/dv/README.md>`__
+
+Then, run the RTL and GL simulation by
+
+.. code:: bash
+
+ export PDK_ROOT=<pdk-installation-path>
+ export CARAVEL_ROOT=$(pwd)/caravel
+ # specify simulation mode: RTL/GL
+ export SIM=RTL
+ # Run the mprj_por testbench, make verify-mprj_por
+ make verify-<testbench-name>
+
+The verilog test-benches are under this directory
+`verilog/dv <https://github.com/efabless/caravel_user_project_analog/tree/main/verilog/dv>`__.
+
+
+Analog Design Flow
+===================
+
+The example project uses a very simple analog design flow with schematics
+made with xschem, simulation done using ngspice, layout done with magic,
+and LVS verification done with netgen. Sources for the power-on-reset
+circuit are in the "xschem/" directory, which also includes a schematic
+representing the wrapper with all of its ports, for use in a testbench
+circuit. There are several testbenches in the example, starting from
+tests of the component devices to a full test of the completed project
+inside the wrapper.
+
+There is no automation in this project; the schematic and layout were
+done by hand, including both the power-on-reset block and the power and
+signal routing to the pins on the wrapper.
+
+The power-on-reset circuit itself is simple and is not compensated for
+temperature or voltage variation. When the power supply reaches a
+sufficient level, the voltage divider sets the gate voltage on an nFET
+device to draw a current of nominally 240nA. The testbench
+"threshold_test_tb.spice" does a DC sweep to find the gate voltage that
+produces this value. Next, a cascaded current mirror divides down the
+current by a factor of (roughly) 400. The testbench current_test.spice
+checks the current division value. Finally, the output ~600pA from the
+end of the current mirror is accumulated on a capacitor until the value
+trips the input of the 3.3V Schmitt trigger buffer from the
+sky130_fd_sd_hvl library. The capacitor is sized to peg the nominal
+time to trigger at 15ms. The schematic "example_por_tb.sch" sets up
+the testbench for this timing test.
+
+The output of the Schmitt trigger buffer becomes the high-voltage
+output, and is input to a standard buffer and inverter used as
+level shifters from the 3.3V domain to the 1.8V domain, producing
+complementary low-voltage outputs.
+
+The user project is formed from two power-on-reset circuits, one of
+which is connected to the user area VDDA1 power supply, and the other
+of which is connected to one of the analog I/O pads, used as a power
+supply input and connected to its voltage ESD clamp circuit. The
+3.3V domain outputs are connected directly to GPIO pads through the
+ESD (150 ohm series) connection. The 1.8V domain outputs are connected
+to GPIO pads through the usual I/O connections, with the corresponding
+user output enable (sense inverted) held low to keep the output always
+active.
+
+The C code testbench is in "verilog/dv/mprj_por/mprj_por.c" and only
+sets the GPIO pins used to the correct state (user output function).
+The POR circuit outputs are monitored by the testbench verilog file
+"mprj_por_tb.v" which will fail if the connections are wrong or if
+the behavioral POR verilog does not work as intended.
+
+Note that to properly test this circuit, the GPIO pins have to be
+configured for output to be seen and measured, implying that the
+management SoC power supply must be stable and the C program running
+off of the SPI flash before the user area power supplies are raised.
+
+**NOTE**
+
+ When running spice extraction on the user_analog_project_wrapper layout, it is recommended to use `ext2spice short resistor`.
+ This is to preserve all the different port names in the extracted netlist. In case you have two ports that are electrically shorted
+ in the layout, the `short resistor` option will tell magic not to merge the two shorted ports instead it adds zero-ohm ideal resistors
+ between the net names so that they can be kept as separate nets.
+
+
+Running Open-MPW Precheck Locally
+=================================
+
+You can install the precheck by running
+
+.. code:: bash
+
+ # By default, this install the precheck in your home directory
+ # To change the installtion path, run "export PRECHECK_ROOT=<precheck installation path>"
+ make precheck
+
+This will clone the precheck repo and pull the latest precheck docker image.
+
+
+Then, you can run the precheck by running
+Specify CARAVEL_ROOT before running any of the following,
+
+.. code:: bash
+
+ # export CARAVEL_ROOT=$(pwd)/caravel
+ export CARAVEL_ROOT=<path-to-caravel>
+ make run-precheck
+
+This will run all the precheck checks on your project and will retain the logs under the ``checks`` directory.
+
+Other Miscellaneous Targets
+============================
+
+The makefile provides a number of useful that targets that can run compress, uncompress, and run XOR checks on your design.
+
+Compress gds files and any file larger than 100MB (GH file size limit),
+
+.. code:: bash
+
+ make compress
+
+Uncompress files,
+
+.. code:: bash
+
+ make uncompress
+
+
+Specify ``CARAVEL_ROOT`` before running any of the following,
+
+.. code:: bash
+
+ # export CARAVEL_ROOT=$(pwd)/caravel
+ export CARAVEL_ROOT=<path-to-caravel>
+
+Run XOR check,
+
+.. code:: bash
+
+ make xor-analog-wrapper
+
+Checklist for Open-MPW Submission
+=================================
+
+
+|:heavy_check_mark:| The project repo adheres to the same directory structure in this repo.
+
+|:heavy_check_mark:| The project repo contain info.yaml at the project root.
+
+|:heavy_check_mark:| Top level macro is named ``user_analog_project_wrapper``.
+
+|:heavy_check_mark:| Full Chip Simulation passes for RTL and GL (gate-level)
+
+|:heavy_check_mark:| The project contains a spice netlist for the ``user_analog_project_wrapper`` at netgen/user_analog_project_wrapper.spice
+
+|:heavy_check_mark:| The hardened Macros are LVS and DRC clean
+
+|:heavy_check_mark:| The ``user_analog_project_wrapper`` adheres to empty wrapper template order specified at `user_analog_project_wrapper_empty <https://github.com/efabless/caravel/blob/master/mag/user_analog_project_wrapper_empty.mag>`__
+
+|:heavy_check_mark:| XOR check passes with zero total difference.
+
+|:heavy_check_mark:| Open-MPW-Precheck tool runs successfully.
+
+
+.. |License| image:: https://img.shields.io/badge/License-Apache%202.0-blue.svg
+ :target: https://opensource.org/licenses/Apache-2.0
+.. |User CI| image:: https://github.com/efabless/caravel_user_project_analog/actions/workflows/user_project_ci.yml/badge.svg
+ :target: https://github.com/efabless/caravel_user_project_analog/actions/workflows/user_project_ci.yml
+.. |Caravan Build| image:: https://github.com/efabless/caravel_user_project_analog/actions/workflows/caravan_build.yml/badge.svg
+ :target: https://github.com/efabless/caravel_user_project_analog/actions/workflows/caravan_build.yml
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
new file mode 100644
index 0000000..764b362
--- /dev/null
+++ b/gds/user_analog_project_wrapper.gds
Binary files differ
diff --git a/mag/.magicrc b/mag/.magicrc
new file mode 120000
index 0000000..fc1fe64
--- /dev/null
+++ b/mag/.magicrc
@@ -0,0 +1 @@
+/home/hugodg/sky130_workspace/skywater-pdk/sky130A/libs.tech/magic/sky130A.magicrc
\ No newline at end of file
diff --git a/mag/ask_modulator/mag/.magicrc b/mag/ask_modulator/mag/.magicrc
new file mode 120000
index 0000000..fc1fe64
--- /dev/null
+++ b/mag/ask_modulator/mag/.magicrc
@@ -0,0 +1 @@
+/home/hugodg/sky130_workspace/skywater-pdk/sky130A/libs.tech/magic/sky130A.magicrc
\ No newline at end of file
diff --git a/mag/ask_modulator/mag/ask-modulator.ext b/mag/ask_modulator/mag/ask-modulator.ext
new file mode 100644
index 0000000..b740370
--- /dev/null
+++ b/mag/ask_modulator/mag/ask-modulator.ext
@@ -0,0 +1,55 @@
+timestamp 1646426843
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0 0 1 9872 -1 0 -2093
+use sky130_fd_pr__nfet_g5v0d10v5_PWYS4E sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0 1 0 9796 0 1 -3646
+use sky130_fd_pr__cap_mim_m3_2_97K3D8 sky130_fd_pr__cap_mim_m3_2_97K3D8_0 -1 0 9641 0 1 6632
+port "in" 1 6340 -5360 6540 -5160 m1
+port "out" 2 6340 -3040 6540 -2840 m1
+port "vd" 3 6340 16440 6540 16640 m1
+port "gnd" 0 6344 -7206 6544 -7006 m1
+node "m4_9220_n380#" 0 25828.4 9220 -380 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 69945680 63996 0 0 0 0
+node "in" 3 2300.54 6340 -5360 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 802524 8668 0 0 0 0 0 0 0 0 0 0
+node "m1_10360_n2160#" 1 2572.96 10360 -2160 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 646788 3480 356400 2400 356400 2400 356400 2400 1164080 4924 0 0
+node "out" 1 10811.2 6340 -3040 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7250800 13920 1152000 4320 1152000 4320 2313900 6902 0 0 0 0
+node "vd" 1 13031.2 6340 16440 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1653600 7400 343200 2360 343200 2360 343200 2360 27287110 27858 0 0
+substrate "gnd" 0 0 6344 -7206 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 81600 1216 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 78400 1184 2975852 23476 0 0 0 0 0 0 0 0 0 0
+cap "m1_10360_n2160#" "m4_9220_n380#" 496.556
+cap "out" "in" 20.5435
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#" -2.25
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_50_n870#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" 2.66949
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/w_n278_n1128#" 303.993
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/w_n278_n1128#" 32.3232
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_50_n870#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#" -334.831
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_50_n870#" 5.52632
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#" 330.991
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_50_n870#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/w_n278_n1128#" 627.01
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/w_n278_n1128#" 631.11
+cap "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_n932#" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#" 79.6696
+cap "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_500#" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#" 487.465
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#" 229.396
+cap "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_n932#" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#" -472.449
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" 106.611
+cap "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#" 17.5424
+cap "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_500#" 1063.97
+cap "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_500#" "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/m4_n2619_n7720#" -158.312
+cap "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/c2_n2519_n7620#" "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/m4_n2619_n7720#" -496.556
+cap "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/c2_n2519_n7620#" "m4_9220_n380#" -260.65
+cap "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/c2_n2519_n7620#" "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/m4_n2619_n7720#" 52.9732
+cap "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/m4_n2619_n7720#" "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/c2_n2519_n7620#" -288.554
+cap "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/c2_n2519_n7620#" "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/m4_n2619_n7720#" -200.797
+merge "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/c2_n2519_n7620#" "vd" -4107.25 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -159536 -1742 0 0 0 0 0 0 -5888854 -12478 0 0
+merge "vd" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_500#"
+merge "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_500#" "m1_10360_n2160#"
+merge "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/VSUBS" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#" -983.057 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -220340 -6800 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/w_n278_n1128#"
+merge "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/w_n278_n1128#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_50_n870#"
+merge "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_50_n870#" "gnd"
+merge "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#" "in" -170.928 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2808 -228 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__cap_mim_m3_2_97K3D8_0/m4_n2619_n7720#" "m4_9220_n380#" -10140.6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1451408 -8322 19600 -1040 19600 -1040 -18560621 -29735 0 0 0 0
+merge "m4_9220_n380#" "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_n932#"
+merge "sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_n932#" "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#"
+merge "sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#" "out"
diff --git a/mag/ask_modulator/mag/ask-modulator.mag b/mag/ask_modulator/mag/ask-modulator.mag
new file mode 100644
index 0000000..a1d18e1
--- /dev/null
+++ b/mag/ask_modulator/mag/ask-modulator.mag
@@ -0,0 +1,148 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646431671
+<< mvpsubdiff >>
+rect 6560 -7206 6584 -7006
+rect 6944 -7206 6968 -7006
+<< mvpsubdiffcont >>
+rect 6584 -7206 6944 -7006
+<< locali >>
+rect 6568 -7206 6584 -7006
+rect 6944 -7206 6960 -7006
+<< viali >>
+rect 6584 -7206 6944 -7006
+<< metal1 >>
+rect 6300 16620 9480 16640
+rect 6300 16140 8840 16620
+rect 9460 16140 9480 16620
+rect 6300 16120 9480 16140
+rect 8600 -1640 8660 -1620
+rect 7700 -1680 9360 -1640
+rect 7700 -2760 7720 -1680
+rect 8600 -2180 9360 -1680
+rect 10360 -1660 11560 -1620
+rect 10360 -2100 10960 -1660
+rect 11540 -2100 11560 -1660
+rect 10360 -2158 11560 -2100
+rect 10360 -2160 10954 -2158
+rect 8600 -2760 8680 -2180
+rect 8860 -2580 10360 -2240
+rect 7700 -2800 8680 -2760
+rect 9960 -2800 10360 -2580
+rect 6340 -4480 9760 -2800
+rect 9880 -3360 10360 -2800
+rect 9880 -3740 10660 -3360
+rect 9880 -4480 10360 -3740
+rect 9718 -4646 9884 -4572
+rect 9720 -5160 9880 -4646
+rect 6340 -5360 9880 -5160
+rect 10480 -6765 10660 -3740
+rect 6572 -7006 6956 -7000
+rect 10480 -7006 10664 -6765
+rect 6344 -7206 6584 -7006
+rect 6944 -7206 10664 -7006
+rect 6572 -7212 6956 -7206
+<< via1 >>
+rect 8840 16140 9460 16620
+rect 7720 -2760 8600 -1680
+rect 10960 -2100 11540 -1660
+<< metal2 >>
+rect 8820 16620 9480 16640
+rect 8820 16140 8840 16620
+rect 9460 16140 9480 16620
+rect 8820 16120 9480 16140
+rect 7700 -1680 8660 -1620
+rect 7700 -2760 7720 -1680
+rect 8600 -2760 8660 -1680
+rect 10920 -1660 11580 -1600
+rect 10920 -2100 10960 -1660
+rect 11540 -2100 11580 -1660
+rect 10920 -2140 11580 -2100
+rect 7700 -2820 8660 -2760
+<< via2 >>
+rect 8840 16140 9460 16620
+rect 7720 -2760 8600 -1680
+rect 10960 -2100 11540 -1660
+<< metal3 >>
+rect 8820 16620 9480 16640
+rect 8820 16140 8840 16620
+rect 9460 16140 9480 16620
+rect 8820 16120 9480 16140
+rect 7700 -1680 8660 -1620
+rect 7700 -2760 7720 -1680
+rect 8600 -2760 8660 -1680
+rect 10920 -1660 11580 -1600
+rect 10920 -2100 10960 -1660
+rect 11540 -2100 11580 -1660
+rect 10920 -2140 11580 -2100
+rect 7700 -2820 8660 -2760
+<< via3 >>
+rect 8840 16140 9460 16620
+rect 7720 -2760 8600 -1680
+rect 10960 -2100 11540 -1660
+<< metal4 >>
+rect 8820 16620 9480 16640
+rect 8820 16140 8840 16620
+rect 9460 16140 9480 16620
+rect 8820 16120 9480 16140
+rect 7700 -1620 8600 -329
+rect 9220 -380 15380 1980
+rect 7700 -1680 8660 -1620
+rect 7700 -2760 7720 -1680
+rect 8600 -2760 8660 -1680
+rect 10920 -1660 11580 -1600
+rect 10920 -2100 10960 -1660
+rect 11540 -2100 11580 -1660
+rect 10920 -2140 11580 -2100
+rect 7700 -2820 8660 -2760
+rect 13020 -6420 15380 -380
+rect 13020 -8780 30458 -6420
+<< via4 >>
+rect 8840 16140 9460 16620
+rect 10960 -2100 11540 -1660
+<< metal5 >>
+rect 8819 16644 11980 17562
+rect 8816 16620 11980 16644
+rect 8816 16140 8840 16620
+rect 9460 16140 11980 16620
+rect 8816 16116 11980 16140
+rect 8819 15200 11980 16116
+rect 12640 17560 12940 17562
+rect 13860 17560 15123 17562
+rect 12640 15200 15123 17560
+rect 8819 12219 11181 15200
+rect 9200 12200 10400 12219
+rect 10940 -1600 11580 -338
+rect 10920 -1660 11580 -1600
+rect 10920 -2100 10960 -1660
+rect 11540 -2100 11580 -1660
+rect 10920 -2140 11580 -2100
+<< rm5 >>
+rect 11980 15200 12640 17562
+use l0 l0_0
+timestamp 1646099910
+transform 1 0 -24400 0 1 -45638
+box 39200 36838 63200 63200
+use sky130_fd_pr__cap_mim_m3_2_97K3D8 sky130_fd_pr__cap_mim_m3_2_97K3D8_0
+timestamp 1646426843
+transform -1 0 9641 0 1 6632
+box -2619 -7770 2641 7770
+use sky130_fd_pr__nfet_g5v0d10v5_PWYS4E sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0
+timestamp 1644948032
+transform 1 0 9796 0 1 -3646
+box -278 -1128 278 1128
+use sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0
+timestamp 1644948032
+transform 0 1 9872 -1 0 -2093
+box -201 -1098 201 1098
+<< labels >>
+flabel metal1 6340 -3040 6540 -2840 0 FreeSans 128 0 0 0 out
+port 2 nsew
+flabel metal1 6340 -5360 6540 -5160 0 FreeSans 128 0 0 0 in
+port 1 nsew
+flabel metal1 6344 -7206 6544 -7006 0 FreeSans 128 0 0 0 gnd
+port 0 nsew
+flabel metal1 6340 16440 6540 16640 0 FreeSans 128 0 0 0 vd
+port 3 nsew
+<< end >>
diff --git a/mag/ask_modulator/mag/ask-modulator.nodes b/mag/ask_modulator/mag/ask-modulator.nodes
new file mode 100644
index 0000000..a219b3c
--- /dev/null
+++ b/mag/ask_modulator/mag/ask-modulator.nodes
@@ -0,0 +1,5 @@
+gnd 6344 -7205 m1
+out 6340 -3039 m1
+in 6340 -5359 m1
+sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_n500# 9373 -2060 xres
+vd 6340 16440 m1
diff --git a/mag/ask_modulator/mag/ask-modulator.res.ext b/mag/ask_modulator/mag/ask-modulator.res.ext
new file mode 100644
index 0000000..9846ff7
--- /dev/null
+++ b/mag/ask_modulator/mag/ask-modulator.res.ext
@@ -0,0 +1,17 @@
+scale 1000 1 500000
+rnode "in.t0" 0 400.9 9796 -3646 0
+rnode "in" 0 2249.1 6340 -5360 0
+resist "in" "in.t0" 448.598
+rnode "gnd" 0 0 6344 -7206 0
+rnode "vd.t2" 0 42340.4 9720 1452 0
+rnode "vd.t0" 0 40084.5 9720 6632 0
+rnode "vd.t1" 0 46900.5 9720 11812 0
+rnode "vd" 0 1144.65 6340 16440 0
+resist "vd.t1" "vd.t0" 0.066
+resist "vd.t0" "vd.t2" 0.066
+resist "vd" "vd.t1" 0.714
+rnode "out" 0 176760 6340 -3040 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 7280 -988 7281 -987 "None" "vd.t2" 38720 0 "out" -14040 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 7280 9372 7281 9373 "None" "vd.t1" 38720 0 "out" -14040 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 7280 4192 7281 4193 "None" "vd.t0" 38720 0 "out" -14040 0
+device msubckt sky130_fd_pr__nfet_g5v0d10v5 9746 -4516 9747 -4515 "gnd" "in.t0" 200 0 "out" 1740 0 "gnd" 1740 0
diff --git a/mag/ask_modulator/mag/ask-modulator.sim b/mag/ask_modulator/mag/ask-modulator.sim
new file mode 100644
index 0000000..0ab2b10
--- /dev/null
+++ b/mag/ask_modulator/mag/ask-modulator.sim
@@ -0,0 +1,27 @@
+| units: 500000 tech: sky130A format: MIT
+x sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_n500# out vd gnd l=1000 w=0 x=9373 y=-2060 sky130_fd_pr__res_xhigh_po_0p35
+x in out gnd gnd l=100 w=1740 x=9747 y=-4515 sky130_fd_pr__nfet_g5v0d10v5
+x vd out l=4880 w=4880 x=12158 y=4193 sky130_fd_pr__cap_mim_m3_2
+x vd out l=4880 w=4880 x=12158 y=9372 sky130_fd_pr__cap_mim_m3_2
+x vd out l=4880 w=4880 x=12158 y=-987 sky130_fd_pr__cap_mim_m3_2
+C vd out 117.64
+R gnd 101719
+= gnd sky130_fd_pr__cap_mim_m3_2_97K3D8_0/VSUBS
+= gnd sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/w_n201_n1098#
+= gnd sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/w_n278_n1128#
+= gnd sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_50_n870#
+C out GND 59.12
+R out 4188
+= out sky130_fd_pr__cap_mim_m3_2_97K3D8_0/m4_n2619_n7720#
+= out m4_9220_n380#
+= out sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_n932#
+= out sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n108_n870#
+C in GND 2.65
+R in 1029
+= in sky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0/a_n50_n958#
+R sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_n500# 28571
+C vd GND 12.83
+R vd 181
+= vd sky130_fd_pr__cap_mim_m3_2_97K3D8_0/c2_n2519_n7620#
+= vd m1_10360_n2160#
+= vd sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0/a_n35_500#
diff --git a/mag/ask_modulator/mag/ask-modulator.spice b/mag/ask_modulator/mag/ask-modulator.spice
new file mode 100644
index 0000000..75f1190
--- /dev/null
+++ b/mag/ask_modulator/mag/ask-modulator.spice
@@ -0,0 +1,53 @@
+* NGSPICE file created from ask-modulator.ext - technology: sky130A
+
+.subckt sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN w_n201_n1098# a_n35_500# a_n35_n932#
+X0 a_n35_n932# a_n35_500# w_n201_n1098# sky130_fd_pr__res_xhigh_po_0p35 l=5e+06u
+C0 a_n35_n932# w_n201_n1098# 1.08fF
+C1 a_n35_500# w_n201_n1098# 1.08fF
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_PWYS4E a_n108_n870# a_n50_n958# w_n278_n1128#
++ a_50_n870#
+X0 a_50_n870# a_n50_n958# a_n108_n870# w_n278_n1128# sky130_fd_pr__nfet_g5v0d10v5 ad=2.523e+12p pd=1.798e+07u as=2.523e+12p ps=1.798e+07u w=8.7e+06u l=500000u
+C0 a_50_n870# a_n108_n870# 1.03fF
+C1 a_50_n870# w_n278_n1128# 0.84fF
+C2 a_n108_n870# w_n278_n1128# 0.84fF
+C3 a_n50_n958# w_n278_n1128# 0.52fF
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_2_97K3D8 c2_n2519_n7620# m4_n2619_n7720# VSUBS
+X0 c2_n2519_n7620# m4_n2619_n7720# sky130_fd_pr__cap_mim_m3_2 l=2.44e+07u w=2.44e+07u
+X1 c2_n2519_n7620# m4_n2619_n7720# sky130_fd_pr__cap_mim_m3_2 l=2.44e+07u w=2.44e+07u
+X2 c2_n2519_n7620# m4_n2619_n7720# sky130_fd_pr__cap_mim_m3_2 l=2.44e+07u w=2.44e+07u
+C0 m4_n2619_n7720# c2_n2519_n7620# 118.49fF
+C1 c2_n2519_n7620# VSUBS 0.26fF
+C2 m4_n2619_n7720# VSUBS 30.70fF
+.ends
+
+.subckt ask-modulator in out vd gnd
+Xsky130_fd_pr__res_xhigh_po_0p35_CTQ8XN_0 gnd vd out sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN
+Xsky130_fd_pr__nfet_g5v0d10v5_PWYS4E_0 out in gnd gnd sky130_fd_pr__nfet_g5v0d10v5_PWYS4E
+Xsky130_fd_pr__cap_mim_m3_2_97K3D8_0 vd out gnd sky130_fd_pr__cap_mim_m3_2_97K3D8
+X0 vd.t1 out sky130_fd_pr__cap_mim_m3_2 l=0u w=0u
+X1 gnd in.t0 out gnd sky130_fd_pr__nfet_g5v0d10v5 ad=2.523e+12p pd=1.798e+07u as=2.523e+12p ps=1.798e+07u w=0u l=0u
+X2 vd.t0 out sky130_fd_pr__cap_mim_m3_2 l=0u w=0u
+X3 vd.t2 out sky130_fd_pr__cap_mim_m3_2 l=0u w=0u
+R0 vd vd.t1 0.714
+R1 vd.t0 vd.t2 0.066
+R2 vd.t1 vd.t0 0.066
+R3 in in.t0 448.598
+C0 gnd in 0.36fF
+C1 vd gnd 1.55fF
+C2 out in 0.46fF
+C3 vd out -0.86fF
+C4 out gnd 0.13fF
+C5 in.t0 0 0.40fF
+C6 vd.t2 0 42.34fF
+C7 vd.t0 0 40.08fF
+C8 vd.t1 0 46.90fF
+C9 gnd 0 -0.14fF
+C10 out 0 235.88fF
+C11 in 0 4.90fF
+C12 vd 0 13.98fF
+.ends
+
diff --git a/mag/ask_modulator/mag/l0.cif b/mag/ask_modulator/mag/l0.cif
new file mode 100644
index 0000000..5186627
--- /dev/null
+++ b/mag/ask_modulator/mag/l0.cif
@@ -0,0 +1,78 @@
+(CIF file written on Mon Feb 28 22:38:17 2022 by ASITIC);
+DS 1 1 1;
+9 l0;
+LMET5;
+P19600 31600 31600 31600 30419 30419 19600 30419 ;
+P31600 31600 31600 19600 30419 20780 30419 30419 ;
+P31600 19600 19600 19600 20780 20780 30419 20780 ;
+P19600 19600 19600 30209 20780 29029 20780 20780 ;
+P19600 30209 30209 30209 29029 29029 20780 29029 ;
+P30209 30209 30209 20990 29029 22170 29029 29029 ;
+P30209 20990 20990 20990 22170 22170 29029 22170 ;
+P20990 20990 20990 28819 22170 27639 22170 22170 ;
+P20990 28819 28819 28819 27639 27639 22170 27639 ;
+P28819 28819 28819 22380 27639 23560 27639 27639 ;
+P28819 22380 22380 22380 23560 23560 27639 23560 ;
+P22380 22380 22380 27429 23560 26249 23560 23560 ;
+P22380 27429 27429 27429 26249 26249 23560 26249 ;
+P27429 27429 27429 23770 26249 23770 26249 26249 ;
+LVIA4;
+LMET4;
+B1180 1180 26839 24360 1040 0 ;
+LMET5;
+B1180 1180 26839 24360 1040 0 ;
+LVIA4;
+P26319 23840 26399 23840 26399 23920 26319 23920 ;
+P26319 24000 26399 24000 26399 24080 26319 24080 ;
+P26319 24160 26399 24160 26399 24240 26319 24240 ;
+P26319 24320 26399 24320 26399 24400 26319 24400 ;
+P26319 24480 26399 24480 26399 24560 26319 24560 ;
+P26319 24640 26399 24640 26399 24720 26319 24720 ;
+P26319 24800 26399 24800 26399 24880 26319 24880 ;
+P26479 23840 26559 23840 26559 23920 26479 23920 ;
+P26479 24000 26559 24000 26559 24080 26479 24080 ;
+P26479 24160 26559 24160 26559 24240 26479 24240 ;
+P26479 24320 26559 24320 26559 24400 26479 24400 ;
+P26479 24480 26559 24480 26559 24560 26479 24560 ;
+P26479 24640 26559 24640 26559 24720 26479 24720 ;
+P26479 24800 26559 24800 26559 24880 26479 24880 ;
+P26639 23840 26719 23840 26719 23920 26639 23920 ;
+P26639 24000 26719 24000 26719 24080 26639 24080 ;
+P26639 24160 26719 24160 26719 24240 26639 24240 ;
+P26639 24320 26719 24320 26719 24400 26639 24400 ;
+P26639 24480 26719 24480 26719 24560 26639 24560 ;
+P26639 24640 26719 24640 26719 24720 26639 24720 ;
+P26639 24800 26719 24800 26719 24880 26639 24880 ;
+P26799 23840 26879 23840 26879 23920 26799 23920 ;
+P26799 24000 26879 24000 26879 24080 26799 24080 ;
+P26799 24160 26879 24160 26879 24240 26799 24240 ;
+P26799 24320 26879 24320 26879 24400 26799 24400 ;
+P26799 24480 26879 24480 26879 24560 26799 24560 ;
+P26799 24640 26879 24640 26879 24720 26799 24720 ;
+P26799 24800 26879 24800 26879 24880 26799 24880 ;
+P26959 23840 27039 23840 27039 23920 26959 23920 ;
+P26959 24000 27039 24000 27039 24080 26959 24080 ;
+P26959 24160 27039 24160 27039 24240 26959 24240 ;
+P26959 24320 27039 24320 27039 24400 26959 24400 ;
+P26959 24480 27039 24480 27039 24560 26959 24560 ;
+P26959 24640 27039 24640 27039 24720 26959 24720 ;
+P26959 24800 27039 24800 27039 24880 26959 24880 ;
+P27119 23840 27199 23840 27199 23920 27119 23920 ;
+P27119 24000 27199 24000 27199 24080 27119 24080 ;
+P27119 24160 27199 24160 27199 24240 27119 24240 ;
+P27119 24320 27199 24320 27199 24400 27119 24400 ;
+P27119 24480 27199 24480 27199 24560 27119 24560 ;
+P27119 24640 27199 24640 27199 24720 27119 24720 ;
+P27119 24800 27199 24800 27199 24880 27119 24880 ;
+P27279 23840 27359 23840 27359 23920 27279 23920 ;
+P27279 24000 27359 24000 27359 24080 27279 24080 ;
+P27279 24160 27359 24160 27359 24240 27279 24240 ;
+P27279 24320 27359 24320 27359 24400 27279 24400 ;
+P27279 24480 27359 24480 27359 24560 27279 24560 ;
+P27279 24640 27359 24640 27359 24720 27279 24720 ;
+P27279 24800 27359 24800 27359 24880 27279 24880 ;
+LMET4;
+P27429 24950 27429 18419 26249 18419 26249 24950 ;
+DF;
+C 1;
+E
\ No newline at end of file
diff --git a/mag/ask_modulator/mag/l0.ext b/mag/ask_modulator/mag/l0.ext
new file mode 100644
index 0000000..e9e41f2
--- /dev/null
+++ b/mag/ask_modulator/mag/l0.ext
@@ -0,0 +1,8 @@
+timestamp 1646099910
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+node "m4_52498_36838#" 0 158922 52498 36838 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 30826320 30844 484396316 415152 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
diff --git a/mag/ask_modulator/mag/l0.mag b/mag/ask_modulator/mag/l0.mag
new file mode 100644
index 0000000..3ddf353
--- /dev/null
+++ b/mag/ask_modulator/mag/l0.mag
@@ -0,0 +1,29 @@
+magic
+tech sky130A
+timestamp 1646099910
+<< metal4 >>
+rect 26249 24899 27429 24950
+rect 26249 23821 26300 24899
+rect 27378 23821 27429 24899
+rect 26249 18419 27429 23821
+<< via4 >>
+rect 26300 23821 27378 24899
+<< metal5 >>
+rect 19600 30419 31600 31600
+rect 19600 29029 30209 30209
+rect 19600 20780 20780 29029
+rect 20990 27639 28819 28819
+rect 20990 22170 22170 27639
+rect 22380 26249 27429 27429
+rect 22380 23560 23560 26249
+rect 26249 24899 27429 26249
+rect 26249 23821 26300 24899
+rect 27378 23821 27429 24899
+rect 26249 23770 27429 23821
+rect 27639 23560 28819 27639
+rect 22380 22380 28819 23560
+rect 29029 22170 30209 29029
+rect 20990 20990 30209 22170
+rect 30419 20780 31600 30419
+rect 19600 19600 31600 20780
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_4LMGHM.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_4LMGHM.mag
new file mode 100644
index 0000000..792a5af
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_4LMGHM.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644948615
+<< metal4 >>
+rect -2579 7559 2579 7600
+rect -2579 2641 2323 7559
+rect 2559 2641 2579 7559
+rect -2579 2600 2579 2641
+rect -2579 2459 2579 2500
+rect -2579 -2459 2323 2459
+rect 2559 -2459 2579 2459
+rect -2579 -2500 2579 -2459
+rect -2579 -2641 2579 -2600
+rect -2579 -7559 2323 -2641
+rect 2559 -7559 2579 -2641
+rect -2579 -7600 2579 -7559
+<< via4 >>
+rect 2323 2641 2559 7559
+rect 2323 -2459 2559 2459
+rect 2323 -7559 2559 -2641
+<< mimcap2 >>
+rect -2479 7460 2321 7500
+rect -2479 2740 -1967 7460
+rect 1809 2740 2321 7460
+rect -2479 2700 2321 2740
+rect -2479 2360 2321 2400
+rect -2479 -2360 -1967 2360
+rect 1809 -2360 2321 2360
+rect -2479 -2400 2321 -2360
+rect -2479 -2740 2321 -2700
+rect -2479 -7460 -1967 -2740
+rect 1809 -7460 2321 -2740
+rect -2479 -7500 2321 -7460
+<< mimcap2contact >>
+rect -1967 2740 1809 7460
+rect -1967 -2360 1809 2360
+rect -1967 -7460 1809 -2740
+<< metal5 >>
+rect -239 7484 81 7650
+rect 2281 7559 2601 7650
+rect -1991 7460 1833 7484
+rect -1991 2740 -1967 7460
+rect 1809 2740 1833 7460
+rect -1991 2716 1833 2740
+rect -239 2384 81 2716
+rect 2281 2641 2323 7559
+rect 2559 2641 2601 7559
+rect 2281 2459 2601 2641
+rect -1991 2360 1833 2384
+rect -1991 -2360 -1967 2360
+rect 1809 -2360 1833 2360
+rect -1991 -2384 1833 -2360
+rect -239 -2716 81 -2384
+rect 2281 -2459 2323 2459
+rect 2559 -2459 2601 2459
+rect 2281 -2641 2601 -2459
+rect -1991 -2740 1833 -2716
+rect -1991 -7460 -1967 -2740
+rect 1809 -7460 1833 -2740
+rect -1991 -7484 1833 -7460
+rect -239 -7650 81 -7484
+rect 2281 -7559 2323 -2641
+rect 2559 -7559 2601 -2641
+rect 2281 -7650 2601 -7559
+<< properties >>
+string FIXED_BBOX -2579 2600 2421 7600
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24 l 24 val 1.17k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_6XGBJT.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_6XGBJT.mag
new file mode 100644
index 0000000..ccb3dea
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_6XGBJT.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645036888
+<< metal4 >>
+rect -2504 7334 2504 7375
+rect -2504 2566 2248 7334
+rect 2484 2566 2504 7334
+rect -2504 2525 2504 2566
+rect -2504 2384 2504 2425
+rect -2504 -2384 2248 2384
+rect 2484 -2384 2504 2384
+rect -2504 -2425 2504 -2384
+rect -2504 -2566 2504 -2525
+rect -2504 -7334 2248 -2566
+rect 2484 -7334 2504 -2566
+rect -2504 -7375 2504 -7334
+<< via4 >>
+rect 2248 2566 2484 7334
+rect 2248 -2384 2484 2384
+rect 2248 -7334 2484 -2566
+<< mimcap2 >>
+rect -2404 7235 2246 7275
+rect -2404 2665 -1907 7235
+rect 1749 2665 2246 7235
+rect -2404 2625 2246 2665
+rect -2404 2285 2246 2325
+rect -2404 -2285 -1907 2285
+rect 1749 -2285 2246 2285
+rect -2404 -2325 2246 -2285
+rect -2404 -2665 2246 -2625
+rect -2404 -7235 -1907 -2665
+rect 1749 -7235 2246 -2665
+rect -2404 -7275 2246 -7235
+<< mimcap2contact >>
+rect -1907 2665 1749 7235
+rect -1907 -2285 1749 2285
+rect -1907 -7235 1749 -2665
+<< metal5 >>
+rect -239 7259 81 7425
+rect 2206 7334 2526 7425
+rect -1931 7235 1773 7259
+rect -1931 2665 -1907 7235
+rect 1749 2665 1773 7235
+rect -1931 2641 1773 2665
+rect -239 2309 81 2641
+rect 2206 2566 2248 7334
+rect 2484 2566 2526 7334
+rect 2206 2384 2526 2566
+rect -1931 2285 1773 2309
+rect -1931 -2285 -1907 2285
+rect 1749 -2285 1773 2285
+rect -1931 -2309 1773 -2285
+rect -239 -2641 81 -2309
+rect 2206 -2384 2248 2384
+rect 2484 -2384 2526 2384
+rect 2206 -2566 2526 -2384
+rect -1931 -2665 1773 -2641
+rect -1931 -7235 -1907 -2665
+rect 1749 -7235 1773 -2665
+rect -1931 -7259 1773 -7235
+rect -239 -7425 81 -7259
+rect 2206 -7334 2248 -2566
+rect 2484 -7334 2526 -2566
+rect 2206 -7425 2526 -7334
+<< properties >>
+string FIXED_BBOX -2504 2525 2346 7375
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23.25 l 23.25 val 1.098k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_93A3V8.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_93A3V8.mag
new file mode 100644
index 0000000..40b8195
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_93A3V8.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646425465
+<< metal4 >>
+rect -2599 7619 2599 7660
+rect -2599 2661 2343 7619
+rect 2579 2661 2599 7619
+rect -2599 2620 2599 2661
+rect -2599 2479 2599 2520
+rect -2599 -2479 2343 2479
+rect 2579 -2479 2599 2479
+rect -2599 -2520 2599 -2479
+rect -2599 -2661 2599 -2620
+rect -2599 -7619 2343 -2661
+rect 2579 -7619 2599 -2661
+rect -2599 -7660 2599 -7619
+<< via4 >>
+rect 2343 2661 2579 7619
+rect 2343 -2479 2579 2479
+rect 2343 -7619 2579 -2661
+<< mimcap2 >>
+rect -2499 7520 2341 7560
+rect -2499 2760 -1983 7520
+rect 1825 2760 2341 7520
+rect -2499 2720 2341 2760
+rect -2499 2380 2341 2420
+rect -2499 -2380 -1983 2380
+rect 1825 -2380 2341 2380
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+rect -2499 -2760 2341 -2720
+rect -2499 -7520 -1983 -2760
+rect 1825 -7520 2341 -2760
+rect -2499 -7560 2341 -7520
+<< mimcap2contact >>
+rect -1983 2760 1825 7520
+rect -1983 -2380 1825 2380
+rect -1983 -7520 1825 -2760
+<< metal5 >>
+rect -239 7544 81 7710
+rect 2301 7619 2621 7710
+rect -2007 7520 1849 7544
+rect -2007 2760 -1983 7520
+rect 1825 2760 1849 7520
+rect -2007 2736 1849 2760
+rect -239 2404 81 2736
+rect 2301 2661 2343 7619
+rect 2579 2661 2621 7619
+rect 2301 2479 2621 2661
+rect -2007 2380 1849 2404
+rect -2007 -2380 -1983 2380
+rect 1825 -2380 1849 2380
+rect -2007 -2404 1849 -2380
+rect -239 -2736 81 -2404
+rect 2301 -2479 2343 2479
+rect 2579 -2479 2621 2479
+rect 2301 -2661 2621 -2479
+rect -2007 -2760 1849 -2736
+rect -2007 -7520 -1983 -2760
+rect 1825 -7520 1849 -2760
+rect -2007 -7544 1849 -7520
+rect -239 -7710 81 -7544
+rect 2301 -7619 2343 -2661
+rect 2579 -7619 2621 -2661
+rect 2301 -7710 2621 -7619
+<< properties >>
+string FIXED_BBOX -2599 2620 2441 7660
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.2 l 24.2 val 1.189k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97K3D8.ext b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97K3D8.ext
new file mode 100644
index 0000000..eca3e74
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97K3D8.ext
@@ -0,0 +1,14 @@
+timestamp 1646426843
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__cap_mim_m3_2 w=w l=l
+node "c2_n2519_n7620#" 0 256.2 -2519 -7620 mim2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 56865792 53128 0 0
+node "m4_n2619_n7720#" 1 30696.7 -2619 -7720 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 79827120 61908 4972800 31720 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "c2_n2519_n7620#" "m4_n2619_n7720#" 118493
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2519 -7620 -2518 -7619 w=4880 l=4880 "None" "c2_n2519_n7620#" 17280 0 "m4_n2619_n7720#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2519 -2440 -2518 -2439 w=4880 l=4880 "None" "c2_n2519_n7620#" 17280 0 "m4_n2619_n7720#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2519 2740 -2518 2741 w=4880 l=4880 "None" "c2_n2519_n7620#" 17280 0 "m4_n2619_n7720#" 0 0
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97K3D8.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97K3D8.mag
new file mode 100644
index 0000000..51c6156
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97K3D8.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646426843
+<< metal4 >>
+rect -2619 7679 2619 7720
+rect -2619 2681 2363 7679
+rect 2599 2681 2619 7679
+rect -2619 2640 2619 2681
+rect -2619 2499 2619 2540
+rect -2619 -2499 2363 2499
+rect 2599 -2499 2619 2499
+rect -2619 -2540 2619 -2499
+rect -2619 -2681 2619 -2640
+rect -2619 -7679 2363 -2681
+rect 2599 -7679 2619 -2681
+rect -2619 -7720 2619 -7679
+<< via4 >>
+rect 2363 2681 2599 7679
+rect 2363 -2499 2599 2499
+rect 2363 -7679 2599 -2681
+<< mimcap2 >>
+rect -2519 7580 2361 7620
+rect -2519 2780 -1999 7580
+rect 1841 2780 2361 7580
+rect -2519 2740 2361 2780
+rect -2519 2400 2361 2440
+rect -2519 -2400 -1999 2400
+rect 1841 -2400 2361 2400
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+rect -2519 -2780 2361 -2740
+rect -2519 -7580 -1999 -2780
+rect 1841 -7580 2361 -2780
+rect -2519 -7620 2361 -7580
+<< mimcap2contact >>
+rect -1999 2780 1841 7580
+rect -1999 -2400 1841 2400
+rect -1999 -7580 1841 -2780
+<< metal5 >>
+rect -239 7604 81 7770
+rect 2321 7679 2641 7770
+rect -2023 7580 1865 7604
+rect -2023 2780 -1999 7580
+rect 1841 2780 1865 7580
+rect -2023 2756 1865 2780
+rect -239 2424 81 2756
+rect 2321 2681 2363 7679
+rect 2599 2681 2641 7679
+rect 2321 2499 2641 2681
+rect -2023 2400 1865 2424
+rect -2023 -2400 -1999 2400
+rect 1841 -2400 1865 2400
+rect -2023 -2424 1865 -2400
+rect -239 -2756 81 -2424
+rect 2321 -2499 2363 2499
+rect 2599 -2499 2641 2499
+rect 2321 -2681 2641 -2499
+rect -2023 -2780 1865 -2756
+rect -2023 -7580 -1999 -2780
+rect 1841 -7580 1865 -2780
+rect -2023 -7604 1865 -7580
+rect -239 -7770 81 -7604
+rect 2321 -7679 2363 -2681
+rect 2599 -7679 2641 -2681
+rect 2321 -7770 2641 -7679
+<< properties >>
+string FIXED_BBOX -2619 2640 2461 7720
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.4 l 24.4 val 1.209k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97T35S.ext b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97T35S.ext
new file mode 100644
index 0000000..77a287e
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97T35S.ext
@@ -0,0 +1,14 @@
+timestamp 1646426626
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__cap_mim_m3_2 w=w l=l
+node "c2_n2514_n7605#" 0 256.2 -2514 -7605 mim2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 56633040 53020 0 0
+node "m4_n2614_n7705#" 1 30606.7 -2614 -7705 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 79517880 61788 4963200 31660 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "c2_n2514_n7605#" "m4_n2614_n7705#" 118053
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2514 -7605 -2513 -7604 w=4870 l=4870 "None" "c2_n2514_n7605#" 17244 0 "m4_n2614_n7705#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2514 -2435 -2513 -2434 w=4870 l=4870 "None" "c2_n2514_n7605#" 17244 0 "m4_n2614_n7705#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2514 2735 -2513 2736 w=4870 l=4870 "None" "c2_n2514_n7605#" 17244 0 "m4_n2614_n7705#" 0 0
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97T35S.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97T35S.mag
new file mode 100644
index 0000000..9e7180b
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_97T35S.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646426626
+<< metal4 >>
+rect -2614 7664 2614 7705
+rect -2614 2676 2358 7664
+rect 2594 2676 2614 7664
+rect -2614 2635 2614 2676
+rect -2614 2494 2614 2535
+rect -2614 -2494 2358 2494
+rect 2594 -2494 2614 2494
+rect -2614 -2535 2614 -2494
+rect -2614 -2676 2614 -2635
+rect -2614 -7664 2358 -2676
+rect 2594 -7664 2614 -2676
+rect -2614 -7705 2614 -7664
+<< via4 >>
+rect 2358 2676 2594 7664
+rect 2358 -2494 2594 2494
+rect 2358 -7664 2594 -2676
+<< mimcap2 >>
+rect -2514 7565 2356 7605
+rect -2514 2775 -1995 7565
+rect 1837 2775 2356 7565
+rect -2514 2735 2356 2775
+rect -2514 2395 2356 2435
+rect -2514 -2395 -1995 2395
+rect 1837 -2395 2356 2395
+rect -2514 -2435 2356 -2395
+rect -2514 -2775 2356 -2735
+rect -2514 -7565 -1995 -2775
+rect 1837 -7565 2356 -2775
+rect -2514 -7605 2356 -7565
+<< mimcap2contact >>
+rect -1995 2775 1837 7565
+rect -1995 -2395 1837 2395
+rect -1995 -7565 1837 -2775
+<< metal5 >>
+rect -239 7589 81 7755
+rect 2316 7664 2636 7755
+rect -2019 7565 1861 7589
+rect -2019 2775 -1995 7565
+rect 1837 2775 1861 7565
+rect -2019 2751 1861 2775
+rect -239 2419 81 2751
+rect 2316 2676 2358 7664
+rect 2594 2676 2636 7664
+rect 2316 2494 2636 2676
+rect -2019 2395 1861 2419
+rect -2019 -2395 -1995 2395
+rect 1837 -2395 1861 2395
+rect -2019 -2419 1861 -2395
+rect -239 -2751 81 -2419
+rect 2316 -2494 2358 2494
+rect 2594 -2494 2636 2494
+rect 2316 -2676 2636 -2494
+rect -2019 -2775 1861 -2751
+rect -2019 -7565 -1995 -2775
+rect 1837 -7565 1861 -2775
+rect -2019 -7589 1861 -7565
+rect -239 -7755 81 -7589
+rect 2316 -7664 2358 -2676
+rect 2594 -7664 2636 -2676
+rect 2316 -7755 2636 -7664
+<< properties >>
+string FIXED_BBOX -2614 2635 2456 7705
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.35 l 24.35 val 1.204k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9BM3P8.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9BM3P8.mag
new file mode 100644
index 0000000..b0fdfcd
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9BM3P8.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645034691
+<< metal4 >>
+rect -2639 7739 2639 7780
+rect -2639 2701 2383 7739
+rect 2619 2701 2639 7739
+rect -2639 2660 2639 2701
+rect -2639 2519 2639 2560
+rect -2639 -2519 2383 2519
+rect 2619 -2519 2639 2519
+rect -2639 -2560 2639 -2519
+rect -2639 -2701 2639 -2660
+rect -2639 -7739 2383 -2701
+rect 2619 -7739 2639 -2701
+rect -2639 -7780 2639 -7739
+<< via4 >>
+rect 2383 2701 2619 7739
+rect 2383 -2519 2619 2519
+rect 2383 -7739 2619 -2701
+<< mimcap2 >>
+rect -2539 7640 2381 7680
+rect -2539 2800 -2015 7640
+rect 1857 2800 2381 7640
+rect -2539 2760 2381 2800
+rect -2539 2420 2381 2460
+rect -2539 -2420 -2015 2420
+rect 1857 -2420 2381 2420
+rect -2539 -2460 2381 -2420
+rect -2539 -2800 2381 -2760
+rect -2539 -7640 -2015 -2800
+rect 1857 -7640 2381 -2800
+rect -2539 -7680 2381 -7640
+<< mimcap2contact >>
+rect -2015 2800 1857 7640
+rect -2015 -2420 1857 2420
+rect -2015 -7640 1857 -2800
+<< metal5 >>
+rect -239 7664 81 7830
+rect 2341 7739 2661 7830
+rect -2039 7640 1881 7664
+rect -2039 2800 -2015 7640
+rect 1857 2800 1881 7640
+rect -2039 2776 1881 2800
+rect -239 2444 81 2776
+rect 2341 2701 2383 7739
+rect 2619 2701 2661 7739
+rect 2341 2519 2661 2701
+rect -2039 2420 1881 2444
+rect -2039 -2420 -2015 2420
+rect 1857 -2420 1881 2420
+rect -2039 -2444 1881 -2420
+rect -239 -2776 81 -2444
+rect 2341 -2519 2383 2519
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+rect 2341 -2701 2661 -2519
+rect -2039 -2800 1881 -2776
+rect -2039 -7640 -2015 -2800
+rect 1857 -7640 1881 -2800
+rect -2039 -7664 1881 -7640
+rect -239 -7830 81 -7664
+rect 2341 -7739 2383 -2701
+rect 2619 -7739 2661 -2701
+rect 2341 -7830 2661 -7739
+<< properties >>
+string FIXED_BBOX -2639 2660 2481 7780
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.6 l 24.6 val 1.229k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9DL3LA.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9DL3LA.mag
new file mode 100644
index 0000000..786ac58
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9DL3LA.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644767790
+<< metal4 >>
+rect -2589 7589 2589 7630
+rect -2589 2651 2333 7589
+rect 2569 2651 2589 7589
+rect -2589 2610 2589 2651
+rect -2589 2469 2589 2510
+rect -2589 -2469 2333 2469
+rect 2569 -2469 2589 2469
+rect -2589 -2510 2589 -2469
+rect -2589 -2651 2589 -2610
+rect -2589 -7589 2333 -2651
+rect 2569 -7589 2589 -2651
+rect -2589 -7630 2589 -7589
+<< via4 >>
+rect 2333 2651 2569 7589
+rect 2333 -2469 2569 2469
+rect 2333 -7589 2569 -2651
+<< mimcap2 >>
+rect -2489 7490 2331 7530
+rect -2489 2750 -1975 7490
+rect 1817 2750 2331 7490
+rect -2489 2710 2331 2750
+rect -2489 2370 2331 2410
+rect -2489 -2370 -1975 2370
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+rect -2489 -2750 2331 -2710
+rect -2489 -7490 -1975 -2750
+rect 1817 -7490 2331 -2750
+rect -2489 -7530 2331 -7490
+<< mimcap2contact >>
+rect -1975 2750 1817 7490
+rect -1975 -2370 1817 2370
+rect -1975 -7490 1817 -2750
+<< metal5 >>
+rect -239 7514 81 7680
+rect 2291 7589 2611 7680
+rect -1999 7490 1841 7514
+rect -1999 2750 -1975 7490
+rect 1817 2750 1841 7490
+rect -1999 2726 1841 2750
+rect -239 2394 81 2726
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+rect 1817 -2370 1841 2370
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+rect -239 -2726 81 -2394
+rect 2291 -2469 2333 2469
+rect 2569 -2469 2611 2469
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+rect -1999 -2750 1841 -2726
+rect -1999 -7490 -1975 -2750
+rect 1817 -7490 1841 -2750
+rect -1999 -7514 1841 -7490
+rect -239 -7680 81 -7514
+rect 2291 -7589 2333 -2651
+rect 2569 -7589 2611 -2651
+rect 2291 -7680 2611 -7589
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_2
+string FIXED_BBOX -2589 2610 2431 7630
+string parameters w 24.1 l 24.1 val 1.179k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+string library sky130
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9ML3N8.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9ML3N8.mag
new file mode 100644
index 0000000..9700969
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9ML3N8.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646063076
+<< metal4 >>
+rect -2629 7709 2629 7750
+rect -2629 2691 2373 7709
+rect 2609 2691 2629 7709
+rect -2629 2650 2629 2691
+rect -2629 2509 2629 2550
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+rect -2629 -2550 2629 -2509
+rect -2629 -2691 2629 -2650
+rect -2629 -7709 2373 -2691
+rect 2609 -7709 2629 -2691
+rect -2629 -7750 2629 -7709
+<< via4 >>
+rect 2373 2691 2609 7709
+rect 2373 -2509 2609 2509
+rect 2373 -7709 2609 -2691
+<< mimcap2 >>
+rect -2529 7610 2371 7650
+rect -2529 2790 -2007 7610
+rect 1849 2790 2371 7610
+rect -2529 2750 2371 2790
+rect -2529 2410 2371 2450
+rect -2529 -2410 -2007 2410
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+rect -2529 -2790 2371 -2750
+rect -2529 -7610 -2007 -2790
+rect 1849 -7610 2371 -2790
+rect -2529 -7650 2371 -7610
+<< mimcap2contact >>
+rect -2007 2790 1849 7610
+rect -2007 -2410 1849 2410
+rect -2007 -7610 1849 -2790
+<< metal5 >>
+rect -239 7634 81 7800
+rect 2331 7709 2651 7800
+rect -2031 7610 1873 7634
+rect -2031 2790 -2007 7610
+rect 1849 2790 1873 7610
+rect -2031 2766 1873 2790
+rect -239 2434 81 2766
+rect 2331 2691 2373 7709
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+rect 2331 2509 2651 2691
+rect -2031 2410 1873 2434
+rect -2031 -2410 -2007 2410
+rect 1849 -2410 1873 2410
+rect -2031 -2434 1873 -2410
+rect -239 -2766 81 -2434
+rect 2331 -2509 2373 2509
+rect 2609 -2509 2651 2509
+rect 2331 -2691 2651 -2509
+rect -2031 -2790 1873 -2766
+rect -2031 -7610 -2007 -2790
+rect 1849 -7610 1873 -2790
+rect -2031 -7634 1873 -7610
+rect -239 -7800 81 -7634
+rect 2331 -7709 2373 -2691
+rect 2609 -7709 2651 -2691
+rect 2331 -7800 2651 -7709
+<< properties >>
+string FIXED_BBOX -2629 2650 2471 7750
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.5 l 24.5 val 1.219k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9TGBRT.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9TGBRT.mag
new file mode 100644
index 0000000..4097646
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9TGBRT.mag
@@ -0,0 +1,86 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644594152
+<< error_p >>
+rect 2133 -7650 2429 7650
+rect 2453 2821 2749 7601
+rect 2453 2599 2773 2821
+rect 2453 2279 2773 2501
+rect 2453 -2279 2749 2279
+rect 2453 -2501 2773 -2279
+rect 2453 -2821 2773 -2599
+rect 2453 -7601 2749 -2821
+<< metal4 >>
+rect -2751 7559 2751 7600
+rect -2751 2641 2495 7559
+rect 2731 2641 2751 7559
+rect -2751 2600 2751 2641
+rect -2751 2459 2751 2500
+rect -2751 -2459 2495 2459
+rect 2731 -2459 2751 2459
+rect -2751 -2500 2751 -2459
+rect -2751 -2641 2751 -2600
+rect -2751 -7559 2495 -2641
+rect 2731 -7559 2751 -2641
+rect -2751 -7600 2751 -7559
+<< via4 >>
+rect 2495 2641 2731 7559
+rect 2495 -2459 2731 2459
+rect 2495 -7559 2731 -2641
+<< mimcap2 >>
+rect -2651 7460 2149 7500
+rect -2651 2740 -2611 7460
+rect 2109 2740 2149 7460
+rect -2651 2700 2149 2740
+rect -2651 2360 2149 2400
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+rect 2109 -7460 2149 -2740
+rect -2651 -7500 2149 -7460
+<< mimcap2contact >>
+rect -2611 2740 2109 7460
+rect -2611 -2360 2109 2360
+rect -2611 -7460 2109 -2740
+<< metal5 >>
+rect -411 7484 -91 7650
+rect 2109 7484 2429 7650
+rect -2635 7460 2429 7484
+rect -2635 2740 -2611 7460
+rect 2109 2740 2429 7460
+rect -2635 2716 2429 2740
+rect -411 2384 -91 2716
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+rect 2453 7559 2773 7601
+rect 2453 2641 2495 7559
+rect 2731 2641 2773 7559
+rect 2453 2599 2773 2641
+rect -2635 2360 2429 2384
+rect -2635 -2360 -2611 2360
+rect 2109 -2360 2429 2360
+rect -2635 -2384 2429 -2360
+rect -411 -2716 -91 -2384
+rect 2109 -2716 2429 -2384
+rect 2453 2459 2773 2501
+rect 2453 -2459 2495 2459
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+rect 2453 -2501 2773 -2459
+rect -2635 -2740 2429 -2716
+rect -2635 -7460 -2611 -2740
+rect 2109 -7460 2429 -2740
+rect -2635 -7484 2429 -7460
+rect -411 -7650 -91 -7484
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+rect 2453 -2641 2773 -2599
+rect 2453 -7559 2495 -2641
+rect 2731 -7559 2773 -2641
+rect 2453 -7601 2773 -7559
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_2
+string FIXED_BBOX -2751 2600 2249 7600
+string parameters w 24.0 l 24.0 val 1.17k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 100
+string library sky130
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9XH3MC.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9XH3MC.mag
new file mode 100644
index 0000000..9a96177
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9XH3MC.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645713414
+<< metal4 >>
+rect -2514 7364 2514 7405
+rect -2514 2576 2258 7364
+rect 2494 2576 2514 7364
+rect -2514 2535 2514 2576
+rect -2514 2394 2514 2435
+rect -2514 -2394 2258 2394
+rect 2494 -2394 2514 2394
+rect -2514 -2435 2514 -2394
+rect -2514 -2576 2514 -2535
+rect -2514 -7364 2258 -2576
+rect 2494 -7364 2514 -2576
+rect -2514 -7405 2514 -7364
+<< via4 >>
+rect 2258 2576 2494 7364
+rect 2258 -2394 2494 2394
+rect 2258 -7364 2494 -2576
+<< mimcap2 >>
+rect -2414 7265 2256 7305
+rect -2414 2675 -1915 7265
+rect 1757 2675 2256 7265
+rect -2414 2635 2256 2675
+rect -2414 2295 2256 2335
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+rect -2414 -2675 2256 -2635
+rect -2414 -7265 -1915 -2675
+rect 1757 -7265 2256 -2675
+rect -2414 -7305 2256 -7265
+<< mimcap2contact >>
+rect -1915 2675 1757 7265
+rect -1915 -2295 1757 2295
+rect -1915 -7265 1757 -2675
+<< metal5 >>
+rect -239 7289 81 7455
+rect 2216 7364 2536 7455
+rect -1939 7265 1781 7289
+rect -1939 2675 -1915 7265
+rect 1757 2675 1781 7265
+rect -1939 2651 1781 2675
+rect -239 2319 81 2651
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+rect 2216 2394 2536 2576
+rect -1939 2295 1781 2319
+rect -1939 -2295 -1915 2295
+rect 1757 -2295 1781 2295
+rect -1939 -2319 1781 -2295
+rect -239 -2651 81 -2319
+rect 2216 -2394 2258 2394
+rect 2494 -2394 2536 2394
+rect 2216 -2576 2536 -2394
+rect -1939 -2675 1781 -2651
+rect -1939 -7265 -1915 -2675
+rect 1757 -7265 1781 -2675
+rect -1939 -7289 1781 -7265
+rect -239 -7455 81 -7289
+rect 2216 -7364 2258 -2576
+rect 2494 -7364 2536 -2576
+rect 2216 -7455 2536 -7364
+<< properties >>
+string FIXED_BBOX -2514 2535 2356 7405
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23.35 l 23.35 val 1.108k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9Z93N8.ext b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9Z93N8.ext
new file mode 100644
index 0000000..94a94f1
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9Z93N8.ext
@@ -0,0 +1,14 @@
+timestamp 1646425662
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__cap_mim_m3_2 w=w l=l
+node "c2_n2509_n7590#" 0 256.2 -2509 -7590 mim2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 56400768 52912 0 0
+node "m4_n2609_n7690#" 1 30516.8 -2609 -7690 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 79209240 61668 4953600 31600 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "c2_n2509_n7590#" "m4_n2609_n7690#" 117613
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2509 -7590 -2508 -7589 w=4860 l=4860 "None" "c2_n2509_n7590#" 17208 0 "m4_n2609_n7690#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2509 -2430 -2508 -2429 w=4860 l=4860 "None" "c2_n2509_n7590#" 17208 0 "m4_n2609_n7690#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2509 2730 -2508 2731 w=4860 l=4860 "None" "c2_n2509_n7590#" 17208 0 "m4_n2609_n7690#" 0 0
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9Z93N8.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9Z93N8.mag
new file mode 100644
index 0000000..f683835
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_9Z93N8.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646425662
+<< metal4 >>
+rect -2609 7649 2609 7690
+rect -2609 2671 2353 7649
+rect 2589 2671 2609 7649
+rect -2609 2630 2609 2671
+rect -2609 2489 2609 2530
+rect -2609 -2489 2353 2489
+rect 2589 -2489 2609 2489
+rect -2609 -2530 2609 -2489
+rect -2609 -2671 2609 -2630
+rect -2609 -7649 2353 -2671
+rect 2589 -7649 2609 -2671
+rect -2609 -7690 2609 -7649
+<< via4 >>
+rect 2353 2671 2589 7649
+rect 2353 -2489 2589 2489
+rect 2353 -7649 2589 -2671
+<< mimcap2 >>
+rect -2509 7550 2351 7590
+rect -2509 2770 -1991 7550
+rect 1833 2770 2351 7550
+rect -2509 2730 2351 2770
+rect -2509 2390 2351 2430
+rect -2509 -2390 -1991 2390
+rect 1833 -2390 2351 2390
+rect -2509 -2430 2351 -2390
+rect -2509 -2770 2351 -2730
+rect -2509 -7550 -1991 -2770
+rect 1833 -7550 2351 -2770
+rect -2509 -7590 2351 -7550
+<< mimcap2contact >>
+rect -1991 2770 1833 7550
+rect -1991 -2390 1833 2390
+rect -1991 -7550 1833 -2770
+<< metal5 >>
+rect -239 7574 81 7740
+rect 2311 7649 2631 7740
+rect -2015 7550 1857 7574
+rect -2015 2770 -1991 7550
+rect 1833 2770 1857 7550
+rect -2015 2746 1857 2770
+rect -239 2414 81 2746
+rect 2311 2671 2353 7649
+rect 2589 2671 2631 7649
+rect 2311 2489 2631 2671
+rect -2015 2390 1857 2414
+rect -2015 -2390 -1991 2390
+rect 1833 -2390 1857 2390
+rect -2015 -2414 1857 -2390
+rect -239 -2746 81 -2414
+rect 2311 -2489 2353 2489
+rect 2589 -2489 2631 2489
+rect 2311 -2671 2631 -2489
+rect -2015 -2770 1857 -2746
+rect -2015 -7550 -1991 -2770
+rect 1833 -7550 1857 -2770
+rect -2015 -7574 1857 -7550
+rect -239 -7740 81 -7574
+rect 2311 -7649 2353 -2671
+rect 2589 -7649 2631 -2671
+rect 2311 -7740 2631 -7649
+<< properties >>
+string FIXED_BBOX -2609 2630 2451 7690
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.3 l 24.3 val 1.199k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_E3SBB9.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_E3SBB9.mag
new file mode 100644
index 0000000..f4de092
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_E3SBB9.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644599756
+<< metal4 >>
+rect -2499 7319 2499 7360
+rect -2499 2561 2243 7319
+rect 2479 2561 2499 7319
+rect -2499 2520 2499 2561
+rect -2499 2379 2499 2420
+rect -2499 -2379 2243 2379
+rect 2479 -2379 2499 2379
+rect -2499 -2420 2499 -2379
+rect -2499 -2561 2499 -2520
+rect -2499 -7319 2243 -2561
+rect 2479 -7319 2499 -2561
+rect -2499 -7360 2499 -7319
+<< via4 >>
+rect 2243 2561 2479 7319
+rect 2243 -2379 2479 2379
+rect 2243 -7319 2479 -2561
+<< mimcap2 >>
+rect -2399 7220 2241 7260
+rect -2399 2660 -1903 7220
+rect 1745 2660 2241 7220
+rect -2399 2620 2241 2660
+rect -2399 2280 2241 2320
+rect -2399 -2280 -1903 2280
+rect 1745 -2280 2241 2280
+rect -2399 -2320 2241 -2280
+rect -2399 -2660 2241 -2620
+rect -2399 -7220 -1903 -2660
+rect 1745 -7220 2241 -2660
+rect -2399 -7260 2241 -7220
+<< mimcap2contact >>
+rect -1903 2660 1745 7220
+rect -1903 -2280 1745 2280
+rect -1903 -7220 1745 -2660
+<< metal5 >>
+rect -239 7244 81 7410
+rect 2201 7319 2521 7410
+rect -1927 7220 1769 7244
+rect -1927 2660 -1903 7220
+rect 1745 2660 1769 7220
+rect -1927 2636 1769 2660
+rect -239 2304 81 2636
+rect 2201 2561 2243 7319
+rect 2479 2561 2521 7319
+rect 2201 2379 2521 2561
+rect -1927 2280 1769 2304
+rect -1927 -2280 -1903 2280
+rect 1745 -2280 1769 2280
+rect -1927 -2304 1769 -2280
+rect -239 -2636 81 -2304
+rect 2201 -2379 2243 2379
+rect 2479 -2379 2521 2379
+rect 2201 -2561 2521 -2379
+rect -1927 -2660 1769 -2636
+rect -1927 -7220 -1903 -2660
+rect 1745 -7220 1769 -2660
+rect -1927 -7244 1769 -7220
+rect -239 -7410 81 -7244
+rect 2201 -7319 2243 -2561
+rect 2479 -7319 2521 -2561
+rect 2201 -7410 2521 -7319
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_2
+string FIXED_BBOX -2499 2520 2341 7360
+string parameters w 23.2 l 23.2 val 1.094k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+string library sky130
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_E73YU8.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_E73YU8.mag
new file mode 100644
index 0000000..8cd6fc2
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_E73YU8.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645036469
+<< metal4 >>
+rect -2519 7379 2519 7420
+rect -2519 2581 2263 7379
+rect 2499 2581 2519 7379
+rect -2519 2540 2519 2581
+rect -2519 2399 2519 2440
+rect -2519 -2399 2263 2399
+rect 2499 -2399 2519 2399
+rect -2519 -2440 2519 -2399
+rect -2519 -2581 2519 -2540
+rect -2519 -7379 2263 -2581
+rect 2499 -7379 2519 -2581
+rect -2519 -7420 2519 -7379
+<< via4 >>
+rect 2263 2581 2499 7379
+rect 2263 -2399 2499 2399
+rect 2263 -7379 2499 -2581
+<< mimcap2 >>
+rect -2419 7280 2261 7320
+rect -2419 2680 -1919 7280
+rect 1761 2680 2261 7280
+rect -2419 2640 2261 2680
+rect -2419 2300 2261 2340
+rect -2419 -2300 -1919 2300
+rect 1761 -2300 2261 2300
+rect -2419 -2340 2261 -2300
+rect -2419 -2680 2261 -2640
+rect -2419 -7280 -1919 -2680
+rect 1761 -7280 2261 -2680
+rect -2419 -7320 2261 -7280
+<< mimcap2contact >>
+rect -1919 2680 1761 7280
+rect -1919 -2300 1761 2300
+rect -1919 -7280 1761 -2680
+<< metal5 >>
+rect -239 7304 81 7470
+rect 2221 7379 2541 7470
+rect -1943 7280 1785 7304
+rect -1943 2680 -1919 7280
+rect 1761 2680 1785 7280
+rect -1943 2656 1785 2680
+rect -239 2324 81 2656
+rect 2221 2581 2263 7379
+rect 2499 2581 2541 7379
+rect 2221 2399 2541 2581
+rect -1943 2300 1785 2324
+rect -1943 -2300 -1919 2300
+rect 1761 -2300 1785 2300
+rect -1943 -2324 1785 -2300
+rect -239 -2656 81 -2324
+rect 2221 -2399 2263 2399
+rect 2499 -2399 2541 2399
+rect 2221 -2581 2541 -2399
+rect -1943 -2680 1785 -2656
+rect -1943 -7280 -1919 -2680
+rect 1761 -7280 1785 -2680
+rect -1943 -7304 1785 -7280
+rect -239 -7470 81 -7304
+rect 2221 -7379 2263 -2581
+rect 2499 -7379 2541 -2581
+rect 2221 -7470 2541 -7379
+<< properties >>
+string FIXED_BBOX -2519 2540 2361 7420
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23.4 l 23.4 val 1.112k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EB5J48.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EB5J48.mag
new file mode 100644
index 0000000..2ff8258
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EB5J48.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644768462
+<< metal4 >>
+rect -2539 7439 2539 7480
+rect -2539 2601 2283 7439
+rect 2519 2601 2539 7439
+rect -2539 2560 2539 2601
+rect -2539 2419 2539 2460
+rect -2539 -2419 2283 2419
+rect 2519 -2419 2539 2419
+rect -2539 -2460 2539 -2419
+rect -2539 -2601 2539 -2560
+rect -2539 -7439 2283 -2601
+rect 2519 -7439 2539 -2601
+rect -2539 -7480 2539 -7439
+<< via4 >>
+rect 2283 2601 2519 7439
+rect 2283 -2419 2519 2419
+rect 2283 -7439 2519 -2601
+<< mimcap2 >>
+rect -2439 7340 2281 7380
+rect -2439 2700 -1935 7340
+rect 1777 2700 2281 7340
+rect -2439 2660 2281 2700
+rect -2439 2320 2281 2360
+rect -2439 -2320 -1935 2320
+rect 1777 -2320 2281 2320
+rect -2439 -2360 2281 -2320
+rect -2439 -2700 2281 -2660
+rect -2439 -7340 -1935 -2700
+rect 1777 -7340 2281 -2700
+rect -2439 -7380 2281 -7340
+<< mimcap2contact >>
+rect -1935 2700 1777 7340
+rect -1935 -2320 1777 2320
+rect -1935 -7340 1777 -2700
+<< metal5 >>
+rect -239 7364 81 7530
+rect 2241 7439 2561 7530
+rect -1959 7340 1801 7364
+rect -1959 2700 -1935 7340
+rect 1777 2700 1801 7340
+rect -1959 2676 1801 2700
+rect -239 2344 81 2676
+rect 2241 2601 2283 7439
+rect 2519 2601 2561 7439
+rect 2241 2419 2561 2601
+rect -1959 2320 1801 2344
+rect -1959 -2320 -1935 2320
+rect 1777 -2320 1801 2320
+rect -1959 -2344 1801 -2320
+rect -239 -2676 81 -2344
+rect 2241 -2419 2283 2419
+rect 2519 -2419 2561 2419
+rect 2241 -2601 2561 -2419
+rect -1959 -2700 1801 -2676
+rect -1959 -7340 -1935 -2700
+rect 1777 -7340 1801 -2700
+rect -1959 -7364 1801 -7340
+rect -239 -7530 81 -7364
+rect 2241 -7439 2283 -2601
+rect 2519 -7439 2561 -2601
+rect 2241 -7530 2561 -7439
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_2
+string FIXED_BBOX -2539 2560 2381 7480
+string parameters w 23.6 l 23.6 val 1.131k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+string library sky130
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_ED4CE9.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_ED4CE9.mag
new file mode 100644
index 0000000..866d13b
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_ED4CE9.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644763882
+<< metal4 >>
+rect -2489 7289 2489 7330
+rect -2489 2551 2233 7289
+rect 2469 2551 2489 7289
+rect -2489 2510 2489 2551
+rect -2489 2369 2489 2410
+rect -2489 -2369 2233 2369
+rect 2469 -2369 2489 2369
+rect -2489 -2410 2489 -2369
+rect -2489 -2551 2489 -2510
+rect -2489 -7289 2233 -2551
+rect 2469 -7289 2489 -2551
+rect -2489 -7330 2489 -7289
+<< via4 >>
+rect 2233 2551 2469 7289
+rect 2233 -2369 2469 2369
+rect 2233 -7289 2469 -2551
+<< mimcap2 >>
+rect -2389 7190 2231 7230
+rect -2389 2650 -1895 7190
+rect 1737 2650 2231 7190
+rect -2389 2610 2231 2650
+rect -2389 2270 2231 2310
+rect -2389 -2270 -1895 2270
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+rect -2389 -2310 2231 -2270
+rect -2389 -2650 2231 -2610
+rect -2389 -7190 -1895 -2650
+rect 1737 -7190 2231 -2650
+rect -2389 -7230 2231 -7190
+<< mimcap2contact >>
+rect -1895 2650 1737 7190
+rect -1895 -2270 1737 2270
+rect -1895 -7190 1737 -2650
+<< metal5 >>
+rect -239 7214 81 7380
+rect 2191 7289 2511 7380
+rect -1919 7190 1761 7214
+rect -1919 2650 -1895 7190
+rect 1737 2650 1761 7190
+rect -1919 2626 1761 2650
+rect -239 2294 81 2626
+rect 2191 2551 2233 7289
+rect 2469 2551 2511 7289
+rect 2191 2369 2511 2551
+rect -1919 2270 1761 2294
+rect -1919 -2270 -1895 2270
+rect 1737 -2270 1761 2270
+rect -1919 -2294 1761 -2270
+rect -239 -2626 81 -2294
+rect 2191 -2369 2233 2369
+rect 2469 -2369 2511 2369
+rect 2191 -2551 2511 -2369
+rect -1919 -2650 1761 -2626
+rect -1919 -7190 -1895 -2650
+rect 1737 -7190 1761 -2650
+rect -1919 -7214 1761 -7190
+rect -239 -7380 81 -7214
+rect 2191 -7289 2233 -2551
+rect 2469 -7289 2511 -2551
+rect 2191 -7380 2511 -7289
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_2
+string FIXED_BBOX -2489 2510 2331 7330
+string parameters w 23.1 l 23.1 val 1.084k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+string library sky130
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EM4YZ7.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EM4YZ7.mag
new file mode 100644
index 0000000..d8f27ac
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EM4YZ7.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645036303
+<< metal4 >>
+rect -2529 7409 2529 7450
+rect -2529 2591 2273 7409
+rect 2509 2591 2529 7409
+rect -2529 2550 2529 2591
+rect -2529 2409 2529 2450
+rect -2529 -2409 2273 2409
+rect 2509 -2409 2529 2409
+rect -2529 -2450 2529 -2409
+rect -2529 -2591 2529 -2550
+rect -2529 -7409 2273 -2591
+rect 2509 -7409 2529 -2591
+rect -2529 -7450 2529 -7409
+<< via4 >>
+rect 2273 2591 2509 7409
+rect 2273 -2409 2509 2409
+rect 2273 -7409 2509 -2591
+<< mimcap2 >>
+rect -2429 7310 2271 7350
+rect -2429 2690 -1927 7310
+rect 1769 2690 2271 7310
+rect -2429 2650 2271 2690
+rect -2429 2310 2271 2350
+rect -2429 -2310 -1927 2310
+rect 1769 -2310 2271 2310
+rect -2429 -2350 2271 -2310
+rect -2429 -2690 2271 -2650
+rect -2429 -7310 -1927 -2690
+rect 1769 -7310 2271 -2690
+rect -2429 -7350 2271 -7310
+<< mimcap2contact >>
+rect -1927 2690 1769 7310
+rect -1927 -2310 1769 2310
+rect -1927 -7310 1769 -2690
+<< metal5 >>
+rect -239 7334 81 7500
+rect 2231 7409 2551 7500
+rect -1951 7310 1793 7334
+rect -1951 2690 -1927 7310
+rect 1769 2690 1793 7310
+rect -1951 2666 1793 2690
+rect -239 2334 81 2666
+rect 2231 2591 2273 7409
+rect 2509 2591 2551 7409
+rect 2231 2409 2551 2591
+rect -1951 2310 1793 2334
+rect -1951 -2310 -1927 2310
+rect 1769 -2310 1793 2310
+rect -1951 -2334 1793 -2310
+rect -239 -2666 81 -2334
+rect 2231 -2409 2273 2409
+rect 2509 -2409 2551 2409
+rect 2231 -2591 2551 -2409
+rect -1951 -2690 1793 -2666
+rect -1951 -7310 -1927 -2690
+rect 1769 -7310 1793 -2690
+rect -1951 -7334 1793 -7310
+rect -239 -7500 81 -7334
+rect 2231 -7409 2273 -2591
+rect 2509 -7409 2551 -2591
+rect 2231 -7500 2551 -7409
+<< properties >>
+string FIXED_BBOX -2529 2550 2371 7450
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23.5 l 23.5 val 1.122k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EZRVX8.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EZRVX8.mag
new file mode 100644
index 0000000..97bad0d
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_EZRVX8.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646011875
+<< metal4 >>
+rect -2509 7349 2509 7390
+rect -2509 2571 2253 7349
+rect 2489 2571 2509 7349
+rect -2509 2530 2509 2571
+rect -2509 2389 2509 2430
+rect -2509 -2389 2253 2389
+rect 2489 -2389 2509 2389
+rect -2509 -2430 2509 -2389
+rect -2509 -2571 2509 -2530
+rect -2509 -7349 2253 -2571
+rect 2489 -7349 2509 -2571
+rect -2509 -7390 2509 -7349
+<< via4 >>
+rect 2253 2571 2489 7349
+rect 2253 -2389 2489 2389
+rect 2253 -7349 2489 -2571
+<< mimcap2 >>
+rect -2409 7250 2251 7290
+rect -2409 2670 -1911 7250
+rect 1753 2670 2251 7250
+rect -2409 2630 2251 2670
+rect -2409 2290 2251 2330
+rect -2409 -2290 -1911 2290
+rect 1753 -2290 2251 2290
+rect -2409 -2330 2251 -2290
+rect -2409 -2670 2251 -2630
+rect -2409 -7250 -1911 -2670
+rect 1753 -7250 2251 -2670
+rect -2409 -7290 2251 -7250
+<< mimcap2contact >>
+rect -1911 2670 1753 7250
+rect -1911 -2290 1753 2290
+rect -1911 -7250 1753 -2670
+<< metal5 >>
+rect -239 7274 81 7440
+rect 2211 7349 2531 7440
+rect -1935 7250 1777 7274
+rect -1935 2670 -1911 7250
+rect 1753 2670 1777 7250
+rect -1935 2646 1777 2670
+rect -239 2314 81 2646
+rect 2211 2571 2253 7349
+rect 2489 2571 2531 7349
+rect 2211 2389 2531 2571
+rect -1935 2290 1777 2314
+rect -1935 -2290 -1911 2290
+rect 1753 -2290 1777 2290
+rect -1935 -2314 1777 -2290
+rect -239 -2646 81 -2314
+rect 2211 -2389 2253 2389
+rect 2489 -2389 2531 2389
+rect 2211 -2571 2531 -2389
+rect -1935 -2670 1777 -2646
+rect -1935 -7250 -1911 -2670
+rect 1753 -7250 1777 -2670
+rect -1935 -7274 1777 -7250
+rect -239 -7440 81 -7274
+rect 2211 -7349 2253 -2571
+rect 2489 -7349 2531 -2571
+rect 2211 -7440 2531 -7349
+<< properties >>
+string FIXED_BBOX -2509 2530 2351 7390
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23.3 l 23.3 val 1.103k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_Q7HQT9.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_Q7HQT9.mag
new file mode 100644
index 0000000..c2195fa
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_Q7HQT9.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645644904
+<< metal4 >>
+rect -2679 7859 2679 7900
+rect -2679 2741 2423 7859
+rect 2659 2741 2679 7859
+rect -2679 2700 2679 2741
+rect -2679 2559 2679 2600
+rect -2679 -2559 2423 2559
+rect 2659 -2559 2679 2559
+rect -2679 -2600 2679 -2559
+rect -2679 -2741 2679 -2700
+rect -2679 -7859 2423 -2741
+rect 2659 -7859 2679 -2741
+rect -2679 -7900 2679 -7859
+<< via4 >>
+rect 2423 2741 2659 7859
+rect 2423 -2559 2659 2559
+rect 2423 -7859 2659 -2741
+<< mimcap2 >>
+rect -2579 7760 2421 7800
+rect -2579 2840 -2047 7760
+rect 1889 2840 2421 7760
+rect -2579 2800 2421 2840
+rect -2579 2460 2421 2500
+rect -2579 -2460 -2047 2460
+rect 1889 -2460 2421 2460
+rect -2579 -2500 2421 -2460
+rect -2579 -2840 2421 -2800
+rect -2579 -7760 -2047 -2840
+rect 1889 -7760 2421 -2840
+rect -2579 -7800 2421 -7760
+<< mimcap2contact >>
+rect -2047 2840 1889 7760
+rect -2047 -2460 1889 2460
+rect -2047 -7760 1889 -2840
+<< metal5 >>
+rect -239 7784 81 7950
+rect 2381 7859 2701 7950
+rect -2071 7760 1913 7784
+rect -2071 2840 -2047 7760
+rect 1889 2840 1913 7760
+rect -2071 2816 1913 2840
+rect -239 2484 81 2816
+rect 2381 2741 2423 7859
+rect 2659 2741 2701 7859
+rect 2381 2559 2701 2741
+rect -2071 2460 1913 2484
+rect -2071 -2460 -2047 2460
+rect 1889 -2460 1913 2460
+rect -2071 -2484 1913 -2460
+rect -239 -2816 81 -2484
+rect 2381 -2559 2423 2559
+rect 2659 -2559 2701 2559
+rect 2381 -2741 2701 -2559
+rect -2071 -2840 1913 -2816
+rect -2071 -7760 -2047 -2840
+rect 1889 -7760 1913 -2840
+rect -2071 -7784 1913 -7760
+rect -239 -7950 81 -7784
+rect 2381 -7859 2423 -2741
+rect 2659 -7859 2701 -2741
+rect 2381 -7950 2701 -7859
+<< properties >>
+string FIXED_BBOX -2679 2700 2521 7900
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 25 l 25 val 1.269k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_QKF9RA.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_QKF9RA.mag
new file mode 100644
index 0000000..9b0c5b8
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_QKF9RA.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645715600
+<< metal4 >>
+rect -2479 7259 2479 7300
+rect -2479 2541 2223 7259
+rect 2459 2541 2479 7259
+rect -2479 2500 2479 2541
+rect -2479 2359 2479 2400
+rect -2479 -2359 2223 2359
+rect 2459 -2359 2479 2359
+rect -2479 -2400 2479 -2359
+rect -2479 -2541 2479 -2500
+rect -2479 -7259 2223 -2541
+rect 2459 -7259 2479 -2541
+rect -2479 -7300 2479 -7259
+<< via4 >>
+rect 2223 2541 2459 7259
+rect 2223 -2359 2459 2359
+rect 2223 -7259 2459 -2541
+<< mimcap2 >>
+rect -2379 7160 2221 7200
+rect -2379 2640 -1887 7160
+rect 1729 2640 2221 7160
+rect -2379 2600 2221 2640
+rect -2379 2260 2221 2300
+rect -2379 -2260 -1887 2260
+rect 1729 -2260 2221 2260
+rect -2379 -2300 2221 -2260
+rect -2379 -2640 2221 -2600
+rect -2379 -7160 -1887 -2640
+rect 1729 -7160 2221 -2640
+rect -2379 -7200 2221 -7160
+<< mimcap2contact >>
+rect -1887 2640 1729 7160
+rect -1887 -2260 1729 2260
+rect -1887 -7160 1729 -2640
+<< metal5 >>
+rect -239 7184 81 7350
+rect 2181 7259 2501 7350
+rect -1911 7160 1753 7184
+rect -1911 2640 -1887 7160
+rect 1729 2640 1753 7160
+rect -1911 2616 1753 2640
+rect -239 2284 81 2616
+rect 2181 2541 2223 7259
+rect 2459 2541 2501 7259
+rect 2181 2359 2501 2541
+rect -1911 2260 1753 2284
+rect -1911 -2260 -1887 2260
+rect 1729 -2260 1753 2260
+rect -1911 -2284 1753 -2260
+rect -239 -2616 81 -2284
+rect 2181 -2359 2223 2359
+rect 2459 -2359 2501 2359
+rect 2181 -2541 2501 -2359
+rect -1911 -2640 1753 -2616
+rect -1911 -7160 -1887 -2640
+rect 1729 -7160 1753 -2640
+rect -1911 -7184 1753 -7160
+rect -239 -7350 81 -7184
+rect 2181 -7259 2223 -2541
+rect 2459 -7259 2501 -2541
+rect 2181 -7350 2501 -7259
+<< properties >>
+string FIXED_BBOX -2479 2500 2321 7300
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23 l 23 val 1.075k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_Z2MGMH.mag b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_Z2MGMH.mag
new file mode 100644
index 0000000..802c12e
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__cap_mim_m3_2_Z2MGMH.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644594744
+<< metal4 >>
+rect -2579 7559 2579 7600
+rect -2579 2641 2323 7559
+rect 2559 2641 2579 7559
+rect -2579 2600 2579 2641
+rect -2579 2459 2579 2500
+rect -2579 -2459 2323 2459
+rect 2559 -2459 2579 2459
+rect -2579 -2500 2579 -2459
+rect -2579 -2641 2579 -2600
+rect -2579 -7559 2323 -2641
+rect 2559 -7559 2579 -2641
+rect -2579 -7600 2579 -7559
+<< via4 >>
+rect 2323 2641 2559 7559
+rect 2323 -2459 2559 2459
+rect 2323 -7559 2559 -2641
+<< mimcap2 >>
+rect -2479 7460 2321 7500
+rect -2479 2740 -1967 7460
+rect 1809 2740 2321 7460
+rect -2479 2700 2321 2740
+rect -2479 2360 2321 2400
+rect -2479 -2360 -1967 2360
+rect 1809 -2360 2321 2360
+rect -2479 -2400 2321 -2360
+rect -2479 -2740 2321 -2700
+rect -2479 -7460 -1967 -2740
+rect 1809 -7460 2321 -2740
+rect -2479 -7500 2321 -7460
+<< mimcap2contact >>
+rect -1967 2740 1809 7460
+rect -1967 -2360 1809 2360
+rect -1967 -7460 1809 -2740
+<< metal5 >>
+rect -239 7484 81 7650
+rect 2281 7559 2601 7650
+rect -1991 7460 1833 7484
+rect -1991 2740 -1967 7460
+rect 1809 2740 1833 7460
+rect -1991 2716 1833 2740
+rect -239 2384 81 2716
+rect 2281 2641 2323 7559
+rect 2559 2641 2601 7559
+rect 2281 2459 2601 2641
+rect -1991 2360 1833 2384
+rect -1991 -2360 -1967 2360
+rect 1809 -2360 1833 2360
+rect -1991 -2384 1833 -2360
+rect -239 -2716 81 -2384
+rect 2281 -2459 2323 2459
+rect 2559 -2459 2601 2459
+rect 2281 -2641 2601 -2459
+rect -1991 -2740 1833 -2716
+rect -1991 -7460 -1967 -2740
+rect 1809 -7460 1833 -2740
+rect -1991 -7484 1833 -7460
+rect -239 -7650 81 -7484
+rect 2281 -7559 2323 -2641
+rect 2559 -7559 2601 -2641
+rect 2281 -7650 2601 -7559
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_2
+string FIXED_BBOX -2579 2600 2421 7600
+string parameters w 24.0 l 24.0 val 1.17k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+string library sky130
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_LJHWF6.mag b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_LJHWF6.mag
new file mode 100644
index 0000000..e0d8bc0
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_LJHWF6.mag
@@ -0,0 +1,98 @@
+magic
+tech sky130A
+timestamp 1644594152
+<< pwell >>
+rect -139 -564 139 564
+<< mvnmos >>
+rect -25 -435 25 435
+<< mvndiff >>
+rect -54 429 -25 435
+rect -54 -429 -48 429
+rect -31 -429 -25 429
+rect -54 -435 -25 -429
+rect 25 429 54 435
+rect 25 -429 31 429
+rect 48 -429 54 429
+rect 25 -435 54 -429
+<< mvndiffc >>
+rect -48 -429 -31 429
+rect 31 -429 48 429
+<< mvpsubdiff >>
+rect -121 540 121 546
+rect -121 523 -67 540
+rect 67 523 121 540
+rect -121 517 121 523
+rect -121 492 -92 517
+rect -121 -492 -115 492
+rect -98 -492 -92 492
+rect 92 492 121 517
+rect -121 -517 -92 -492
+rect 92 -492 98 492
+rect 115 -492 121 492
+rect 92 -517 121 -492
+rect -121 -523 121 -517
+rect -121 -540 -67 -523
+rect 67 -540 121 -523
+rect -121 -546 121 -540
+<< mvpsubdiffcont >>
+rect -67 523 67 540
+rect -115 -492 -98 492
+rect 98 -492 115 492
+rect -67 -540 67 -523
+<< poly >>
+rect -25 471 25 479
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -25 435 25 454
+rect -25 -454 25 -435
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -25 -479 25 -471
+<< polycont >>
+rect -17 454 17 471
+rect -17 -471 17 -454
+<< locali >>
+rect -115 523 -67 540
+rect 67 523 115 540
+rect -115 492 -98 523
+rect 98 492 115 523
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -48 429 -31 437
+rect -48 -437 -31 -429
+rect 31 429 48 437
+rect 31 -437 48 -429
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -115 -523 -98 -492
+rect 98 -523 115 -492
+rect -115 -540 -67 -523
+rect 67 -540 115 -523
+<< viali >>
+rect -17 454 17 471
+rect -48 -429 -31 429
+rect 31 -429 48 429
+rect -17 -471 17 -454
+<< metal1 >>
+rect -23 471 23 474
+rect -23 454 -17 471
+rect 17 454 23 471
+rect -23 451 23 454
+rect -51 429 -28 435
+rect -51 -429 -48 429
+rect -31 -429 -28 429
+rect -51 -435 -28 -429
+rect 28 429 51 435
+rect 28 -429 31 429
+rect 48 -429 51 429
+rect 28 -435 51 -429
+rect -23 -454 23 -451
+rect -23 -471 -17 -454
+rect 17 -471 23 -454
+rect -23 -474 23 -471
+<< properties >>
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string FIXED_BBOX -106 -531 106 531
+string parameters w 8.7 l 0.5 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt sky130_fd_bs_flash__special_sonosfet_star sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt sky130_fd_pr__nfet_03v3_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 0
+string library sky130
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_MC7Y5H.mag b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_MC7Y5H.mag
new file mode 100644
index 0000000..23e83b0
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_MC7Y5H.mag
@@ -0,0 +1,103 @@
+magic
+tech sky130A
+timestamp 1644594744
+<< pwell >>
+rect -139 -564 139 564
+<< mvnmos >>
+rect -25 -435 25 435
+<< mvndiff >>
+rect -54 429 -25 435
+rect -54 -429 -48 429
+rect -31 -429 -25 429
+rect -54 -435 -25 -429
+rect 25 429 54 435
+rect 25 -429 31 429
+rect 48 -429 54 429
+rect 25 -435 54 -429
+<< mvndiffc >>
+rect -48 -429 -31 429
+rect 31 -429 48 429
+<< mvpsubdiff >>
+rect -121 540 121 546
+rect -121 523 -67 540
+rect 67 523 121 540
+rect -121 517 121 523
+rect -121 492 -92 517
+rect -121 -492 -115 492
+rect -98 -492 -92 492
+rect 92 492 121 517
+rect -121 -517 -92 -492
+rect 92 -492 98 492
+rect 115 -492 121 492
+rect 92 -517 121 -492
+rect -121 -523 121 -517
+rect -121 -540 -67 -523
+rect 67 -540 121 -523
+rect -121 -546 121 -540
+<< mvpsubdiffcont >>
+rect -67 523 67 540
+rect -115 -492 -98 492
+rect 98 -492 115 492
+rect -67 -540 67 -523
+<< poly >>
+rect -25 471 25 479
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -25 435 25 454
+rect -25 -454 25 -435
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -25 -479 25 -471
+<< polycont >>
+rect -17 454 17 471
+rect -17 -471 17 -454
+<< locali >>
+rect -115 523 -67 540
+rect 67 523 115 540
+rect -115 492 -98 523
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -48 429 -31 437
+rect -48 -437 -31 -429
+rect 31 429 48 437
+rect 31 -437 48 -429
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -115 -523 -98 -492
+rect -115 -540 -67 -523
+rect 67 -540 115 -523
+<< viali >>
+rect 98 492 115 523
+rect -17 454 17 471
+rect -48 -429 -31 429
+rect 31 -429 48 429
+rect -17 -471 17 -454
+rect 98 -492 115 492
+rect 98 -523 115 -492
+<< metal1 >>
+rect 95 523 118 529
+rect -23 471 23 474
+rect -23 454 -17 471
+rect 17 454 23 471
+rect -23 451 23 454
+rect -51 429 -28 435
+rect -51 -429 -48 429
+rect -31 -429 -28 429
+rect -51 -435 -28 -429
+rect 28 429 51 435
+rect 28 -429 31 429
+rect 48 -429 51 429
+rect 28 -435 51 -429
+rect -23 -454 23 -451
+rect -23 -471 -17 -454
+rect 17 -471 23 -454
+rect -23 -474 23 -471
+rect 95 -523 98 523
+rect 115 -523 118 523
+rect 95 -529 118 -523
+<< properties >>
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string FIXED_BBOX -106 -531 106 531
+string parameters w 8.7 l 0.5 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt sky130_fd_bs_flash__special_sonosfet_star sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt sky130_fd_pr__nfet_03v3_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 100 viagl 0 viagt 0
+string library sky130
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_ML7W5H.mag b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_ML7W5H.mag
new file mode 100644
index 0000000..42962c7
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_ML7W5H.mag
@@ -0,0 +1,103 @@
+magic
+tech sky130B
+timestamp 1644922882
+<< pwell >>
+rect -139 -564 139 564
+<< mvnmos >>
+rect -25 -435 25 435
+<< mvndiff >>
+rect -54 429 -25 435
+rect -54 -429 -48 429
+rect -31 -429 -25 429
+rect -54 -435 -25 -429
+rect 25 429 54 435
+rect 25 -429 31 429
+rect 48 -429 54 429
+rect 25 -435 54 -429
+<< mvndiffc >>
+rect -48 -429 -31 429
+rect 31 -429 48 429
+<< mvpsubdiff >>
+rect -121 540 121 546
+rect -121 523 -67 540
+rect 67 523 121 540
+rect -121 517 121 523
+rect -121 492 -92 517
+rect -121 -492 -115 492
+rect -98 -492 -92 492
+rect 92 492 121 517
+rect -121 -517 -92 -492
+rect 92 -492 98 492
+rect 115 -492 121 492
+rect 92 -517 121 -492
+rect -121 -523 121 -517
+rect -121 -540 -67 -523
+rect 67 -540 121 -523
+rect -121 -546 121 -540
+<< mvpsubdiffcont >>
+rect -67 523 67 540
+rect -115 -492 -98 492
+rect 98 -492 115 492
+rect -67 -540 67 -523
+<< poly >>
+rect -25 471 25 479
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -25 435 25 454
+rect -25 -454 25 -435
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -25 -479 25 -471
+<< polycont >>
+rect -17 454 17 471
+rect -17 -471 17 -454
+<< locali >>
+rect -115 492 -98 540
+rect 98 492 115 540
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -48 429 -31 437
+rect -48 -437 -31 -429
+rect 31 429 48 437
+rect 31 -437 48 -429
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -115 -523 -98 -492
+rect 98 -523 115 -492
+rect -115 -540 -67 -523
+rect 67 -540 115 -523
+<< viali >>
+rect -98 523 -67 540
+rect -67 523 67 540
+rect 67 523 98 540
+rect -17 454 17 471
+rect -48 -429 -31 429
+rect 31 -429 48 429
+rect -17 -471 17 -454
+<< metal1 >>
+rect -104 540 104 543
+rect -104 523 -98 540
+rect 98 523 104 540
+rect -104 520 104 523
+rect -23 471 23 474
+rect -23 454 -17 471
+rect 17 454 23 471
+rect -23 451 23 454
+rect -51 429 -28 435
+rect -51 -429 -48 429
+rect -31 -429 -28 429
+rect -51 -435 -28 -429
+rect 28 429 51 435
+rect 28 -429 31 429
+rect 48 -429 51 429
+rect 28 -435 51 -429
+rect -23 -454 23 -451
+rect -23 -471 -17 -454
+rect 17 -471 23 -454
+rect -23 -474 23 -471
+<< properties >>
+string FIXED_BBOX -53 -266 53 265
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string library sky130
+string parameters w 8.7 l 0.5 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt sky130_fd_bs_flash__special_sonosfet_star sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt sky130_fd_pr__nfet_03v3_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 100
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_NWQT76.mag b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_NWQT76.mag
new file mode 100644
index 0000000..1879dd9
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_NWQT76.mag
@@ -0,0 +1,103 @@
+magic
+tech sky130A
+timestamp 1644948032
+<< pwell >>
+rect -139 -564 139 564
+<< mvnmos >>
+rect -25 -435 25 435
+<< mvndiff >>
+rect -54 429 -25 435
+rect -54 -429 -48 429
+rect -31 -429 -25 429
+rect -54 -435 -25 -429
+rect 25 429 54 435
+rect 25 -429 31 429
+rect 48 -429 54 429
+rect 25 -435 54 -429
+<< mvndiffc >>
+rect -48 -429 -31 429
+rect 31 -429 48 429
+<< mvpsubdiff >>
+rect -121 540 121 546
+rect -121 523 -67 540
+rect 67 523 121 540
+rect -121 517 121 523
+rect -121 492 -92 517
+rect -121 -492 -115 492
+rect -98 -492 -92 492
+rect 92 492 121 517
+rect -121 -517 -92 -492
+rect 92 -492 98 492
+rect 115 -492 121 492
+rect 92 -517 121 -492
+rect -121 -523 121 -517
+rect -121 -540 -67 -523
+rect 67 -540 121 -523
+rect -121 -546 121 -540
+<< mvpsubdiffcont >>
+rect -67 523 67 540
+rect -115 -492 -98 492
+rect 98 -492 115 492
+rect -67 -540 67 -523
+<< poly >>
+rect -25 471 25 479
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -25 435 25 454
+rect -25 -454 25 -435
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -25 -479 25 -471
+<< polycont >>
+rect -17 454 17 471
+rect -17 -471 17 -454
+<< locali >>
+rect -115 492 -98 540
+rect 98 492 115 540
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -48 429 -31 437
+rect -48 -437 -31 -429
+rect 31 429 48 437
+rect 31 -437 48 -429
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -115 -523 -98 -492
+rect 98 -523 115 -492
+rect -115 -540 -67 -523
+rect 67 -540 115 -523
+<< viali >>
+rect -98 523 -67 540
+rect -67 523 67 540
+rect 67 523 98 540
+rect -17 454 17 471
+rect -48 -429 -31 429
+rect 31 -429 48 429
+rect -17 -471 17 -454
+<< metal1 >>
+rect -104 540 104 543
+rect -104 523 -98 540
+rect 98 523 104 540
+rect -104 520 104 523
+rect -23 471 23 474
+rect -23 454 -17 471
+rect 17 454 23 471
+rect -23 451 23 454
+rect -51 429 -28 435
+rect -51 -429 -48 429
+rect -31 -429 -28 429
+rect -51 -435 -28 -429
+rect 28 429 51 435
+rect 28 -429 31 429
+rect 48 -429 51 429
+rect 28 -435 51 -429
+rect -23 -454 23 -451
+rect -23 -471 -17 -454
+rect 17 -471 23 -454
+rect -23 -474 23 -471
+<< properties >>
+string FIXED_BBOX -106 -531 106 531
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string library sky130
+string parameters w 8.7 l 0.50 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt sky130_fd_bs_flash__special_sonosfet_star sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt sky130_fd_pr__nfet_03v3_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 100
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_PWYS4E.ext b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_PWYS4E.ext
new file mode 100644
index 0000000..be87ff5
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_PWYS4E.ext
@@ -0,0 +1,14 @@
+timestamp 1644948032
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__nfet_g5v0d10v5 l=l w=w a1=as p1=ps a2=ad p2=pd
+parameters sky130_fd_pr__nfet_20v0 l=l w=w a1=as a2=ad p1=ps p2=pd
+node "a_50_n870#" 4051 840.272 50 -870 mvndif 0 0 0 0 0 0 0 0 0 0 0 0 100920 3596 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 59432 3564 64216 2884 0 0 0 0 0 0 0 0 0 0
+node "a_n108_n870#" 4051 840.272 -108 -870 mvndif 0 0 0 0 0 0 0 0 0 0 0 0 100920 3596 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 59432 3564 64216 2884 0 0 0 0 0 0 0 0 0 0
+node "a_n50_n958#" 1027 517.321 -50 -958 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 191600 4032 0 0 6800 536 8464 552 0 0 0 0 0 0 0 0 0 0
+substrate "w_n278_n1128#" 0 0 -278 -1128 pw 1254336 5624 0 0 0 0 0 0 0 0 0 0 0 0 296032 10208 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 173536 10208 19136 924 0 0 0 0 0 0 0 0 0 0
+cap "a_n108_n870#" "a_50_n870#" 1026.09
+device msubckt sky130_fd_pr__nfet_g5v0d10v5 -50 -870 -49 -869 l=100 w=1740 "w_n278_n1128#" "a_n50_n958#" 200 0 "a_n108_n870#" 1740 0 "a_50_n870#" 1740 0
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_PWYS4E.mag b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_PWYS4E.mag
new file mode 100644
index 0000000..aee9fb4
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_PWYS4E.mag
@@ -0,0 +1,103 @@
+magic
+tech sky130A
+timestamp 1644948032
+<< pwell >>
+rect -139 -564 139 564
+<< mvnmos >>
+rect -25 -435 25 435
+<< mvndiff >>
+rect -54 429 -25 435
+rect -54 -429 -48 429
+rect -31 -429 -25 429
+rect -54 -435 -25 -429
+rect 25 429 54 435
+rect 25 -429 31 429
+rect 48 -429 54 429
+rect 25 -435 54 -429
+<< mvndiffc >>
+rect -48 -429 -31 429
+rect 31 -429 48 429
+<< mvpsubdiff >>
+rect -121 540 121 546
+rect -121 523 -67 540
+rect 67 523 121 540
+rect -121 517 121 523
+rect -121 492 -92 517
+rect -121 -492 -115 492
+rect -98 -492 -92 492
+rect 92 492 121 517
+rect -121 -517 -92 -492
+rect 92 -492 98 492
+rect 115 -492 121 492
+rect 92 -517 121 -492
+rect -121 -523 121 -517
+rect -121 -540 -67 -523
+rect 67 -540 121 -523
+rect -121 -546 121 -540
+<< mvpsubdiffcont >>
+rect -67 523 67 540
+rect -115 -492 -98 492
+rect 98 -492 115 492
+rect -67 -540 67 -523
+<< poly >>
+rect -25 471 25 479
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -25 435 25 454
+rect -25 -454 25 -435
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -25 -479 25 -471
+<< polycont >>
+rect -17 454 17 471
+rect -17 -471 17 -454
+<< locali >>
+rect -115 492 -98 540
+rect 98 492 115 540
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -48 429 -31 437
+rect -48 -437 -31 -429
+rect 31 429 48 437
+rect 31 -437 48 -429
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -115 -523 -98 -492
+rect 98 -523 115 -492
+rect -115 -540 -67 -523
+rect 67 -540 115 -523
+<< viali >>
+rect -98 523 -67 540
+rect -67 523 67 540
+rect 67 523 98 540
+rect -17 454 17 471
+rect -48 -343 -31 343
+rect 31 -343 48 343
+rect -17 -471 17 -454
+<< metal1 >>
+rect -104 540 104 543
+rect -104 523 -98 540
+rect 98 523 104 540
+rect -104 520 104 523
+rect -23 471 23 474
+rect -23 454 -17 471
+rect 17 454 23 471
+rect -23 451 23 454
+rect -51 343 -28 349
+rect -51 -343 -48 343
+rect -31 -343 -28 343
+rect -51 -349 -28 -343
+rect 28 343 51 349
+rect 28 -343 31 343
+rect 48 -343 51 343
+rect 28 -349 51 -343
+rect -23 -454 23 -451
+rect -23 -471 -17 -454
+rect 17 -471 23 -454
+rect -23 -474 23 -471
+<< properties >>
+string FIXED_BBOX -106 -531 106 531
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string library sky130
+string parameters w 8.7 l 0.50 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt sky130_fd_bs_flash__special_sonosfet_star sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt sky130_fd_pr__nfet_03v3_nvt} full_metal 1 viasrc 80 viadrn 80 viagate 100 viagb 0 viagr 0 viagl 0 viagt 100
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_T8RJJE.mag b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_T8RJJE.mag
new file mode 100644
index 0000000..34c180a
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__nfet_g5v0d10v5_T8RJJE.mag
@@ -0,0 +1,98 @@
+magic
+tech sky130A
+timestamp 1644948032
+<< pwell >>
+rect -139 -564 139 564
+<< mvnmos >>
+rect -25 -435 25 435
+<< mvndiff >>
+rect -54 429 -25 435
+rect -54 -429 -48 429
+rect -31 -429 -25 429
+rect -54 -435 -25 -429
+rect 25 429 54 435
+rect 25 -429 31 429
+rect 48 -429 54 429
+rect 25 -435 54 -429
+<< mvndiffc >>
+rect -48 -429 -31 429
+rect 31 -429 48 429
+<< mvpsubdiff >>
+rect -121 540 121 546
+rect -121 523 -67 540
+rect 67 523 121 540
+rect -121 517 121 523
+rect -121 492 -92 517
+rect -121 -492 -115 492
+rect -98 -492 -92 492
+rect 92 492 121 517
+rect -121 -517 -92 -492
+rect 92 -492 98 492
+rect 115 -492 121 492
+rect 92 -517 121 -492
+rect -121 -523 121 -517
+rect -121 -540 -67 -523
+rect 67 -540 121 -523
+rect -121 -546 121 -540
+<< mvpsubdiffcont >>
+rect -67 523 67 540
+rect -115 -492 -98 492
+rect 98 -492 115 492
+rect -67 -540 67 -523
+<< poly >>
+rect -25 471 25 479
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -25 435 25 454
+rect -25 -454 25 -435
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -25 -479 25 -471
+<< polycont >>
+rect -17 454 17 471
+rect -17 -471 17 -454
+<< locali >>
+rect -115 523 -67 540
+rect 67 523 115 540
+rect -115 492 -98 523
+rect 98 492 115 523
+rect -25 454 -17 471
+rect 17 454 25 471
+rect -48 429 -31 437
+rect -48 -437 -31 -429
+rect 31 429 48 437
+rect 31 -437 48 -429
+rect -25 -471 -17 -454
+rect 17 -471 25 -454
+rect -115 -523 -98 -492
+rect 98 -523 115 -492
+rect -115 -540 -67 -523
+rect 67 -540 115 -523
+<< viali >>
+rect -17 454 17 471
+rect -48 -429 -31 429
+rect 31 -429 48 429
+rect -17 -471 17 -454
+<< metal1 >>
+rect -23 471 23 474
+rect -23 454 -17 471
+rect 17 454 23 471
+rect -23 451 23 454
+rect -51 429 -28 435
+rect -51 -429 -48 429
+rect -31 -429 -28 429
+rect -51 -435 -28 -429
+rect 28 429 51 435
+rect 28 -429 31 429
+rect 48 -429 51 429
+rect 28 -435 51 -429
+rect -23 -454 23 -451
+rect -23 -471 -17 -454
+rect 17 -471 23 -454
+rect -23 -474 23 -471
+<< properties >>
+string FIXED_BBOX -106 -531 106 531
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string library sky130
+string parameters w 8.7 l 0.50 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt sky130_fd_bs_flash__special_sonosfet_star sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt sky130_fd_pr__nfet_03v3_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 0
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN.ext b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN.ext
new file mode 100644
index 0000000..3cc2fb5
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN.ext
@@ -0,0 +1,17 @@
+timestamp 1644948032
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__res_xhigh_po l=l w=w
+parameters sky130_fd_pr__res_xhigh_po_5p73 l=l
+parameters sky130_fd_pr__res_xhigh_po_2p85 l=l
+parameters sky130_fd_pr__res_xhigh_po_1p41 l=l
+parameters sky130_fd_pr__res_xhigh_po_0p69 l=l
+parameters sky130_fd_pr__res_xhigh_po_0p35 l=l
+node "a_n35_n932#" 179 1080.98 -35 -932 xpc 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60480 2008 21050 942 0 0 0 0 0 0 0 0 0 0
+node "a_n35_n500#" 28571 0 -35 -500 xres 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70000 2140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "a_n35_500#" 179 1080.98 -35 500 xpc 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60480 2008 21050 942 0 0 0 0 0 0 0 0 0 0
+substrate "w_n201_n1098#" 0 0 -201 -1098 pw 882792 5196 0 0 0 0 0 0 0 0 162248 9544 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 162248 9544 95680 4252 0 0 0 0 0 0 0 0 0 0
+device rsubckt sky130_fd_pr__res_xhigh_po_0p35 -35 -500 -34 -499 l=1000 "w_n201_n1098#" "a_n35_n500#" 0 0 "a_n35_n932#" 70 0 "a_n35_500#" 70 0
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN.mag b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN.mag
new file mode 100644
index 0000000..f24c86b
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_CTQ8XN.mag
@@ -0,0 +1,59 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644948032
+<< pwell >>
+rect -201 -1098 201 1098
+<< psubdiff >>
+rect -165 1028 -69 1062
+rect 69 1028 165 1062
+rect -165 966 -131 1028
+rect 131 966 165 1028
+rect -165 -1028 -131 -966
+rect 131 -1028 165 -966
+rect -165 -1062 -69 -1028
+rect 69 -1062 165 -1028
+<< psubdiffcont >>
+rect -69 1028 69 1062
+rect -165 -966 -131 966
+rect 131 -966 165 966
+rect -69 -1062 69 -1028
+<< xpolycontact >>
+rect -35 500 35 932
+rect -35 -932 35 -500
+<< xpolyres >>
+rect -35 -500 35 500
+<< locali >>
+rect -165 1028 -69 1062
+rect 69 1028 165 1062
+rect -165 966 -131 1028
+rect -165 -1028 -131 -966
+rect -165 -1062 -69 -1028
+rect 69 -1062 165 -1028
+<< viali >>
+rect 131 966 165 1028
+rect -19 517 19 914
+rect -19 -914 19 -517
+rect 131 -966 165 966
+rect 131 -1028 165 -966
+<< metal1 >>
+rect 125 1028 171 1040
+rect -25 914 25 926
+rect -25 517 -19 914
+rect 19 517 25 914
+rect -25 505 25 517
+rect -25 -517 25 -505
+rect -25 -914 -19 -517
+rect 19 -914 25 -517
+rect -25 -926 25 -914
+rect 125 -1028 131 1028
+rect 165 -1028 171 1028
+rect 125 -1040 171 -1028
+<< res0p35 >>
+rect -37 -502 37 502
+<< properties >>
+string FIXED_BBOX -148 -1045 148 1045
+string gencell sky130_fd_pr__res_xhigh_po_0p35
+string library sky130
+string parameters w 0.350 l 5 m 1 nx 1 wmin 0.350 lmin 0.50 rho 2000 val 28.681k dummy 0 dw 0.0 term 19.188 sterm 0.0 caplen 0 wmax 0.350 guard 1 glc 1 grc 1 gtc 1 gbc 1 compatible {sky130_fd_pr__res_xhigh_po_0p35 sky130_fd_pr__res_xhigh_po_0p69 sky130_fd_pr__res_xhigh_po_1p41 sky130_fd_pr__res_xhigh_po_2p85 sky130_fd_pr__res_xhigh_po_5p73} full_metal 1 n_guard 0 hv_guard 0 vias 1 viagb 0 viagt 0 viagl 0 viagr 100
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_NVRUDW.mag b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_NVRUDW.mag
new file mode 100644
index 0000000..e113803
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_NVRUDW.mag
@@ -0,0 +1,58 @@
+magic
+tech sky130B
+timestamp 1644922882
+<< pwell >>
+rect -101 -549 100 549
+<< psubdiff >>
+rect -83 514 -35 531
+rect 34 514 82 531
+rect -83 483 -66 514
+rect 65 483 82 514
+rect -83 -514 -66 -483
+rect 65 -514 82 -483
+rect -83 -531 -35 -514
+rect 34 -531 82 -514
+<< psubdiffcont >>
+rect -35 514 34 531
+rect -83 -483 -66 483
+rect 65 -483 82 483
+rect -35 -531 34 -514
+<< xpolycontact >>
+rect -18 250 17 466
+rect -18 -466 17 -250
+<< xpolyres >>
+rect -18 -250 17 250
+<< locali >>
+rect -83 514 -35 531
+rect 34 514 82 531
+rect -83 483 -66 514
+rect -83 -514 -66 -483
+rect -83 -531 -35 -514
+rect 34 -531 82 -514
+<< viali >>
+rect 65 483 82 514
+rect -10 258 9 457
+rect -10 -457 9 -259
+rect 65 -483 82 483
+rect 65 -514 82 -483
+<< metal1 >>
+rect 62 514 85 520
+rect -13 457 12 463
+rect -13 258 -10 457
+rect 9 258 12 457
+rect -13 252 12 258
+rect -13 -259 12 -253
+rect -13 -457 -10 -259
+rect 9 -457 12 -259
+rect -13 -463 12 -457
+rect 62 -514 65 514
+rect 82 -514 85 514
+rect 62 -520 85 -514
+<< res0p35 >>
+rect -19 -251 18 251
+<< properties >>
+string FIXED_BBOX -37 -262 37 261
+string gencell sky130_fd_pr__res_xhigh_po_0p35
+string library sky130
+string parameters w 0.350 l 5.0 m 1 nx 1 wmin 0.350 lmin 0.50 rho 2000 val 28.681k dummy 0 dw 0.0 term 19.188 sterm 0.0 caplen 0 wmax 0.350 guard 1 glc 1 grc 1 gtc 1 gbc 1 compatible {sky130_fd_pr__res_xhigh_po_0p35 sky130_fd_pr__res_xhigh_po_0p69 sky130_fd_pr__res_xhigh_po_1p41 sky130_fd_pr__res_xhigh_po_2p85 sky130_fd_pr__res_xhigh_po_5p73} full_metal 1 n_guard 0 hv_guard 0 vias 1 viagb 0 viagt 0 viagl 0 viagr 100
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_QUNMCZ.mag b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_QUNMCZ.mag
new file mode 100644
index 0000000..ddfcdc2
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_QUNMCZ.mag
@@ -0,0 +1,54 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644948032
+<< pwell >>
+rect -201 -1098 201 1098
+<< psubdiff >>
+rect -165 1028 -69 1062
+rect 69 1028 165 1062
+rect -165 966 -131 1028
+rect 131 966 165 1028
+rect -165 -1028 -131 -966
+rect 131 -1028 165 -966
+rect -165 -1062 -69 -1028
+rect 69 -1062 165 -1028
+<< psubdiffcont >>
+rect -69 1028 69 1062
+rect -165 -966 -131 966
+rect 131 -966 165 966
+rect -69 -1062 69 -1028
+<< xpolycontact >>
+rect -35 500 35 932
+rect -35 -932 35 -500
+<< xpolyres >>
+rect -35 -500 35 500
+<< locali >>
+rect -165 1028 -69 1062
+rect 69 1028 165 1062
+rect -165 966 -131 1028
+rect 131 966 165 1028
+rect -165 -1028 -131 -966
+rect 131 -1028 165 -966
+rect -165 -1062 -69 -1028
+rect 69 -1062 165 -1028
+<< viali >>
+rect -19 517 19 914
+rect -19 -914 19 -517
+<< metal1 >>
+rect -25 914 25 926
+rect -25 517 -19 914
+rect 19 517 25 914
+rect -25 505 25 517
+rect -25 -517 25 -505
+rect -25 -914 -19 -517
+rect 19 -914 25 -517
+rect -25 -926 25 -914
+<< res0p35 >>
+rect -37 -502 37 502
+<< properties >>
+string FIXED_BBOX -148 -1045 148 1045
+string gencell sky130_fd_pr__res_xhigh_po_0p35
+string library sky130
+string parameters w 0.350 l 5 m 1 nx 1 wmin 0.350 lmin 0.50 rho 2000 val 28.681k dummy 0 dw 0.0 term 19.188 sterm 0.0 caplen 0 wmax 0.350 guard 1 glc 1 grc 1 gtc 1 gbc 1 compatible {sky130_fd_pr__res_xhigh_po_0p35 sky130_fd_pr__res_xhigh_po_0p69 sky130_fd_pr__res_xhigh_po_1p41 sky130_fd_pr__res_xhigh_po_2p85 sky130_fd_pr__res_xhigh_po_5p73} full_metal 1 n_guard 0 hv_guard 0 vias 1 viagb 0 viagt 0 viagl 0 viagr 0
+<< end >>
diff --git a/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_XCHKMA.mag b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_XCHKMA.mag
new file mode 100644
index 0000000..11151b9
--- /dev/null
+++ b/mag/ask_modulator/mag/sky130_fd_pr__res_xhigh_po_0p35_XCHKMA.mag
@@ -0,0 +1,54 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1644594152
+<< pwell >>
+rect -201 -1098 201 1098
+<< psubdiff >>
+rect -165 1028 -69 1062
+rect 69 1028 165 1062
+rect -165 966 -131 1028
+rect 131 966 165 1028
+rect -165 -1028 -131 -966
+rect 131 -1028 165 -966
+rect -165 -1062 -69 -1028
+rect 69 -1062 165 -1028
+<< psubdiffcont >>
+rect -69 1028 69 1062
+rect -165 -966 -131 966
+rect 131 -966 165 966
+rect -69 -1062 69 -1028
+<< xpolycontact >>
+rect -35 500 35 932
+rect -35 -932 35 -500
+<< xpolyres >>
+rect -35 -500 35 500
+<< locali >>
+rect -165 1028 -69 1062
+rect 69 1028 165 1062
+rect -165 966 -131 1028
+rect 131 966 165 1028
+rect -165 -1028 -131 -966
+rect 131 -1028 165 -966
+rect -165 -1062 -69 -1028
+rect 69 -1062 165 -1028
+<< viali >>
+rect -19 517 19 914
+rect -19 -914 19 -517
+<< metal1 >>
+rect -25 914 25 926
+rect -25 517 -19 914
+rect 19 517 25 914
+rect -25 505 25 517
+rect -25 -517 25 -505
+rect -25 -914 -19 -517
+rect 19 -914 25 -517
+rect -25 -926 25 -914
+<< res0p35 >>
+rect -37 -502 37 502
+<< properties >>
+string gencell sky130_fd_pr__res_xhigh_po_0p35
+string FIXED_BBOX -148 -1045 148 1045
+string parameters w 0.350 l 5.0 m 1 nx 1 wmin 0.350 lmin 0.50 rho 2000 val 28.681k dummy 0 dw 0.0 term 19.188 sterm 0.0 caplen 0 wmax 0.350 guard 1 glc 1 grc 1 gtc 1 gbc 1 compatible {sky130_fd_pr__res_xhigh_po_0p35 sky130_fd_pr__res_xhigh_po_0p69 sky130_fd_pr__res_xhigh_po_1p41 sky130_fd_pr__res_xhigh_po_2p85 sky130_fd_pr__res_xhigh_po_5p73} full_metal 1 n_guard 0 hv_guard 0 vias 1 viagb 0 viagt 0 viagl 0 viagr 0
+string library sky130
+<< end >>
diff --git a/mag/impedance-transformer/mag/.magicrc b/mag/impedance-transformer/mag/.magicrc
new file mode 120000
index 0000000..fc1fe64
--- /dev/null
+++ b/mag/impedance-transformer/mag/.magicrc
@@ -0,0 +1 @@
+/home/hugodg/sky130_workspace/skywater-pdk/sky130A/libs.tech/magic/sky130A.magicrc
\ No newline at end of file
diff --git a/mag/impedance-transformer/mag/impedance-transformer.ext b/mag/impedance-transformer/mag/impedance-transformer.ext
new file mode 100644
index 0000000..7a4a33d
--- /dev/null
+++ b/mag/impedance-transformer/mag/impedance-transformer.ext
@@ -0,0 +1,68 @@
+timestamp 1646429066
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use sky130_fd_pr__cap_mim_m3_2_8BWDGQ sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3 1 0 428586 0 1 544626
+use sky130_fd_pr__cap_mim_m3_2_8BWDGQ sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2 1 0 422786 0 1 544626
+use sky130_fd_pr__cap_mim_m3_2_8BWDGQ sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1 1 0 416786 0 1 544626
+use sky130_fd_pr__cap_mim_m3_2_8BWDGQ sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0 1 0 411186 0 1 544626
+use sky130_fd_pr__cap_mim_m3_2_4GE4YE sky130_fd_pr__cap_mim_m3_2_4GE4YE_2 1 0 428272 0 1 566721
+use sky130_fd_pr__cap_mim_m3_2_4GE4YE sky130_fd_pr__cap_mim_m3_2_4GE4YE_1 1 0 422472 0 1 566721
+use sky130_fd_pr__cap_mim_m3_2_4GE4YE sky130_fd_pr__cap_mim_m3_2_4GE4YE_0 1 0 416672 0 1 566721
+port "out" 4 404800 529000 407200 531600 m1
+port "in" 5 404800 575000 406600 576800 m1
+port "gnd" 2 404800 556000 406600 557800 m1
+node "out" 1 75344.3 404800 529000 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20280000 20800 7800000 11200 7800000 11200 10422800 17680 145018616 161562 0 0
+node "in" 2 54246 404800 575000 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23054000 29220 12240000 17200 12240000 17200 12240000 17200 68738125 82400 0 0
+substrate "gnd" 0 0 404800 556000 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4896000 8896 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4864000 8864 27840000 28000 13440000 16000 13440000 16000 130440000 100400 0 0 0 0
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/c2_n2486_n10078#" -29.564
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/c2_n2486_n10078#" -195.31
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/m4_n2586_n10178#" 55.02
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/c2_n2486_n10078#" -337.939
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/m4_n2586_n10178#" -191.87
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/c2_n2486_n10078#" 51.58
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/m4_n2586_n10178#" -254.939
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/m4_n2586_n10178#" -188.43
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/m4_n2586_n10178#" -94.235
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/c2_n2486_n10078#" 51.58
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/c2_n2486_n10078#" -177.842
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/m4_n2586_n10178#" -38.4924
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/c2_n2486_n10078#" -94.235
+cap "gnd" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/c2_n2486_n10078#" 126.3
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/c2_n2486_n10078#" "gnd" 126.3
+cap "gnd" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/c2_n2486_n10078#" 126.3
+cap "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/c2_n2486_n10078#" "gnd" 87.795
+cap "gnd" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/c2_n2486_n10078#" -160.725
+cap "gnd" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/c2_n2372_n7179#" 126.3
+cap "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/c2_n2372_n7179#" "gnd" 126.3
+cap "gnd" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/c2_n2372_n7179#" 126.3
+cap "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/c2_n2372_n7179#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/m4_n2472_n7279#" 48.57
+cap "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/m4_n2472_n7279#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/c2_n2372_n7179#" -275.689
+cap "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/m4_n2472_n7279#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/c2_n2372_n7179#" -208.64
+cap "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/c2_n2372_n7179#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/m4_n2472_n7279#" -133.314
+cap "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/c2_n2372_n7179#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/m4_n2472_n7279#" -208.21
+cap "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/m4_n2472_n7279#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/c2_n2372_n7179#" -133.314
+cap "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/c2_n2372_n7179#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/m4_n2472_n7279#" -208.21
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/m4_n2472_n7279#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/VSUBS" -69678.3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1558 -4560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1542 -4544 -3623910 -12713 0 0 0 0 -137046437 -183170 -871055 -26578 0 0
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/VSUBS" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/VSUBS"
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/VSUBS" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/m4_n2472_n7279#"
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/m4_n2472_n7279#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/m4_n2472_n7279#"
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/m4_n2472_n7279#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/VSUBS"
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/VSUBS" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/m4_n2586_n10178#"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/m4_n2586_n10178#"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/m4_n2586_n10178#"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/m4_n2586_n10178#"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/m4_n2586_n10178#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/VSUBS"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/VSUBS" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/VSUBS"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/VSUBS" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/VSUBS"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/VSUBS" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/VSUBS"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/VSUBS" "gnd"
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/c2_n2372_n7179#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/c2_n2372_n7179#" -8408.86 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -3240000 -7200 0 0 0 0 0 0 -6233700 -19958 0 0
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/c2_n2372_n7179#" "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/c2_n2372_n7179#"
+merge "sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/c2_n2372_n7179#" "in"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/c2_n2486_n10078#" -13899.9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -22726200 -53866 0 0
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/c2_n2486_n10078#"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/c2_n2486_n10078#" "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/c2_n2486_n10078#"
+merge "sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/c2_n2486_n10078#" "out"
diff --git a/mag/impedance-transformer/mag/impedance-transformer.mag b/mag/impedance-transformer/mag/impedance-transformer.mag
new file mode 100644
index 0000000..d557a38
--- /dev/null
+++ b/mag/impedance-transformer/mag/impedance-transformer.mag
@@ -0,0 +1,172 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646431142
+<< mvpsubdiff >>
+rect 406200 555400 408200 555424
+rect 406200 552976 408200 553000
+<< mvpsubdiffcont >>
+rect 406200 553000 408200 555400
+<< locali >>
+rect 406200 555400 408200 555416
+rect 406200 552984 408200 553000
+<< viali >>
+rect 406200 553000 408200 555400
+<< metal1 >>
+rect 404800 576600 417600 576800
+rect 404800 575200 411200 576600
+rect 417600 575200 417610 576600
+rect 404800 575000 417600 575200
+rect 404800 557800 413600 558000
+rect 404800 555800 410400 557800
+rect 413400 555800 413600 557800
+rect 404800 555600 413600 555800
+rect 406000 555400 408400 555600
+rect 406000 553000 406200 555400
+rect 408200 553000 408400 555400
+rect 406000 552800 408400 553000
+rect 404800 531400 412600 531600
+rect 404800 529200 409800 531400
+rect 412400 529200 412600 531400
+rect 404800 529000 412600 529200
+<< via1 >>
+rect 411200 575200 417600 576600
+rect 410400 555800 413400 557800
+rect 409800 529200 412400 531400
+<< metal2 >>
+rect 411000 576600 417800 576800
+rect 411000 575200 411200 576600
+rect 417600 575200 417800 576600
+rect 411000 575000 417800 575200
+rect 408000 557800 413600 558000
+rect 408000 555800 410400 557800
+rect 413400 555800 413600 557800
+rect 408000 555600 413600 555800
+rect 409600 531400 412600 531600
+rect 409600 529200 409800 531400
+rect 412400 529200 412600 531400
+rect 409600 529000 412600 529200
+<< via2 >>
+rect 411200 575200 417600 576600
+rect 410400 555800 413400 557800
+rect 409800 529200 412400 531400
+<< metal3 >>
+rect 411000 576600 417800 576800
+rect 411000 575200 411200 576600
+rect 417600 575200 417800 576600
+rect 411000 575000 417800 575200
+rect 408000 557800 413600 558000
+rect 408000 555800 410400 557800
+rect 413400 555800 413600 557800
+rect 408000 555600 413600 555800
+rect 409600 531400 412600 531600
+rect 409600 529200 409800 531400
+rect 412400 529200 412600 531400
+rect 409600 529000 412600 529200
+<< via3 >>
+rect 411200 575200 417600 576600
+rect 410400 555800 413400 557800
+rect 409800 529200 412400 531400
+<< metal4 >>
+rect 411000 576600 417800 576800
+rect 411000 575200 411200 576600
+rect 417600 575200 417800 576600
+rect 411000 575000 417800 575200
+rect 415600 558000 418600 562200
+rect 421200 558000 424200 562200
+rect 426600 558000 429600 562200
+rect 408000 557800 429600 558000
+rect 408000 555800 410400 557800
+rect 413400 555800 429600 557800
+rect 448160 558780 449820 558800
+rect 448160 557240 448180 558780
+rect 449800 557240 449820 558780
+rect 448160 557220 449820 557240
+rect 408000 555600 429600 555800
+rect 410200 552600 413200 555600
+rect 415600 552000 418600 555600
+rect 421200 551800 424200 555600
+rect 426600 552400 429600 555600
+rect 409600 531400 412600 531600
+rect 409600 529200 409800 531400
+rect 412400 529200 412600 531400
+rect 409600 529000 412600 529200
+<< via4 >>
+rect 411200 575200 417600 576600
+rect 448180 557240 449800 558780
+rect 409800 529200 412400 531400
+<< metal5 >>
+rect 411000 576600 433250 576800
+rect 411000 575200 411200 576600
+rect 417600 575200 433250 576600
+rect 411000 575000 433250 575200
+rect 415975 574975 433250 575000
+rect 415975 573175 417625 574975
+rect 421600 573200 423250 574975
+rect 427200 573200 428850 574975
+rect 431600 571500 433250 574975
+rect 431600 571180 433220 571200
+rect 433240 571180 433250 571190
+rect 431600 563200 433250 571180
+rect 448168 558804 449820 558820
+rect 448156 558780 449824 558804
+rect 448156 557240 448180 558780
+rect 449800 557240 449824 558780
+rect 448156 557216 449824 557240
+rect 410400 533425 412800 536000
+rect 415600 533425 418600 536000
+rect 421400 533425 424400 536000
+rect 427000 533425 430000 536400
+rect 448168 533800 449818 557216
+rect 448168 533425 449800 533800
+rect 410400 531800 449800 533425
+rect 410400 531600 412600 531800
+rect 436400 531775 447400 531800
+rect 409600 531400 412600 531600
+rect 409600 529200 409800 531400
+rect 412400 529200 412600 531400
+rect 409600 529000 412600 529200
+<< rm5 >>
+rect 431600 571200 433250 571500
+rect 433220 571190 433250 571200
+rect 433220 571180 433240 571190
+use l0#0 l0_0
+timestamp 1646185352
+transform 1 0 388400 0 1 505600
+box 43200 43200 60788 59200
+use sky130_fd_pr__cap_mim_m3_2_4GE4YE sky130_fd_pr__cap_mim_m3_2_4GE4YE_0
+timestamp 1646428335
+transform 1 0 416672 0 1 566721
+box -2472 -7329 2494 7329
+use sky130_fd_pr__cap_mim_m3_2_4GE4YE sky130_fd_pr__cap_mim_m3_2_4GE4YE_1
+timestamp 1646428335
+transform 1 0 422472 0 1 566721
+box -2472 -7329 2494 7329
+use sky130_fd_pr__cap_mim_m3_2_4GE4YE sky130_fd_pr__cap_mim_m3_2_4GE4YE_2
+timestamp 1646428335
+transform 1 0 428272 0 1 566721
+box -2472 -7329 2494 7329
+use sky130_fd_pr__cap_mim_m3_2_8BWDGQ sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0
+timestamp 1646428335
+transform 1 0 411186 0 1 544626
+box -2586 -10228 2608 10228
+use sky130_fd_pr__cap_mim_m3_2_8BWDGQ sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1
+timestamp 1646428335
+transform 1 0 416786 0 1 544626
+box -2586 -10228 2608 10228
+use sky130_fd_pr__cap_mim_m3_2_8BWDGQ sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2
+timestamp 1646428335
+transform 1 0 422786 0 1 544626
+box -2586 -10228 2608 10228
+use sky130_fd_pr__cap_mim_m3_2_8BWDGQ sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3
+timestamp 1646428335
+transform 1 0 428586 0 1 544626
+box -2586 -10228 2608 10228
+<< labels >>
+flabel metal1 404800 529000 407200 531600 0 FreeSans 1600 0 0 0 out
+port 4 nsew
+flabel metal1 404800 575000 406600 576800 0 FreeSans 1600 0 0 0 in
+port 5 nsew
+flabel metal1 404800 556000 406600 557800 0 FreeSans 1600 0 0 0 gnd
+port 2 nsew
+<< end >>
diff --git a/mag/impedance-transformer/mag/impedance-transformer.nodes b/mag/impedance-transformer/mag/impedance-transformer.nodes
new file mode 100644
index 0000000..18fab18
--- /dev/null
+++ b/mag/impedance-transformer/mag/impedance-transformer.nodes
@@ -0,0 +1,3 @@
+in 404800 575000 m1
+out 404800 529000 m1
+gnd 404800 556000 m1
diff --git a/mag/impedance-transformer/mag/impedance-transformer.res.ext b/mag/impedance-transformer/mag/impedance-transformer.res.ext
new file mode 100644
index 0000000..35c86b7
--- /dev/null
+++ b/mag/impedance-transformer/mag/impedance-transformer.res.ext
@@ -0,0 +1,89 @@
+scale 1000 1 500000
+rnode "out.t7" 0 33556.9 416707 552297 0
+rnode "out.t6" 0 33642.7 416707 547183 0
+rnode "out.t4" 0 33642.7 416707 542069 0
+rnode "out.t5" 0 29893.2 416707 536955 0
+rnode "out.t11" 0 33556.9 422707 552297 0
+rnode "out.t10" 0 33642.7 422707 547183 0
+rnode "out.t8" 0 33642.7 422707 542069 0
+rnode "out.t9" 0 29893.2 422707 536955 0
+rnode "out.t15" 0 33556.9 428507 552297 0
+rnode "out.t14" 0 33642.7 428507 547183 0
+rnode "out.t12" 0 33642.7 428507 542069 0
+rnode "out.t13" 0 89970.9 428507 536955 0
+rnode "out.n0" 0 28183.6 422900 534564 0
+rnode "out.n1" 0 13262.3 417100 534564 0
+rnode "out.t3" 0 33556.9 411107 552297 0
+rnode "out.t2" 0 33642.7 411107 547183 0
+rnode "out.t0" 0 33642.7 411107 542069 0
+rnode "out.t1" 0 33034.6 411107 536955 0
+rnode "out.n2" 0 41482.9 412800 532612 0
+rnode "out" 0 9070.19 404800 529000 0
+resist "out.n1" "out.t5" 0.018
+resist "out.n0" "out.t9" 0.018
+resist "out.n2" "out.t1" 0.041
+resist "out.n2" "out.n1" 0.064
+resist "out.t1" "out.t0" 0.066
+resist "out.t0" "out.t2" 0.066
+resist "out.t2" "out.t3" 0.066
+resist "out.t5" "out.t4" 0.066
+resist "out.t4" "out.t6" 0.066
+resist "out.t6" "out.t7" 0.066
+resist "out.t9" "out.t8" 0.066
+resist "out.t8" "out.t10" 0.066
+resist "out.t10" "out.t11" 0.066
+resist "out.t13" "out.t12" 0.066
+resist "out.t12" "out.t14" 0.066
+resist "out.t14" "out.t15" 0.066
+resist "out.n1" "out.n0" 0.079
+resist "out.n0" "out.t13" 0.094
+resist "out" "out.n2" 0.325
+rnode "gnd" 0 0 404800 556000 0
+rnode "in.t7" 0 32159.7 416593 561835 0
+rnode "in.t8" 0 32250.4 416593 566721 0
+rnode "in.t6" 0 30872.5 416593 571607 0
+rnode "in.t1" 0 32159.7 422393 561835 0
+rnode "in.t2" 0 32250.4 422393 566721 0
+rnode "in.t0" 0 30872.5 422393 571607 0
+rnode "in.t4" 0 32159.7 428193 561835 0
+rnode "in.t5" 0 32250.4 428193 566721 0
+rnode "in.t3" 0 30017.4 428193 571607 0
+rnode "in.n0" 0 11256.3 422425 574975 0
+rnode "in.n1" 0 57086.4 416800 574975 0
+rnode "in" 0 10114.7 404800 575000 0
+resist "in.n0" "in.t0" 0.037
+resist "in.n1" "in.t6" 0.037
+resist "in.t3" "in.t5" 0.066
+resist "in.t5" "in.t4" 0.066
+resist "in.t0" "in.t2" 0.066
+resist "in.t2" "in.t1" 0.066
+resist "in.t6" "in.t8" 0.066
+resist "in.t8" "in.t7" 0.066
+resist "in.n1" "in.n0" 0.089
+resist "in.n0" "in.t3" 0.125
+resist "in" "in.n1" 0.704
+device csubckt sky130_fd_pr__cap_mim_m3_2 414300 564428 414301 564429 "None" "in.t8" 36368 0 "gnd" -13187 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 414300 559542 414301 559543 "None" "in.t7" 36368 0 "gnd" -13187 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 414300 569314 414301 569315 "None" "in.t6" 36368 0 "gnd" -13187 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 426100 549890 426101 549891 "None" "out.t15" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 426100 544776 426101 544777 "None" "out.t14" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 426100 534548 426101 534549 "None" "out.t13" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 426100 539662 426101 539663 "None" "out.t12" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 420300 549890 420301 549891 "None" "out.t11" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 420300 544776 420301 544777 "None" "out.t10" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 420300 534548 420301 534549 "None" "out.t9" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 420300 539662 420301 539663 "None" "out.t8" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 414300 549890 414301 549891 "None" "out.t7" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 414300 544776 414301 544777 "None" "out.t6" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 414300 534548 414301 534549 "None" "out.t5" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 414300 539662 414301 539663 "None" "out.t4" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 408700 549890 408701 549891 "None" "out.t3" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 408700 544776 408701 544777 "None" "out.t2" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 408700 534548 408701 534549 "None" "out.t1" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 408700 539662 408701 539663 "None" "out.t0" 38192 0 "gnd" -13849 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 425900 564428 425901 564429 "None" "in.t5" 36368 0 "gnd" -13187 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 425900 559542 425901 559543 "None" "in.t4" 36368 0 "gnd" -13187 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 425900 569314 425901 569315 "None" "in.t3" 36368 0 "gnd" -13187 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 420100 564428 420101 564429 "None" "in.t2" 36368 0 "gnd" -13187 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 420100 559542 420101 559543 "None" "in.t1" 36368 0 "gnd" -13187 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 420100 569314 420101 569315 "None" "in.t0" 36368 0 "gnd" -13187 0
diff --git a/mag/impedance-transformer/mag/impedance-transformer.sim b/mag/impedance-transformer/mag/impedance-transformer.sim
new file mode 100644
index 0000000..1b427ee
--- /dev/null
+++ b/mag/impedance-transformer/mag/impedance-transformer.sim
@@ -0,0 +1,50 @@
+| units: 500000 tech: sky130A format: MIT
+x in gnd l=4586 w=4586 x=420101 y=569314 sky130_fd_pr__cap_mim_m3_2
+x in gnd l=4586 w=4586 x=420101 y=559543 sky130_fd_pr__cap_mim_m3_2
+x in gnd l=4586 w=4586 x=420101 y=564429 sky130_fd_pr__cap_mim_m3_2
+x in gnd l=4586 w=4586 x=425901 y=569314 sky130_fd_pr__cap_mim_m3_2
+x in gnd l=4586 w=4586 x=425901 y=559543 sky130_fd_pr__cap_mim_m3_2
+x in gnd l=4586 w=4586 x=425901 y=564429 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=408701 y=539663 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=408701 y=534549 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=408701 y=544776 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=408701 y=549890 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=414301 y=539663 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=414301 y=534549 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=414301 y=544776 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=414301 y=549890 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=420301 y=539663 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=420301 y=534549 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=420301 y=544776 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=420301 y=549890 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=426101 y=539663 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=426101 y=534549 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=426101 y=544776 sky130_fd_pr__cap_mim_m3_2
+x out gnd l=4814 w=4814 x=426101 y=549890 sky130_fd_pr__cap_mim_m3_2
+x in gnd l=4586 w=4586 x=414301 y=569314 sky130_fd_pr__cap_mim_m3_2
+x in gnd l=4586 w=4586 x=414301 y=559543 sky130_fd_pr__cap_mim_m3_2
+x in gnd l=4586 w=4586 x=414301 y=564429 sky130_fd_pr__cap_mim_m3_2
+C in GND 363.45
+= in sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/c2_n2372_n7179#
+= in sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/c2_n2372_n7179#
+= in sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/c2_n2372_n7179#
+C out GND 678.16
+= out sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/c2_n2486_n10078#
+= out sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/c2_n2486_n10078#
+= out sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/c2_n2486_n10078#
+= out sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/c2_n2486_n10078#
+R gnd 217
+= gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/m4_n2472_n7279#
+= gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE_2/VSUBS
+= gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/VSUBS
+= gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE_1/m4_n2472_n7279#
+= gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/m4_n2472_n7279#
+= gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE_0/VSUBS
+= gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/m4_n2586_n10178#
+= gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/m4_n2586_n10178#
+= gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/m4_n2586_n10178#
+= gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/m4_n2586_n10178#
+= gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ_3/VSUBS
+= gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ_2/VSUBS
+= gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ_1/VSUBS
+= gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ_0/VSUBS
diff --git a/mag/impedance-transformer/mag/impedance-transformer.spice b/mag/impedance-transformer/mag/impedance-transformer.spice
new file mode 100644
index 0000000..e844996
--- /dev/null
+++ b/mag/impedance-transformer/mag/impedance-transformer.spice
@@ -0,0 +1,118 @@
+* NGSPICE file created from impedance-transformer.ext - technology: sky130A
+
+.subckt sky130_fd_pr__cap_mim_m3_2_4GE4YE c2_n2372_n7179# m4_n2472_n7279# VSUBS
+X0 c2_n2372_n7179# m4_n2472_n7279# sky130_fd_pr__cap_mim_m3_2 l=2.293e+07u w=2.293e+07u
+X1 c2_n2372_n7179# m4_n2472_n7279# sky130_fd_pr__cap_mim_m3_2 l=2.293e+07u w=2.293e+07u
+X2 c2_n2372_n7179# m4_n2472_n7279# sky130_fd_pr__cap_mim_m3_2 l=2.293e+07u w=2.293e+07u
+C0 m4_n2472_n7279# c2_n2372_n7179# 105.86fF
+C1 c2_n2372_n7179# VSUBS 0.26fF
+C2 m4_n2472_n7279# VSUBS 28.10fF
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_2_8BWDGQ c2_n2486_n10078# m4_n2586_n10178# VSUBS
+X0 c2_n2486_n10078# m4_n2586_n10178# sky130_fd_pr__cap_mim_m3_2 l=2.407e+07u w=2.407e+07u
+X1 c2_n2486_n10078# m4_n2586_n10178# sky130_fd_pr__cap_mim_m3_2 l=2.407e+07u w=2.407e+07u
+X2 c2_n2486_n10078# m4_n2586_n10178# sky130_fd_pr__cap_mim_m3_2 l=2.407e+07u w=2.407e+07u
+X3 c2_n2486_n10078# m4_n2586_n10178# sky130_fd_pr__cap_mim_m3_2 l=2.407e+07u w=2.407e+07u
+C0 m4_n2586_n10178# c2_n2486_n10078# 154.16fF
+C1 c2_n2486_n10078# VSUBS 0.30fF
+C2 m4_n2586_n10178# VSUBS 40.10fF
+.ends
+
+.subckt impedance-transformer gnd out in
+Xsky130_fd_pr__cap_mim_m3_2_4GE4YE_1 in gnd gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE
+Xsky130_fd_pr__cap_mim_m3_2_4GE4YE_2 in gnd gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE
+Xsky130_fd_pr__cap_mim_m3_2_8BWDGQ_0 out gnd gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ
+Xsky130_fd_pr__cap_mim_m3_2_8BWDGQ_1 out gnd gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ
+Xsky130_fd_pr__cap_mim_m3_2_8BWDGQ_2 out gnd gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ
+Xsky130_fd_pr__cap_mim_m3_2_8BWDGQ_3 out gnd gnd sky130_fd_pr__cap_mim_m3_2_8BWDGQ
+Xsky130_fd_pr__cap_mim_m3_2_4GE4YE_0 in gnd gnd sky130_fd_pr__cap_mim_m3_2_4GE4YE
+X0 in.t4 gnd sky130_fd_pr__cap_mim_m3_2 l=0u w=0u
+X1 in.t8 gnd sky130_fd_pr__cap_mim_m3_2 l=0u w=0u
+X2 in.t3 gnd sky130_fd_pr__cap_mim_m3_2 l=0u w=0u
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diff --git "a/mag/impedance-transformer/mag/l0\0430.mag" "b/mag/impedance-transformer/mag/l0\0430.mag"
new file mode 100644
index 0000000..b263f2f
--- /dev/null
+++ "b/mag/impedance-transformer/mag/l0\0430.mag"
@@ -0,0 +1,28 @@
+magic
+tech sky130A
+timestamp 1646185352
+<< metal4 >>
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+rect 25805 25823 25823 26581
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+rect 25805 25805 30394 25823
+<< via4 >>
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+<< metal5 >>
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+rect 21600 21600 29600 22394
+<< end >>
diff --git a/mag/impedance-transformer/mag/l0.cif b/mag/impedance-transformer/mag/l0.cif
new file mode 100644
index 0000000..ebb2f40
--- /dev/null
+++ b/mag/impedance-transformer/mag/l0.cif
@@ -0,0 +1,53 @@
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diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_3WCKXR.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_3WCKXR.mag
new file mode 100644
index 0000000..ca08b1b
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_3WCKXR.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646019513
+<< metal4 >>
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+<< mimcap2contact >>
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+<< metal5 >>
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+rect -239 -7746 81 -7580
+rect 2313 -7655 2355 -2673
+rect 2591 -7655 2633 -2673
+rect 2313 -7746 2633 -7655
+<< properties >>
+string FIXED_BBOX -2611 2632 2453 7696
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.315 l 24.315 val 1.2k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_3YFQRG.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_3YFQRG.mag
new file mode 100644
index 0000000..55837f9
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_3YFQRG.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645800166
+<< metal4 >>
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+<< via4 >>
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+rect 2419 91 2655 5201
+rect 2419 -5201 2655 -91
+rect 2419 -10493 2655 -5383
+<< mimcap2 >>
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+<< mimcap2contact >>
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+rect -2044 -10394 1886 -5482
+<< metal5 >>
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+rect -239 -5458 81 -5126
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+rect -239 -10584 81 -10418
+rect 2377 -10493 2419 -5383
+rect 2655 -10493 2697 -5383
+rect 2377 -10584 2697 -10493
+<< properties >>
+string FIXED_BBOX -2675 5342 2517 10534
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.962 l 24.962 val 1.265k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4AKDAU.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4AKDAU.mag
new file mode 100644
index 0000000..d6b1b00
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4AKDAU.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646014094
+<< metal4 >>
+rect -2681 7865 2681 7906
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+rect 2661 2743 2681 7865
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+<< via4 >>
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+<< mimcap2 >>
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+<< mimcap2contact >>
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+rect -2049 -7766 1891 -2842
+<< metal5 >>
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+rect 2661 -7865 2703 -2743
+rect 2383 -7956 2703 -7865
+<< properties >>
+string FIXED_BBOX -2681 2702 2523 7906
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 25.019 l 25.019 val 1.27k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4GE4YE.ext b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4GE4YE.ext
new file mode 100644
index 0000000..734a2e5
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4GE4YE.ext
@@ -0,0 +1,14 @@
+timestamp 1646428335
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__cap_mim_m3_2 w=w l=l
+node "c2_n2372_n7179#" 0 256.2 -2372 -7179 mim2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50212344 49948 0 0
+node "m4_n2472_n7279#" 1 28100.9 -2472 -7279 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 70985952 58380 4690560 29956 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "m4_n2472_n7279#" "c2_n2372_n7179#" 105863
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2372 -7179 -2371 -7178 w=4586 l=4586 "None" "c2_n2372_n7179#" 16220 0 "m4_n2472_n7279#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2372 -2293 -2371 -2292 w=4586 l=4586 "None" "c2_n2372_n7179#" 16220 0 "m4_n2472_n7279#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2372 2593 -2371 2594 w=4586 l=4586 "None" "c2_n2372_n7179#" 16220 0 "m4_n2472_n7279#" 0 0
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4GE4YE.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4GE4YE.mag
new file mode 100644
index 0000000..61ac502
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_4GE4YE.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646428335
+<< metal4 >>
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+<< mimcap2contact >>
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+rect 2174 -7329 2494 -7238
+<< properties >>
+string FIXED_BBOX -2472 2493 2314 7279
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 22.93 l 22.93 val 1.068k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_5WEFAE.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_5WEFAE.mag
new file mode 100644
index 0000000..e2afe23
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_5WEFAE.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645799446
+<< metal4 >>
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+<< mimcap2 >>
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+rect 2602 -10281 2644 -5277
+rect 2324 -10372 2644 -10281
+<< properties >>
+string FIXED_BBOX -2622 5236 2464 10322
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.43 l 24.43 val 1.212k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BMXEH.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BMXEH.mag
new file mode 100644
index 0000000..ccc85c4
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BMXEH.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646064585
+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2757 5506 2599 10862
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 25.781 l 25.781 val 1.348k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BWDGQ.ext b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BWDGQ.ext
new file mode 100644
index 0000000..245c6ca
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BWDGQ.ext
@@ -0,0 +1,15 @@
+timestamp 1646428335
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__cap_mim_m3_2 w=w l=l
+node "c2_n2486_n10078#" 0 300 -2486 -10078 mim2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 73799968 69680 0 0
+node "m4_n2586_n10178#" 2 40098.3 -2586 -10178 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 103729632 81488 6545920 41552 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "m4_n2586_n10178#" "c2_n2486_n10078#" 154164
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2486 -10078 -2485 -10077 w=4814 l=4814 "None" "c2_n2486_n10078#" 17044 0 "m4_n2586_n10178#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2486 -4964 -2485 -4963 w=4814 l=4814 "None" "c2_n2486_n10078#" 17044 0 "m4_n2586_n10178#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2486 150 -2485 151 w=4814 l=4814 "None" "c2_n2486_n10078#" 17044 0 "m4_n2586_n10178#" 0 0
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2486 5264 -2485 5265 w=4814 l=4814 "None" "c2_n2486_n10078#" 17044 0 "m4_n2586_n10178#" 0 0
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BWDGQ.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BWDGQ.mag
new file mode 100644
index 0000000..fca6813
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8BWDGQ.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646428335
+<< metal4 >>
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+<< via4 >>
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+<< mimcap2 >>
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+<< metal5 >>
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+rect 2288 -10228 2608 -10137
+<< properties >>
+string FIXED_BBOX -2586 5164 2428 10178
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.07 l 24.07 val 1.177k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8FADAU.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8FADAU.mag
new file mode 100644
index 0000000..bb27ac9
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_8FADAU.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646014094
+<< metal4 >>
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+rect 2383 -10517 2425 -5395
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+rect 2383 -10608 2703 -10517
+<< properties >>
+string FIXED_BBOX -2681 5354 2523 10558
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 25.019 l 25.019 val 1.27k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_93FFAE.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_93FFAE.mag
new file mode 100644
index 0000000..e8335c7
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_93FFAE.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645800166
+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2622 2643 2464 7729
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.43 l 24.43 val 1.212k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_9ML3N8.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_9ML3N8.mag
new file mode 100644
index 0000000..43e94cf
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_9ML3N8.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646014094
+<< metal4 >>
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+rect -2031 2790 -2007 7610
+rect 1849 2790 1873 7610
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+rect -239 -7800 81 -7634
+rect 2331 -7709 2373 -2691
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+rect 2331 -7800 2651 -7709
+<< properties >>
+string FIXED_BBOX -2629 2650 2471 7750
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.5 l 24.5 val 1.219k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_B4E3SE.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_B4E3SE.mag
new file mode 100644
index 0000000..1f89ba3
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_B4E3SE.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646183319
+<< metal4 >>
+rect -2481 7265 2481 7306
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+<< metal5 >>
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+rect -239 -7356 81 -7190
+rect 2183 -7265 2225 -2543
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+rect 2183 -7356 2503 -7265
+<< properties >>
+string FIXED_BBOX -2481 2502 2323 7306
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23.016 l 23.016 val 1.076k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_ESKRYR.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_ESKRYR.mag
new file mode 100644
index 0000000..cac567b
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_ESKRYR.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645799662
+<< metal4 >>
+rect -2379 6959 2379 7000
+rect -2379 2441 2123 6959
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+<< via4 >>
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+<< mimcap2 >>
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+<< mimcap2contact >>
+rect -1807 2540 1649 6860
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+<< metal5 >>
+rect -239 6884 81 7050
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+rect -239 -7050 81 -6884
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+rect 2081 -7050 2401 -6959
+<< properties >>
+string FIXED_BBOX -2379 2400 2221 7000
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 22 l 22 val 984.72 carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_FPLYKB.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_FPLYKB.mag
new file mode 100644
index 0000000..a229de2
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_FPLYKB.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645798939
+<< metal4 >>
+rect -2829 11109 2829 11150
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+<< via4 >>
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+<< mimcap2 >>
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+<< metal5 >>
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+<< properties >>
+string FIXED_BBOX -2829 5650 2671 11150
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 26.5 l 26.5 val 1.424k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_G9N76S.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_G9N76S.mag
new file mode 100644
index 0000000..3542936
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_G9N76S.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646019513
+<< metal4 >>
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+<< mimcap2 >>
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+rect 2366 -10540 2686 -10449
+<< properties >>
+string FIXED_BBOX -2664 5320 2506 10490
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.85 l 24.85 val 1.253k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_GDNBFH.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_GDNBFH.mag
new file mode 100644
index 0000000..3fb3fef
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_GDNBFH.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646019513
+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2611 2632 2453 7696
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.315 l 24.315 val 1.201k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 1 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_H5KTGE.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_H5KTGE.mag
new file mode 100644
index 0000000..0dc44cf
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_H5KTGE.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646019513
+<< metal4 >>
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+<< mimcap2 >>
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+rect -239 -10532 81 -10366
+rect 2364 -10441 2406 -5357
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+rect 2364 -10532 2684 -10441
+<< properties >>
+string FIXED_BBOX -2662 5316 2504 10482
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.83 l 24.83 val 1.251k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 1 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_JRMB3T.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_JRMB3T.mag
new file mode 100644
index 0000000..8982b1b
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_JRMB3T.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645793055
+<< metal4 >>
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+<< mimcap2 >>
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+<< metal5 >>
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+<< properties >>
+string FIXED_BBOX -2179 2200 2021 6400
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 20 l 20 val 815.2 carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_LRVKXG.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_LRVKXG.mag
new file mode 100644
index 0000000..7279e5c
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_LRVKXG.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646100680
+<< metal4 >>
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+<< metal5 >>
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+<< properties >>
+string FIXED_BBOX -2619 2640 2461 7720
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.399 l 24.399 val 1.209k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_PW8JQE.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_PW8JQE.mag
new file mode 100644
index 0000000..36a35eb
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_PW8JQE.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646100680
+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2504 2525 2346 7375
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23.252 l 23.252 val 1.098k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_PW8Y8F.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_PW8Y8F.mag
new file mode 100644
index 0000000..98f2076
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_PW8Y8F.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646100680
+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2504 2525 2346 7375
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 23.252 l 23.252 val 1.099k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 1 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_Q65D7G.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_Q65D7G.mag
new file mode 100644
index 0000000..6ef0579
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_Q65D7G.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
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+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2590 5172 2432 10194
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.111 l 24.111 val 1.181k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_SRKRYR.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_SRKRYR.mag
new file mode 100644
index 0000000..ab7209d
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_SRKRYR.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
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+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2379 4750 2221 9350
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 22 l 22 val 984.72 carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_U5TCJH.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_U5TCJH.mag
new file mode 100644
index 0000000..e32df9a
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_U5TCJH.mag
@@ -0,0 +1,71 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646064585
+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2770 2791 2612 8173
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 25.911 l 25.911 val 1.362k carea 2.00 cperi 0.19 nx 1 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_YKVKXG.mag b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_YKVKXG.mag
new file mode 100644
index 0000000..f76ff1c
--- /dev/null
+++ b/mag/impedance-transformer/mag/sky130_fd_pr__cap_mim_m3_2_YKVKXG.mag
@@ -0,0 +1,89 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646100680
+<< metal4 >>
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+<< properties >>
+string FIXED_BBOX -2619 5230 2461 10310
+string gencell sky130_fd_pr__cap_mim_m3_2
+string library sky130
+string parameters w 24.399 l 24.399 val 1.209k carea 2.00 cperi 0.19 nx 1 ny 4 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 80
+<< end >>
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
new file mode 100644
index 0000000..cc05639
--- /dev/null
+++ b/mag/user_analog_project_wrapper.mag
@@ -0,0 +1,2277 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646578682
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+rect 583520 12182 584800 12294
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+rect 583520 11000 584800 11112
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+rect -800 2726 480 2838
+rect 583520 2726 584800 2838
+rect -800 1544 480 1656
+rect 583520 1544 584800 1656
+<< rmetal3 >>
+rect 324300 702240 326500 702300
+rect 326800 701400 329000 702300
+<< via3 >>
+rect 324320 700920 326480 702200
+rect 324340 695720 326480 697180
+rect 409620 671640 409860 671820
+rect 406501 671460 406621 671580
+rect 406506 668006 406614 668114
+<< metal4 >>
+rect 165594 702300 170594 704800
+rect 175894 702300 180894 704800
+rect 217294 702300 222294 704800
+rect 227594 702300 232594 704800
+rect 318994 702300 323994 704800
+rect 329294 702300 334294 704800
+rect 324300 702200 326500 702220
+rect 324300 700920 324320 702200
+rect 326480 700920 326500 702200
+rect 324300 697180 326500 700920
+rect 324300 695720 324340 697180
+rect 326480 695720 326500 697180
+rect 324300 695700 326500 695720
+rect 409600 671820 409880 671840
+rect 409600 671640 409620 671820
+rect 409860 671640 409880 671820
+rect 409600 671620 409880 671640
+rect 406500 671581 406620 671600
+rect 406500 671580 406622 671581
+rect 406500 671460 406501 671580
+rect 406621 671460 406622 671580
+rect 406500 671459 406622 671460
+rect 406500 671300 406620 671459
+rect 406508 668115 406612 671300
+rect 406505 668114 406615 668115
+rect 406505 668006 406506 668114
+rect 406614 668006 406615 668114
+rect 406505 668005 406615 668006
+<< metal5 >>
+rect 165594 702300 170594 704800
+rect 175894 702300 180894 704800
+rect 217294 702300 222294 704800
+rect 227594 702300 232594 704800
+rect 318994 702300 323994 704800
+rect 329294 702300 334294 704800
+<< comment >>
+rect -100 704000 584100 704100
+rect -100 0 0 704000
+rect 584000 0 584100 704000
+rect -100 -100 584100 0
+use ask-modulator ask-modulator_0 ~/projects_sky130/temp_sensor/caravel_user_project_analog/mag/ask_modulator/mag
+timestamp 1646431671
+transform 1 0 403200 0 1 677000
+box 6300 -8800 38800 17562
+use impedance-transformer impedance-transformer_0 ~/projects_sky130/temp_sensor/caravel_user_project_analog/mag/impedance-transformer/mag
+timestamp 1646431142
+transform 0 -1 646891 -1 0 1092404
+box 404800 529000 449824 576800
+<< labels >>
+flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1120 0 0 0 gpio_analog[0]
+port 0 nsew signal bidirectional
+flabel metal3 s -800 381864 480 381976 0 FreeSans 1120 0 0 0 gpio_analog[10]
+port 1 nsew signal bidirectional
+flabel metal3 s -800 338642 480 338754 0 FreeSans 1120 0 0 0 gpio_analog[11]
+port 2 nsew signal bidirectional
+flabel metal3 s -800 295420 480 295532 0 FreeSans 1120 0 0 0 gpio_analog[12]
+port 3 nsew signal bidirectional
+flabel metal3 s -800 252398 480 252510 0 FreeSans 1120 0 0 0 gpio_analog[13]
+port 4 nsew signal bidirectional
+flabel metal3 s -800 124776 480 124888 0 FreeSans 1120 0 0 0 gpio_analog[14]
+port 5 nsew signal bidirectional
+flabel metal3 s -800 81554 480 81666 0 FreeSans 1120 0 0 0 gpio_analog[15]
+port 6 nsew signal bidirectional
+flabel metal3 s -800 38332 480 38444 0 FreeSans 1120 0 0 0 gpio_analog[16]
+port 7 nsew signal bidirectional
+flabel metal3 s -800 16910 480 17022 0 FreeSans 1120 0 0 0 gpio_analog[17]
+port 8 nsew signal bidirectional
+flabel metal3 s 583520 313652 584800 313764 0 FreeSans 1120 0 0 0 gpio_analog[1]
+port 9 nsew signal bidirectional
+flabel metal3 s 583520 358874 584800 358986 0 FreeSans 1120 0 0 0 gpio_analog[2]
+port 10 nsew signal bidirectional
+flabel metal3 s 583520 405296 584800 405408 0 FreeSans 1120 0 0 0 gpio_analog[3]
+port 11 nsew signal bidirectional
+flabel metal3 s 583520 449718 584800 449830 0 FreeSans 1120 0 0 0 gpio_analog[4]
+port 12 nsew signal bidirectional
+flabel metal3 s 583520 494140 584800 494252 0 FreeSans 1120 0 0 0 gpio_analog[5]
+port 13 nsew signal bidirectional
+flabel metal3 s 583520 583562 584800 583674 0 FreeSans 1120 0 0 0 gpio_analog[6]
+port 14 nsew signal bidirectional
+flabel metal3 s -800 511530 480 511642 0 FreeSans 1120 0 0 0 gpio_analog[7]
+port 15 nsew signal bidirectional
+flabel metal3 s -800 468308 480 468420 0 FreeSans 1120 0 0 0 gpio_analog[8]
+port 16 nsew signal bidirectional
+flabel metal3 s -800 425086 480 425198 0 FreeSans 1120 0 0 0 gpio_analog[9]
+port 17 nsew signal bidirectional
+flabel metal3 s 583520 270412 584800 270524 0 FreeSans 1120 0 0 0 gpio_noesd[0]
+port 18 nsew signal bidirectional
+flabel metal3 s -800 380682 480 380794 0 FreeSans 1120 0 0 0 gpio_noesd[10]
+port 19 nsew signal bidirectional
+flabel metal3 s -800 337460 480 337572 0 FreeSans 1120 0 0 0 gpio_noesd[11]
+port 20 nsew signal bidirectional
+flabel metal3 s -800 294238 480 294350 0 FreeSans 1120 0 0 0 gpio_noesd[12]
+port 21 nsew signal bidirectional
+flabel metal3 s -800 251216 480 251328 0 FreeSans 1120 0 0 0 gpio_noesd[13]
+port 22 nsew signal bidirectional
+flabel metal3 s -800 123594 480 123706 0 FreeSans 1120 0 0 0 gpio_noesd[14]
+port 23 nsew signal bidirectional
+flabel metal3 s -800 80372 480 80484 0 FreeSans 1120 0 0 0 gpio_noesd[15]
+port 24 nsew signal bidirectional
+flabel metal3 s -800 37150 480 37262 0 FreeSans 1120 0 0 0 gpio_noesd[16]
+port 25 nsew signal bidirectional
+flabel metal3 s -800 15728 480 15840 0 FreeSans 1120 0 0 0 gpio_noesd[17]
+port 26 nsew signal bidirectional
+flabel metal3 s 583520 314834 584800 314946 0 FreeSans 1120 0 0 0 gpio_noesd[1]
+port 27 nsew signal bidirectional
+flabel metal3 s 583520 360056 584800 360168 0 FreeSans 1120 0 0 0 gpio_noesd[2]
+port 28 nsew signal bidirectional
+flabel metal3 s 583520 406478 584800 406590 0 FreeSans 1120 0 0 0 gpio_noesd[3]
+port 29 nsew signal bidirectional
+flabel metal3 s 583520 450900 584800 451012 0 FreeSans 1120 0 0 0 gpio_noesd[4]
+port 30 nsew signal bidirectional
+flabel metal3 s 583520 495322 584800 495434 0 FreeSans 1120 0 0 0 gpio_noesd[5]
+port 31 nsew signal bidirectional
+flabel metal3 s 583520 584744 584800 584856 0 FreeSans 1120 0 0 0 gpio_noesd[6]
+port 32 nsew signal bidirectional
+flabel metal3 s -800 510348 480 510460 0 FreeSans 1120 0 0 0 gpio_noesd[7]
+port 33 nsew signal bidirectional
+flabel metal3 s -800 467126 480 467238 0 FreeSans 1120 0 0 0 gpio_noesd[8]
+port 34 nsew signal bidirectional
+flabel metal3 s -800 423904 480 424016 0 FreeSans 1120 0 0 0 gpio_noesd[9]
+port 35 nsew signal bidirectional
+flabel metal3 s 582300 677984 584800 682984 0 FreeSans 1120 0 0 0 io_analog[0]
+port 36 nsew signal bidirectional
+flabel metal3 s 0 680242 1700 685242 0 FreeSans 1120 0 0 0 io_analog[10]
+port 37 nsew signal bidirectional
+flabel metal3 s 566594 702300 571594 704800 0 FreeSans 1920 180 0 0 io_analog[1]
+port 38 nsew signal bidirectional
+flabel metal3 s 465394 702300 470394 704800 0 FreeSans 1920 180 0 0 io_analog[2]
+port 39 nsew signal bidirectional
+flabel metal3 s 413394 702300 418394 704800 0 FreeSans 1920 180 0 0 io_analog[3]
+port 40 nsew signal bidirectional
+flabel metal3 s 329294 702300 334294 704800 0 FreeSans 1920 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal4 s 329294 702300 334294 704800 0 FreeSans 1920 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal5 s 329294 702300 334294 704800 0 FreeSans 1920 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal3 s 227594 702300 232594 704800 0 FreeSans 1920 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal4 s 227594 702300 232594 704800 0 FreeSans 1920 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal5 s 227594 702300 232594 704800 0 FreeSans 1920 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal3 s 175894 702300 180894 704800 0 FreeSans 1920 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal4 s 175894 702300 180894 704800 0 FreeSans 1920 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal5 s 175894 702300 180894 704800 0 FreeSans 1920 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal3 s 120194 702300 125194 704800 0 FreeSans 1920 180 0 0 io_analog[7]
+port 44 nsew signal bidirectional
+flabel metal3 s 68194 702300 73194 704800 0 FreeSans 1920 180 0 0 io_analog[8]
+port 45 nsew signal bidirectional
+flabel metal3 s 16194 702300 21194 704800 0 FreeSans 1920 180 0 0 io_analog[9]
+port 46 nsew signal bidirectional
+flabel metal3 s 318994 702300 323994 704800 0 FreeSans 1920 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal4 s 318994 702300 323994 704800 0 FreeSans 1920 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal5 s 318994 702300 323994 704800 0 FreeSans 1920 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal3 s 217294 702300 222294 704800 0 FreeSans 1920 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal4 s 217294 702300 222294 704800 0 FreeSans 1920 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal5 s 217294 702300 222294 704800 0 FreeSans 1920 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal3 s 165594 702300 170594 704800 0 FreeSans 1920 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal4 s 165594 702300 170594 704800 0 FreeSans 1920 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal5 s 165594 702300 170594 704800 0 FreeSans 1920 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal3 s 326794 702300 328994 704800 0 FreeSans 1920 180 0 0 io_clamp_high[0]
+port 50 nsew signal bidirectional
+flabel metal3 s 225094 702300 227294 704800 0 FreeSans 1920 180 0 0 io_clamp_high[1]
+port 51 nsew signal bidirectional
+flabel metal3 s 173394 702300 175594 704800 0 FreeSans 1920 180 0 0 io_clamp_high[2]
+port 52 nsew signal bidirectional
+flabel metal3 s 324294 702300 326494 704800 0 FreeSans 1920 180 0 0 io_clamp_low[0]
+port 53 nsew signal bidirectional
+flabel metal3 s 222594 702300 224794 704800 0 FreeSans 1920 180 0 0 io_clamp_low[1]
+port 54 nsew signal bidirectional
+flabel metal3 s 170894 702300 173094 704800 0 FreeSans 1920 180 0 0 io_clamp_low[2]
+port 55 nsew signal bidirectional
+flabel metal3 s 583520 2726 584800 2838 0 FreeSans 1120 0 0 0 io_in[0]
+port 56 nsew signal input
+flabel metal3 s 583520 408842 584800 408954 0 FreeSans 1120 0 0 0 io_in[10]
+port 57 nsew signal input
+flabel metal3 s 583520 453264 584800 453376 0 FreeSans 1120 0 0 0 io_in[11]
+port 58 nsew signal input
+flabel metal3 s 583520 497686 584800 497798 0 FreeSans 1120 0 0 0 io_in[12]
+port 59 nsew signal input
+flabel metal3 s 583520 587108 584800 587220 0 FreeSans 1120 0 0 0 io_in[13]
+port 60 nsew signal input
+flabel metal3 s -800 507984 480 508096 0 FreeSans 1120 0 0 0 io_in[14]
+port 61 nsew signal input
+flabel metal3 s -800 464762 480 464874 0 FreeSans 1120 0 0 0 io_in[15]
+port 62 nsew signal input
+flabel metal3 s -800 421540 480 421652 0 FreeSans 1120 0 0 0 io_in[16]
+port 63 nsew signal input
+flabel metal3 s -800 378318 480 378430 0 FreeSans 1120 0 0 0 io_in[17]
+port 64 nsew signal input
+flabel metal3 s -800 335096 480 335208 0 FreeSans 1120 0 0 0 io_in[18]
+port 65 nsew signal input
+flabel metal3 s -800 291874 480 291986 0 FreeSans 1120 0 0 0 io_in[19]
+port 66 nsew signal input
+flabel metal3 s 583520 7454 584800 7566 0 FreeSans 1120 0 0 0 io_in[1]
+port 67 nsew signal input
+flabel metal3 s -800 248852 480 248964 0 FreeSans 1120 0 0 0 io_in[20]
+port 68 nsew signal input
+flabel metal3 s -800 121230 480 121342 0 FreeSans 1120 0 0 0 io_in[21]
+port 69 nsew signal input
+flabel metal3 s -800 78008 480 78120 0 FreeSans 1120 0 0 0 io_in[22]
+port 70 nsew signal input
+flabel metal3 s -800 34786 480 34898 0 FreeSans 1120 0 0 0 io_in[23]
+port 71 nsew signal input
+flabel metal3 s -800 13364 480 13476 0 FreeSans 1120 0 0 0 io_in[24]
+port 72 nsew signal input
+flabel metal3 s -800 8636 480 8748 0 FreeSans 1120 0 0 0 io_in[25]
+port 73 nsew signal input
+flabel metal3 s -800 3908 480 4020 0 FreeSans 1120 0 0 0 io_in[26]
+port 74 nsew signal input
+flabel metal3 s 583520 12182 584800 12294 0 FreeSans 1120 0 0 0 io_in[2]
+port 75 nsew signal input
+flabel metal3 s 583520 16910 584800 17022 0 FreeSans 1120 0 0 0 io_in[3]
+port 76 nsew signal input
+flabel metal3 s 583520 21638 584800 21750 0 FreeSans 1120 0 0 0 io_in[4]
+port 77 nsew signal input
+flabel metal3 s 583520 48096 584800 48208 0 FreeSans 1120 0 0 0 io_in[5]
+port 78 nsew signal input
+flabel metal3 s 583520 92754 584800 92866 0 FreeSans 1120 0 0 0 io_in[6]
+port 79 nsew signal input
+flabel metal3 s 583520 272776 584800 272888 0 FreeSans 1120 0 0 0 io_in[7]
+port 80 nsew signal input
+flabel metal3 s 583520 317198 584800 317310 0 FreeSans 1120 0 0 0 io_in[8]
+port 81 nsew signal input
+flabel metal3 s 583520 362420 584800 362532 0 FreeSans 1120 0 0 0 io_in[9]
+port 82 nsew signal input
+flabel metal3 s 583520 1544 584800 1656 0 FreeSans 1120 0 0 0 io_in_3v3[0]
+port 83 nsew signal input
+flabel metal3 s 583520 407660 584800 407772 0 FreeSans 1120 0 0 0 io_in_3v3[10]
+port 84 nsew signal input
+flabel metal3 s 583520 452082 584800 452194 0 FreeSans 1120 0 0 0 io_in_3v3[11]
+port 85 nsew signal input
+flabel metal3 s 583520 496504 584800 496616 0 FreeSans 1120 0 0 0 io_in_3v3[12]
+port 86 nsew signal input
+flabel metal3 s 583520 585926 584800 586038 0 FreeSans 1120 0 0 0 io_in_3v3[13]
+port 87 nsew signal input
+flabel metal3 s -800 509166 480 509278 0 FreeSans 1120 0 0 0 io_in_3v3[14]
+port 88 nsew signal input
+flabel metal3 s -800 465944 480 466056 0 FreeSans 1120 0 0 0 io_in_3v3[15]
+port 89 nsew signal input
+flabel metal3 s -800 422722 480 422834 0 FreeSans 1120 0 0 0 io_in_3v3[16]
+port 90 nsew signal input
+flabel metal3 s -800 379500 480 379612 0 FreeSans 1120 0 0 0 io_in_3v3[17]
+port 91 nsew signal input
+flabel metal3 s -800 336278 480 336390 0 FreeSans 1120 0 0 0 io_in_3v3[18]
+port 92 nsew signal input
+flabel metal3 s -800 293056 480 293168 0 FreeSans 1120 0 0 0 io_in_3v3[19]
+port 93 nsew signal input
+flabel metal3 s 583520 6272 584800 6384 0 FreeSans 1120 0 0 0 io_in_3v3[1]
+port 94 nsew signal input
+flabel metal3 s -800 250034 480 250146 0 FreeSans 1120 0 0 0 io_in_3v3[20]
+port 95 nsew signal input
+flabel metal3 s -800 122412 480 122524 0 FreeSans 1120 0 0 0 io_in_3v3[21]
+port 96 nsew signal input
+flabel metal3 s -800 79190 480 79302 0 FreeSans 1120 0 0 0 io_in_3v3[22]
+port 97 nsew signal input
+flabel metal3 s -800 35968 480 36080 0 FreeSans 1120 0 0 0 io_in_3v3[23]
+port 98 nsew signal input
+flabel metal3 s -800 14546 480 14658 0 FreeSans 1120 0 0 0 io_in_3v3[24]
+port 99 nsew signal input
+flabel metal3 s -800 9818 480 9930 0 FreeSans 1120 0 0 0 io_in_3v3[25]
+port 100 nsew signal input
+flabel metal3 s -800 5090 480 5202 0 FreeSans 1120 0 0 0 io_in_3v3[26]
+port 101 nsew signal input
+flabel metal3 s 583520 11000 584800 11112 0 FreeSans 1120 0 0 0 io_in_3v3[2]
+port 102 nsew signal input
+flabel metal3 s 583520 15728 584800 15840 0 FreeSans 1120 0 0 0 io_in_3v3[3]
+port 103 nsew signal input
+flabel metal3 s 583520 20456 584800 20568 0 FreeSans 1120 0 0 0 io_in_3v3[4]
+port 104 nsew signal input
+flabel metal3 s 583520 46914 584800 47026 0 FreeSans 1120 0 0 0 io_in_3v3[5]
+port 105 nsew signal input
+flabel metal3 s 583520 91572 584800 91684 0 FreeSans 1120 0 0 0 io_in_3v3[6]
+port 106 nsew signal input
+flabel metal3 s 583520 271594 584800 271706 0 FreeSans 1120 0 0 0 io_in_3v3[7]
+port 107 nsew signal input
+flabel metal3 s 583520 316016 584800 316128 0 FreeSans 1120 0 0 0 io_in_3v3[8]
+port 108 nsew signal input
+flabel metal3 s 583520 361238 584800 361350 0 FreeSans 1120 0 0 0 io_in_3v3[9]
+port 109 nsew signal input
+flabel metal3 s 583520 5090 584800 5202 0 FreeSans 1120 0 0 0 io_oeb[0]
+port 110 nsew signal tristate
+flabel metal3 s 583520 411206 584800 411318 0 FreeSans 1120 0 0 0 io_oeb[10]
+port 111 nsew signal tristate
+flabel metal3 s 583520 455628 584800 455740 0 FreeSans 1120 0 0 0 io_oeb[11]
+port 112 nsew signal tristate
+flabel metal3 s 583520 500050 584800 500162 0 FreeSans 1120 0 0 0 io_oeb[12]
+port 113 nsew signal tristate
+flabel metal3 s 583520 589472 584800 589584 0 FreeSans 1120 0 0 0 io_oeb[13]
+port 114 nsew signal tristate
+flabel metal3 s -800 505620 480 505732 0 FreeSans 1120 0 0 0 io_oeb[14]
+port 115 nsew signal tristate
+flabel metal3 s -800 462398 480 462510 0 FreeSans 1120 0 0 0 io_oeb[15]
+port 116 nsew signal tristate
+flabel metal3 s -800 419176 480 419288 0 FreeSans 1120 0 0 0 io_oeb[16]
+port 117 nsew signal tristate
+flabel metal3 s -800 375954 480 376066 0 FreeSans 1120 0 0 0 io_oeb[17]
+port 118 nsew signal tristate
+flabel metal3 s -800 332732 480 332844 0 FreeSans 1120 0 0 0 io_oeb[18]
+port 119 nsew signal tristate
+flabel metal3 s -800 289510 480 289622 0 FreeSans 1120 0 0 0 io_oeb[19]
+port 120 nsew signal tristate
+flabel metal3 s 583520 9818 584800 9930 0 FreeSans 1120 0 0 0 io_oeb[1]
+port 121 nsew signal tristate
+flabel metal3 s -800 246488 480 246600 0 FreeSans 1120 0 0 0 io_oeb[20]
+port 122 nsew signal tristate
+flabel metal3 s -800 118866 480 118978 0 FreeSans 1120 0 0 0 io_oeb[21]
+port 123 nsew signal tristate
+flabel metal3 s -800 75644 480 75756 0 FreeSans 1120 0 0 0 io_oeb[22]
+port 124 nsew signal tristate
+flabel metal3 s -800 32422 480 32534 0 FreeSans 1120 0 0 0 io_oeb[23]
+port 125 nsew signal tristate
+flabel metal3 s -800 11000 480 11112 0 FreeSans 1120 0 0 0 io_oeb[24]
+port 126 nsew signal tristate
+flabel metal3 s -800 6272 480 6384 0 FreeSans 1120 0 0 0 io_oeb[25]
+port 127 nsew signal tristate
+flabel metal3 s -800 1544 480 1656 0 FreeSans 1120 0 0 0 io_oeb[26]
+port 128 nsew signal tristate
+flabel metal3 s 583520 14546 584800 14658 0 FreeSans 1120 0 0 0 io_oeb[2]
+port 129 nsew signal tristate
+flabel metal3 s 583520 19274 584800 19386 0 FreeSans 1120 0 0 0 io_oeb[3]
+port 130 nsew signal tristate
+flabel metal3 s 583520 24002 584800 24114 0 FreeSans 1120 0 0 0 io_oeb[4]
+port 131 nsew signal tristate
+flabel metal3 s 583520 50460 584800 50572 0 FreeSans 1120 0 0 0 io_oeb[5]
+port 132 nsew signal tristate
+flabel metal3 s 583520 95118 584800 95230 0 FreeSans 1120 0 0 0 io_oeb[6]
+port 133 nsew signal tristate
+flabel metal3 s 583520 275140 584800 275252 0 FreeSans 1120 0 0 0 io_oeb[7]
+port 134 nsew signal tristate
+flabel metal3 s 583520 319562 584800 319674 0 FreeSans 1120 0 0 0 io_oeb[8]
+port 135 nsew signal tristate
+flabel metal3 s 583520 364784 584800 364896 0 FreeSans 1120 0 0 0 io_oeb[9]
+port 136 nsew signal tristate
+flabel metal3 s 583520 3908 584800 4020 0 FreeSans 1120 0 0 0 io_out[0]
+port 137 nsew signal tristate
+flabel metal3 s 583520 410024 584800 410136 0 FreeSans 1120 0 0 0 io_out[10]
+port 138 nsew signal tristate
+flabel metal3 s 583520 454446 584800 454558 0 FreeSans 1120 0 0 0 io_out[11]
+port 139 nsew signal tristate
+flabel metal3 s 583520 498868 584800 498980 0 FreeSans 1120 0 0 0 io_out[12]
+port 140 nsew signal tristate
+flabel metal3 s 583520 588290 584800 588402 0 FreeSans 1120 0 0 0 io_out[13]
+port 141 nsew signal tristate
+flabel metal3 s -800 506802 480 506914 0 FreeSans 1120 0 0 0 io_out[14]
+port 142 nsew signal tristate
+flabel metal3 s -800 463580 480 463692 0 FreeSans 1120 0 0 0 io_out[15]
+port 143 nsew signal tristate
+flabel metal3 s -800 420358 480 420470 0 FreeSans 1120 0 0 0 io_out[16]
+port 144 nsew signal tristate
+flabel metal3 s -800 377136 480 377248 0 FreeSans 1120 0 0 0 io_out[17]
+port 145 nsew signal tristate
+flabel metal3 s -800 333914 480 334026 0 FreeSans 1120 0 0 0 io_out[18]
+port 146 nsew signal tristate
+flabel metal3 s -800 290692 480 290804 0 FreeSans 1120 0 0 0 io_out[19]
+port 147 nsew signal tristate
+flabel metal3 s 583520 8636 584800 8748 0 FreeSans 1120 0 0 0 io_out[1]
+port 148 nsew signal tristate
+flabel metal3 s -800 247670 480 247782 0 FreeSans 1120 0 0 0 io_out[20]
+port 149 nsew signal tristate
+flabel metal3 s -800 120048 480 120160 0 FreeSans 1120 0 0 0 io_out[21]
+port 150 nsew signal tristate
+flabel metal3 s -800 76826 480 76938 0 FreeSans 1120 0 0 0 io_out[22]
+port 151 nsew signal tristate
+flabel metal3 s -800 33604 480 33716 0 FreeSans 1120 0 0 0 io_out[23]
+port 152 nsew signal tristate
+flabel metal3 s -800 12182 480 12294 0 FreeSans 1120 0 0 0 io_out[24]
+port 153 nsew signal tristate
+flabel metal3 s -800 7454 480 7566 0 FreeSans 1120 0 0 0 io_out[25]
+port 154 nsew signal tristate
+flabel metal3 s -800 2726 480 2838 0 FreeSans 1120 0 0 0 io_out[26]
+port 155 nsew signal tristate
+flabel metal3 s 583520 13364 584800 13476 0 FreeSans 1120 0 0 0 io_out[2]
+port 156 nsew signal tristate
+flabel metal3 s 583520 18092 584800 18204 0 FreeSans 1120 0 0 0 io_out[3]
+port 157 nsew signal tristate
+flabel metal3 s 583520 22820 584800 22932 0 FreeSans 1120 0 0 0 io_out[4]
+port 158 nsew signal tristate
+flabel metal3 s 583520 49278 584800 49390 0 FreeSans 1120 0 0 0 io_out[5]
+port 159 nsew signal tristate
+flabel metal3 s 583520 93936 584800 94048 0 FreeSans 1120 0 0 0 io_out[6]
+port 160 nsew signal tristate
+flabel metal3 s 583520 273958 584800 274070 0 FreeSans 1120 0 0 0 io_out[7]
+port 161 nsew signal tristate
+flabel metal3 s 583520 318380 584800 318492 0 FreeSans 1120 0 0 0 io_out[8]
+port 162 nsew signal tristate
+flabel metal3 s 583520 363602 584800 363714 0 FreeSans 1120 0 0 0 io_out[9]
+port 163 nsew signal tristate
+flabel metal2 s 125816 -800 125928 480 0 FreeSans 1120 90 0 0 la_data_in[0]
+port 164 nsew signal input
+flabel metal2 s 480416 -800 480528 480 0 FreeSans 1120 90 0 0 la_data_in[100]
+port 165 nsew signal input
+flabel metal2 s 483962 -800 484074 480 0 FreeSans 1120 90 0 0 la_data_in[101]
+port 166 nsew signal input
+flabel metal2 s 487508 -800 487620 480 0 FreeSans 1120 90 0 0 la_data_in[102]
+port 167 nsew signal input
+flabel metal2 s 491054 -800 491166 480 0 FreeSans 1120 90 0 0 la_data_in[103]
+port 168 nsew signal input
+flabel metal2 s 494600 -800 494712 480 0 FreeSans 1120 90 0 0 la_data_in[104]
+port 169 nsew signal input
+flabel metal2 s 498146 -800 498258 480 0 FreeSans 1120 90 0 0 la_data_in[105]
+port 170 nsew signal input
+flabel metal2 s 501692 -800 501804 480 0 FreeSans 1120 90 0 0 la_data_in[106]
+port 171 nsew signal input
+flabel metal2 s 505238 -800 505350 480 0 FreeSans 1120 90 0 0 la_data_in[107]
+port 172 nsew signal input
+flabel metal2 s 508784 -800 508896 480 0 FreeSans 1120 90 0 0 la_data_in[108]
+port 173 nsew signal input
+flabel metal2 s 512330 -800 512442 480 0 FreeSans 1120 90 0 0 la_data_in[109]
+port 174 nsew signal input
+flabel metal2 s 161276 -800 161388 480 0 FreeSans 1120 90 0 0 la_data_in[10]
+port 175 nsew signal input
+flabel metal2 s 515876 -800 515988 480 0 FreeSans 1120 90 0 0 la_data_in[110]
+port 176 nsew signal input
+flabel metal2 s 519422 -800 519534 480 0 FreeSans 1120 90 0 0 la_data_in[111]
+port 177 nsew signal input
+flabel metal2 s 522968 -800 523080 480 0 FreeSans 1120 90 0 0 la_data_in[112]
+port 178 nsew signal input
+flabel metal2 s 526514 -800 526626 480 0 FreeSans 1120 90 0 0 la_data_in[113]
+port 179 nsew signal input
+flabel metal2 s 530060 -800 530172 480 0 FreeSans 1120 90 0 0 la_data_in[114]
+port 180 nsew signal input
+flabel metal2 s 533606 -800 533718 480 0 FreeSans 1120 90 0 0 la_data_in[115]
+port 181 nsew signal input
+flabel metal2 s 537152 -800 537264 480 0 FreeSans 1120 90 0 0 la_data_in[116]
+port 182 nsew signal input
+flabel metal2 s 540698 -800 540810 480 0 FreeSans 1120 90 0 0 la_data_in[117]
+port 183 nsew signal input
+flabel metal2 s 544244 -800 544356 480 0 FreeSans 1120 90 0 0 la_data_in[118]
+port 184 nsew signal input
+flabel metal2 s 547790 -800 547902 480 0 FreeSans 1120 90 0 0 la_data_in[119]
+port 185 nsew signal input
+flabel metal2 s 164822 -800 164934 480 0 FreeSans 1120 90 0 0 la_data_in[11]
+port 186 nsew signal input
+flabel metal2 s 551336 -800 551448 480 0 FreeSans 1120 90 0 0 la_data_in[120]
+port 187 nsew signal input
+flabel metal2 s 554882 -800 554994 480 0 FreeSans 1120 90 0 0 la_data_in[121]
+port 188 nsew signal input
+flabel metal2 s 558428 -800 558540 480 0 FreeSans 1120 90 0 0 la_data_in[122]
+port 189 nsew signal input
+flabel metal2 s 561974 -800 562086 480 0 FreeSans 1120 90 0 0 la_data_in[123]
+port 190 nsew signal input
+flabel metal2 s 565520 -800 565632 480 0 FreeSans 1120 90 0 0 la_data_in[124]
+port 191 nsew signal input
+flabel metal2 s 569066 -800 569178 480 0 FreeSans 1120 90 0 0 la_data_in[125]
+port 192 nsew signal input
+flabel metal2 s 572612 -800 572724 480 0 FreeSans 1120 90 0 0 la_data_in[126]
+port 193 nsew signal input
+flabel metal2 s 576158 -800 576270 480 0 FreeSans 1120 90 0 0 la_data_in[127]
+port 194 nsew signal input
+flabel metal2 s 168368 -800 168480 480 0 FreeSans 1120 90 0 0 la_data_in[12]
+port 195 nsew signal input
+flabel metal2 s 171914 -800 172026 480 0 FreeSans 1120 90 0 0 la_data_in[13]
+port 196 nsew signal input
+flabel metal2 s 175460 -800 175572 480 0 FreeSans 1120 90 0 0 la_data_in[14]
+port 197 nsew signal input
+flabel metal2 s 179006 -800 179118 480 0 FreeSans 1120 90 0 0 la_data_in[15]
+port 198 nsew signal input
+flabel metal2 s 182552 -800 182664 480 0 FreeSans 1120 90 0 0 la_data_in[16]
+port 199 nsew signal input
+flabel metal2 s 186098 -800 186210 480 0 FreeSans 1120 90 0 0 la_data_in[17]
+port 200 nsew signal input
+flabel metal2 s 189644 -800 189756 480 0 FreeSans 1120 90 0 0 la_data_in[18]
+port 201 nsew signal input
+flabel metal2 s 193190 -800 193302 480 0 FreeSans 1120 90 0 0 la_data_in[19]
+port 202 nsew signal input
+flabel metal2 s 129362 -800 129474 480 0 FreeSans 1120 90 0 0 la_data_in[1]
+port 203 nsew signal input
+flabel metal2 s 196736 -800 196848 480 0 FreeSans 1120 90 0 0 la_data_in[20]
+port 204 nsew signal input
+flabel metal2 s 200282 -800 200394 480 0 FreeSans 1120 90 0 0 la_data_in[21]
+port 205 nsew signal input
+flabel metal2 s 203828 -800 203940 480 0 FreeSans 1120 90 0 0 la_data_in[22]
+port 206 nsew signal input
+flabel metal2 s 207374 -800 207486 480 0 FreeSans 1120 90 0 0 la_data_in[23]
+port 207 nsew signal input
+flabel metal2 s 210920 -800 211032 480 0 FreeSans 1120 90 0 0 la_data_in[24]
+port 208 nsew signal input
+flabel metal2 s 214466 -800 214578 480 0 FreeSans 1120 90 0 0 la_data_in[25]
+port 209 nsew signal input
+flabel metal2 s 218012 -800 218124 480 0 FreeSans 1120 90 0 0 la_data_in[26]
+port 210 nsew signal input
+flabel metal2 s 221558 -800 221670 480 0 FreeSans 1120 90 0 0 la_data_in[27]
+port 211 nsew signal input
+flabel metal2 s 225104 -800 225216 480 0 FreeSans 1120 90 0 0 la_data_in[28]
+port 212 nsew signal input
+flabel metal2 s 228650 -800 228762 480 0 FreeSans 1120 90 0 0 la_data_in[29]
+port 213 nsew signal input
+flabel metal2 s 132908 -800 133020 480 0 FreeSans 1120 90 0 0 la_data_in[2]
+port 214 nsew signal input
+flabel metal2 s 232196 -800 232308 480 0 FreeSans 1120 90 0 0 la_data_in[30]
+port 215 nsew signal input
+flabel metal2 s 235742 -800 235854 480 0 FreeSans 1120 90 0 0 la_data_in[31]
+port 216 nsew signal input
+flabel metal2 s 239288 -800 239400 480 0 FreeSans 1120 90 0 0 la_data_in[32]
+port 217 nsew signal input
+flabel metal2 s 242834 -800 242946 480 0 FreeSans 1120 90 0 0 la_data_in[33]
+port 218 nsew signal input
+flabel metal2 s 246380 -800 246492 480 0 FreeSans 1120 90 0 0 la_data_in[34]
+port 219 nsew signal input
+flabel metal2 s 249926 -800 250038 480 0 FreeSans 1120 90 0 0 la_data_in[35]
+port 220 nsew signal input
+flabel metal2 s 253472 -800 253584 480 0 FreeSans 1120 90 0 0 la_data_in[36]
+port 221 nsew signal input
+flabel metal2 s 257018 -800 257130 480 0 FreeSans 1120 90 0 0 la_data_in[37]
+port 222 nsew signal input
+flabel metal2 s 260564 -800 260676 480 0 FreeSans 1120 90 0 0 la_data_in[38]
+port 223 nsew signal input
+flabel metal2 s 264110 -800 264222 480 0 FreeSans 1120 90 0 0 la_data_in[39]
+port 224 nsew signal input
+flabel metal2 s 136454 -800 136566 480 0 FreeSans 1120 90 0 0 la_data_in[3]
+port 225 nsew signal input
+flabel metal2 s 267656 -800 267768 480 0 FreeSans 1120 90 0 0 la_data_in[40]
+port 226 nsew signal input
+flabel metal2 s 271202 -800 271314 480 0 FreeSans 1120 90 0 0 la_data_in[41]
+port 227 nsew signal input
+flabel metal2 s 274748 -800 274860 480 0 FreeSans 1120 90 0 0 la_data_in[42]
+port 228 nsew signal input
+flabel metal2 s 278294 -800 278406 480 0 FreeSans 1120 90 0 0 la_data_in[43]
+port 229 nsew signal input
+flabel metal2 s 281840 -800 281952 480 0 FreeSans 1120 90 0 0 la_data_in[44]
+port 230 nsew signal input
+flabel metal2 s 285386 -800 285498 480 0 FreeSans 1120 90 0 0 la_data_in[45]
+port 231 nsew signal input
+flabel metal2 s 288932 -800 289044 480 0 FreeSans 1120 90 0 0 la_data_in[46]
+port 232 nsew signal input
+flabel metal2 s 292478 -800 292590 480 0 FreeSans 1120 90 0 0 la_data_in[47]
+port 233 nsew signal input
+flabel metal2 s 296024 -800 296136 480 0 FreeSans 1120 90 0 0 la_data_in[48]
+port 234 nsew signal input
+flabel metal2 s 299570 -800 299682 480 0 FreeSans 1120 90 0 0 la_data_in[49]
+port 235 nsew signal input
+flabel metal2 s 140000 -800 140112 480 0 FreeSans 1120 90 0 0 la_data_in[4]
+port 236 nsew signal input
+flabel metal2 s 303116 -800 303228 480 0 FreeSans 1120 90 0 0 la_data_in[50]
+port 237 nsew signal input
+flabel metal2 s 306662 -800 306774 480 0 FreeSans 1120 90 0 0 la_data_in[51]
+port 238 nsew signal input
+flabel metal2 s 310208 -800 310320 480 0 FreeSans 1120 90 0 0 la_data_in[52]
+port 239 nsew signal input
+flabel metal2 s 313754 -800 313866 480 0 FreeSans 1120 90 0 0 la_data_in[53]
+port 240 nsew signal input
+flabel metal2 s 317300 -800 317412 480 0 FreeSans 1120 90 0 0 la_data_in[54]
+port 241 nsew signal input
+flabel metal2 s 320846 -800 320958 480 0 FreeSans 1120 90 0 0 la_data_in[55]
+port 242 nsew signal input
+flabel metal2 s 324392 -800 324504 480 0 FreeSans 1120 90 0 0 la_data_in[56]
+port 243 nsew signal input
+flabel metal2 s 327938 -800 328050 480 0 FreeSans 1120 90 0 0 la_data_in[57]
+port 244 nsew signal input
+flabel metal2 s 331484 -800 331596 480 0 FreeSans 1120 90 0 0 la_data_in[58]
+port 245 nsew signal input
+flabel metal2 s 335030 -800 335142 480 0 FreeSans 1120 90 0 0 la_data_in[59]
+port 246 nsew signal input
+flabel metal2 s 143546 -800 143658 480 0 FreeSans 1120 90 0 0 la_data_in[5]
+port 247 nsew signal input
+flabel metal2 s 338576 -800 338688 480 0 FreeSans 1120 90 0 0 la_data_in[60]
+port 248 nsew signal input
+flabel metal2 s 342122 -800 342234 480 0 FreeSans 1120 90 0 0 la_data_in[61]
+port 249 nsew signal input
+flabel metal2 s 345668 -800 345780 480 0 FreeSans 1120 90 0 0 la_data_in[62]
+port 250 nsew signal input
+flabel metal2 s 349214 -800 349326 480 0 FreeSans 1120 90 0 0 la_data_in[63]
+port 251 nsew signal input
+flabel metal2 s 352760 -800 352872 480 0 FreeSans 1120 90 0 0 la_data_in[64]
+port 252 nsew signal input
+flabel metal2 s 356306 -800 356418 480 0 FreeSans 1120 90 0 0 la_data_in[65]
+port 253 nsew signal input
+flabel metal2 s 359852 -800 359964 480 0 FreeSans 1120 90 0 0 la_data_in[66]
+port 254 nsew signal input
+flabel metal2 s 363398 -800 363510 480 0 FreeSans 1120 90 0 0 la_data_in[67]
+port 255 nsew signal input
+flabel metal2 s 366944 -800 367056 480 0 FreeSans 1120 90 0 0 la_data_in[68]
+port 256 nsew signal input
+flabel metal2 s 370490 -800 370602 480 0 FreeSans 1120 90 0 0 la_data_in[69]
+port 257 nsew signal input
+flabel metal2 s 147092 -800 147204 480 0 FreeSans 1120 90 0 0 la_data_in[6]
+port 258 nsew signal input
+flabel metal2 s 374036 -800 374148 480 0 FreeSans 1120 90 0 0 la_data_in[70]
+port 259 nsew signal input
+flabel metal2 s 377582 -800 377694 480 0 FreeSans 1120 90 0 0 la_data_in[71]
+port 260 nsew signal input
+flabel metal2 s 381128 -800 381240 480 0 FreeSans 1120 90 0 0 la_data_in[72]
+port 261 nsew signal input
+flabel metal2 s 384674 -800 384786 480 0 FreeSans 1120 90 0 0 la_data_in[73]
+port 262 nsew signal input
+flabel metal2 s 388220 -800 388332 480 0 FreeSans 1120 90 0 0 la_data_in[74]
+port 263 nsew signal input
+flabel metal2 s 391766 -800 391878 480 0 FreeSans 1120 90 0 0 la_data_in[75]
+port 264 nsew signal input
+flabel metal2 s 395312 -800 395424 480 0 FreeSans 1120 90 0 0 la_data_in[76]
+port 265 nsew signal input
+flabel metal2 s 398858 -800 398970 480 0 FreeSans 1120 90 0 0 la_data_in[77]
+port 266 nsew signal input
+flabel metal2 s 402404 -800 402516 480 0 FreeSans 1120 90 0 0 la_data_in[78]
+port 267 nsew signal input
+flabel metal2 s 405950 -800 406062 480 0 FreeSans 1120 90 0 0 la_data_in[79]
+port 268 nsew signal input
+flabel metal2 s 150638 -800 150750 480 0 FreeSans 1120 90 0 0 la_data_in[7]
+port 269 nsew signal input
+flabel metal2 s 409496 -800 409608 480 0 FreeSans 1120 90 0 0 la_data_in[80]
+port 270 nsew signal input
+flabel metal2 s 413042 -800 413154 480 0 FreeSans 1120 90 0 0 la_data_in[81]
+port 271 nsew signal input
+flabel metal2 s 416588 -800 416700 480 0 FreeSans 1120 90 0 0 la_data_in[82]
+port 272 nsew signal input
+flabel metal2 s 420134 -800 420246 480 0 FreeSans 1120 90 0 0 la_data_in[83]
+port 273 nsew signal input
+flabel metal2 s 423680 -800 423792 480 0 FreeSans 1120 90 0 0 la_data_in[84]
+port 274 nsew signal input
+flabel metal2 s 427226 -800 427338 480 0 FreeSans 1120 90 0 0 la_data_in[85]
+port 275 nsew signal input
+flabel metal2 s 430772 -800 430884 480 0 FreeSans 1120 90 0 0 la_data_in[86]
+port 276 nsew signal input
+flabel metal2 s 434318 -800 434430 480 0 FreeSans 1120 90 0 0 la_data_in[87]
+port 277 nsew signal input
+flabel metal2 s 437864 -800 437976 480 0 FreeSans 1120 90 0 0 la_data_in[88]
+port 278 nsew signal input
+flabel metal2 s 441410 -800 441522 480 0 FreeSans 1120 90 0 0 la_data_in[89]
+port 279 nsew signal input
+flabel metal2 s 154184 -800 154296 480 0 FreeSans 1120 90 0 0 la_data_in[8]
+port 280 nsew signal input
+flabel metal2 s 444956 -800 445068 480 0 FreeSans 1120 90 0 0 la_data_in[90]
+port 281 nsew signal input
+flabel metal2 s 448502 -800 448614 480 0 FreeSans 1120 90 0 0 la_data_in[91]
+port 282 nsew signal input
+flabel metal2 s 452048 -800 452160 480 0 FreeSans 1120 90 0 0 la_data_in[92]
+port 283 nsew signal input
+flabel metal2 s 455594 -800 455706 480 0 FreeSans 1120 90 0 0 la_data_in[93]
+port 284 nsew signal input
+flabel metal2 s 459140 -800 459252 480 0 FreeSans 1120 90 0 0 la_data_in[94]
+port 285 nsew signal input
+flabel metal2 s 462686 -800 462798 480 0 FreeSans 1120 90 0 0 la_data_in[95]
+port 286 nsew signal input
+flabel metal2 s 466232 -800 466344 480 0 FreeSans 1120 90 0 0 la_data_in[96]
+port 287 nsew signal input
+flabel metal2 s 469778 -800 469890 480 0 FreeSans 1120 90 0 0 la_data_in[97]
+port 288 nsew signal input
+flabel metal2 s 473324 -800 473436 480 0 FreeSans 1120 90 0 0 la_data_in[98]
+port 289 nsew signal input
+flabel metal2 s 476870 -800 476982 480 0 FreeSans 1120 90 0 0 la_data_in[99]
+port 290 nsew signal input
+flabel metal2 s 157730 -800 157842 480 0 FreeSans 1120 90 0 0 la_data_in[9]
+port 291 nsew signal input
+flabel metal2 s 126998 -800 127110 480 0 FreeSans 1120 90 0 0 la_data_out[0]
+port 292 nsew signal tristate
+flabel metal2 s 481598 -800 481710 480 0 FreeSans 1120 90 0 0 la_data_out[100]
+port 293 nsew signal tristate
+flabel metal2 s 485144 -800 485256 480 0 FreeSans 1120 90 0 0 la_data_out[101]
+port 294 nsew signal tristate
+flabel metal2 s 488690 -800 488802 480 0 FreeSans 1120 90 0 0 la_data_out[102]
+port 295 nsew signal tristate
+flabel metal2 s 492236 -800 492348 480 0 FreeSans 1120 90 0 0 la_data_out[103]
+port 296 nsew signal tristate
+flabel metal2 s 495782 -800 495894 480 0 FreeSans 1120 90 0 0 la_data_out[104]
+port 297 nsew signal tristate
+flabel metal2 s 499328 -800 499440 480 0 FreeSans 1120 90 0 0 la_data_out[105]
+port 298 nsew signal tristate
+flabel metal2 s 502874 -800 502986 480 0 FreeSans 1120 90 0 0 la_data_out[106]
+port 299 nsew signal tristate
+flabel metal2 s 506420 -800 506532 480 0 FreeSans 1120 90 0 0 la_data_out[107]
+port 300 nsew signal tristate
+flabel metal2 s 509966 -800 510078 480 0 FreeSans 1120 90 0 0 la_data_out[108]
+port 301 nsew signal tristate
+flabel metal2 s 513512 -800 513624 480 0 FreeSans 1120 90 0 0 la_data_out[109]
+port 302 nsew signal tristate
+flabel metal2 s 162458 -800 162570 480 0 FreeSans 1120 90 0 0 la_data_out[10]
+port 303 nsew signal tristate
+flabel metal2 s 517058 -800 517170 480 0 FreeSans 1120 90 0 0 la_data_out[110]
+port 304 nsew signal tristate
+flabel metal2 s 520604 -800 520716 480 0 FreeSans 1120 90 0 0 la_data_out[111]
+port 305 nsew signal tristate
+flabel metal2 s 524150 -800 524262 480 0 FreeSans 1120 90 0 0 la_data_out[112]
+port 306 nsew signal tristate
+flabel metal2 s 527696 -800 527808 480 0 FreeSans 1120 90 0 0 la_data_out[113]
+port 307 nsew signal tristate
+flabel metal2 s 531242 -800 531354 480 0 FreeSans 1120 90 0 0 la_data_out[114]
+port 308 nsew signal tristate
+flabel metal2 s 534788 -800 534900 480 0 FreeSans 1120 90 0 0 la_data_out[115]
+port 309 nsew signal tristate
+flabel metal2 s 538334 -800 538446 480 0 FreeSans 1120 90 0 0 la_data_out[116]
+port 310 nsew signal tristate
+flabel metal2 s 541880 -800 541992 480 0 FreeSans 1120 90 0 0 la_data_out[117]
+port 311 nsew signal tristate
+flabel metal2 s 545426 -800 545538 480 0 FreeSans 1120 90 0 0 la_data_out[118]
+port 312 nsew signal tristate
+flabel metal2 s 548972 -800 549084 480 0 FreeSans 1120 90 0 0 la_data_out[119]
+port 313 nsew signal tristate
+flabel metal2 s 166004 -800 166116 480 0 FreeSans 1120 90 0 0 la_data_out[11]
+port 314 nsew signal tristate
+flabel metal2 s 552518 -800 552630 480 0 FreeSans 1120 90 0 0 la_data_out[120]
+port 315 nsew signal tristate
+flabel metal2 s 556064 -800 556176 480 0 FreeSans 1120 90 0 0 la_data_out[121]
+port 316 nsew signal tristate
+flabel metal2 s 559610 -800 559722 480 0 FreeSans 1120 90 0 0 la_data_out[122]
+port 317 nsew signal tristate
+flabel metal2 s 563156 -800 563268 480 0 FreeSans 1120 90 0 0 la_data_out[123]
+port 318 nsew signal tristate
+flabel metal2 s 566702 -800 566814 480 0 FreeSans 1120 90 0 0 la_data_out[124]
+port 319 nsew signal tristate
+flabel metal2 s 570248 -800 570360 480 0 FreeSans 1120 90 0 0 la_data_out[125]
+port 320 nsew signal tristate
+flabel metal2 s 573794 -800 573906 480 0 FreeSans 1120 90 0 0 la_data_out[126]
+port 321 nsew signal tristate
+flabel metal2 s 577340 -800 577452 480 0 FreeSans 1120 90 0 0 la_data_out[127]
+port 322 nsew signal tristate
+flabel metal2 s 169550 -800 169662 480 0 FreeSans 1120 90 0 0 la_data_out[12]
+port 323 nsew signal tristate
+flabel metal2 s 173096 -800 173208 480 0 FreeSans 1120 90 0 0 la_data_out[13]
+port 324 nsew signal tristate
+flabel metal2 s 176642 -800 176754 480 0 FreeSans 1120 90 0 0 la_data_out[14]
+port 325 nsew signal tristate
+flabel metal2 s 180188 -800 180300 480 0 FreeSans 1120 90 0 0 la_data_out[15]
+port 326 nsew signal tristate
+flabel metal2 s 183734 -800 183846 480 0 FreeSans 1120 90 0 0 la_data_out[16]
+port 327 nsew signal tristate
+flabel metal2 s 187280 -800 187392 480 0 FreeSans 1120 90 0 0 la_data_out[17]
+port 328 nsew signal tristate
+flabel metal2 s 190826 -800 190938 480 0 FreeSans 1120 90 0 0 la_data_out[18]
+port 329 nsew signal tristate
+flabel metal2 s 194372 -800 194484 480 0 FreeSans 1120 90 0 0 la_data_out[19]
+port 330 nsew signal tristate
+flabel metal2 s 130544 -800 130656 480 0 FreeSans 1120 90 0 0 la_data_out[1]
+port 331 nsew signal tristate
+flabel metal2 s 197918 -800 198030 480 0 FreeSans 1120 90 0 0 la_data_out[20]
+port 332 nsew signal tristate
+flabel metal2 s 201464 -800 201576 480 0 FreeSans 1120 90 0 0 la_data_out[21]
+port 333 nsew signal tristate
+flabel metal2 s 205010 -800 205122 480 0 FreeSans 1120 90 0 0 la_data_out[22]
+port 334 nsew signal tristate
+flabel metal2 s 208556 -800 208668 480 0 FreeSans 1120 90 0 0 la_data_out[23]
+port 335 nsew signal tristate
+flabel metal2 s 212102 -800 212214 480 0 FreeSans 1120 90 0 0 la_data_out[24]
+port 336 nsew signal tristate
+flabel metal2 s 215648 -800 215760 480 0 FreeSans 1120 90 0 0 la_data_out[25]
+port 337 nsew signal tristate
+flabel metal2 s 219194 -800 219306 480 0 FreeSans 1120 90 0 0 la_data_out[26]
+port 338 nsew signal tristate
+flabel metal2 s 222740 -800 222852 480 0 FreeSans 1120 90 0 0 la_data_out[27]
+port 339 nsew signal tristate
+flabel metal2 s 226286 -800 226398 480 0 FreeSans 1120 90 0 0 la_data_out[28]
+port 340 nsew signal tristate
+flabel metal2 s 229832 -800 229944 480 0 FreeSans 1120 90 0 0 la_data_out[29]
+port 341 nsew signal tristate
+flabel metal2 s 134090 -800 134202 480 0 FreeSans 1120 90 0 0 la_data_out[2]
+port 342 nsew signal tristate
+flabel metal2 s 233378 -800 233490 480 0 FreeSans 1120 90 0 0 la_data_out[30]
+port 343 nsew signal tristate
+flabel metal2 s 236924 -800 237036 480 0 FreeSans 1120 90 0 0 la_data_out[31]
+port 344 nsew signal tristate
+flabel metal2 s 240470 -800 240582 480 0 FreeSans 1120 90 0 0 la_data_out[32]
+port 345 nsew signal tristate
+flabel metal2 s 244016 -800 244128 480 0 FreeSans 1120 90 0 0 la_data_out[33]
+port 346 nsew signal tristate
+flabel metal2 s 247562 -800 247674 480 0 FreeSans 1120 90 0 0 la_data_out[34]
+port 347 nsew signal tristate
+flabel metal2 s 251108 -800 251220 480 0 FreeSans 1120 90 0 0 la_data_out[35]
+port 348 nsew signal tristate
+flabel metal2 s 254654 -800 254766 480 0 FreeSans 1120 90 0 0 la_data_out[36]
+port 349 nsew signal tristate
+flabel metal2 s 258200 -800 258312 480 0 FreeSans 1120 90 0 0 la_data_out[37]
+port 350 nsew signal tristate
+flabel metal2 s 261746 -800 261858 480 0 FreeSans 1120 90 0 0 la_data_out[38]
+port 351 nsew signal tristate
+flabel metal2 s 265292 -800 265404 480 0 FreeSans 1120 90 0 0 la_data_out[39]
+port 352 nsew signal tristate
+flabel metal2 s 137636 -800 137748 480 0 FreeSans 1120 90 0 0 la_data_out[3]
+port 353 nsew signal tristate
+flabel metal2 s 268838 -800 268950 480 0 FreeSans 1120 90 0 0 la_data_out[40]
+port 354 nsew signal tristate
+flabel metal2 s 272384 -800 272496 480 0 FreeSans 1120 90 0 0 la_data_out[41]
+port 355 nsew signal tristate
+flabel metal2 s 275930 -800 276042 480 0 FreeSans 1120 90 0 0 la_data_out[42]
+port 356 nsew signal tristate
+flabel metal2 s 279476 -800 279588 480 0 FreeSans 1120 90 0 0 la_data_out[43]
+port 357 nsew signal tristate
+flabel metal2 s 283022 -800 283134 480 0 FreeSans 1120 90 0 0 la_data_out[44]
+port 358 nsew signal tristate
+flabel metal2 s 286568 -800 286680 480 0 FreeSans 1120 90 0 0 la_data_out[45]
+port 359 nsew signal tristate
+flabel metal2 s 290114 -800 290226 480 0 FreeSans 1120 90 0 0 la_data_out[46]
+port 360 nsew signal tristate
+flabel metal2 s 293660 -800 293772 480 0 FreeSans 1120 90 0 0 la_data_out[47]
+port 361 nsew signal tristate
+flabel metal2 s 297206 -800 297318 480 0 FreeSans 1120 90 0 0 la_data_out[48]
+port 362 nsew signal tristate
+flabel metal2 s 300752 -800 300864 480 0 FreeSans 1120 90 0 0 la_data_out[49]
+port 363 nsew signal tristate
+flabel metal2 s 141182 -800 141294 480 0 FreeSans 1120 90 0 0 la_data_out[4]
+port 364 nsew signal tristate
+flabel metal2 s 304298 -800 304410 480 0 FreeSans 1120 90 0 0 la_data_out[50]
+port 365 nsew signal tristate
+flabel metal2 s 307844 -800 307956 480 0 FreeSans 1120 90 0 0 la_data_out[51]
+port 366 nsew signal tristate
+flabel metal2 s 311390 -800 311502 480 0 FreeSans 1120 90 0 0 la_data_out[52]
+port 367 nsew signal tristate
+flabel metal2 s 314936 -800 315048 480 0 FreeSans 1120 90 0 0 la_data_out[53]
+port 368 nsew signal tristate
+flabel metal2 s 318482 -800 318594 480 0 FreeSans 1120 90 0 0 la_data_out[54]
+port 369 nsew signal tristate
+flabel metal2 s 322028 -800 322140 480 0 FreeSans 1120 90 0 0 la_data_out[55]
+port 370 nsew signal tristate
+flabel metal2 s 325574 -800 325686 480 0 FreeSans 1120 90 0 0 la_data_out[56]
+port 371 nsew signal tristate
+flabel metal2 s 329120 -800 329232 480 0 FreeSans 1120 90 0 0 la_data_out[57]
+port 372 nsew signal tristate
+flabel metal2 s 332666 -800 332778 480 0 FreeSans 1120 90 0 0 la_data_out[58]
+port 373 nsew signal tristate
+flabel metal2 s 336212 -800 336324 480 0 FreeSans 1120 90 0 0 la_data_out[59]
+port 374 nsew signal tristate
+flabel metal2 s 144728 -800 144840 480 0 FreeSans 1120 90 0 0 la_data_out[5]
+port 375 nsew signal tristate
+flabel metal2 s 339758 -800 339870 480 0 FreeSans 1120 90 0 0 la_data_out[60]
+port 376 nsew signal tristate
+flabel metal2 s 343304 -800 343416 480 0 FreeSans 1120 90 0 0 la_data_out[61]
+port 377 nsew signal tristate
+flabel metal2 s 346850 -800 346962 480 0 FreeSans 1120 90 0 0 la_data_out[62]
+port 378 nsew signal tristate
+flabel metal2 s 350396 -800 350508 480 0 FreeSans 1120 90 0 0 la_data_out[63]
+port 379 nsew signal tristate
+flabel metal2 s 353942 -800 354054 480 0 FreeSans 1120 90 0 0 la_data_out[64]
+port 380 nsew signal tristate
+flabel metal2 s 357488 -800 357600 480 0 FreeSans 1120 90 0 0 la_data_out[65]
+port 381 nsew signal tristate
+flabel metal2 s 361034 -800 361146 480 0 FreeSans 1120 90 0 0 la_data_out[66]
+port 382 nsew signal tristate
+flabel metal2 s 364580 -800 364692 480 0 FreeSans 1120 90 0 0 la_data_out[67]
+port 383 nsew signal tristate
+flabel metal2 s 368126 -800 368238 480 0 FreeSans 1120 90 0 0 la_data_out[68]
+port 384 nsew signal tristate
+flabel metal2 s 371672 -800 371784 480 0 FreeSans 1120 90 0 0 la_data_out[69]
+port 385 nsew signal tristate
+flabel metal2 s 148274 -800 148386 480 0 FreeSans 1120 90 0 0 la_data_out[6]
+port 386 nsew signal tristate
+flabel metal2 s 375218 -800 375330 480 0 FreeSans 1120 90 0 0 la_data_out[70]
+port 387 nsew signal tristate
+flabel metal2 s 378764 -800 378876 480 0 FreeSans 1120 90 0 0 la_data_out[71]
+port 388 nsew signal tristate
+flabel metal2 s 382310 -800 382422 480 0 FreeSans 1120 90 0 0 la_data_out[72]
+port 389 nsew signal tristate
+flabel metal2 s 385856 -800 385968 480 0 FreeSans 1120 90 0 0 la_data_out[73]
+port 390 nsew signal tristate
+flabel metal2 s 389402 -800 389514 480 0 FreeSans 1120 90 0 0 la_data_out[74]
+port 391 nsew signal tristate
+flabel metal2 s 392948 -800 393060 480 0 FreeSans 1120 90 0 0 la_data_out[75]
+port 392 nsew signal tristate
+flabel metal2 s 396494 -800 396606 480 0 FreeSans 1120 90 0 0 la_data_out[76]
+port 393 nsew signal tristate
+flabel metal2 s 400040 -800 400152 480 0 FreeSans 1120 90 0 0 la_data_out[77]
+port 394 nsew signal tristate
+flabel metal2 s 403586 -800 403698 480 0 FreeSans 1120 90 0 0 la_data_out[78]
+port 395 nsew signal tristate
+flabel metal2 s 407132 -800 407244 480 0 FreeSans 1120 90 0 0 la_data_out[79]
+port 396 nsew signal tristate
+flabel metal2 s 151820 -800 151932 480 0 FreeSans 1120 90 0 0 la_data_out[7]
+port 397 nsew signal tristate
+flabel metal2 s 410678 -800 410790 480 0 FreeSans 1120 90 0 0 la_data_out[80]
+port 398 nsew signal tristate
+flabel metal2 s 414224 -800 414336 480 0 FreeSans 1120 90 0 0 la_data_out[81]
+port 399 nsew signal tristate
+flabel metal2 s 417770 -800 417882 480 0 FreeSans 1120 90 0 0 la_data_out[82]
+port 400 nsew signal tristate
+flabel metal2 s 421316 -800 421428 480 0 FreeSans 1120 90 0 0 la_data_out[83]
+port 401 nsew signal tristate
+flabel metal2 s 424862 -800 424974 480 0 FreeSans 1120 90 0 0 la_data_out[84]
+port 402 nsew signal tristate
+flabel metal2 s 428408 -800 428520 480 0 FreeSans 1120 90 0 0 la_data_out[85]
+port 403 nsew signal tristate
+flabel metal2 s 431954 -800 432066 480 0 FreeSans 1120 90 0 0 la_data_out[86]
+port 404 nsew signal tristate
+flabel metal2 s 435500 -800 435612 480 0 FreeSans 1120 90 0 0 la_data_out[87]
+port 405 nsew signal tristate
+flabel metal2 s 439046 -800 439158 480 0 FreeSans 1120 90 0 0 la_data_out[88]
+port 406 nsew signal tristate
+flabel metal2 s 442592 -800 442704 480 0 FreeSans 1120 90 0 0 la_data_out[89]
+port 407 nsew signal tristate
+flabel metal2 s 155366 -800 155478 480 0 FreeSans 1120 90 0 0 la_data_out[8]
+port 408 nsew signal tristate
+flabel metal2 s 446138 -800 446250 480 0 FreeSans 1120 90 0 0 la_data_out[90]
+port 409 nsew signal tristate
+flabel metal2 s 449684 -800 449796 480 0 FreeSans 1120 90 0 0 la_data_out[91]
+port 410 nsew signal tristate
+flabel metal2 s 453230 -800 453342 480 0 FreeSans 1120 90 0 0 la_data_out[92]
+port 411 nsew signal tristate
+flabel metal2 s 456776 -800 456888 480 0 FreeSans 1120 90 0 0 la_data_out[93]
+port 412 nsew signal tristate
+flabel metal2 s 460322 -800 460434 480 0 FreeSans 1120 90 0 0 la_data_out[94]
+port 413 nsew signal tristate
+flabel metal2 s 463868 -800 463980 480 0 FreeSans 1120 90 0 0 la_data_out[95]
+port 414 nsew signal tristate
+flabel metal2 s 467414 -800 467526 480 0 FreeSans 1120 90 0 0 la_data_out[96]
+port 415 nsew signal tristate
+flabel metal2 s 470960 -800 471072 480 0 FreeSans 1120 90 0 0 la_data_out[97]
+port 416 nsew signal tristate
+flabel metal2 s 474506 -800 474618 480 0 FreeSans 1120 90 0 0 la_data_out[98]
+port 417 nsew signal tristate
+flabel metal2 s 478052 -800 478164 480 0 FreeSans 1120 90 0 0 la_data_out[99]
+port 418 nsew signal tristate
+flabel metal2 s 158912 -800 159024 480 0 FreeSans 1120 90 0 0 la_data_out[9]
+port 419 nsew signal tristate
+flabel metal2 s 128180 -800 128292 480 0 FreeSans 1120 90 0 0 la_oenb[0]
+port 420 nsew signal input
+flabel metal2 s 482780 -800 482892 480 0 FreeSans 1120 90 0 0 la_oenb[100]
+port 421 nsew signal input
+flabel metal2 s 486326 -800 486438 480 0 FreeSans 1120 90 0 0 la_oenb[101]
+port 422 nsew signal input
+flabel metal2 s 489872 -800 489984 480 0 FreeSans 1120 90 0 0 la_oenb[102]
+port 423 nsew signal input
+flabel metal2 s 493418 -800 493530 480 0 FreeSans 1120 90 0 0 la_oenb[103]
+port 424 nsew signal input
+flabel metal2 s 496964 -800 497076 480 0 FreeSans 1120 90 0 0 la_oenb[104]
+port 425 nsew signal input
+flabel metal2 s 500510 -800 500622 480 0 FreeSans 1120 90 0 0 la_oenb[105]
+port 426 nsew signal input
+flabel metal2 s 504056 -800 504168 480 0 FreeSans 1120 90 0 0 la_oenb[106]
+port 427 nsew signal input
+flabel metal2 s 507602 -800 507714 480 0 FreeSans 1120 90 0 0 la_oenb[107]
+port 428 nsew signal input
+flabel metal2 s 511148 -800 511260 480 0 FreeSans 1120 90 0 0 la_oenb[108]
+port 429 nsew signal input
+flabel metal2 s 514694 -800 514806 480 0 FreeSans 1120 90 0 0 la_oenb[109]
+port 430 nsew signal input
+flabel metal2 s 163640 -800 163752 480 0 FreeSans 1120 90 0 0 la_oenb[10]
+port 431 nsew signal input
+flabel metal2 s 518240 -800 518352 480 0 FreeSans 1120 90 0 0 la_oenb[110]
+port 432 nsew signal input
+flabel metal2 s 521786 -800 521898 480 0 FreeSans 1120 90 0 0 la_oenb[111]
+port 433 nsew signal input
+flabel metal2 s 525332 -800 525444 480 0 FreeSans 1120 90 0 0 la_oenb[112]
+port 434 nsew signal input
+flabel metal2 s 528878 -800 528990 480 0 FreeSans 1120 90 0 0 la_oenb[113]
+port 435 nsew signal input
+flabel metal2 s 532424 -800 532536 480 0 FreeSans 1120 90 0 0 la_oenb[114]
+port 436 nsew signal input
+flabel metal2 s 535970 -800 536082 480 0 FreeSans 1120 90 0 0 la_oenb[115]
+port 437 nsew signal input
+flabel metal2 s 539516 -800 539628 480 0 FreeSans 1120 90 0 0 la_oenb[116]
+port 438 nsew signal input
+flabel metal2 s 543062 -800 543174 480 0 FreeSans 1120 90 0 0 la_oenb[117]
+port 439 nsew signal input
+flabel metal2 s 546608 -800 546720 480 0 FreeSans 1120 90 0 0 la_oenb[118]
+port 440 nsew signal input
+flabel metal2 s 550154 -800 550266 480 0 FreeSans 1120 90 0 0 la_oenb[119]
+port 441 nsew signal input
+flabel metal2 s 167186 -800 167298 480 0 FreeSans 1120 90 0 0 la_oenb[11]
+port 442 nsew signal input
+flabel metal2 s 553700 -800 553812 480 0 FreeSans 1120 90 0 0 la_oenb[120]
+port 443 nsew signal input
+flabel metal2 s 557246 -800 557358 480 0 FreeSans 1120 90 0 0 la_oenb[121]
+port 444 nsew signal input
+flabel metal2 s 560792 -800 560904 480 0 FreeSans 1120 90 0 0 la_oenb[122]
+port 445 nsew signal input
+flabel metal2 s 564338 -800 564450 480 0 FreeSans 1120 90 0 0 la_oenb[123]
+port 446 nsew signal input
+flabel metal2 s 567884 -800 567996 480 0 FreeSans 1120 90 0 0 la_oenb[124]
+port 447 nsew signal input
+flabel metal2 s 571430 -800 571542 480 0 FreeSans 1120 90 0 0 la_oenb[125]
+port 448 nsew signal input
+flabel metal2 s 574976 -800 575088 480 0 FreeSans 1120 90 0 0 la_oenb[126]
+port 449 nsew signal input
+flabel metal2 s 578522 -800 578634 480 0 FreeSans 1120 90 0 0 la_oenb[127]
+port 450 nsew signal input
+flabel metal2 s 170732 -800 170844 480 0 FreeSans 1120 90 0 0 la_oenb[12]
+port 451 nsew signal input
+flabel metal2 s 174278 -800 174390 480 0 FreeSans 1120 90 0 0 la_oenb[13]
+port 452 nsew signal input
+flabel metal2 s 177824 -800 177936 480 0 FreeSans 1120 90 0 0 la_oenb[14]
+port 453 nsew signal input
+flabel metal2 s 181370 -800 181482 480 0 FreeSans 1120 90 0 0 la_oenb[15]
+port 454 nsew signal input
+flabel metal2 s 184916 -800 185028 480 0 FreeSans 1120 90 0 0 la_oenb[16]
+port 455 nsew signal input
+flabel metal2 s 188462 -800 188574 480 0 FreeSans 1120 90 0 0 la_oenb[17]
+port 456 nsew signal input
+flabel metal2 s 192008 -800 192120 480 0 FreeSans 1120 90 0 0 la_oenb[18]
+port 457 nsew signal input
+flabel metal2 s 195554 -800 195666 480 0 FreeSans 1120 90 0 0 la_oenb[19]
+port 458 nsew signal input
+flabel metal2 s 131726 -800 131838 480 0 FreeSans 1120 90 0 0 la_oenb[1]
+port 459 nsew signal input
+flabel metal2 s 199100 -800 199212 480 0 FreeSans 1120 90 0 0 la_oenb[20]
+port 460 nsew signal input
+flabel metal2 s 202646 -800 202758 480 0 FreeSans 1120 90 0 0 la_oenb[21]
+port 461 nsew signal input
+flabel metal2 s 206192 -800 206304 480 0 FreeSans 1120 90 0 0 la_oenb[22]
+port 462 nsew signal input
+flabel metal2 s 209738 -800 209850 480 0 FreeSans 1120 90 0 0 la_oenb[23]
+port 463 nsew signal input
+flabel metal2 s 213284 -800 213396 480 0 FreeSans 1120 90 0 0 la_oenb[24]
+port 464 nsew signal input
+flabel metal2 s 216830 -800 216942 480 0 FreeSans 1120 90 0 0 la_oenb[25]
+port 465 nsew signal input
+flabel metal2 s 220376 -800 220488 480 0 FreeSans 1120 90 0 0 la_oenb[26]
+port 466 nsew signal input
+flabel metal2 s 223922 -800 224034 480 0 FreeSans 1120 90 0 0 la_oenb[27]
+port 467 nsew signal input
+flabel metal2 s 227468 -800 227580 480 0 FreeSans 1120 90 0 0 la_oenb[28]
+port 468 nsew signal input
+flabel metal2 s 231014 -800 231126 480 0 FreeSans 1120 90 0 0 la_oenb[29]
+port 469 nsew signal input
+flabel metal2 s 135272 -800 135384 480 0 FreeSans 1120 90 0 0 la_oenb[2]
+port 470 nsew signal input
+flabel metal2 s 234560 -800 234672 480 0 FreeSans 1120 90 0 0 la_oenb[30]
+port 471 nsew signal input
+flabel metal2 s 238106 -800 238218 480 0 FreeSans 1120 90 0 0 la_oenb[31]
+port 472 nsew signal input
+flabel metal2 s 241652 -800 241764 480 0 FreeSans 1120 90 0 0 la_oenb[32]
+port 473 nsew signal input
+flabel metal2 s 245198 -800 245310 480 0 FreeSans 1120 90 0 0 la_oenb[33]
+port 474 nsew signal input
+flabel metal2 s 248744 -800 248856 480 0 FreeSans 1120 90 0 0 la_oenb[34]
+port 475 nsew signal input
+flabel metal2 s 252290 -800 252402 480 0 FreeSans 1120 90 0 0 la_oenb[35]
+port 476 nsew signal input
+flabel metal2 s 255836 -800 255948 480 0 FreeSans 1120 90 0 0 la_oenb[36]
+port 477 nsew signal input
+flabel metal2 s 259382 -800 259494 480 0 FreeSans 1120 90 0 0 la_oenb[37]
+port 478 nsew signal input
+flabel metal2 s 262928 -800 263040 480 0 FreeSans 1120 90 0 0 la_oenb[38]
+port 479 nsew signal input
+flabel metal2 s 266474 -800 266586 480 0 FreeSans 1120 90 0 0 la_oenb[39]
+port 480 nsew signal input
+flabel metal2 s 138818 -800 138930 480 0 FreeSans 1120 90 0 0 la_oenb[3]
+port 481 nsew signal input
+flabel metal2 s 270020 -800 270132 480 0 FreeSans 1120 90 0 0 la_oenb[40]
+port 482 nsew signal input
+flabel metal2 s 273566 -800 273678 480 0 FreeSans 1120 90 0 0 la_oenb[41]
+port 483 nsew signal input
+flabel metal2 s 277112 -800 277224 480 0 FreeSans 1120 90 0 0 la_oenb[42]
+port 484 nsew signal input
+flabel metal2 s 280658 -800 280770 480 0 FreeSans 1120 90 0 0 la_oenb[43]
+port 485 nsew signal input
+flabel metal2 s 284204 -800 284316 480 0 FreeSans 1120 90 0 0 la_oenb[44]
+port 486 nsew signal input
+flabel metal2 s 287750 -800 287862 480 0 FreeSans 1120 90 0 0 la_oenb[45]
+port 487 nsew signal input
+flabel metal2 s 291296 -800 291408 480 0 FreeSans 1120 90 0 0 la_oenb[46]
+port 488 nsew signal input
+flabel metal2 s 294842 -800 294954 480 0 FreeSans 1120 90 0 0 la_oenb[47]
+port 489 nsew signal input
+flabel metal2 s 298388 -800 298500 480 0 FreeSans 1120 90 0 0 la_oenb[48]
+port 490 nsew signal input
+flabel metal2 s 301934 -800 302046 480 0 FreeSans 1120 90 0 0 la_oenb[49]
+port 491 nsew signal input
+flabel metal2 s 142364 -800 142476 480 0 FreeSans 1120 90 0 0 la_oenb[4]
+port 492 nsew signal input
+flabel metal2 s 305480 -800 305592 480 0 FreeSans 1120 90 0 0 la_oenb[50]
+port 493 nsew signal input
+flabel metal2 s 309026 -800 309138 480 0 FreeSans 1120 90 0 0 la_oenb[51]
+port 494 nsew signal input
+flabel metal2 s 312572 -800 312684 480 0 FreeSans 1120 90 0 0 la_oenb[52]
+port 495 nsew signal input
+flabel metal2 s 316118 -800 316230 480 0 FreeSans 1120 90 0 0 la_oenb[53]
+port 496 nsew signal input
+flabel metal2 s 319664 -800 319776 480 0 FreeSans 1120 90 0 0 la_oenb[54]
+port 497 nsew signal input
+flabel metal2 s 323210 -800 323322 480 0 FreeSans 1120 90 0 0 la_oenb[55]
+port 498 nsew signal input
+flabel metal2 s 326756 -800 326868 480 0 FreeSans 1120 90 0 0 la_oenb[56]
+port 499 nsew signal input
+flabel metal2 s 330302 -800 330414 480 0 FreeSans 1120 90 0 0 la_oenb[57]
+port 500 nsew signal input
+flabel metal2 s 333848 -800 333960 480 0 FreeSans 1120 90 0 0 la_oenb[58]
+port 501 nsew signal input
+flabel metal2 s 337394 -800 337506 480 0 FreeSans 1120 90 0 0 la_oenb[59]
+port 502 nsew signal input
+flabel metal2 s 145910 -800 146022 480 0 FreeSans 1120 90 0 0 la_oenb[5]
+port 503 nsew signal input
+flabel metal2 s 340940 -800 341052 480 0 FreeSans 1120 90 0 0 la_oenb[60]
+port 504 nsew signal input
+flabel metal2 s 344486 -800 344598 480 0 FreeSans 1120 90 0 0 la_oenb[61]
+port 505 nsew signal input
+flabel metal2 s 348032 -800 348144 480 0 FreeSans 1120 90 0 0 la_oenb[62]
+port 506 nsew signal input
+flabel metal2 s 351578 -800 351690 480 0 FreeSans 1120 90 0 0 la_oenb[63]
+port 507 nsew signal input
+flabel metal2 s 355124 -800 355236 480 0 FreeSans 1120 90 0 0 la_oenb[64]
+port 508 nsew signal input
+flabel metal2 s 358670 -800 358782 480 0 FreeSans 1120 90 0 0 la_oenb[65]
+port 509 nsew signal input
+flabel metal2 s 362216 -800 362328 480 0 FreeSans 1120 90 0 0 la_oenb[66]
+port 510 nsew signal input
+flabel metal2 s 365762 -800 365874 480 0 FreeSans 1120 90 0 0 la_oenb[67]
+port 511 nsew signal input
+flabel metal2 s 369308 -800 369420 480 0 FreeSans 1120 90 0 0 la_oenb[68]
+port 512 nsew signal input
+flabel metal2 s 372854 -800 372966 480 0 FreeSans 1120 90 0 0 la_oenb[69]
+port 513 nsew signal input
+flabel metal2 s 149456 -800 149568 480 0 FreeSans 1120 90 0 0 la_oenb[6]
+port 514 nsew signal input
+flabel metal2 s 376400 -800 376512 480 0 FreeSans 1120 90 0 0 la_oenb[70]
+port 515 nsew signal input
+flabel metal2 s 379946 -800 380058 480 0 FreeSans 1120 90 0 0 la_oenb[71]
+port 516 nsew signal input
+flabel metal2 s 383492 -800 383604 480 0 FreeSans 1120 90 0 0 la_oenb[72]
+port 517 nsew signal input
+flabel metal2 s 387038 -800 387150 480 0 FreeSans 1120 90 0 0 la_oenb[73]
+port 518 nsew signal input
+flabel metal2 s 390584 -800 390696 480 0 FreeSans 1120 90 0 0 la_oenb[74]
+port 519 nsew signal input
+flabel metal2 s 394130 -800 394242 480 0 FreeSans 1120 90 0 0 la_oenb[75]
+port 520 nsew signal input
+flabel metal2 s 397676 -800 397788 480 0 FreeSans 1120 90 0 0 la_oenb[76]
+port 521 nsew signal input
+flabel metal2 s 401222 -800 401334 480 0 FreeSans 1120 90 0 0 la_oenb[77]
+port 522 nsew signal input
+flabel metal2 s 404768 -800 404880 480 0 FreeSans 1120 90 0 0 la_oenb[78]
+port 523 nsew signal input
+flabel metal2 s 408314 -800 408426 480 0 FreeSans 1120 90 0 0 la_oenb[79]
+port 524 nsew signal input
+flabel metal2 s 153002 -800 153114 480 0 FreeSans 1120 90 0 0 la_oenb[7]
+port 525 nsew signal input
+flabel metal2 s 411860 -800 411972 480 0 FreeSans 1120 90 0 0 la_oenb[80]
+port 526 nsew signal input
+flabel metal2 s 415406 -800 415518 480 0 FreeSans 1120 90 0 0 la_oenb[81]
+port 527 nsew signal input
+flabel metal2 s 418952 -800 419064 480 0 FreeSans 1120 90 0 0 la_oenb[82]
+port 528 nsew signal input
+flabel metal2 s 422498 -800 422610 480 0 FreeSans 1120 90 0 0 la_oenb[83]
+port 529 nsew signal input
+flabel metal2 s 426044 -800 426156 480 0 FreeSans 1120 90 0 0 la_oenb[84]
+port 530 nsew signal input
+flabel metal2 s 429590 -800 429702 480 0 FreeSans 1120 90 0 0 la_oenb[85]
+port 531 nsew signal input
+flabel metal2 s 433136 -800 433248 480 0 FreeSans 1120 90 0 0 la_oenb[86]
+port 532 nsew signal input
+flabel metal2 s 436682 -800 436794 480 0 FreeSans 1120 90 0 0 la_oenb[87]
+port 533 nsew signal input
+flabel metal2 s 440228 -800 440340 480 0 FreeSans 1120 90 0 0 la_oenb[88]
+port 534 nsew signal input
+flabel metal2 s 443774 -800 443886 480 0 FreeSans 1120 90 0 0 la_oenb[89]
+port 535 nsew signal input
+flabel metal2 s 156548 -800 156660 480 0 FreeSans 1120 90 0 0 la_oenb[8]
+port 536 nsew signal input
+flabel metal2 s 447320 -800 447432 480 0 FreeSans 1120 90 0 0 la_oenb[90]
+port 537 nsew signal input
+flabel metal2 s 450866 -800 450978 480 0 FreeSans 1120 90 0 0 la_oenb[91]
+port 538 nsew signal input
+flabel metal2 s 454412 -800 454524 480 0 FreeSans 1120 90 0 0 la_oenb[92]
+port 539 nsew signal input
+flabel metal2 s 457958 -800 458070 480 0 FreeSans 1120 90 0 0 la_oenb[93]
+port 540 nsew signal input
+flabel metal2 s 461504 -800 461616 480 0 FreeSans 1120 90 0 0 la_oenb[94]
+port 541 nsew signal input
+flabel metal2 s 465050 -800 465162 480 0 FreeSans 1120 90 0 0 la_oenb[95]
+port 542 nsew signal input
+flabel metal2 s 468596 -800 468708 480 0 FreeSans 1120 90 0 0 la_oenb[96]
+port 543 nsew signal input
+flabel metal2 s 472142 -800 472254 480 0 FreeSans 1120 90 0 0 la_oenb[97]
+port 544 nsew signal input
+flabel metal2 s 475688 -800 475800 480 0 FreeSans 1120 90 0 0 la_oenb[98]
+port 545 nsew signal input
+flabel metal2 s 479234 -800 479346 480 0 FreeSans 1120 90 0 0 la_oenb[99]
+port 546 nsew signal input
+flabel metal2 s 160094 -800 160206 480 0 FreeSans 1120 90 0 0 la_oenb[9]
+port 547 nsew signal input
+flabel metal2 s 579704 -800 579816 480 0 FreeSans 1120 90 0 0 user_clock2
+port 548 nsew signal input
+flabel metal2 s 580886 -800 580998 480 0 FreeSans 1120 90 0 0 user_irq[0]
+port 549 nsew signal tristate
+flabel metal2 s 582068 -800 582180 480 0 FreeSans 1120 90 0 0 user_irq[1]
+port 550 nsew signal tristate
+flabel metal2 s 583250 -800 583362 480 0 FreeSans 1120 90 0 0 user_irq[2]
+port 551 nsew signal tristate
+flabel metal3 s 582340 639784 584800 644584 0 FreeSans 1120 0 0 0 vccd1
+port 552 nsew signal bidirectional
+flabel metal3 s 582340 629784 584800 634584 0 FreeSans 1120 0 0 0 vccd1
+port 553 nsew signal bidirectional
+flabel metal3 s 0 643842 1660 648642 0 FreeSans 1120 0 0 0 vccd2
+port 554 nsew signal bidirectional
+flabel metal3 s 0 633842 1660 638642 0 FreeSans 1120 0 0 0 vccd2
+port 555 nsew signal bidirectional
+flabel metal3 s 582340 540562 584800 545362 0 FreeSans 1120 0 0 0 vdda1
+port 556 nsew signal bidirectional
+flabel metal3 s 582340 550562 584800 555362 0 FreeSans 1120 0 0 0 vdda1
+port 557 nsew signal bidirectional
+flabel metal3 s 582340 235230 584800 240030 0 FreeSans 1120 0 0 0 vdda1
+port 558 nsew signal bidirectional
+flabel metal3 s 582340 225230 584800 230030 0 FreeSans 1120 0 0 0 vdda1
+port 559 nsew signal bidirectional
+flabel metal3 s 0 204888 1660 209688 0 FreeSans 1120 0 0 0 vdda2
+port 560 nsew signal bidirectional
+flabel metal3 s 0 214888 1660 219688 0 FreeSans 1120 0 0 0 vdda2
+port 561 nsew signal bidirectional
+flabel metal3 s 520594 702340 525394 704800 0 FreeSans 1920 180 0 0 vssa1
+port 562 nsew signal bidirectional
+flabel metal3 s 510594 702340 515394 704800 0 FreeSans 1920 180 0 0 vssa1
+port 563 nsew signal bidirectional
+flabel metal3 s 582340 146830 584800 151630 0 FreeSans 1120 0 0 0 vssa1
+port 564 nsew signal bidirectional
+flabel metal3 s 582340 136830 584800 141630 0 FreeSans 1120 0 0 0 vssa1
+port 565 nsew signal bidirectional
+flabel metal3 s 0 559442 1660 564242 0 FreeSans 1120 0 0 0 vssa2
+port 566 nsew signal bidirectional
+flabel metal3 s 582340 191430 584800 196230 0 FreeSans 1120 0 0 0 vssd1
+port 568 nsew signal bidirectional
+flabel metal3 s 582340 181430 584800 186230 0 FreeSans 1120 0 0 0 vssd1
+port 569 nsew signal bidirectional
+flabel metal3 s 0 172888 1660 177688 0 FreeSans 1120 0 0 0 vssd2
+port 570 nsew signal bidirectional
+flabel metal3 s 0 162888 1660 167688 0 FreeSans 1120 0 0 0 vssd2
+port 571 nsew signal bidirectional
+flabel metal2 s 524 -800 636 480 0 FreeSans 1120 90 0 0 wb_clk_i
+port 572 nsew signal input
+flabel metal2 s 1706 -800 1818 480 0 FreeSans 1120 90 0 0 wb_rst_i
+port 573 nsew signal input
+flabel metal2 s 2888 -800 3000 480 0 FreeSans 1120 90 0 0 wbs_ack_o
+port 574 nsew signal tristate
+flabel metal2 s 7616 -800 7728 480 0 FreeSans 1120 90 0 0 wbs_adr_i[0]
+port 575 nsew signal input
+flabel metal2 s 47804 -800 47916 480 0 FreeSans 1120 90 0 0 wbs_adr_i[10]
+port 576 nsew signal input
+flabel metal2 s 51350 -800 51462 480 0 FreeSans 1120 90 0 0 wbs_adr_i[11]
+port 577 nsew signal input
+flabel metal2 s 54896 -800 55008 480 0 FreeSans 1120 90 0 0 wbs_adr_i[12]
+port 578 nsew signal input
+flabel metal2 s 58442 -800 58554 480 0 FreeSans 1120 90 0 0 wbs_adr_i[13]
+port 579 nsew signal input
+flabel metal2 s 61988 -800 62100 480 0 FreeSans 1120 90 0 0 wbs_adr_i[14]
+port 580 nsew signal input
+flabel metal2 s 65534 -800 65646 480 0 FreeSans 1120 90 0 0 wbs_adr_i[15]
+port 581 nsew signal input
+flabel metal2 s 69080 -800 69192 480 0 FreeSans 1120 90 0 0 wbs_adr_i[16]
+port 582 nsew signal input
+flabel metal2 s 72626 -800 72738 480 0 FreeSans 1120 90 0 0 wbs_adr_i[17]
+port 583 nsew signal input
+flabel metal2 s 76172 -800 76284 480 0 FreeSans 1120 90 0 0 wbs_adr_i[18]
+port 584 nsew signal input
+flabel metal2 s 79718 -800 79830 480 0 FreeSans 1120 90 0 0 wbs_adr_i[19]
+port 585 nsew signal input
+flabel metal2 s 12344 -800 12456 480 0 FreeSans 1120 90 0 0 wbs_adr_i[1]
+port 586 nsew signal input
+flabel metal2 s 83264 -800 83376 480 0 FreeSans 1120 90 0 0 wbs_adr_i[20]
+port 587 nsew signal input
+flabel metal2 s 86810 -800 86922 480 0 FreeSans 1120 90 0 0 wbs_adr_i[21]
+port 588 nsew signal input
+flabel metal2 s 90356 -800 90468 480 0 FreeSans 1120 90 0 0 wbs_adr_i[22]
+port 589 nsew signal input
+flabel metal2 s 93902 -800 94014 480 0 FreeSans 1120 90 0 0 wbs_adr_i[23]
+port 590 nsew signal input
+flabel metal2 s 97448 -800 97560 480 0 FreeSans 1120 90 0 0 wbs_adr_i[24]
+port 591 nsew signal input
+flabel metal2 s 100994 -800 101106 480 0 FreeSans 1120 90 0 0 wbs_adr_i[25]
+port 592 nsew signal input
+flabel metal2 s 104540 -800 104652 480 0 FreeSans 1120 90 0 0 wbs_adr_i[26]
+port 593 nsew signal input
+flabel metal2 s 108086 -800 108198 480 0 FreeSans 1120 90 0 0 wbs_adr_i[27]
+port 594 nsew signal input
+flabel metal2 s 111632 -800 111744 480 0 FreeSans 1120 90 0 0 wbs_adr_i[28]
+port 595 nsew signal input
+flabel metal2 s 115178 -800 115290 480 0 FreeSans 1120 90 0 0 wbs_adr_i[29]
+port 596 nsew signal input
+flabel metal2 s 17072 -800 17184 480 0 FreeSans 1120 90 0 0 wbs_adr_i[2]
+port 597 nsew signal input
+flabel metal2 s 118724 -800 118836 480 0 FreeSans 1120 90 0 0 wbs_adr_i[30]
+port 598 nsew signal input
+flabel metal2 s 122270 -800 122382 480 0 FreeSans 1120 90 0 0 wbs_adr_i[31]
+port 599 nsew signal input
+flabel metal2 s 21800 -800 21912 480 0 FreeSans 1120 90 0 0 wbs_adr_i[3]
+port 600 nsew signal input
+flabel metal2 s 26528 -800 26640 480 0 FreeSans 1120 90 0 0 wbs_adr_i[4]
+port 601 nsew signal input
+flabel metal2 s 30074 -800 30186 480 0 FreeSans 1120 90 0 0 wbs_adr_i[5]
+port 602 nsew signal input
+flabel metal2 s 33620 -800 33732 480 0 FreeSans 1120 90 0 0 wbs_adr_i[6]
+port 603 nsew signal input
+flabel metal2 s 37166 -800 37278 480 0 FreeSans 1120 90 0 0 wbs_adr_i[7]
+port 604 nsew signal input
+flabel metal2 s 40712 -800 40824 480 0 FreeSans 1120 90 0 0 wbs_adr_i[8]
+port 605 nsew signal input
+flabel metal2 s 44258 -800 44370 480 0 FreeSans 1120 90 0 0 wbs_adr_i[9]
+port 606 nsew signal input
+flabel metal2 s 4070 -800 4182 480 0 FreeSans 1120 90 0 0 wbs_cyc_i
+port 607 nsew signal input
+flabel metal2 s 8798 -800 8910 480 0 FreeSans 1120 90 0 0 wbs_dat_i[0]
+port 608 nsew signal input
+flabel metal2 s 48986 -800 49098 480 0 FreeSans 1120 90 0 0 wbs_dat_i[10]
+port 609 nsew signal input
+flabel metal2 s 52532 -800 52644 480 0 FreeSans 1120 90 0 0 wbs_dat_i[11]
+port 610 nsew signal input
+flabel metal2 s 56078 -800 56190 480 0 FreeSans 1120 90 0 0 wbs_dat_i[12]
+port 611 nsew signal input
+flabel metal2 s 59624 -800 59736 480 0 FreeSans 1120 90 0 0 wbs_dat_i[13]
+port 612 nsew signal input
+flabel metal2 s 63170 -800 63282 480 0 FreeSans 1120 90 0 0 wbs_dat_i[14]
+port 613 nsew signal input
+flabel metal2 s 66716 -800 66828 480 0 FreeSans 1120 90 0 0 wbs_dat_i[15]
+port 614 nsew signal input
+flabel metal2 s 70262 -800 70374 480 0 FreeSans 1120 90 0 0 wbs_dat_i[16]
+port 615 nsew signal input
+flabel metal2 s 73808 -800 73920 480 0 FreeSans 1120 90 0 0 wbs_dat_i[17]
+port 616 nsew signal input
+flabel metal2 s 77354 -800 77466 480 0 FreeSans 1120 90 0 0 wbs_dat_i[18]
+port 617 nsew signal input
+flabel metal2 s 80900 -800 81012 480 0 FreeSans 1120 90 0 0 wbs_dat_i[19]
+port 618 nsew signal input
+flabel metal2 s 13526 -800 13638 480 0 FreeSans 1120 90 0 0 wbs_dat_i[1]
+port 619 nsew signal input
+flabel metal2 s 84446 -800 84558 480 0 FreeSans 1120 90 0 0 wbs_dat_i[20]
+port 620 nsew signal input
+flabel metal2 s 87992 -800 88104 480 0 FreeSans 1120 90 0 0 wbs_dat_i[21]
+port 621 nsew signal input
+flabel metal2 s 91538 -800 91650 480 0 FreeSans 1120 90 0 0 wbs_dat_i[22]
+port 622 nsew signal input
+flabel metal2 s 95084 -800 95196 480 0 FreeSans 1120 90 0 0 wbs_dat_i[23]
+port 623 nsew signal input
+flabel metal2 s 98630 -800 98742 480 0 FreeSans 1120 90 0 0 wbs_dat_i[24]
+port 624 nsew signal input
+flabel metal2 s 102176 -800 102288 480 0 FreeSans 1120 90 0 0 wbs_dat_i[25]
+port 625 nsew signal input
+flabel metal2 s 105722 -800 105834 480 0 FreeSans 1120 90 0 0 wbs_dat_i[26]
+port 626 nsew signal input
+flabel metal2 s 109268 -800 109380 480 0 FreeSans 1120 90 0 0 wbs_dat_i[27]
+port 627 nsew signal input
+flabel metal2 s 112814 -800 112926 480 0 FreeSans 1120 90 0 0 wbs_dat_i[28]
+port 628 nsew signal input
+flabel metal2 s 116360 -800 116472 480 0 FreeSans 1120 90 0 0 wbs_dat_i[29]
+port 629 nsew signal input
+flabel metal2 s 18254 -800 18366 480 0 FreeSans 1120 90 0 0 wbs_dat_i[2]
+port 630 nsew signal input
+flabel metal2 s 119906 -800 120018 480 0 FreeSans 1120 90 0 0 wbs_dat_i[30]
+port 631 nsew signal input
+flabel metal2 s 123452 -800 123564 480 0 FreeSans 1120 90 0 0 wbs_dat_i[31]
+port 632 nsew signal input
+flabel metal2 s 22982 -800 23094 480 0 FreeSans 1120 90 0 0 wbs_dat_i[3]
+port 633 nsew signal input
+flabel metal2 s 27710 -800 27822 480 0 FreeSans 1120 90 0 0 wbs_dat_i[4]
+port 634 nsew signal input
+flabel metal2 s 31256 -800 31368 480 0 FreeSans 1120 90 0 0 wbs_dat_i[5]
+port 635 nsew signal input
+flabel metal2 s 34802 -800 34914 480 0 FreeSans 1120 90 0 0 wbs_dat_i[6]
+port 636 nsew signal input
+flabel metal2 s 38348 -800 38460 480 0 FreeSans 1120 90 0 0 wbs_dat_i[7]
+port 637 nsew signal input
+flabel metal2 s 41894 -800 42006 480 0 FreeSans 1120 90 0 0 wbs_dat_i[8]
+port 638 nsew signal input
+flabel metal2 s 45440 -800 45552 480 0 FreeSans 1120 90 0 0 wbs_dat_i[9]
+port 639 nsew signal input
+flabel metal2 s 9980 -800 10092 480 0 FreeSans 1120 90 0 0 wbs_dat_o[0]
+port 640 nsew signal tristate
+flabel metal2 s 50168 -800 50280 480 0 FreeSans 1120 90 0 0 wbs_dat_o[10]
+port 641 nsew signal tristate
+flabel metal2 s 53714 -800 53826 480 0 FreeSans 1120 90 0 0 wbs_dat_o[11]
+port 642 nsew signal tristate
+flabel metal2 s 57260 -800 57372 480 0 FreeSans 1120 90 0 0 wbs_dat_o[12]
+port 643 nsew signal tristate
+flabel metal2 s 60806 -800 60918 480 0 FreeSans 1120 90 0 0 wbs_dat_o[13]
+port 644 nsew signal tristate
+flabel metal2 s 64352 -800 64464 480 0 FreeSans 1120 90 0 0 wbs_dat_o[14]
+port 645 nsew signal tristate
+flabel metal2 s 67898 -800 68010 480 0 FreeSans 1120 90 0 0 wbs_dat_o[15]
+port 646 nsew signal tristate
+flabel metal2 s 71444 -800 71556 480 0 FreeSans 1120 90 0 0 wbs_dat_o[16]
+port 647 nsew signal tristate
+flabel metal2 s 74990 -800 75102 480 0 FreeSans 1120 90 0 0 wbs_dat_o[17]
+port 648 nsew signal tristate
+flabel metal2 s 78536 -800 78648 480 0 FreeSans 1120 90 0 0 wbs_dat_o[18]
+port 649 nsew signal tristate
+flabel metal2 s 82082 -800 82194 480 0 FreeSans 1120 90 0 0 wbs_dat_o[19]
+port 650 nsew signal tristate
+flabel metal2 s 14708 -800 14820 480 0 FreeSans 1120 90 0 0 wbs_dat_o[1]
+port 651 nsew signal tristate
+flabel metal2 s 85628 -800 85740 480 0 FreeSans 1120 90 0 0 wbs_dat_o[20]
+port 652 nsew signal tristate
+flabel metal2 s 89174 -800 89286 480 0 FreeSans 1120 90 0 0 wbs_dat_o[21]
+port 653 nsew signal tristate
+flabel metal2 s 92720 -800 92832 480 0 FreeSans 1120 90 0 0 wbs_dat_o[22]
+port 654 nsew signal tristate
+flabel metal2 s 96266 -800 96378 480 0 FreeSans 1120 90 0 0 wbs_dat_o[23]
+port 655 nsew signal tristate
+flabel metal2 s 99812 -800 99924 480 0 FreeSans 1120 90 0 0 wbs_dat_o[24]
+port 656 nsew signal tristate
+flabel metal2 s 103358 -800 103470 480 0 FreeSans 1120 90 0 0 wbs_dat_o[25]
+port 657 nsew signal tristate
+flabel metal2 s 106904 -800 107016 480 0 FreeSans 1120 90 0 0 wbs_dat_o[26]
+port 658 nsew signal tristate
+flabel metal2 s 110450 -800 110562 480 0 FreeSans 1120 90 0 0 wbs_dat_o[27]
+port 659 nsew signal tristate
+flabel metal2 s 113996 -800 114108 480 0 FreeSans 1120 90 0 0 wbs_dat_o[28]
+port 660 nsew signal tristate
+flabel metal2 s 117542 -800 117654 480 0 FreeSans 1120 90 0 0 wbs_dat_o[29]
+port 661 nsew signal tristate
+flabel metal2 s 19436 -800 19548 480 0 FreeSans 1120 90 0 0 wbs_dat_o[2]
+port 662 nsew signal tristate
+flabel metal2 s 121088 -800 121200 480 0 FreeSans 1120 90 0 0 wbs_dat_o[30]
+port 663 nsew signal tristate
+flabel metal2 s 124634 -800 124746 480 0 FreeSans 1120 90 0 0 wbs_dat_o[31]
+port 664 nsew signal tristate
+flabel metal2 s 24164 -800 24276 480 0 FreeSans 1120 90 0 0 wbs_dat_o[3]
+port 665 nsew signal tristate
+flabel metal2 s 28892 -800 29004 480 0 FreeSans 1120 90 0 0 wbs_dat_o[4]
+port 666 nsew signal tristate
+flabel metal2 s 32438 -800 32550 480 0 FreeSans 1120 90 0 0 wbs_dat_o[5]
+port 667 nsew signal tristate
+flabel metal2 s 35984 -800 36096 480 0 FreeSans 1120 90 0 0 wbs_dat_o[6]
+port 668 nsew signal tristate
+flabel metal2 s 39530 -800 39642 480 0 FreeSans 1120 90 0 0 wbs_dat_o[7]
+port 669 nsew signal tristate
+flabel metal2 s 43076 -800 43188 480 0 FreeSans 1120 90 0 0 wbs_dat_o[8]
+port 670 nsew signal tristate
+flabel metal2 s 46622 -800 46734 480 0 FreeSans 1120 90 0 0 wbs_dat_o[9]
+port 671 nsew signal tristate
+flabel metal2 s 11162 -800 11274 480 0 FreeSans 1120 90 0 0 wbs_sel_i[0]
+port 672 nsew signal input
+flabel metal2 s 15890 -800 16002 480 0 FreeSans 1120 90 0 0 wbs_sel_i[1]
+port 673 nsew signal input
+flabel metal2 s 20618 -800 20730 480 0 FreeSans 1120 90 0 0 wbs_sel_i[2]
+port 674 nsew signal input
+flabel metal2 s 25346 -800 25458 480 0 FreeSans 1120 90 0 0 wbs_sel_i[3]
+port 675 nsew signal input
+flabel metal2 s 5252 -800 5364 480 0 FreeSans 1120 90 0 0 wbs_stb_i
+port 676 nsew signal input
+flabel metal2 s 6434 -800 6546 480 0 FreeSans 1120 90 0 0 wbs_we_i
+port 677 nsew signal input
+flabel metal3 s 0 549442 1660 554242 0 FreeSans 1120 0 0 0 vssa2
+port 567 nsew signal bidirectional
+<< properties >>
+string FIXED_BBOX 0 0 584000 704000
+<< end >>
diff --git a/netgen/comp.out b/netgen/comp.out
new file mode 100644
index 0000000..42163df
--- /dev/null
+++ b/netgen/comp.out
@@ -0,0 +1,2097 @@
+Equate elements: no current cell.
+Equate elements: no current cell.
+Equate elements: no current cell.
+Equate elements: no current cell.
+Equate elements: no current cell.
+Equate elements: no current cell.
+Equate elements: no current cell.
+
+Class sky130_fd_sc_hvl__buf_8(0): Merged 18 parallel devices.
+Class sky130_fd_sc_hvl__buf_8(1): Merged 18 parallel devices.
+Subcircuit summary:
+Circuit 1: sky130_fd_sc_hvl__buf_8 |Circuit 2: sky130_fd_sc_hvl__buf_8
+-------------------------------------------|-------------------------------------------
+sky130_fd_pr__nfet_g5v0d10v5 (2) |sky130_fd_pr__nfet_g5v0d10v5 (2)
+sky130_fd_pr__pfet_g5v0d10v5 (2) |sky130_fd_pr__pfet_g5v0d10v5 (2)
+Number of devices: 4 |Number of devices: 4
+Number of nets: 7 |Number of nets: 7
+---------------------------------------------------------------------------------------
+Circuits match uniquely.
+Netlists match uniquely.
+
+Subcircuit pins:
+Circuit 1: sky130_fd_sc_hvl__buf_8 |Circuit 2: sky130_fd_sc_hvl__buf_8
+-------------------------------------------|-------------------------------------------
+A |A
+VPWR |VPWR
+VPB |VPB
+X |X
+VGND |VGND
+VNB |VNB
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes sky130_fd_sc_hvl__buf_8 and sky130_fd_sc_hvl__buf_8 are equivalent.
+
+Subcircuit summary:
+Circuit 1: sky130_fd_sc_hvl__schmittbuf_1 |Circuit 2: sky130_fd_sc_hvl__schmittbuf_1
+-------------------------------------------|-------------------------------------------
+sky130_fd_pr__nfet_g5v0d10v5 (4) |sky130_fd_pr__nfet_g5v0d10v5 (4)
+sky130_fd_pr__pfet_g5v0d10v5 (4) |sky130_fd_pr__pfet_g5v0d10v5 (4)
+sky130_fd_pr__res_generic_nd__hv (1) |sky130_fd_pr__res_generic_nd__hv (1)
+sky130_fd_pr__res_generic_pd__hv (1) |sky130_fd_pr__res_generic_pd__hv (1)
+Number of devices: 10 |Number of devices: 10
+Number of nets: 11 |Number of nets: 11
+---------------------------------------------------------------------------------------
+Circuits match uniquely.
+Netlists match uniquely.
+
+Subcircuit pins:
+Circuit 1: sky130_fd_sc_hvl__schmittbuf_1 |Circuit 2: sky130_fd_sc_hvl__schmittbuf_1
+-------------------------------------------|-------------------------------------------
+A |A
+VPB |VPB
+VNB |VNB
+VGND |VGND
+VPWR |VPWR
+X |X
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes sky130_fd_sc_hvl__schmittbuf_1 and sky130_fd_sc_hvl__schmittbuf_1 are equivalent.
+
+Class sky130_fd_sc_hvl__inv_8(0): Merged 14 parallel devices.
+Class sky130_fd_sc_hvl__inv_8(1): Merged 14 parallel devices.
+Subcircuit summary:
+Circuit 1: sky130_fd_sc_hvl__inv_8 |Circuit 2: sky130_fd_sc_hvl__inv_8
+-------------------------------------------|-------------------------------------------
+sky130_fd_pr__pfet_g5v0d10v5 (1) |sky130_fd_pr__pfet_g5v0d10v5 (1)
+sky130_fd_pr__nfet_g5v0d10v5 (1) |sky130_fd_pr__nfet_g5v0d10v5 (1)
+Number of devices: 2 |Number of devices: 2
+Number of nets: 6 |Number of nets: 6
+---------------------------------------------------------------------------------------
+Circuits match uniquely.
+Netlists match uniquely.
+
+Subcircuit pins:
+Circuit 1: sky130_fd_sc_hvl__inv_8 |Circuit 2: sky130_fd_sc_hvl__inv_8
+-------------------------------------------|-------------------------------------------
+VPWR |VPWR
+VPB |VPB
+VGND |VGND
+VNB |VNB
+A |A
+Y |Y
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes sky130_fd_sc_hvl__inv_8 and sky130_fd_sc_hvl__inv_8 are equivalent.
+Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_2_W5U4AW in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_TGFUGS in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_3YBPVB in circuit example_por (0)(4 instances)
+Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YUHPXE in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_PKVMTM in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_WRT4AW in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YEUEBV in circuit example_por (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YUHPBG in circuit example_por (0)(1 instance)
+
+Class example_por(0): Merged 20 parallel devices.
+Class example_por(0): Merged 24 series devices.
+Subcircuit summary:
+Circuit 1: example_por |Circuit 2: example_por
+-------------------------------------------|-------------------------------------------
+sky130_fd_pr__cap_mim_m3_2 (1) |sky130_fd_pr__cap_mim_m3_2 (1)
+sky130_fd_sc_hvl__buf_8 (2) |sky130_fd_sc_hvl__buf_8 (2)
+sky130_fd_pr__pfet_g5v0d10v5 (8) |sky130_fd_pr__pfet_g5v0d10v5 (8)
+sky130_fd_pr__nfet_g5v0d10v5 (3) |sky130_fd_pr__nfet_g5v0d10v5 (3)
+sky130_fd_pr__res_xhigh_po_0p69 (3) |sky130_fd_pr__res_xhigh_po_0p69 (3)
+sky130_fd_sc_hvl__schmittbuf_1 (1) |sky130_fd_sc_hvl__schmittbuf_1 (1)
+sky130_fd_pr__cap_mim_m3_1 (1) |sky130_fd_pr__cap_mim_m3_1 (1)
+sky130_fd_sc_hvl__inv_8 (1) |sky130_fd_sc_hvl__inv_8 (1)
+Number of devices: 20 |Number of devices: 20
+Number of nets: 16 |Number of nets: 16
+---------------------------------------------------------------------------------------
+Circuits match uniquely.
+Netlists match uniquely.
+
+Subcircuit pins:
+Circuit 1: example_por |Circuit 2: example_por
+-------------------------------------------|-------------------------------------------
+vdd3v3 |vdd3v3
+porb_h |porb_h
+porb_l |porb_l
+por_l |por_l
+vdd1v8 |vdd1v8
+vss |vss
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes example_por and example_por are equivalent.
+Flattening unmatched subcell user_analog_proj_example in circuit user_analog_project_wrapper (0)(1 instance)
+
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[0]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[10]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[11]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[12]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[13]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[14]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[15]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[16]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[17]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[1]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[2]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[4]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[5]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[6]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[8]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_analog[9]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[0]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[10]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[11]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[12]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[13]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[14]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[15]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[16]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[17]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[1]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[2]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[3]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[4]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[5]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[6]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[7]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[8]
+Cell user_analog_project_wrapper(0) disconnected node: gpio_noesd[9]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[0]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[10]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[1]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[2]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[3]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[7]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[8]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[9]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[5]
+Cell user_analog_project_wrapper(0) disconnected node: io_analog[6]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[0]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[10]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[11]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[12]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[13]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[14]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[15]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[16]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[17]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[18]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[19]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[1]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[20]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[21]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[22]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[23]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[24]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[25]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[26]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[2]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[3]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[4]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[5]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[6]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[7]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[8]
+Cell user_analog_project_wrapper(0) disconnected node: io_in[9]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[0]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[10]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[11]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[12]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[13]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[14]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[15]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[16]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[17]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[18]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[19]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[1]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[20]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[21]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[22]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[23]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[24]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[25]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[26]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[2]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[3]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[4]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[5]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[6]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[7]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[8]
+Cell user_analog_project_wrapper(0) disconnected node: io_in_3v3[9]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[0]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[10]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[13]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[14]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[17]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[18]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[19]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[1]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[20]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[21]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[22]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[23]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[24]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[25]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[26]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[2]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[3]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[4]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[5]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[6]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[7]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[8]
+Cell user_analog_project_wrapper(0) disconnected node: io_oeb[9]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[0]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[10]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[13]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[14]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[17]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[18]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[19]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[1]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[20]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[21]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[22]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[23]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[24]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[25]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[26]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[2]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[3]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[4]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[5]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[6]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[7]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[8]
+Cell user_analog_project_wrapper(0) disconnected node: io_out[9]
+Cell user_analog_project_wrapper(0) disconnected node: la_data_in[0]
+Cell user_analog_project_wrapper(0) disconnected node: la_data_in[100]
+Cell user_analog_project_wrapper(0) disconnected node: la_data_in[101]
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+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[57]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[56]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[55]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[54]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[53]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[52]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[51]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[50]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[49]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[48]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[47]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[46]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[45]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[44]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[43]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[42]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[41]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[40]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[39]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[38]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[37]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[36]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[35]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[34]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[33]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[32]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[31]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[30]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[29]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[28]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[27]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[26]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[25]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[24]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[23]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[22]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[21]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[20]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[19]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[18]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[17]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[16]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[15]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[14]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[13]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[12]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[11]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[10]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[9]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[8]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[7]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[6]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[5]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[4]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[3]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[2]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[1]
+Cell user_analog_project_wrapper(1) disconnected node: la_oenb[0]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[26]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[25]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[24]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[23]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[22]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[21]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[20]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[19]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[18]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[17]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[16]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[15]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[14]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[13]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[12]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[11]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[10]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[9]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[8]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[7]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[6]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[5]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[4]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[3]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[2]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[1]
+Cell user_analog_project_wrapper(1) disconnected node: io_in[0]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[26]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[25]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[24]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[23]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[22]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[21]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[20]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[19]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[18]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[17]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[16]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[15]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[14]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[13]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[12]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[11]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[10]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[9]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[8]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[7]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[6]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[5]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[4]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[3]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[2]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[1]
+Cell user_analog_project_wrapper(1) disconnected node: io_in_3v3[0]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[26]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[25]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[24]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[23]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[22]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[21]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[20]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[19]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[18]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[17]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[14]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[13]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[10]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[9]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[8]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[7]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[6]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[5]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[4]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[3]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[2]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[1]
+Cell user_analog_project_wrapper(1) disconnected node: io_out[0]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[26]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[25]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[24]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[23]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[22]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[21]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[20]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[19]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[18]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[17]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[14]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[13]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[10]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[9]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[8]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[7]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[6]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[5]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[4]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[3]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[2]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[1]
+Cell user_analog_project_wrapper(1) disconnected node: io_oeb[0]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[17]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[16]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[15]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[14]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[13]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[12]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[11]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[10]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[9]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[8]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[6]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[5]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[4]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[2]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[1]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_analog[0]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[17]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[16]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[15]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[14]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[13]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[12]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[11]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[10]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[9]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[8]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[7]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[6]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[5]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[4]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[3]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[2]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[1]
+Cell user_analog_project_wrapper(1) disconnected node: gpio_noesd[0]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[10]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[9]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[8]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[7]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[6]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[5]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[3]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[2]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[1]
+Cell user_analog_project_wrapper(1) disconnected node: io_analog[0]
+Cell user_analog_project_wrapper(1) disconnected node: user_clock2
+Cell user_analog_project_wrapper(1) disconnected node: user_irq[2]
+Cell user_analog_project_wrapper(1) disconnected node: user_irq[1]
+Cell user_analog_project_wrapper(1) disconnected node: user_irq[0]
+Subcircuit summary:
+Circuit 1: user_analog_project_wrapper |Circuit 2: user_analog_project_wrapper
+-------------------------------------------|-------------------------------------------
+example_por (2) |example_por (2)
+sky130_fd_pr__res_generic_m3 (10) |sky130_fd_pr__res_generic_m3 (10)
+Number of devices: 12 |Number of devices: 12
+Number of nets: 21 |Number of nets: 21
+---------------------------------------------------------------------------------------
+Resolving automorphisms by property value.
+Resolving automorphisms by pin name.
+Netlists match uniquely.
+Circuits match correctly.
+
+Subcircuit pins:
+Circuit 1: user_analog_project_wrapper |Circuit 2: user_analog_project_wrapper
+-------------------------------------------|-------------------------------------------
+vssd1 |vssd1
+vssa1 |vssa1
+vccd1 |vccd1
+io_analog[4] |io_analog[4]
+vdda1 |vdda1
+gpio_analog[3] |gpio_analog[3]
+io_out[11] |io_out[11]
+io_out[12] |io_out[12]
+gpio_analog[7] |gpio_analog[7]
+io_out[15] |io_out[15]
+io_out[16] |io_out[16]
+io_clamp_low[2] |io_clamp_low[2]
+io_clamp_high[2] |io_clamp_high[2]
+io_clamp_low[1] |io_clamp_low[1]
+io_clamp_high[1] |io_clamp_high[1]
+io_clamp_low[0] |io_clamp_low[0]
+io_clamp_high[0] |io_clamp_high[0]
+io_oeb[12] |io_oeb[12]
+io_oeb[16] |io_oeb[16]
+io_oeb[11] |io_oeb[11]
+io_oeb[15] |io_oeb[15]
+gpio_analog[0] |gpio_analog[0]
+gpio_analog[10] |gpio_analog[10]
+gpio_analog[11] |gpio_analog[11]
+gpio_analog[12] |gpio_analog[12]
+gpio_analog[13] |gpio_analog[13]
+gpio_analog[14] |gpio_analog[14]
+gpio_analog[15] |gpio_analog[15]
+gpio_analog[16] |gpio_analog[16]
+gpio_analog[17] |gpio_analog[17]
+gpio_analog[1] |gpio_analog[1]
+gpio_analog[2] |gpio_analog[2]
+gpio_analog[4] |gpio_analog[4]
+gpio_analog[5] |gpio_analog[5]
+gpio_analog[6] |gpio_analog[6]
+gpio_analog[8] |gpio_analog[8]
+gpio_analog[9] |gpio_analog[9]
+gpio_noesd[0] |gpio_noesd[0]
+gpio_noesd[10] |gpio_noesd[10]
+gpio_noesd[11] |gpio_noesd[11]
+gpio_noesd[12] |gpio_noesd[12]
+gpio_noesd[13] |gpio_noesd[13]
+gpio_noesd[14] |gpio_noesd[14]
+gpio_noesd[15] |gpio_noesd[15]
+gpio_noesd[16] |gpio_noesd[16]
+gpio_noesd[17] |gpio_noesd[17]
+gpio_noesd[1] |gpio_noesd[1]
+gpio_noesd[2] |gpio_noesd[2]
+gpio_noesd[3] |gpio_noesd[3]
+gpio_noesd[4] |gpio_noesd[4]
+gpio_noesd[5] |gpio_noesd[5]
+gpio_noesd[6] |gpio_noesd[6]
+gpio_noesd[7] |gpio_noesd[7]
+gpio_noesd[8] |gpio_noesd[8]
+gpio_noesd[9] |gpio_noesd[9]
+io_analog[0] |io_analog[0]
+io_analog[10] |io_analog[10]
+io_analog[1] |io_analog[1]
+io_analog[2] |io_analog[2]
+io_analog[3] |io_analog[3]
+io_analog[7] |io_analog[7]
+io_analog[8] |io_analog[8]
+io_analog[9] |io_analog[9]
+io_analog[5] |io_analog[5]
+io_analog[6] |io_analog[6]
+io_in[0] |io_in[0]
+io_in[10] |io_in[10]
+io_in[11] |io_in[11]
+io_in[12] |io_in[12]
+io_in[13] |io_in[13]
+io_in[14] |io_in[14]
+io_in[15] |io_in[15]
+io_in[16] |io_in[16]
+io_in[17] |io_in[17]
+io_in[18] |io_in[18]
+io_in[19] |io_in[19]
+io_in[1] |io_in[1]
+io_in[20] |io_in[20]
+io_in[21] |io_in[21]
+io_in[22] |io_in[22]
+io_in[23] |io_in[23]
+io_in[24] |io_in[24]
+io_in[25] |io_in[25]
+io_in[26] |io_in[26]
+io_in[2] |io_in[2]
+io_in[3] |io_in[3]
+io_in[4] |io_in[4]
+io_in[5] |io_in[5]
+io_in[6] |io_in[6]
+io_in[7] |io_in[7]
+io_in[8] |io_in[8]
+io_in[9] |io_in[9]
+io_in_3v3[0] |io_in_3v3[0]
+io_in_3v3[10] |io_in_3v3[10]
+io_in_3v3[11] |io_in_3v3[11]
+io_in_3v3[12] |io_in_3v3[12]
+io_in_3v3[13] |io_in_3v3[13]
+io_in_3v3[14] |io_in_3v3[14]
+io_in_3v3[15] |io_in_3v3[15]
+io_in_3v3[16] |io_in_3v3[16]
+io_in_3v3[17] |io_in_3v3[17]
+io_in_3v3[18] |io_in_3v3[18]
+io_in_3v3[19] |io_in_3v3[19]
+io_in_3v3[1] |io_in_3v3[1]
+io_in_3v3[20] |io_in_3v3[20]
+io_in_3v3[21] |io_in_3v3[21]
+io_in_3v3[22] |io_in_3v3[22]
+io_in_3v3[23] |io_in_3v3[23]
+io_in_3v3[24] |io_in_3v3[24]
+io_in_3v3[25] |io_in_3v3[25]
+io_in_3v3[26] |io_in_3v3[26]
+io_in_3v3[2] |io_in_3v3[2]
+io_in_3v3[3] |io_in_3v3[3]
+io_in_3v3[4] |io_in_3v3[4]
+io_in_3v3[5] |io_in_3v3[5]
+io_in_3v3[6] |io_in_3v3[6]
+io_in_3v3[7] |io_in_3v3[7]
+io_in_3v3[8] |io_in_3v3[8]
+io_in_3v3[9] |io_in_3v3[9]
+io_oeb[0] |io_oeb[0]
+io_oeb[10] |io_oeb[10]
+io_oeb[13] |io_oeb[13]
+io_oeb[14] |io_oeb[14]
+io_oeb[17] |io_oeb[17]
+io_oeb[18] |io_oeb[18]
+io_oeb[19] |io_oeb[19]
+io_oeb[1] |io_oeb[1]
+io_oeb[20] |io_oeb[20]
+io_oeb[21] |io_oeb[21]
+io_oeb[22] |io_oeb[22]
+io_oeb[23] |io_oeb[23]
+io_oeb[24] |io_oeb[24]
+io_oeb[25] |io_oeb[25]
+io_oeb[26] |io_oeb[26]
+io_oeb[2] |io_oeb[2]
+io_oeb[3] |io_oeb[3]
+io_oeb[4] |io_oeb[4]
+io_oeb[5] |io_oeb[5]
+io_oeb[6] |io_oeb[6]
+io_oeb[7] |io_oeb[7]
+io_oeb[8] |io_oeb[8]
+io_oeb[9] |io_oeb[9]
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+io_out[13] |io_out[13]
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+io_out[17] |io_out[17]
+io_out[18] |io_out[18]
+io_out[19] |io_out[19]
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+io_out[20] |io_out[20]
+io_out[21] |io_out[21]
+io_out[22] |io_out[22]
+io_out[23] |io_out[23]
+io_out[24] |io_out[24]
+io_out[25] |io_out[25]
+io_out[26] |io_out[26]
+io_out[2] |io_out[2]
+io_out[3] |io_out[3]
+io_out[4] |io_out[4]
+io_out[5] |io_out[5]
+io_out[6] |io_out[6]
+io_out[7] |io_out[7]
+io_out[8] |io_out[8]
+io_out[9] |io_out[9]
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+la_data_in[100] |la_data_in[100]
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+la_data_in[103] |la_data_in[103]
+la_data_in[104] |la_data_in[104]
+la_data_in[105] |la_data_in[105]
+la_data_in[106] |la_data_in[106]
+la_data_in[107] |la_data_in[107]
+la_data_in[108] |la_data_in[108]
+la_data_in[109] |la_data_in[109]
+la_data_in[10] |la_data_in[10]
+la_data_in[110] |la_data_in[110]
+la_data_in[111] |la_data_in[111]
+la_data_in[112] |la_data_in[112]
+la_data_in[113] |la_data_in[113]
+la_data_in[114] |la_data_in[114]
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+la_data_in[116] |la_data_in[116]
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+la_data_in[119] |la_data_in[119]
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+user_clock2 |user_clock2
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+user_irq[1] |user_irq[1]
+user_irq[2] |user_irq[2]
+vccd2 |vccd2
+vdda2 |vdda2
+vssa2 |vssa2
+vssd2 |vssd2
+wb_clk_i |wb_clk_i
+wb_rst_i |wb_rst_i
+wbs_ack_o |wbs_ack_o
+wbs_adr_i[0] |wbs_adr_i[0]
+wbs_adr_i[10] |wbs_adr_i[10]
+wbs_adr_i[11] |wbs_adr_i[11]
+wbs_adr_i[12] |wbs_adr_i[12]
+wbs_adr_i[13] |wbs_adr_i[13]
+wbs_adr_i[14] |wbs_adr_i[14]
+wbs_adr_i[15] |wbs_adr_i[15]
+wbs_adr_i[16] |wbs_adr_i[16]
+wbs_adr_i[17] |wbs_adr_i[17]
+wbs_adr_i[18] |wbs_adr_i[18]
+wbs_adr_i[19] |wbs_adr_i[19]
+wbs_adr_i[1] |wbs_adr_i[1]
+wbs_adr_i[20] |wbs_adr_i[20]
+wbs_adr_i[21] |wbs_adr_i[21]
+wbs_adr_i[22] |wbs_adr_i[22]
+wbs_adr_i[23] |wbs_adr_i[23]
+wbs_adr_i[24] |wbs_adr_i[24]
+wbs_adr_i[25] |wbs_adr_i[25]
+wbs_adr_i[26] |wbs_adr_i[26]
+wbs_adr_i[27] |wbs_adr_i[27]
+wbs_adr_i[28] |wbs_adr_i[28]
+wbs_adr_i[29] |wbs_adr_i[29]
+wbs_adr_i[2] |wbs_adr_i[2]
+wbs_adr_i[30] |wbs_adr_i[30]
+wbs_adr_i[31] |wbs_adr_i[31]
+wbs_adr_i[3] |wbs_adr_i[3]
+wbs_adr_i[4] |wbs_adr_i[4]
+wbs_adr_i[5] |wbs_adr_i[5]
+wbs_adr_i[6] |wbs_adr_i[6]
+wbs_adr_i[7] |wbs_adr_i[7]
+wbs_adr_i[8] |wbs_adr_i[8]
+wbs_adr_i[9] |wbs_adr_i[9]
+wbs_cyc_i |wbs_cyc_i
+wbs_dat_i[0] |wbs_dat_i[0]
+wbs_dat_i[10] |wbs_dat_i[10]
+wbs_dat_i[11] |wbs_dat_i[11]
+wbs_dat_i[12] |wbs_dat_i[12]
+wbs_dat_i[13] |wbs_dat_i[13]
+wbs_dat_i[14] |wbs_dat_i[14]
+wbs_dat_i[15] |wbs_dat_i[15]
+wbs_dat_i[16] |wbs_dat_i[16]
+wbs_dat_i[17] |wbs_dat_i[17]
+wbs_dat_i[18] |wbs_dat_i[18]
+wbs_dat_i[19] |wbs_dat_i[19]
+wbs_dat_i[1] |wbs_dat_i[1]
+wbs_dat_i[20] |wbs_dat_i[20]
+wbs_dat_i[21] |wbs_dat_i[21]
+wbs_dat_i[22] |wbs_dat_i[22]
+wbs_dat_i[23] |wbs_dat_i[23]
+wbs_dat_i[24] |wbs_dat_i[24]
+wbs_dat_i[25] |wbs_dat_i[25]
+wbs_dat_i[26] |wbs_dat_i[26]
+wbs_dat_i[27] |wbs_dat_i[27]
+wbs_dat_i[28] |wbs_dat_i[28]
+wbs_dat_i[29] |wbs_dat_i[29]
+wbs_dat_i[2] |wbs_dat_i[2]
+wbs_dat_i[30] |wbs_dat_i[30]
+wbs_dat_i[31] |wbs_dat_i[31]
+wbs_dat_i[3] |wbs_dat_i[3]
+wbs_dat_i[4] |wbs_dat_i[4]
+wbs_dat_i[5] |wbs_dat_i[5]
+wbs_dat_i[6] |wbs_dat_i[6]
+wbs_dat_i[7] |wbs_dat_i[7]
+wbs_dat_i[8] |wbs_dat_i[8]
+wbs_dat_i[9] |wbs_dat_i[9]
+wbs_dat_o[0] |wbs_dat_o[0]
+wbs_dat_o[10] |wbs_dat_o[10]
+wbs_dat_o[11] |wbs_dat_o[11]
+wbs_dat_o[12] |wbs_dat_o[12]
+wbs_dat_o[13] |wbs_dat_o[13]
+wbs_dat_o[14] |wbs_dat_o[14]
+wbs_dat_o[15] |wbs_dat_o[15]
+wbs_dat_o[16] |wbs_dat_o[16]
+wbs_dat_o[17] |wbs_dat_o[17]
+wbs_dat_o[18] |wbs_dat_o[18]
+wbs_dat_o[19] |wbs_dat_o[19]
+wbs_dat_o[1] |wbs_dat_o[1]
+wbs_dat_o[20] |wbs_dat_o[20]
+wbs_dat_o[21] |wbs_dat_o[21]
+wbs_dat_o[22] |wbs_dat_o[22]
+wbs_dat_o[23] |wbs_dat_o[23]
+wbs_dat_o[24] |wbs_dat_o[24]
+wbs_dat_o[25] |wbs_dat_o[25]
+wbs_dat_o[26] |wbs_dat_o[26]
+wbs_dat_o[27] |wbs_dat_o[27]
+wbs_dat_o[28] |wbs_dat_o[28]
+wbs_dat_o[29] |wbs_dat_o[29]
+wbs_dat_o[2] |wbs_dat_o[2]
+wbs_dat_o[30] |wbs_dat_o[30]
+wbs_dat_o[31] |wbs_dat_o[31]
+wbs_dat_o[3] |wbs_dat_o[3]
+wbs_dat_o[4] |wbs_dat_o[4]
+wbs_dat_o[5] |wbs_dat_o[5]
+wbs_dat_o[6] |wbs_dat_o[6]
+wbs_dat_o[7] |wbs_dat_o[7]
+wbs_dat_o[8] |wbs_dat_o[8]
+wbs_dat_o[9] |wbs_dat_o[9]
+wbs_sel_i[0] |wbs_sel_i[0]
+wbs_sel_i[1] |wbs_sel_i[1]
+wbs_sel_i[2] |wbs_sel_i[2]
+wbs_sel_i[3] |wbs_sel_i[3]
+wbs_stb_i |wbs_stb_i
+wbs_we_i |wbs_we_i
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes user_analog_project_wrapper and user_analog_project_wrapper are equivalent.
+Circuits match uniquely.
diff --git a/netgen/example_por.spice b/netgen/example_por.spice
new file mode 100644
index 0000000..499f397
--- /dev/null
+++ b/netgen/example_por.spice
@@ -0,0 +1,213 @@
+* NGSPICE file created from example_por.ext - technology: sky130A
+
+.subckt sky130_fd_pr__cap_mim_m3_2_W5U4AW VSUBS m4_n3179_n3100# c2_n3079_n3000#
+X0 c2_n3079_n3000# m4_n3179_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u
+.ends
+
+.subckt sky130_fd_sc_hvl__buf_8 A VGND VNB VPB VPWR X
+X0 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=2.9175e+12p pd=2.189e+07u as=8.475e+11p ps=7.13e+06u w=1.5e+06u l=500000u
+X1 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=1.45875e+12p pd=1.289e+07u as=8.4e+11p ps=8.24e+06u w=750000u l=500000u
+X2 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=1.68e+12p ps=1.424e+07u w=1.5e+06u l=500000u
+X3 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X4 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X5 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=4.2375e+11p pd=4.13e+06u as=0p ps=0u w=750000u l=500000u
+X6 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X7 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X8 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X9 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X10 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X11 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X12 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X13 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X14 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X15 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X16 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X17 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X18 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X19 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X20 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X21 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ VSUBS a_n465_n200# a_n247_n200# a_n29_n200#
++ a_843_n200# w_n1101_n497# a_n843_n297# a_625_n200# a_683_n297# a_n625_n297# a_407_n200#
++ a_465_n297# a_n407_n297# a_247_n297# a_n901_n200# a_189_n200# a_29_n297# a_n189_n297#
++ a_n683_n200#
+X0 a_407_n200# a_247_n297# a_189_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X1 a_843_n200# a_683_n297# a_625_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X2 a_n465_n200# a_n625_n297# a_n683_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X3 a_189_n200# a_29_n297# a_n29_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X4 a_625_n200# a_465_n297# a_407_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X5 a_n247_n200# a_n407_n297# a_n465_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=0p ps=0u w=2e+06u l=800000u
+X6 a_n683_n200# a_n843_n297# a_n901_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X7 a_n29_n200# a_n189_n297# a_n247_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_TGFUGS a_n80_n288# a_n574_n200# a_n356_n200#
++ a_n138_n200# a_n734_n288# a_574_n288# a_n516_n288# a_356_n288# a_80_n200# a_n298_n288#
++ a_138_n288# w_n962_n458# a_734_n200# a_516_n200# a_298_n200# a_n792_n200#
+X0 a_516_n200# a_356_n288# a_298_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X1 a_n574_n200# a_n734_n288# a_n792_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X2 a_298_n200# a_138_n288# a_80_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X3 a_80_n200# a_n80_n288# a_n138_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X4 a_734_n200# a_574_n288# a_516_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=0p ps=0u w=2e+06u l=800000u
+X5 a_n356_n200# a_n516_n288# a_n574_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=0p ps=0u w=2e+06u l=800000u
+X6 a_n138_n200# a_n298_n288# a_n356_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 a_n2578_n2932# a_5142_2500# a_n1034_n2932#
++ a_n262_2500# a_1668_2500# a_n262_n2932# a_n3736_2500# a_3984_n2932# a_n2192_2500#
++ a_3984_2500# a_2440_n2932# a_2440_2500# a_4370_n2932# a_3598_2500# a_2054_2500#
++ a_n4508_n2932# a_510_2500# a_n4122_2500# a_n2964_n2932# a_124_2500# a_n4894_n2932#
++ a_1282_n2932# a_124_n2932# a_n1420_n2932# a_4370_2500# a_n3350_n2932# a_n648_n2932#
++ a_n648_2500# a_n5280_n2932# a_n1420_2500# a_n2964_2500# a_n2578_2500# a_n1034_2500#
++ a_2826_n2932# a_n2192_n2932# a_2826_2500# a_4756_n2932# w_n5446_n3098# a_1282_2500#
++ a_3212_n2932# a_n4894_2500# a_n3350_2500# a_n4508_2500# a_5142_n2932# a_896_2500#
++ a_510_n2932# a_1668_n2932# a_n1806_n2932# a_4756_2500# a_n3736_n2932# a_3598_n2932#
++ a_3212_2500# a_2054_n2932# a_896_n2932# a_n5280_2500# a_n4122_n2932# a_n1806_2500#
+X0 a_n3350_n2932# a_n3350_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X1 a_n4508_n2932# a_n4508_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X2 a_n2578_n2932# a_n2578_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X3 a_n1420_n2932# a_n1420_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X4 a_n4894_n2932# a_n4894_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X5 a_n3736_n2932# a_n3736_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X6 a_3598_n2932# a_3598_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X7 a_124_n2932# a_124_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X8 a_4756_n2932# a_4756_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X9 a_n2964_n2932# a_n2964_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X10 a_1668_n2932# a_1668_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X11 a_n1806_n2932# a_n1806_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X12 a_n648_n2932# a_n648_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X13 a_3984_n2932# a_3984_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X14 a_2826_n2932# a_2826_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X15 a_510_n2932# a_510_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X16 a_n4122_n2932# a_n4122_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X17 a_n2192_n2932# a_n2192_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X18 a_5142_n2932# a_5142_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X19 a_n1034_n2932# a_n1034_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X20 a_2054_n2932# a_2054_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X21 a_4370_n2932# a_4370_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X22 a_3212_n2932# a_3212_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X23 a_1282_n2932# a_1282_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X24 a_n262_n2932# a_n262_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X25 a_n5280_n2932# a_n5280_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X26 a_2440_n2932# a_2440_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X27 a_896_n2932# a_896_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_3YBPVB VSUBS a_n138_n200# w_n338_n497# a_80_n200#
++ a_n80_n297#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_sc_hvl__schmittbuf_1 A VGND VNB VPB VPWR X
+X0 a_64_207# VPWR VPB sky130_fd_pr__res_generic_pd__hv w=290000u l=3.11e+06u
+X1 a_231_463# A a_117_181# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=4.0875e+11p pd=4.09e+06u as=1.9875e+11p ps=2.03e+06u w=750000u l=500000u
+X2 a_217_207# A a_117_181# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=2.289e+11p pd=2.77e+06u as=1.113e+11p ps=1.37e+06u w=420000u l=500000u
+X3 VPWR A a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=1.02225e+12p pd=5.2e+06u as=0p ps=0u w=750000u l=500000u
+X4 a_217_207# a_117_181# a_64_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=1.113e+11p ps=1.37e+06u w=420000u l=500000u
+X5 X a_117_181# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=1.9875e+11p pd=2.03e+06u as=9.478e+11p ps=4.36e+06u w=750000u l=500000u
+X6 a_78_463# VGND VNB sky130_fd_pr__res_generic_nd__hv w=290000u l=1.355e+06u
+X7 X a_117_181# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=3.975e+11p pd=3.53e+06u as=0p ps=0u w=1.5e+06u l=500000u
+X8 VGND A a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
+X9 a_231_463# a_117_181# a_78_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=1.9875e+11p ps=2.03e+06u w=750000u l=500000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPXE VSUBS a_n138_n200# w_n338_n497# a_80_n200#
++ a_n80_n297#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_PKVMTM a_n80_n288# a_n138_n200# a_80_n200# w_n308_n458#
+X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC a_n80_n288# a_n138_n200# a_80_n200# w_n308_n458#
+X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_1_WRT4AW VSUBS m3_n3136_n3100# c1_n3036_n3000#
+X0 c1_n3036_n3000# m3_n3136_n3100# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YEUEBV VSUBS w_n992_n497# a_n574_n200# a_n356_n200#
++ a_n138_n200# a_80_n200# a_n80_n297# a_734_n200# a_n734_n297# a_516_n200# a_574_n297#
++ a_n516_n297# a_356_n297# a_298_n200# a_n298_n297# a_138_n297# a_n792_n200#
+X0 a_734_n200# a_574_n297# a_516_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X1 a_n356_n200# a_n516_n297# a_n574_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X2 a_n138_n200# a_n298_n297# a_n356_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=0p ps=0u w=2e+06u l=800000u
+X3 a_516_n200# a_356_n297# a_298_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X4 a_n574_n200# a_n734_n297# a_n792_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X5 a_298_n200# a_138_n297# a_80_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+X6 a_80_n200# a_n80_n297# a_n138_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPBG VSUBS a_n138_n200# w_n338_n497# a_80_n200#
++ a_n80_n297#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_sc_hvl__inv_8 A VGND VNB VPB VPWR Y
+X0 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=1.68e+12p pd=1.424e+07u as=2.055e+12p ps=1.774e+07u w=1.5e+06u l=500000u
+X1 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=8.4e+11p pd=8.24e+06u as=1.14e+12p ps=1.054e+07u w=750000u l=500000u
+X2 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X3 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X4 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X5 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X6 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X7 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X8 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X9 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X10 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X11 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X12 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X13 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X14 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X15 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+.ends
+
+.subckt example_por vdd3v3 vdd1v8 vss porb_h por_l porb_l
+Xsky130_fd_pr__cap_mim_m3_2_W5U4AW_0 vss sky130_fd_sc_hvl__schmittbuf_1_0/A vss sky130_fd_pr__cap_mim_m3_2_W5U4AW
+Xsky130_fd_sc_hvl__buf_8_1 sky130_fd_sc_hvl__inv_8_0/A vss vss vdd1v8 vdd1v8 porb_l
++ sky130_fd_sc_hvl__buf_8
+Xsky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 vss vdd3v3 m1_502_7653# vdd3v3 vdd3v3 vdd3v3
++ m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653#
++ m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653# sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ
+Xsky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0 m1_721_6815# vss m1_721_6815# vss m1_721_6815#
++ m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# vss
++ vss m1_721_6815# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_TGFUGS
+Xsky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 li_2935_165# vss li_4479_165# li_4866_5813#
++ li_7182_5813# li_5251_165# li_1778_5813# li_9111_165# li_3322_5813# li_9498_5813#
++ li_7567_165# li_7954_5813# li_9883_165# li_8726_5813# li_7182_5813# li_619_165#
++ li_5638_5813# li_1006_5813# li_2163_165# li_5638_5813# li_619_165# li_6795_165#
++ li_5251_165# li_3707_165# li_9498_5813# li_2163_165# li_4479_165# li_4866_5813#
++ vss li_4094_5813# li_2550_5813# li_2550_5813# li_4094_5813# li_8339_165# li_2935_165#
++ li_7954_5813# li_9883_165# vss li_6410_5813# li_8339_165# vss li_1778_5813# li_1006_5813#
++ vss li_6410_5813# li_6023_165# li_6795_165# li_3707_165# vdd3v3 li_1391_165# li_9111_165#
++ li_8726_5813# li_7567_165# li_6023_165# vss li_1391_165# li_3322_5813# sky130_fd_pr__res_xhigh_po_0p69_S5N9F3
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 vss m1_2993_7658# vdd3v3 m1_721_6815# m1_185_6573#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_sc_hvl__schmittbuf_1_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss vss vdd3v3
++ vdd3v3 sky130_fd_sc_hvl__inv_8_0/A sky130_fd_sc_hvl__schmittbuf_1
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 vss m1_2756_6573# vdd3v3 m1_4283_8081# m1_2756_6573#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 vss m1_6249_7690# vdd3v3 sky130_fd_sc_hvl__schmittbuf_1_0/A
++ m1_2756_6573# sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 vss m1_185_6573# vdd3v3 m1_502_7653# m1_185_6573#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0 vss vdd3v3 vdd3v3 m1_6249_7690# m1_4283_8081#
++ sky130_fd_pr__pfet_g5v0d10v5_YUHPXE
+Xsky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 m1_721_6815# vss m1_2756_6573# vss sky130_fd_pr__nfet_g5v0d10v5_PKVMTM
+Xsky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_1 li_2550_5813# vss m1_185_6573# vss sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC
+Xsky130_fd_pr__cap_mim_m3_1_WRT4AW_0 vss vss sky130_fd_sc_hvl__schmittbuf_1_0/A sky130_fd_pr__cap_mim_m3_1_WRT4AW
+Xsky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0 vss vdd3v3 m1_4283_8081# vdd3v3 m1_4283_8081#
++ vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 m1_4283_8081# m1_4283_8081#
++ m1_4283_8081# m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YEUEBV
+Xsky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 vss vdd3v3 vdd3v3 m1_2993_7658# m1_502_7653#
++ sky130_fd_pr__pfet_g5v0d10v5_YUHPBG
+Xsky130_fd_sc_hvl__inv_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vss vdd1v8 vdd1v8 por_l
++ sky130_fd_sc_hvl__inv_8
+Xsky130_fd_sc_hvl__buf_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vss vdd3v3 vdd3v3 porb_h
++ sky130_fd_sc_hvl__buf_8
+.ends
+
diff --git a/netgen/run_lvs_por.sh b/netgen/run_lvs_por.sh
new file mode 100755
index 0000000..1d1ad9f
--- /dev/null
+++ b/netgen/run_lvs_por.sh
@@ -0,0 +1,24 @@
+#!/bin/sh
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# SPDX-License-Identifier: Apache-2.0
+
+#--------------------------------------------------------------------------------
+# Run LVS on the example_por layout
+#
+# NOTE: By specifying the testbench for the schematic-side netlist, the proper
+# includes used by the testbench simulation are picked up. Otherwise, the LVS
+# itself compares just the simple_por subcircuit from the testbench.
+#--------------------------------------------------------------------------------
+netgen -batch lvs "example_por.spice example_por" "../xschem/example_por_tb.spice example_por" /usr/share/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl comp.out
diff --git a/netgen/run_lvs_wrapper_verilog.sh b/netgen/run_lvs_wrapper_verilog.sh
new file mode 100755
index 0000000..e54f6f6
--- /dev/null
+++ b/netgen/run_lvs_wrapper_verilog.sh
@@ -0,0 +1,22 @@
+#!/bin/sh
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# SPDX-License-Identifier: Apache-2.0
+
+#--------------------------------------------------------------------------------
+# Run LVS on the user_analog_project_wrapper layout, comparing against the
+# top-level verilog module.
+#
+#--------------------------------------------------------------------------------
+netgen -batch lvs "user_analog_project_wrapper.spice user_analog_project_wrapper" "../verilog/rtl/user_analog_project_wrapper.v user_analog_project_wrapper" /usr/share/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl comp.out
diff --git a/netgen/run_lvs_wrapper_xschem.sh b/netgen/run_lvs_wrapper_xschem.sh
new file mode 100755
index 0000000..2e5828c
--- /dev/null
+++ b/netgen/run_lvs_wrapper_xschem.sh
@@ -0,0 +1,22 @@
+#!/bin/sh
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# SPDX-License-Identifier: Apache-2.0
+
+#--------------------------------------------------------------------------------
+# Run LVS on the user_analog_project_wrapper layout, comparing against the
+# top-level xschem subcircuit from the wrapper testbench.
+#
+#--------------------------------------------------------------------------------
+netgen -batch lvs "user_analog_project_wrapper.spice user_analog_project_wrapper" "../xschem/analog_wrapper_tb.spice user_analog_project_wrapper" /usr/share/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl comp.out
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..c3851a3
--- /dev/null
+++ b/netgen/user_analog_project_wrapper.spice
@@ -0,0 +1,336 @@
+* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt sky130_fd_pr__cap_mim_m3_2_W5U4AW c2_n3079_n3000# m4_n3179_n3100#
+X0 c2_n3079_n3000# m4_n3179_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u
+.ends
+
+.subckt sky130_fd_sc_hvl__buf_8 A VGND VPWR X VNB VPB
+X0 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X1 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X2 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X3 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X4 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X5 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X6 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X7 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X8 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X9 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X10 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X11 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X12 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X13 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X14 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X15 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X16 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X17 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X18 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X19 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X20 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X21 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ a_n683_n200# a_n189_n297# a_29_n297# a_189_n200#
++ a_n901_n200# a_247_n297# a_n407_n297# a_465_n297# a_407_n200# a_n625_n297# a_683_n297#
++ a_625_n200# a_n843_n297# w_n1101_n497# a_843_n200# a_n29_n200# a_n247_n200# a_n465_n200#
+X0 a_n247_n200# a_n407_n297# a_n465_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X1 a_843_n200# a_683_n297# a_625_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X2 a_407_n200# a_247_n297# a_189_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X3 a_189_n200# a_29_n297# a_n29_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X4 a_n465_n200# a_n625_n297# a_n683_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X5 a_625_n200# a_465_n297# a_407_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X6 a_n29_n200# a_n189_n297# a_n247_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X7 a_n683_n200# a_n843_n297# a_n901_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_TGFUGS a_n792_n200# a_298_n200# a_516_n200# a_734_n200#
++ w_n962_n458# a_138_n288# a_n298_n288# a_80_n200# a_356_n288# a_n516_n288# a_574_n288#
++ a_n734_n288# a_n138_n200# a_n356_n200# a_n574_n200# a_n80_n288#
+X0 a_80_n200# a_n80_n288# a_n138_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X1 a_n574_n200# a_n734_n288# a_n792_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X2 a_734_n200# a_574_n288# a_516_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X3 a_298_n200# a_138_n288# a_80_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X4 a_n138_n200# a_n298_n288# a_n356_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X5 a_n356_n200# a_n516_n288# a_n574_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X6 a_516_n200# a_356_n288# a_298_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 a_n1806_2500# a_n4122_n2932# a_n5280_2500#
++ a_2054_n2932# a_896_n2932# a_4756_2500# a_3598_n2932# a_3212_2500# a_n3736_n2932#
++ a_1668_n2932# a_n1806_n2932# a_5142_n2932# a_896_2500# a_510_n2932# a_n3350_2500#
++ a_n4508_2500# a_3212_n2932# a_n4894_2500# a_1282_2500# w_n5446_n3098# a_4756_n2932#
++ a_2826_2500# a_2826_n2932# a_n2192_n2932# a_n1034_2500# a_n2578_2500# a_n1420_2500#
++ a_n2964_2500# a_n648_n2932# a_n648_2500# a_n5280_n2932# a_n3350_n2932# a_4370_2500#
++ a_1282_n2932# a_124_n2932# a_n1420_n2932# a_n4894_n2932# a_124_2500# a_n2964_n2932#
++ a_n4122_2500# a_2054_2500# a_510_2500# a_n4508_n2932# a_4370_n2932# a_3598_2500#
++ a_3984_2500# a_2440_n2932# a_2440_2500# a_3984_n2932# a_n2192_2500# a_n3736_2500#
++ a_1668_2500# a_n262_n2932# a_n262_2500# a_n1034_n2932# a_5142_2500# a_n2578_n2932#
+X0 a_n2578_n2932# a_n2578_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X1 a_n1420_n2932# a_n1420_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X2 a_n1806_n2932# a_n1806_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X3 a_3212_n2932# a_3212_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X4 a_3598_n2932# a_3598_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X5 a_n2964_n2932# a_n2964_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X6 a_2826_n2932# a_2826_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X7 a_4370_n2932# a_4370_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X8 a_3984_n2932# a_3984_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X9 a_n262_n2932# a_n262_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X10 a_n3350_n2932# a_n3350_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X11 a_n4122_n2932# a_n4122_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X12 a_n3736_n2932# a_n3736_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X13 a_5142_n2932# a_5142_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X14 a_n4894_n2932# a_n4894_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X15 a_1282_n2932# a_1282_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X16 a_4756_n2932# a_4756_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X17 a_124_n2932# a_124_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X18 a_510_n2932# a_510_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X19 a_896_n2932# a_896_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X20 a_n648_n2932# a_n648_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X21 a_n5280_n2932# a_n5280_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X22 a_n4508_n2932# a_n4508_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X23 a_n1034_n2932# a_n1034_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X24 a_n2192_n2932# a_n2192_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X25 a_2054_n2932# a_2054_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X26 a_1668_n2932# a_1668_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X27 a_2440_n2932# a_2440_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_3YBPVB a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_sc_hvl__schmittbuf_1 A VGND VPWR X VNB VPB
+X0 X a_117_181# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X1 a_217_207# a_117_181# a_64_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
+X2 VPWR A a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X3 VGND A a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
+X4 a_78_463# VGND VNB sky130_fd_pr__res_generic_nd__hv w=290000u l=1.355e+06u
+X5 a_64_207# VPWR VPB sky130_fd_pr__res_generic_pd__hv w=290000u l=3.11e+06u
+X6 X a_117_181# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X7 a_231_463# A a_117_181# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X8 a_231_463# a_117_181# a_78_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X9 a_217_207# A a_117_181# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPXE a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_PKVMTM w_n308_n458# a_80_n200# a_n138_n200# a_n80_n288#
+X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC w_n308_n458# a_80_n200# a_n138_n200# a_n80_n288#
+X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_1_WRT4AW c1_n3036_n3000# m3_n3136_n3100#
+X0 c1_n3036_n3000# m3_n3136_n3100# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YEUEBV a_n792_n200# a_138_n297# a_n298_n297#
++ a_298_n200# a_356_n297# a_n516_n297# a_574_n297# a_516_n200# a_n734_n297# a_734_n200#
++ a_n80_n297# a_80_n200# a_n138_n200# a_n356_n200# a_n574_n200# w_n992_n497#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X1 a_n574_n200# a_n734_n297# a_n792_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X2 a_734_n200# a_574_n297# a_516_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X3 a_298_n200# a_138_n297# a_80_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X4 a_n138_n200# a_n298_n297# a_n356_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X5 a_n356_n200# a_n516_n297# a_n574_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X6 a_516_n200# a_356_n297# a_298_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPBG a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_sc_hvl__inv_8 A VGND VPWR Y VNB VPB
+X0 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X1 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X2 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X3 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X4 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X5 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X6 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X7 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X8 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X9 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X10 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X11 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X12 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X13 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X14 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X15 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+.ends
+
+.subckt example_por vdd3v3 vss porb_h por_l porb_l vdd1v8
+Xsky130_fd_pr__cap_mim_m3_2_W5U4AW_0 vss sky130_fd_sc_hvl__schmittbuf_1_0/A sky130_fd_pr__cap_mim_m3_2_W5U4AW
+Xsky130_fd_sc_hvl__buf_8_1 sky130_fd_sc_hvl__inv_8_0/A vss vdd1v8 porb_l vss vdd1v8
++ sky130_fd_sc_hvl__buf_8
+Xsky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653#
++ vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653#
++ m1_502_7653# vdd3v3 vdd3v3 vdd3v3 m1_502_7653# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ
+Xsky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0 m1_721_6815# vss m1_721_6815# vss vss m1_721_6815#
++ m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# vss
++ m1_721_6815# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_TGFUGS
+Xsky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 li_3322_5813# li_1391_165# vss li_7567_165#
++ li_6023_165# vdd3v3 li_9111_165# li_8726_5813# li_1391_165# li_6795_165# li_3707_165#
++ vss li_6410_5813# li_6023_165# li_1778_5813# li_1006_5813# li_8339_165# vss li_6410_5813#
++ vss li_9883_165# li_7954_5813# li_8339_165# li_2935_165# li_4094_5813# li_2550_5813#
++ li_4094_5813# li_2550_5813# li_4479_165# li_4866_5813# vss li_2163_165# li_9498_5813#
++ li_6795_165# li_5251_165# li_3707_165# li_619_165# li_5638_5813# li_2163_165# li_1006_5813#
++ li_7182_5813# li_5638_5813# li_619_165# li_9883_165# li_8726_5813# li_9498_5813#
++ li_7567_165# li_7954_5813# li_9111_165# li_3322_5813# li_1778_5813# li_7182_5813#
++ li_5251_165# li_4866_5813# li_4479_165# vss li_2935_165# sky130_fd_pr__res_xhigh_po_0p69_S5N9F3
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 m1_185_6573# m1_721_6815# vdd3v3 m1_2993_7658#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_sc_hvl__schmittbuf_1_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss vdd3v3 sky130_fd_sc_hvl__inv_8_0/A
++ vss vdd3v3 sky130_fd_sc_hvl__schmittbuf_1
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 m1_2756_6573# m1_4283_8081# vdd3v3 m1_2756_6573#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 m1_2756_6573# sky130_fd_sc_hvl__schmittbuf_1_0/A
++ vdd3v3 m1_6249_7690# sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 m1_185_6573# m1_502_7653# vdd3v3 m1_185_6573#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0 m1_4283_8081# m1_6249_7690# vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YUHPXE
+Xsky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 vss m1_2756_6573# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_PKVMTM
+Xsky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_1 vss m1_185_6573# vss li_2550_5813# sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC
+Xsky130_fd_pr__cap_mim_m3_1_WRT4AW_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss sky130_fd_pr__cap_mim_m3_1_WRT4AW
+Xsky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0 vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081#
++ m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081#
++ vdd3v3 m1_4283_8081# vdd3v3 m1_4283_8081# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YEUEBV
+Xsky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 m1_502_7653# m1_2993_7658# vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YUHPBG
+Xsky130_fd_sc_hvl__inv_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vdd1v8 por_l vss vdd1v8
++ sky130_fd_sc_hvl__inv_8
+Xsky130_fd_sc_hvl__buf_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vdd3v3 porb_h vss vdd3v3
++ sky130_fd_sc_hvl__buf_8
+.ends
+
+.subckt user_analog_proj_example example_por_0/por_l example_por_1/por_l example_por_1/vdd3v3
++ example_por_1/porb_l example_por_0/vdd3v3 example_por_1/porb_h example_por_0/porb_l
++ example_por_0/porb_h VSUBS example_por_0/vdd1v8 example_por_1/vdd1v8
+Xexample_por_0 example_por_0/vdd3v3 VSUBS example_por_0/porb_h example_por_0/por_l
++ example_por_0/porb_l example_por_0/vdd1v8 example_por
+Xexample_por_1 example_por_1/vdd3v3 VSUBS example_por_1/porb_h example_por_1/por_l
++ example_por_1/porb_l example_por_1/vdd1v8 example_por
+.ends
+
+.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
++ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
++ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
++ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
++ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
++ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
++ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
++ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[7] io_analog[8] io_analog[9]
++ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
++ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
++ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
++ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
++ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
++ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
++ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
++ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
++ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
++ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
++ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
++ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
++ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
++ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
++ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
++ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
++ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
++ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
++ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
++ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
++ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
++ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
++ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
++ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
++ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
++ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
++ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
++ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
++ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
++ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
++ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
++ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
++ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
++ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
++ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
++ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
++ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
++ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
++ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
++ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
++ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
++ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
++ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
++ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
++ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
++ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
++ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
++ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
++ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
++ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
++ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
++ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
++ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
++ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
++ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
++ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
++ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
++ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
++ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
++ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
++ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
++ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
++ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
++ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
++ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
++ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
++ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
++ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
++ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
++ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
++ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
++ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
++ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
++ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
++ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
++ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
++ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
++ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
++ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
++ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
++ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
++ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
++ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
++ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
++ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
++ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
++ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
++ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
++ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
++ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
++ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
++ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
++ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
++ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
++ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
++ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
++ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
++ wbs_stb_i wbs_we_i
+Xuser_analog_proj_example_0 io_out[16] io_out[12] vdda1 io_out[11] io_analog[4] gpio_analog[3]
++ io_out[15] gpio_analog[7] vssa1 vccd1 vccd1 user_analog_proj_example
+R0 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R1 io_oeb[15] vssd1 sky130_fd_pr__res_generic_m3 w=560000u l=600000u
+R2 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R3 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 w=560000u l=580000u
+R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R5 io_oeb[16] vssd1 sky130_fd_pr__res_generic_m3 w=560000u l=310000u
+R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R7 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 w=560000u l=490000u
+R8 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R9 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+.ends
+
diff --git a/openlane/.gitignore b/openlane/.gitignore
new file mode 100644
index 0000000..e4867d8
--- /dev/null
+++ b/openlane/.gitignore
@@ -0,0 +1,2 @@
+*/runs
+default.cvcrc
diff --git a/openlane/Makefile b/openlane/Makefile
new file mode 120000
index 0000000..48e5b4a
--- /dev/null
+++ b/openlane/Makefile
@@ -0,0 +1 @@
+../caravel/openlane/Makefile
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/gds.info b/precheck_results/05_MAR_2022___02_22_07/logs/gds.info
new file mode 100644
index 0000000..7722beb
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/gds.info
@@ -0,0 +1 @@
+user_analog_project_wrapper.gds: c3bbd321d8e134e18ebb015ae4cd1d8fad84e162
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_beol_check.log b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_beol_check.log
new file mode 100644
index 0000000..51b4a86
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_beol_check.log
@@ -0,0 +1,992 @@
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:38: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:42: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:107
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+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:109
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_beol_check.xml ..
+Total elapsed: 7.410s Memory: 1159.00M
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_beol_check.total b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_feol_check.log b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_feol_check.log
new file mode 100644
index 0000000..d50f71a
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_feol_check.log
@@ -0,0 +1,780 @@
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:36: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:44: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
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+"area" in: met_min_ca_density.lydrc:59
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+"area" in: met_min_ca_density.lydrc:109
+ Elapsed: 0.000s Memory: 524.00M
+m5_ca_density is 0.9993486224777203
+Writing report database: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_met_min_ca_density_check.xml ..
+Total elapsed: 0.250s Memory: 523.00M
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_met_min_ca_density_check.total b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_offgrid_check.log b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_offgrid_check.log
new file mode 100644
index 0000000..661222e
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_offgrid_check.log
@@ -0,0 +1,744 @@
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 2.110s Memory: 540.00M
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_offgrid_check.total b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..2a1d256
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper, output to /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+ deep:true tiled:false threads:4
+--- #err|description, table for cell: user_analog_project_wrapper
+NO-Check ---- pwell:64/44/EMP 122/16/EMP 64/59/EMP 44/16/EMP 44/5/EMP
+ ---- nwell:64/20/dat 64/16/EMP 64/5/EMP
+ ---- diff:65/20/dat 65/16/EMP 65/6/EMP
+ ---- tap:65/44/dat 65/48/EMP 65/5/EMP
+ ---- poly:66/20/dat 66/16/EMP 66/5/EMP
+ ---- licon1:66/44/dat 66/58/EMP
+ ---- li1:67/20/dat 67/16/dat 67/5/EMP
+ ---- mcon:67/44/dat 67/48/EMP
+ ---- met1:68/20/dat 68/16/dat 68/5/EMP
+ ---- via:68/44/dat 68/58/EMP
+ ---- met2:69/20/dat 69/16/dat 69/5/EMP
+ ---- via2:69/44/dat 69/58/EMP
+ ---- met3:70/20/dat 70/16/dat 70/5/dat
+ ---- via3:70/44/dat 70/48/EMP
+ ---- met4:71/20/dat 71/16/dat 71/5/EMP
+ ---- via4:71/44/dat 71/48/EMP
+ ---- met5:72/20/dat 72/16/dat 72/5/EMP
+ ---- pad:76/20/EMP 76/5/EMP 76/16/EMP
+ ---- pnp:82/44/EMP 82/59/EMP
+ ---- npn:82/20/EMP 82/5/EMP
+ ---- rdl:74/20/EMP 74/16/EMP 74/5/EMP
+ ---- inductor:82/24/EMP 82/25/EMP
+ 0 total error(s) among 0 error type(s), 33 checks, cell: user_analog_project_wrapper
+Writing report...
+VmPeak: 1190860 kB
+VmHWM: 260996 kB
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_zeroarea_check.log b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..5e348db
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_zeroarea_check.log
@@ -0,0 +1,4 @@
+0 zero-area shapes
+writing to /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_no_zero_areas.gds
+VmPeak: 547060 kB
+VmHWM: 268160 kB
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/klayout_zeroarea_check.total b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/magic_drc_check.log b/precheck_results/05_MAR_2022___02_22_07/logs/magic_drc_check.log
new file mode 100644
index 0000000..d057761
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/magic_drc_check.log
@@ -0,0 +1,46 @@
+
+Magic 8.3 revision 274 - Compiled on Fri Mar 4 22:54:15 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__buf_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "example_por".
+Reading "user_analog_proj_example".
+Reading "user_analog_project_wrapper".
+[INFO]: Loading user_analog_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/magic_drc_check.total b/precheck_results/05_MAR_2022___02_22_07/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/pdks.info b/precheck_results/05_MAR_2022___02_22_07/logs/pdks.info
new file mode 100644
index 0000000..19f87e1
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 27ecf1c16911f7dd4428ffab96f62c1fb876ea70
+Skywater PDK c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/precheck.log b/precheck_results/05_MAR_2022___02_22_07/logs/precheck.log
new file mode 100644
index 0000000..abe235c
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/precheck.log
@@ -0,0 +1,59 @@
+2022-03-05 02:22:07 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog
+2022-03-05 02:22:07 - [INFO] - {{Project Type Info}} analog
+2022-03-05 02:22:07 - [INFO] - {{Project GDS Info}} user_analog_project_wrapper: c3bbd321d8e134e18ebb015ae4cd1d8fad84e162
+2022-03-05 02:22:07 - [INFO] - {{Tools Info}} KLayout: v0.27.8 | Magic: v8.3.274
+2022-03-05 02:22:07 - [INFO] - {{PDKs Info}} Open PDKs: 27ecf1c16911f7dd4428ffab96f62c1fb876ea70 | Skywater PDK: c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
+2022-03-05 02:22:07 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in '/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/logs'
+2022-03-05 02:22:07 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-03-05 02:22:07 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 13: License
+2022-03-05 02:22:08 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog.
+2022-03-05 02:22:08 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-03-05 02:22:08 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog.
+2022-03-05 02:22:09 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog.
+2022-03-05 02:22:09 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-03-05 02:22:09 - [INFO] - {{SPDX COMPLIANCE CHECK PASSED}} Project is compliant with the SPDX Standard
+2022-03-05 02:22:09 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 13: Makefile
+2022-03-05 02:22:09 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-03-05 02:22:09 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 13: Default
+2022-03-05 02:22:09 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-03-05 02:22:09 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-03-05 02:22:09 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 13: Documentation
+2022-03-05 02:22:09 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-03-05 02:22:09 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 13: Consistency
+2022-03-05 02:22:11 - [INFO] - HIERARCHY CHECK PASSED: Module user_analog_project_wrapper is instantiated in caravan.
+2022-03-05 02:22:11 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravan contains at least 8 instances (68 instances).
+2022-03-05 02:22:11 - [INFO] - MODELING CHECK PASSED: Netlist caravan is structural.
+2022-03-05 02:22:11 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_analog_project_wrapper are correctly connected in the top level netlist caravan.
+2022-03-05 02:22:11 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravan netlist passed all consistency checks.
+2022-03-05 02:22:11 - [INFO] - PORTS CHECK PASSED: Netlist user_analog_project_wrapper ports match the golden wrapper ports
+2022-03-05 02:22:11 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_analog_project_wrapper contains at least 1 instances (11 instances).
+2022-03-05 02:22:11 - [INFO] - MODELING CHECK PASSED: Netlist user_analog_project_wrapper is structural.
+2022-03-05 02:22:11 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_analog_project_wrapper matches the provided structural netlist.
+2022-03-05 02:22:11 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_analog_project_wrapper netlist passed all consistency checks.
+2022-03-05 02:22:11 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2022-03-05 02:22:11 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 13: XOR
+2022-03-05 02:22:13 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.xor.gds
+2022-03-05 02:22:13 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2022-03-05 02:22:13 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 13: Magic DRC
+2022-03-05 02:22:15 - [INFO] - 0 DRC violations
+2022-03-05 02:22:15 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-05 02:22:15 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 13: Klayout FEOL
+2022-03-05 02:22:20 - [INFO] - No DRC Violations found
+2022-03-05 02:22:20 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-05 02:22:20 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 13: Klayout BEOL
+2022-03-05 02:22:27 - [INFO] - No DRC Violations found
+2022-03-05 02:22:27 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-05 02:22:27 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 13: Klayout Offgrid
+2022-03-05 02:22:30 - [INFO] - No DRC Violations found
+2022-03-05 02:22:30 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-05 02:22:30 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 13: Klayout Metal Minimum Clear Area Density
+2022-03-05 02:22:32 - [INFO] - No DRC Violations found
+2022-03-05 02:22:32 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-05 02:22:32 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 13: Klayout Pin Label Purposes Overlapping Drawing
+2022-03-05 02:22:33 - [INFO] - No DRC Violations found
+2022-03-05 02:22:33 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-05 02:22:33 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 13: Klayout ZeroArea
+2022-03-05 02:22:34 - [INFO] - No DRC Violations found
+2022-03-05 02:22:34 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-05 02:22:34 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in '/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/logs'
+2022-03-05 02:22:34 - [INFO] - {{SUCCESS}} All Checks Passed !!!
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/tools.info b/precheck_results/05_MAR_2022___02_22_07/logs/tools.info
new file mode 100644
index 0000000..9b2230a
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.8
+Magic: 8.3.274
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/xor_check.log b/precheck_results/05_MAR_2022___02_22_07/logs/xor_check.log
new file mode 100644
index 0000000..255e467
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/xor_check.log
@@ -0,0 +1,174 @@
+Reading file /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/gds/user_analog_project_wrapper.gds for cell user_analog_project_wrapper
+dbu=0.001
+cell user_analog_project_wrapper dbu-bbox(ll;ur)=(-4000,-4000;2924000,3524000)
+cell user_analog_project_wrapper dbu-bbox(left,bottom,right,top)=(-4000,-4000,2924000,3524000)
+cell user_analog_project_wrapper dbu-size(width,height)=(2928000,3528000)
+cell user_analog_project_wrapper micron-bbox(left,bottom,right,top)=(-4.0,-4.0,2924.0,3524.0)
+cell user_analog_project_wrapper micron-size(width,height)=(2928.0,3528.0)
+Done.
+
+Magic 8.3 revision 274 - Compiled on Fri Mar 4 22:54:15 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__buf_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "example_por".
+Reading "user_analog_proj_example".
+Reading "user_analog_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.880 x 3520.000 (-42.880, 0.000), ( 0.000, 3520.000) 150937.594
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.500 x 3520.000 ( 2920.000, 0.000), ( 2962.500, 3520.000) 149600.000
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.530 (-42.880, -37.530), ( 2962.500, 0.000) 112791.906
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.210 (-42.880, 3520.000), ( 2962.500, 3557.210) 111830.188
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+
+Magic 8.3 revision 274 - Compiled on Fri Mar 4 22:54:15 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 6.0
+Library name: user_analog_project_wrapper_empty
+Reading "user_analog_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.880 x 3520.000 (-42.880, 0.000), ( 0.000, 3520.000) 150937.594
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.500 x 3520.000 ( 2920.000, 0.000), ( 2962.500, 3520.000) 149600.000
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.530 (-42.880, -37.530), ( 2962.500, 0.000) 112791.906
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.210 (-42.880, 3520.000), ( 2962.500, 3557.210) 111830.188
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+Reading /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_erased.gds ..
+Reading /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 494 (flat) 494 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 494 (flat) 494 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 184 (flat) 184 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 184 (flat) 184 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 6 (flat) 6 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 6 (flat) 6 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+Writing layout file: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.xor.gds ..
+Total elapsed: 0.100s Memory: 521.00M
diff --git a/precheck_results/05_MAR_2022___02_22_07/logs/xor_check.total b/precheck_results/05_MAR_2022___02_22_07/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_beol_check.xml b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..261c933
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>li.1</name>
+ <description>li.1 : min. li width : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.3</name>
+ <description>li.3 : min. li spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.5</name>
+ <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.6</name>
+ <description>li.6 : min. li area : 0.0561um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1</name>
+ <description>ct.1: non-ring mcon should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_a</name>
+ <description>ct.1_a : minimum width of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_b</name>
+ <description>ct.1_b : maximum length of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.2</name>
+ <description>ct.2 : min. mcon spacing : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.4</name>
+ <description>ct.4 : mcon should covered by li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.1</name>
+ <description>m1.1 : min. m1 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.2</name>
+ <description>m1.2 : min. m1 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.3ab</name>
+ <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>791_m1.4</name>
+ <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4</name>
+ <description>m1.4 : mcon periphery must be enclosed by m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a</name>
+ <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a_a</name>
+ <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.6</name>
+ <description>m1.6 : min. m1 area : 0.083um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.7</name>
+ <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.5</name>
+ <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a</name>
+ <description>via.1a : via outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_a</name>
+ <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_b</name>
+ <description>via.1a_b : maximum length of via : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.2</name>
+ <description>via.2 : min. via spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a</name>
+ <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a_a</name>
+ <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.5a</name>
+ <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.1</name>
+ <description>m2.1 : min. m2 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.2</name>
+ <description>m2.2 : min. m2 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.3ab</name>
+ <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.6</name>
+ <description>m2.6 : min. m2 area : 0.0676um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.7</name>
+ <description>m2.7 : min. m2 holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4</name>
+ <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4_a</name>
+ <description>m2.4_a : via in periphery must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.5</name>
+ <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a</name>
+ <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_a</name>
+ <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_b</name>
+ <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.2</name>
+ <description>via2.2 : min. via2 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4</name>
+ <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4_a</name>
+ <description>via2.4_a : via must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.5</name>
+ <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.1</name>
+ <description>m3.1 : min. m3 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.2</name>
+ <description>m3.2 : min. m3 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.3cd</name>
+ <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4</name>
+ <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4_a</name>
+ <description>m3.4_a : via2 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1</name>
+ <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_a</name>
+ <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_b</name>
+ <description>via3.1_b : maximum length of via3 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.2</name>
+ <description>via3.2 : min. via3 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4</name>
+ <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4_a</name>
+ <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.5</name>
+ <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.1</name>
+ <description>m4.1 : min. m4 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.2</name>
+ <description>m4.2 : min. m4 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.4a</name>
+ <description>m4.4a : min. m4 area : 0.240um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.5ab</name>
+ <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3</name>
+ <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3_a</name>
+ <description>m4.3_a : via3 must be enclosed by met4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1</name>
+ <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_a</name>
+ <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_b</name>
+ <description>via4.1_b : maximum length of via4 : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.2</name>
+ <description>via4.2 : min. via4 spacing : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4</name>
+ <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4_a</name>
+ <description>via4.4_a : m4 must enclose all via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.1</name>
+ <description>m5.1 : min. m5 width : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.2</name>
+ <description>m5.2 : min. m5 spacing : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3</name>
+ <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3_a</name>
+ <description>m5.3_a : via must be enclosed by m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.4</name>
+ <description>m5.4 : min. m5 area : 4.0um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad.2</name>
+ <description>pad.2 : min. pad spacing : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_feol_check.xml b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..a352e7c
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,363 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell.2</name>
+ <description>dnwell.2 : min. dnwell width : 3.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.1</name>
+ <description>nwell.1 : min. nwell width : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.2a</name>
+ <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.6</name>
+ <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.1</name>
+ <description>hvtp.1 : min. hvtp width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.2</name>
+ <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.1</name>
+ <description>hvtr.1 : min. hvtr width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2</name>
+ <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2_a</name>
+ <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.1a</name>
+ <description>lvtn.1a : min. lvtn width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.2</name>
+ <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.1</name>
+ <description>ncm.1 : min. ncm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.2a</name>
+ <description>ncm.2a : min. ncm spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1</name>
+ <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_a</name>
+ <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_b</name>
+ <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_c</name>
+ <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.3</name>
+ <description>difftap.3 : min. difftap spacing : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.1</name>
+ <description>tunm.1 : min. tunm width : 0.41um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.2</name>
+ <description>tunm.2 : min. tunm spacing : 0.5um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.1a</name>
+ <description>poly.1a : min. poly width : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.2</name>
+ <description>poly.2 : min. poly spacing : 0.21um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.1a</name>
+ <description>rpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.2</name>
+ <description>rpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.1a</name>
+ <description>urpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.2</name>
+ <description>urpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.1</name>
+ <description>npc.1 : min. npc width : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.2</name>
+ <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsd.1</name>
+ <description>nsd.1 : min. nsdm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsd.2</name>
+ <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psd.1</name>
+ <description>psd.1 : min. psdm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psd.2</name>
+ <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1</name>
+ <description>licon.1 : licon should be rectangle</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1_a/b</name>
+ <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13</name>
+ <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13_a</name>
+ <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.17</name>
+ <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.1</name>
+ <description>capm.1 : min. capm width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2a</name>
+ <description>capm.2a : min. capm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b</name>
+ <description>capm.2b : min. capm spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b_a</name>
+ <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3</name>
+ <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3_a</name>
+ <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.4</name>
+ <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.5</name>
+ <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.1</name>
+ <description>cap2m.1 : min. cap2m width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2a</name>
+ <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b</name>
+ <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b_a</name>
+ <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3</name>
+ <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3_a</name>
+ <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.4</name>
+ <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.5</name>
+ <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.1</name>
+ <description>hvi.1 : min. hvi width : 0.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.2a</name>
+ <description>hvi.2a : min. hvi spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.1</name>
+ <description>hvntm.1 : min. hvntm width : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.2</name>
+ <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_met_min_ca_density_check.xml b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..b91529c
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_offgrid_check.xml b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..fa805b1
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/offgrid.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_angle</name>
+ <description>x.3a : non 45 degree angle dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_angle</name>
+ <description>x.3a : non 45 degree angle nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_angle</name>
+ <description>x.3a : non 45 degree angle pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_angle</name>
+ <description>x.3a : non 45 degree angle pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_angle</name>
+ <description>x.3a : non 45 degree angle hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_angle</name>
+ <description>x.3a : non 45 degree angle hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_angle</name>
+ <description>x.3a : non 45 degree angle lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_angle</name>
+ <description>x.3a : non 45 degree angle ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2 : non 90 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2c : non 45 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2 : non 90 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2c : non 45 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_angle</name>
+ <description>x.3a : non 45 degree angle tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_angle</name>
+ <description>x.2 : non 90 degree angle poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_angle</name>
+ <description>x.3a : non 45 degree angle rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_angle</name>
+ <description>x.3a : non 45 degree angle npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_angle</name>
+ <description>x.3a : non 45 degree angle nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_angle</name>
+ <description>x.3a : non 45 degree angle psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_angle</name>
+ <description>x.2 : non 90 degree angle licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_angle</name>
+ <description>x.3a : non 45 degree angle li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_angle</name>
+ <description>x.2 : non 90 degree angle mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_angle</name>
+ <description>x.3a : non 45 degree angle vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_angle</name>
+ <description>x.3a : non 45 degree angle m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_angle</name>
+ <description>x.2 : non 90 degree angle via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_angle</name>
+ <description>x.3a : non 45 degree angle m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_angle</name>
+ <description>x.2 : non 90 degree angle via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_angle</name>
+ <description>x.3a : non 45 degree angle m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_angle</name>
+ <description>x.2 : non 90 degree angle via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_angle</name>
+ <description>x.3a : non 45 degree angle nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_angle</name>
+ <description>x.3a : non 45 degree angle m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_angle</name>
+ <description>x.2 : non 90 degree angle via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_angle</name>
+ <description>x.3a : non 45 degree angle m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_angle</name>
+ <description>x.3a : non 45 degree angle pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_angle</name>
+ <description>x.2 : non 90 degree angle mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_angle</name>
+ <description>x.3a : non 45 degree angle hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_angle</name>
+ <description>x.3a : non 45 degree angle hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_angle</name>
+ <description>x.3a : non 45 degree angle vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_angle</name>
+ <description>x.3a : non 45 degree angle uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_angle</name>
+ <description>x.3a : non 45 degree angle pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>areaid_re_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on areaid.re</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..4b51167
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_zeroarea_check.xml b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..6d97219
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.drc.report b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..829b9d5
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,5 @@
+user_analog_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.rdb b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..8a882f3
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,2 @@
+$user_analog_project_wrapper
+ 100
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.tcl b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.tcl
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.tr b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.tr
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.xml b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..7161d7c
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+ <categories/>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ </cell>
+ </cells>
+ <items/>
+</report-database>
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.magic.drc.mag b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..f1c7700
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.magic.drc.mag
@@ -0,0 +1,2926 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646446935
+<< checkpaint >>
+rect -4732 -4732 588732 708732
+<< pwell >>
+rect 345714 628229 371128 629058
+<< mvpsubdiff >>
+rect 345740 629000 371102 629032
+rect 345740 628286 345790 629000
+rect 371052 628286 371102 629000
+rect 345740 628255 371102 628286
+<< mvpsubdiffcont >>
+rect 345790 628286 371052 629000
+<< locali >>
+rect 345748 629000 371094 629032
+rect 345748 628286 345790 629000
+rect 371052 628286 371094 629000
+rect 345748 628255 371094 628286
+<< viali >>
+rect 357600 628309 359290 628991
+<< metal1 >>
+rect 357470 629394 359442 629457
+rect 357470 628062 357541 629394
+rect 359385 628062 359442 629394
+rect 357470 627990 359442 628062
+<< via1 >>
+rect 357541 628991 359385 629394
+rect 357541 628309 357600 628991
+rect 357600 628309 359290 628991
+rect 359290 628309 359385 628991
+rect 357541 628062 359385 628309
+<< metal2 >>
+rect 357470 629396 359442 629457
+rect 357470 629394 357555 629396
+rect 359371 629394 359442 629396
+rect 357470 628062 357541 629394
+rect 359385 628062 359442 629394
+rect 357470 628060 357555 628062
+rect 359371 628060 359442 628062
+rect 357470 627990 359442 628060
+rect 524 -800 636 480
+rect 1706 -800 1818 480
+rect 2888 -800 3000 480
+rect 4070 -800 4182 480
+rect 5252 -800 5364 480
+rect 6434 -800 6546 480
+rect 7616 -800 7728 480
+rect 8798 -800 8910 480
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+rect 17495 419200 17511 419264
+rect 17575 419200 17684 419264
+rect 13814 227257 17684 419200
+rect 573464 455716 576816 500074
+rect 573464 455652 573591 455716
+rect 573655 455652 573671 455716
+rect 573735 455652 573751 455716
+rect 573815 455652 573831 455716
+rect 573895 455652 573911 455716
+rect 573975 455652 573991 455716
+rect 574055 455652 574071 455716
+rect 574135 455652 574151 455716
+rect 574215 455652 574231 455716
+rect 574295 455652 574311 455716
+rect 574375 455652 574391 455716
+rect 574455 455652 574471 455716
+rect 574535 455652 574551 455716
+rect 574615 455652 574631 455716
+rect 574695 455652 574711 455716
+rect 574775 455652 574791 455716
+rect 574855 455652 574871 455716
+rect 574935 455652 574951 455716
+rect 575015 455652 575031 455716
+rect 575095 455652 575111 455716
+rect 575175 455652 575191 455716
+rect 575255 455652 575271 455716
+rect 575335 455652 575351 455716
+rect 575415 455652 575431 455716
+rect 575495 455652 575511 455716
+rect 575575 455652 575591 455716
+rect 575655 455652 575671 455716
+rect 575735 455652 575751 455716
+rect 575815 455652 575831 455716
+rect 575895 455652 575911 455716
+rect 575975 455652 575991 455716
+rect 576055 455652 576071 455716
+rect 576135 455652 576151 455716
+rect 576215 455652 576231 455716
+rect 576295 455652 576311 455716
+rect 576375 455652 576391 455716
+rect 576455 455652 576471 455716
+rect 576535 455652 576551 455716
+rect 576615 455652 576631 455716
+rect 576695 455652 576816 455716
+rect 13811 196222 17688 227257
+rect 13811 191438 13997 196222
+rect 17421 191438 17688 196222
+rect 13811 191098 17688 191438
+rect 573464 196222 576816 455652
+rect 573464 191438 573605 196222
+rect 576629 191438 576816 196222
+rect 573464 191191 576816 191438
+<< via4 >>
+rect 357678 643457 359194 649773
+rect 352057 615301 353573 617777
+rect 363441 615307 364957 617783
+rect 363445 597363 364961 601439
+<< metal5 >>
+rect 165594 702300 170594 704800
+rect 175894 702300 180894 704800
+rect 217294 702300 222294 704800
+rect 227594 702300 232594 704800
+rect 318994 702300 323994 704800
+rect 329294 702300 334294 704800
+rect 357521 649773 359350 649991
+rect 357521 643457 357678 649773
+rect 359194 643457 359350 649773
+rect 351918 617777 353747 617929
+rect 351918 615301 352057 617777
+rect 353573 615301 353747 617777
+rect 351918 614900 353747 615301
+rect 357521 614900 359350 643457
+rect 351918 613071 359350 614900
+rect 363318 617783 365147 617929
+rect 363318 615307 363441 617783
+rect 364957 615307 365147 617783
+rect 363318 601439 365147 615307
+rect 363318 597363 363445 601439
+rect 364961 597363 365147 601439
+rect 363318 597052 365147 597363
+use user_analog_proj_example user_analog_proj_example_0
+timestamp 1639823760
+transform 1 0 345668 0 -1 627114
+box -73 -12 25490 8324
+<< labels >>
+flabel metal3 s 572152 640142 580220 644150 0 FreeSans 20000 0 0 0 VCCD1
+port 1 nsew
+flabel metal3 s 567038 550960 577302 554546 0 FreeSans 20000 0 0 0 VDDA1
+port 2 nsew
+flabel metal3 s 511190 664896 514962 676272 0 FreeSans 20000 90 0 0 VSSA1
+port 3 nsew
+flabel metal3 s 561703 191929 571721 195859 0 FreeSans 20000 0 0 0 VSSD1
+port 4 nsew
+flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1400 0 0 0 gpio_analog[0]
+port 5 nsew
+flabel metal3 s -800 381864 480 381976 0 FreeSans 1400 0 0 0 gpio_analog[10]
+port 6 nsew
+flabel metal3 s -800 338642 480 338754 0 FreeSans 1400 0 0 0 gpio_analog[11]
+port 7 nsew
+flabel metal3 s -800 295420 480 295532 0 FreeSans 1400 0 0 0 gpio_analog[12]
+port 8 nsew
+flabel metal3 s -800 252398 480 252510 0 FreeSans 1400 0 0 0 gpio_analog[13]
+port 9 nsew
+flabel metal3 s -800 124776 480 124888 0 FreeSans 1400 0 0 0 gpio_analog[14]
+port 10 nsew
+flabel metal3 s -800 81554 480 81666 0 FreeSans 1400 0 0 0 gpio_analog[15]
+port 11 nsew
+flabel metal3 s -800 38332 480 38444 0 FreeSans 1400 0 0 0 gpio_analog[16]
+port 12 nsew
+flabel metal3 s -800 16910 480 17022 0 FreeSans 1400 0 0 0 gpio_analog[17]
+port 13 nsew
+flabel metal3 s 583520 313652 584800 313764 0 FreeSans 1400 0 0 0 gpio_analog[1]
+port 14 nsew
+flabel metal3 s 583520 358874 584800 358986 0 FreeSans 1400 0 0 0 gpio_analog[2]
+port 15 nsew
+flabel metal3 s 583520 405296 584800 405408 0 FreeSans 1400 0 0 0 gpio_analog[3]
+port 16 nsew
+flabel metal3 s 583520 449718 584800 449830 0 FreeSans 1400 0 0 0 gpio_analog[4]
+port 17 nsew
+flabel metal3 s 583520 494140 584800 494252 0 FreeSans 1400 0 0 0 gpio_analog[5]
+port 18 nsew
+flabel metal3 s 583520 583562 584800 583674 0 FreeSans 1400 0 0 0 gpio_analog[6]
+port 19 nsew
+flabel metal3 s -800 511530 480 511642 0 FreeSans 1400 0 0 0 gpio_analog[7]
+port 20 nsew
+flabel metal3 s -800 468308 480 468420 0 FreeSans 1400 0 0 0 gpio_analog[8]
+port 21 nsew
+flabel metal3 s -800 425086 480 425198 0 FreeSans 1400 0 0 0 gpio_analog[9]
+port 22 nsew
+flabel metal3 s 583520 270412 584800 270524 0 FreeSans 1400 0 0 0 gpio_noesd[0]
+port 23 nsew
+flabel metal3 s -800 380682 480 380794 0 FreeSans 1400 0 0 0 gpio_noesd[10]
+port 24 nsew
+flabel metal3 s -800 337460 480 337572 0 FreeSans 1400 0 0 0 gpio_noesd[11]
+port 25 nsew
+flabel metal3 s -800 294238 480 294350 0 FreeSans 1400 0 0 0 gpio_noesd[12]
+port 26 nsew
+flabel metal3 s -800 251216 480 251328 0 FreeSans 1400 0 0 0 gpio_noesd[13]
+port 27 nsew
+flabel metal3 s -800 123594 480 123706 0 FreeSans 1400 0 0 0 gpio_noesd[14]
+port 28 nsew
+flabel metal3 s -800 80372 480 80484 0 FreeSans 1400 0 0 0 gpio_noesd[15]
+port 29 nsew
+flabel metal3 s -800 37150 480 37262 0 FreeSans 1400 0 0 0 gpio_noesd[16]
+port 30 nsew
+flabel metal3 s -800 15728 480 15840 0 FreeSans 1400 0 0 0 gpio_noesd[17]
+port 31 nsew
+flabel metal3 s 583520 314834 584800 314946 0 FreeSans 1400 0 0 0 gpio_noesd[1]
+port 32 nsew
+flabel metal3 s 583520 360056 584800 360168 0 FreeSans 1400 0 0 0 gpio_noesd[2]
+port 33 nsew
+flabel metal3 s 583520 406478 584800 406590 0 FreeSans 1400 0 0 0 gpio_noesd[3]
+port 34 nsew
+flabel metal3 s 583520 450900 584800 451012 0 FreeSans 1400 0 0 0 gpio_noesd[4]
+port 35 nsew
+flabel metal3 s 583520 495322 584800 495434 0 FreeSans 1400 0 0 0 gpio_noesd[5]
+port 36 nsew
+flabel metal3 s 583520 584744 584800 584856 0 FreeSans 1400 0 0 0 gpio_noesd[6]
+port 37 nsew
+flabel metal3 s -800 510348 480 510460 0 FreeSans 1400 0 0 0 gpio_noesd[7]
+port 38 nsew
+flabel metal3 s -800 467126 480 467238 0 FreeSans 1400 0 0 0 gpio_noesd[8]
+port 39 nsew
+flabel metal3 s -800 423904 480 424016 0 FreeSans 1400 0 0 0 gpio_noesd[9]
+port 40 nsew
+flabel metal3 s 582300 677984 584800 682984 0 FreeSans 1400 0 0 0 io_analog[0]
+port 41 nsew
+flabel metal3 s 0 680242 1700 685242 0 FreeSans 1400 0 0 0 io_analog[10]
+port 42 nsew
+flabel metal3 s 566594 702300 571594 704800 0 FreeSans 2400 180 0 0 io_analog[1]
+port 43 nsew
+flabel metal3 s 465394 702300 470394 704800 0 FreeSans 2400 180 0 0 io_analog[2]
+port 44 nsew
+flabel metal3 s 413394 702300 418394 704800 0 FreeSans 2400 180 0 0 io_analog[3]
+port 45 nsew
+flabel metal3 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal4 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal5 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal3 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal4 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal5 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal3 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal4 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal5 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal3 s 120194 702300 125194 704800 0 FreeSans 2400 180 0 0 io_analog[7]
+port 49 nsew
+flabel metal3 s 68194 702300 73194 704800 0 FreeSans 2400 180 0 0 io_analog[8]
+port 50 nsew
+flabel metal3 s 16194 702300 21194 704800 0 FreeSans 2400 180 0 0 io_analog[9]
+port 51 nsew
+flabel metal3 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal4 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal5 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal3 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal4 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal5 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal3 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal4 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal5 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal3 s 326794 702300 328994 704800 0 FreeSans 2400 180 0 0 io_clamp_high[0]
+port 52 nsew
+flabel metal3 s 225094 702300 227294 704800 0 FreeSans 2400 180 0 0 io_clamp_high[1]
+port 53 nsew
+flabel metal3 s 173394 702300 175594 704800 0 FreeSans 2400 180 0 0 io_clamp_high[2]
+port 54 nsew
+flabel metal3 s 324294 702300 326494 704800 0 FreeSans 2400 180 0 0 io_clamp_low[0]
+port 55 nsew
+flabel metal3 s 222594 702300 224794 704800 0 FreeSans 2400 180 0 0 io_clamp_low[1]
+port 56 nsew
+flabel metal3 s 170894 702300 173094 704800 0 FreeSans 2400 180 0 0 io_clamp_low[2]
+port 57 nsew
+flabel metal3 s 583520 2726 584800 2838 0 FreeSans 1400 0 0 0 io_in[0]
+port 58 nsew
+flabel metal3 s 583520 408842 584800 408954 0 FreeSans 1400 0 0 0 io_in[10]
+port 59 nsew
+flabel metal3 s 583520 453264 584800 453376 0 FreeSans 1400 0 0 0 io_in[11]
+port 60 nsew
+flabel metal3 s 583520 497686 584800 497798 0 FreeSans 1400 0 0 0 io_in[12]
+port 61 nsew
+flabel metal3 s 583520 587108 584800 587220 0 FreeSans 1400 0 0 0 io_in[13]
+port 62 nsew
+flabel metal3 s -800 507984 480 508096 0 FreeSans 1400 0 0 0 io_in[14]
+port 63 nsew
+flabel metal3 s -800 464762 480 464874 0 FreeSans 1400 0 0 0 io_in[15]
+port 64 nsew
+flabel metal3 s -800 421540 480 421652 0 FreeSans 1400 0 0 0 io_in[16]
+port 65 nsew
+flabel metal3 s -800 378318 480 378430 0 FreeSans 1400 0 0 0 io_in[17]
+port 66 nsew
+flabel metal3 s -800 335096 480 335208 0 FreeSans 1400 0 0 0 io_in[18]
+port 67 nsew
+flabel metal3 s -800 291874 480 291986 0 FreeSans 1400 0 0 0 io_in[19]
+port 68 nsew
+flabel metal3 s 583520 7454 584800 7566 0 FreeSans 1400 0 0 0 io_in[1]
+port 69 nsew
+flabel metal3 s -800 248852 480 248964 0 FreeSans 1400 0 0 0 io_in[20]
+port 70 nsew
+flabel metal3 s -800 121230 480 121342 0 FreeSans 1400 0 0 0 io_in[21]
+port 71 nsew
+flabel metal3 s -800 78008 480 78120 0 FreeSans 1400 0 0 0 io_in[22]
+port 72 nsew
+flabel metal3 s -800 34786 480 34898 0 FreeSans 1400 0 0 0 io_in[23]
+port 73 nsew
+flabel metal3 s -800 13364 480 13476 0 FreeSans 1400 0 0 0 io_in[24]
+port 74 nsew
+flabel metal3 s -800 8636 480 8748 0 FreeSans 1400 0 0 0 io_in[25]
+port 75 nsew
+flabel metal3 s -800 3908 480 4020 0 FreeSans 1400 0 0 0 io_in[26]
+port 76 nsew
+flabel metal3 s 583520 12182 584800 12294 0 FreeSans 1400 0 0 0 io_in[2]
+port 77 nsew
+flabel metal3 s 583520 16910 584800 17022 0 FreeSans 1400 0 0 0 io_in[3]
+port 78 nsew
+flabel metal3 s 583520 21638 584800 21750 0 FreeSans 1400 0 0 0 io_in[4]
+port 79 nsew
+flabel metal3 s 583520 48096 584800 48208 0 FreeSans 1400 0 0 0 io_in[5]
+port 80 nsew
+flabel metal3 s 583520 92754 584800 92866 0 FreeSans 1400 0 0 0 io_in[6]
+port 81 nsew
+flabel metal3 s 583520 272776 584800 272888 0 FreeSans 1400 0 0 0 io_in[7]
+port 82 nsew
+flabel metal3 s 583520 317198 584800 317310 0 FreeSans 1400 0 0 0 io_in[8]
+port 83 nsew
+flabel metal3 s 583520 362420 584800 362532 0 FreeSans 1400 0 0 0 io_in[9]
+port 84 nsew
+flabel metal3 s 583520 1544 584800 1656 0 FreeSans 1400 0 0 0 io_in_3v3[0]
+port 85 nsew
+flabel metal3 s 583520 407660 584800 407772 0 FreeSans 1400 0 0 0 io_in_3v3[10]
+port 86 nsew
+flabel metal3 s 583520 452082 584800 452194 0 FreeSans 1400 0 0 0 io_in_3v3[11]
+port 87 nsew
+flabel metal3 s 583520 496504 584800 496616 0 FreeSans 1400 0 0 0 io_in_3v3[12]
+port 88 nsew
+flabel metal3 s 583520 585926 584800 586038 0 FreeSans 1400 0 0 0 io_in_3v3[13]
+port 89 nsew
+flabel metal3 s -800 509166 480 509278 0 FreeSans 1400 0 0 0 io_in_3v3[14]
+port 90 nsew
+flabel metal3 s -800 465944 480 466056 0 FreeSans 1400 0 0 0 io_in_3v3[15]
+port 91 nsew
+flabel metal3 s -800 422722 480 422834 0 FreeSans 1400 0 0 0 io_in_3v3[16]
+port 92 nsew
+flabel metal3 s -800 379500 480 379612 0 FreeSans 1400 0 0 0 io_in_3v3[17]
+port 93 nsew
+flabel metal3 s -800 336278 480 336390 0 FreeSans 1400 0 0 0 io_in_3v3[18]
+port 94 nsew
+flabel metal3 s -800 293056 480 293168 0 FreeSans 1400 0 0 0 io_in_3v3[19]
+port 95 nsew
+flabel metal3 s 583520 6272 584800 6384 0 FreeSans 1400 0 0 0 io_in_3v3[1]
+port 96 nsew
+flabel metal3 s -800 250034 480 250146 0 FreeSans 1400 0 0 0 io_in_3v3[20]
+port 97 nsew
+flabel metal3 s -800 122412 480 122524 0 FreeSans 1400 0 0 0 io_in_3v3[21]
+port 98 nsew
+flabel metal3 s -800 79190 480 79302 0 FreeSans 1400 0 0 0 io_in_3v3[22]
+port 99 nsew
+flabel metal3 s -800 35968 480 36080 0 FreeSans 1400 0 0 0 io_in_3v3[23]
+port 100 nsew
+flabel metal3 s -800 14546 480 14658 0 FreeSans 1400 0 0 0 io_in_3v3[24]
+port 101 nsew
+flabel metal3 s -800 9818 480 9930 0 FreeSans 1400 0 0 0 io_in_3v3[25]
+port 102 nsew
+flabel metal3 s -800 5090 480 5202 0 FreeSans 1400 0 0 0 io_in_3v3[26]
+port 103 nsew
+flabel metal3 s 583520 11000 584800 11112 0 FreeSans 1400 0 0 0 io_in_3v3[2]
+port 104 nsew
+flabel metal3 s 583520 15728 584800 15840 0 FreeSans 1400 0 0 0 io_in_3v3[3]
+port 105 nsew
+flabel metal3 s 583520 20456 584800 20568 0 FreeSans 1400 0 0 0 io_in_3v3[4]
+port 106 nsew
+flabel metal3 s 583520 46914 584800 47026 0 FreeSans 1400 0 0 0 io_in_3v3[5]
+port 107 nsew
+flabel metal3 s 583520 91572 584800 91684 0 FreeSans 1400 0 0 0 io_in_3v3[6]
+port 108 nsew
+flabel metal3 s 583520 271594 584800 271706 0 FreeSans 1400 0 0 0 io_in_3v3[7]
+port 109 nsew
+flabel metal3 s 583520 316016 584800 316128 0 FreeSans 1400 0 0 0 io_in_3v3[8]
+port 110 nsew
+flabel metal3 s 583520 361238 584800 361350 0 FreeSans 1400 0 0 0 io_in_3v3[9]
+port 111 nsew
+flabel metal3 s 583520 5090 584800 5202 0 FreeSans 1400 0 0 0 io_oeb[0]
+port 112 nsew
+flabel metal3 s 583520 411206 584800 411318 0 FreeSans 1400 0 0 0 io_oeb[10]
+port 113 nsew
+flabel metal3 s 583520 455628 584800 455740 0 FreeSans 1400 0 0 0 io_oeb[11]
+port 114 nsew
+flabel metal3 s 583520 500050 584800 500162 0 FreeSans 1400 0 0 0 io_oeb[12]
+port 115 nsew
+flabel metal3 s 583520 589472 584800 589584 0 FreeSans 1400 0 0 0 io_oeb[13]
+port 116 nsew
+flabel metal3 s -800 505620 480 505732 0 FreeSans 1400 0 0 0 io_oeb[14]
+port 117 nsew
+flabel metal3 s -800 462398 480 462510 0 FreeSans 1400 0 0 0 io_oeb[15]
+port 118 nsew
+flabel metal3 s -800 419176 480 419288 0 FreeSans 1400 0 0 0 io_oeb[16]
+port 119 nsew
+flabel metal3 s -800 375954 480 376066 0 FreeSans 1400 0 0 0 io_oeb[17]
+port 120 nsew
+flabel metal3 s -800 332732 480 332844 0 FreeSans 1400 0 0 0 io_oeb[18]
+port 121 nsew
+flabel metal3 s -800 289510 480 289622 0 FreeSans 1400 0 0 0 io_oeb[19]
+port 122 nsew
+flabel metal3 s 583520 9818 584800 9930 0 FreeSans 1400 0 0 0 io_oeb[1]
+port 123 nsew
+flabel metal3 s -800 246488 480 246600 0 FreeSans 1400 0 0 0 io_oeb[20]
+port 124 nsew
+flabel metal3 s -800 118866 480 118978 0 FreeSans 1400 0 0 0 io_oeb[21]
+port 125 nsew
+flabel metal3 s -800 75644 480 75756 0 FreeSans 1400 0 0 0 io_oeb[22]
+port 126 nsew
+flabel metal3 s -800 32422 480 32534 0 FreeSans 1400 0 0 0 io_oeb[23]
+port 127 nsew
+flabel metal3 s -800 11000 480 11112 0 FreeSans 1400 0 0 0 io_oeb[24]
+port 128 nsew
+flabel metal3 s -800 6272 480 6384 0 FreeSans 1400 0 0 0 io_oeb[25]
+port 129 nsew
+flabel metal3 s -800 1544 480 1656 0 FreeSans 1400 0 0 0 io_oeb[26]
+port 130 nsew
+flabel metal3 s 583520 14546 584800 14658 0 FreeSans 1400 0 0 0 io_oeb[2]
+port 131 nsew
+flabel metal3 s 583520 19274 584800 19386 0 FreeSans 1400 0 0 0 io_oeb[3]
+port 132 nsew
+flabel metal3 s 583520 24002 584800 24114 0 FreeSans 1400 0 0 0 io_oeb[4]
+port 133 nsew
+flabel metal3 s 583520 50460 584800 50572 0 FreeSans 1400 0 0 0 io_oeb[5]
+port 134 nsew
+flabel metal3 s 583520 95118 584800 95230 0 FreeSans 1400 0 0 0 io_oeb[6]
+port 135 nsew
+flabel metal3 s 583520 275140 584800 275252 0 FreeSans 1400 0 0 0 io_oeb[7]
+port 136 nsew
+flabel metal3 s 583520 319562 584800 319674 0 FreeSans 1400 0 0 0 io_oeb[8]
+port 137 nsew
+flabel metal3 s 583520 364784 584800 364896 0 FreeSans 1400 0 0 0 io_oeb[9]
+port 138 nsew
+flabel metal3 s 583520 3908 584800 4020 0 FreeSans 1400 0 0 0 io_out[0]
+port 139 nsew
+flabel metal3 s 583520 410024 584800 410136 0 FreeSans 1400 0 0 0 io_out[10]
+port 140 nsew
+flabel metal3 s 583520 454446 584800 454558 0 FreeSans 1400 0 0 0 io_out[11]
+port 141 nsew
+flabel metal3 s 583520 498868 584800 498980 0 FreeSans 1400 0 0 0 io_out[12]
+port 142 nsew
+flabel metal3 s 583520 588290 584800 588402 0 FreeSans 1400 0 0 0 io_out[13]
+port 143 nsew
+flabel metal3 s -800 506802 480 506914 0 FreeSans 1400 0 0 0 io_out[14]
+port 144 nsew
+flabel metal3 s -800 463580 480 463692 0 FreeSans 1400 0 0 0 io_out[15]
+port 145 nsew
+flabel metal3 s -800 420358 480 420470 0 FreeSans 1400 0 0 0 io_out[16]
+port 146 nsew
+flabel metal3 s -800 377136 480 377248 0 FreeSans 1400 0 0 0 io_out[17]
+port 147 nsew
+flabel metal3 s -800 333914 480 334026 0 FreeSans 1400 0 0 0 io_out[18]
+port 148 nsew
+flabel metal3 s -800 290692 480 290804 0 FreeSans 1400 0 0 0 io_out[19]
+port 149 nsew
+flabel metal3 s 583520 8636 584800 8748 0 FreeSans 1400 0 0 0 io_out[1]
+port 150 nsew
+flabel metal3 s -800 247670 480 247782 0 FreeSans 1400 0 0 0 io_out[20]
+port 151 nsew
+flabel metal3 s -800 120048 480 120160 0 FreeSans 1400 0 0 0 io_out[21]
+port 152 nsew
+flabel metal3 s -800 76826 480 76938 0 FreeSans 1400 0 0 0 io_out[22]
+port 153 nsew
+flabel metal3 s -800 33604 480 33716 0 FreeSans 1400 0 0 0 io_out[23]
+port 154 nsew
+flabel metal3 s -800 12182 480 12294 0 FreeSans 1400 0 0 0 io_out[24]
+port 155 nsew
+flabel metal3 s -800 7454 480 7566 0 FreeSans 1400 0 0 0 io_out[25]
+port 156 nsew
+flabel metal3 s -800 2726 480 2838 0 FreeSans 1400 0 0 0 io_out[26]
+port 157 nsew
+flabel metal3 s 583520 13364 584800 13476 0 FreeSans 1400 0 0 0 io_out[2]
+port 158 nsew
+flabel metal3 s 583520 18092 584800 18204 0 FreeSans 1400 0 0 0 io_out[3]
+port 159 nsew
+flabel metal3 s 583520 22820 584800 22932 0 FreeSans 1400 0 0 0 io_out[4]
+port 160 nsew
+flabel metal3 s 583520 49278 584800 49390 0 FreeSans 1400 0 0 0 io_out[5]
+port 161 nsew
+flabel metal3 s 583520 93936 584800 94048 0 FreeSans 1400 0 0 0 io_out[6]
+port 162 nsew
+flabel metal3 s 583520 273958 584800 274070 0 FreeSans 1400 0 0 0 io_out[7]
+port 163 nsew
+flabel metal3 s 583520 318380 584800 318492 0 FreeSans 1400 0 0 0 io_out[8]
+port 164 nsew
+flabel metal3 s 583520 363602 584800 363714 0 FreeSans 1400 0 0 0 io_out[9]
+port 165 nsew
+flabel metal2 s 125816 -800 125928 480 0 FreeSans 1400 90 0 0 la_data_in[0]
+port 166 nsew
+flabel metal2 s 480416 -800 480528 480 0 FreeSans 1400 90 0 0 la_data_in[100]
+port 167 nsew
+flabel metal2 s 483962 -800 484074 480 0 FreeSans 1400 90 0 0 la_data_in[101]
+port 168 nsew
+flabel metal2 s 487508 -800 487620 480 0 FreeSans 1400 90 0 0 la_data_in[102]
+port 169 nsew
+flabel metal2 s 491054 -800 491166 480 0 FreeSans 1400 90 0 0 la_data_in[103]
+port 170 nsew
+flabel metal2 s 494600 -800 494712 480 0 FreeSans 1400 90 0 0 la_data_in[104]
+port 171 nsew
+flabel metal2 s 498146 -800 498258 480 0 FreeSans 1400 90 0 0 la_data_in[105]
+port 172 nsew
+flabel metal2 s 501692 -800 501804 480 0 FreeSans 1400 90 0 0 la_data_in[106]
+port 173 nsew
+flabel metal2 s 505238 -800 505350 480 0 FreeSans 1400 90 0 0 la_data_in[107]
+port 174 nsew
+flabel metal2 s 508784 -800 508896 480 0 FreeSans 1400 90 0 0 la_data_in[108]
+port 175 nsew
+flabel metal2 s 512330 -800 512442 480 0 FreeSans 1400 90 0 0 la_data_in[109]
+port 176 nsew
+flabel metal2 s 161276 -800 161388 480 0 FreeSans 1400 90 0 0 la_data_in[10]
+port 177 nsew
+flabel metal2 s 515876 -800 515988 480 0 FreeSans 1400 90 0 0 la_data_in[110]
+port 178 nsew
+flabel metal2 s 519422 -800 519534 480 0 FreeSans 1400 90 0 0 la_data_in[111]
+port 179 nsew
+flabel metal2 s 522968 -800 523080 480 0 FreeSans 1400 90 0 0 la_data_in[112]
+port 180 nsew
+flabel metal2 s 526514 -800 526626 480 0 FreeSans 1400 90 0 0 la_data_in[113]
+port 181 nsew
+flabel metal2 s 530060 -800 530172 480 0 FreeSans 1400 90 0 0 la_data_in[114]
+port 182 nsew
+flabel metal2 s 533606 -800 533718 480 0 FreeSans 1400 90 0 0 la_data_in[115]
+port 183 nsew
+flabel metal2 s 537152 -800 537264 480 0 FreeSans 1400 90 0 0 la_data_in[116]
+port 184 nsew
+flabel metal2 s 540698 -800 540810 480 0 FreeSans 1400 90 0 0 la_data_in[117]
+port 185 nsew
+flabel metal2 s 544244 -800 544356 480 0 FreeSans 1400 90 0 0 la_data_in[118]
+port 186 nsew
+flabel metal2 s 547790 -800 547902 480 0 FreeSans 1400 90 0 0 la_data_in[119]
+port 187 nsew
+flabel metal2 s 164822 -800 164934 480 0 FreeSans 1400 90 0 0 la_data_in[11]
+port 188 nsew
+flabel metal2 s 551336 -800 551448 480 0 FreeSans 1400 90 0 0 la_data_in[120]
+port 189 nsew
+flabel metal2 s 554882 -800 554994 480 0 FreeSans 1400 90 0 0 la_data_in[121]
+port 190 nsew
+flabel metal2 s 558428 -800 558540 480 0 FreeSans 1400 90 0 0 la_data_in[122]
+port 191 nsew
+flabel metal2 s 561974 -800 562086 480 0 FreeSans 1400 90 0 0 la_data_in[123]
+port 192 nsew
+flabel metal2 s 565520 -800 565632 480 0 FreeSans 1400 90 0 0 la_data_in[124]
+port 193 nsew
+flabel metal2 s 569066 -800 569178 480 0 FreeSans 1400 90 0 0 la_data_in[125]
+port 194 nsew
+flabel metal2 s 572612 -800 572724 480 0 FreeSans 1400 90 0 0 la_data_in[126]
+port 195 nsew
+flabel metal2 s 576158 -800 576270 480 0 FreeSans 1400 90 0 0 la_data_in[127]
+port 196 nsew
+flabel metal2 s 168368 -800 168480 480 0 FreeSans 1400 90 0 0 la_data_in[12]
+port 197 nsew
+flabel metal2 s 171914 -800 172026 480 0 FreeSans 1400 90 0 0 la_data_in[13]
+port 198 nsew
+flabel metal2 s 175460 -800 175572 480 0 FreeSans 1400 90 0 0 la_data_in[14]
+port 199 nsew
+flabel metal2 s 179006 -800 179118 480 0 FreeSans 1400 90 0 0 la_data_in[15]
+port 200 nsew
+flabel metal2 s 182552 -800 182664 480 0 FreeSans 1400 90 0 0 la_data_in[16]
+port 201 nsew
+flabel metal2 s 186098 -800 186210 480 0 FreeSans 1400 90 0 0 la_data_in[17]
+port 202 nsew
+flabel metal2 s 189644 -800 189756 480 0 FreeSans 1400 90 0 0 la_data_in[18]
+port 203 nsew
+flabel metal2 s 193190 -800 193302 480 0 FreeSans 1400 90 0 0 la_data_in[19]
+port 204 nsew
+flabel metal2 s 129362 -800 129474 480 0 FreeSans 1400 90 0 0 la_data_in[1]
+port 205 nsew
+flabel metal2 s 196736 -800 196848 480 0 FreeSans 1400 90 0 0 la_data_in[20]
+port 206 nsew
+flabel metal2 s 200282 -800 200394 480 0 FreeSans 1400 90 0 0 la_data_in[21]
+port 207 nsew
+flabel metal2 s 203828 -800 203940 480 0 FreeSans 1400 90 0 0 la_data_in[22]
+port 208 nsew
+flabel metal2 s 207374 -800 207486 480 0 FreeSans 1400 90 0 0 la_data_in[23]
+port 209 nsew
+flabel metal2 s 210920 -800 211032 480 0 FreeSans 1400 90 0 0 la_data_in[24]
+port 210 nsew
+flabel metal2 s 214466 -800 214578 480 0 FreeSans 1400 90 0 0 la_data_in[25]
+port 211 nsew
+flabel metal2 s 218012 -800 218124 480 0 FreeSans 1400 90 0 0 la_data_in[26]
+port 212 nsew
+flabel metal2 s 221558 -800 221670 480 0 FreeSans 1400 90 0 0 la_data_in[27]
+port 213 nsew
+flabel metal2 s 225104 -800 225216 480 0 FreeSans 1400 90 0 0 la_data_in[28]
+port 214 nsew
+flabel metal2 s 228650 -800 228762 480 0 FreeSans 1400 90 0 0 la_data_in[29]
+port 215 nsew
+flabel metal2 s 132908 -800 133020 480 0 FreeSans 1400 90 0 0 la_data_in[2]
+port 216 nsew
+flabel metal2 s 232196 -800 232308 480 0 FreeSans 1400 90 0 0 la_data_in[30]
+port 217 nsew
+flabel metal2 s 235742 -800 235854 480 0 FreeSans 1400 90 0 0 la_data_in[31]
+port 218 nsew
+flabel metal2 s 239288 -800 239400 480 0 FreeSans 1400 90 0 0 la_data_in[32]
+port 219 nsew
+flabel metal2 s 242834 -800 242946 480 0 FreeSans 1400 90 0 0 la_data_in[33]
+port 220 nsew
+flabel metal2 s 246380 -800 246492 480 0 FreeSans 1400 90 0 0 la_data_in[34]
+port 221 nsew
+flabel metal2 s 249926 -800 250038 480 0 FreeSans 1400 90 0 0 la_data_in[35]
+port 222 nsew
+flabel metal2 s 253472 -800 253584 480 0 FreeSans 1400 90 0 0 la_data_in[36]
+port 223 nsew
+flabel metal2 s 257018 -800 257130 480 0 FreeSans 1400 90 0 0 la_data_in[37]
+port 224 nsew
+flabel metal2 s 260564 -800 260676 480 0 FreeSans 1400 90 0 0 la_data_in[38]
+port 225 nsew
+flabel metal2 s 264110 -800 264222 480 0 FreeSans 1400 90 0 0 la_data_in[39]
+port 226 nsew
+flabel metal2 s 136454 -800 136566 480 0 FreeSans 1400 90 0 0 la_data_in[3]
+port 227 nsew
+flabel metal2 s 267656 -800 267768 480 0 FreeSans 1400 90 0 0 la_data_in[40]
+port 228 nsew
+flabel metal2 s 271202 -800 271314 480 0 FreeSans 1400 90 0 0 la_data_in[41]
+port 229 nsew
+flabel metal2 s 274748 -800 274860 480 0 FreeSans 1400 90 0 0 la_data_in[42]
+port 230 nsew
+flabel metal2 s 278294 -800 278406 480 0 FreeSans 1400 90 0 0 la_data_in[43]
+port 231 nsew
+flabel metal2 s 281840 -800 281952 480 0 FreeSans 1400 90 0 0 la_data_in[44]
+port 232 nsew
+flabel metal2 s 285386 -800 285498 480 0 FreeSans 1400 90 0 0 la_data_in[45]
+port 233 nsew
+flabel metal2 s 288932 -800 289044 480 0 FreeSans 1400 90 0 0 la_data_in[46]
+port 234 nsew
+flabel metal2 s 292478 -800 292590 480 0 FreeSans 1400 90 0 0 la_data_in[47]
+port 235 nsew
+flabel metal2 s 296024 -800 296136 480 0 FreeSans 1400 90 0 0 la_data_in[48]
+port 236 nsew
+flabel metal2 s 299570 -800 299682 480 0 FreeSans 1400 90 0 0 la_data_in[49]
+port 237 nsew
+flabel metal2 s 140000 -800 140112 480 0 FreeSans 1400 90 0 0 la_data_in[4]
+port 238 nsew
+flabel metal2 s 303116 -800 303228 480 0 FreeSans 1400 90 0 0 la_data_in[50]
+port 239 nsew
+flabel metal2 s 306662 -800 306774 480 0 FreeSans 1400 90 0 0 la_data_in[51]
+port 240 nsew
+flabel metal2 s 310208 -800 310320 480 0 FreeSans 1400 90 0 0 la_data_in[52]
+port 241 nsew
+flabel metal2 s 313754 -800 313866 480 0 FreeSans 1400 90 0 0 la_data_in[53]
+port 242 nsew
+flabel metal2 s 317300 -800 317412 480 0 FreeSans 1400 90 0 0 la_data_in[54]
+port 243 nsew
+flabel metal2 s 320846 -800 320958 480 0 FreeSans 1400 90 0 0 la_data_in[55]
+port 244 nsew
+flabel metal2 s 324392 -800 324504 480 0 FreeSans 1400 90 0 0 la_data_in[56]
+port 245 nsew
+flabel metal2 s 327938 -800 328050 480 0 FreeSans 1400 90 0 0 la_data_in[57]
+port 246 nsew
+flabel metal2 s 331484 -800 331596 480 0 FreeSans 1400 90 0 0 la_data_in[58]
+port 247 nsew
+flabel metal2 s 335030 -800 335142 480 0 FreeSans 1400 90 0 0 la_data_in[59]
+port 248 nsew
+flabel metal2 s 143546 -800 143658 480 0 FreeSans 1400 90 0 0 la_data_in[5]
+port 249 nsew
+flabel metal2 s 338576 -800 338688 480 0 FreeSans 1400 90 0 0 la_data_in[60]
+port 250 nsew
+flabel metal2 s 342122 -800 342234 480 0 FreeSans 1400 90 0 0 la_data_in[61]
+port 251 nsew
+flabel metal2 s 345668 -800 345780 480 0 FreeSans 1400 90 0 0 la_data_in[62]
+port 252 nsew
+flabel metal2 s 349214 -800 349326 480 0 FreeSans 1400 90 0 0 la_data_in[63]
+port 253 nsew
+flabel metal2 s 352760 -800 352872 480 0 FreeSans 1400 90 0 0 la_data_in[64]
+port 254 nsew
+flabel metal2 s 356306 -800 356418 480 0 FreeSans 1400 90 0 0 la_data_in[65]
+port 255 nsew
+flabel metal2 s 359852 -800 359964 480 0 FreeSans 1400 90 0 0 la_data_in[66]
+port 256 nsew
+flabel metal2 s 363398 -800 363510 480 0 FreeSans 1400 90 0 0 la_data_in[67]
+port 257 nsew
+flabel metal2 s 366944 -800 367056 480 0 FreeSans 1400 90 0 0 la_data_in[68]
+port 258 nsew
+flabel metal2 s 370490 -800 370602 480 0 FreeSans 1400 90 0 0 la_data_in[69]
+port 259 nsew
+flabel metal2 s 147092 -800 147204 480 0 FreeSans 1400 90 0 0 la_data_in[6]
+port 260 nsew
+flabel metal2 s 374036 -800 374148 480 0 FreeSans 1400 90 0 0 la_data_in[70]
+port 261 nsew
+flabel metal2 s 377582 -800 377694 480 0 FreeSans 1400 90 0 0 la_data_in[71]
+port 262 nsew
+flabel metal2 s 381128 -800 381240 480 0 FreeSans 1400 90 0 0 la_data_in[72]
+port 263 nsew
+flabel metal2 s 384674 -800 384786 480 0 FreeSans 1400 90 0 0 la_data_in[73]
+port 264 nsew
+flabel metal2 s 388220 -800 388332 480 0 FreeSans 1400 90 0 0 la_data_in[74]
+port 265 nsew
+flabel metal2 s 391766 -800 391878 480 0 FreeSans 1400 90 0 0 la_data_in[75]
+port 266 nsew
+flabel metal2 s 395312 -800 395424 480 0 FreeSans 1400 90 0 0 la_data_in[76]
+port 267 nsew
+flabel metal2 s 398858 -800 398970 480 0 FreeSans 1400 90 0 0 la_data_in[77]
+port 268 nsew
+flabel metal2 s 402404 -800 402516 480 0 FreeSans 1400 90 0 0 la_data_in[78]
+port 269 nsew
+flabel metal2 s 405950 -800 406062 480 0 FreeSans 1400 90 0 0 la_data_in[79]
+port 270 nsew
+flabel metal2 s 150638 -800 150750 480 0 FreeSans 1400 90 0 0 la_data_in[7]
+port 271 nsew
+flabel metal2 s 409496 -800 409608 480 0 FreeSans 1400 90 0 0 la_data_in[80]
+port 272 nsew
+flabel metal2 s 413042 -800 413154 480 0 FreeSans 1400 90 0 0 la_data_in[81]
+port 273 nsew
+flabel metal2 s 416588 -800 416700 480 0 FreeSans 1400 90 0 0 la_data_in[82]
+port 274 nsew
+flabel metal2 s 420134 -800 420246 480 0 FreeSans 1400 90 0 0 la_data_in[83]
+port 275 nsew
+flabel metal2 s 423680 -800 423792 480 0 FreeSans 1400 90 0 0 la_data_in[84]
+port 276 nsew
+flabel metal2 s 427226 -800 427338 480 0 FreeSans 1400 90 0 0 la_data_in[85]
+port 277 nsew
+flabel metal2 s 430772 -800 430884 480 0 FreeSans 1400 90 0 0 la_data_in[86]
+port 278 nsew
+flabel metal2 s 434318 -800 434430 480 0 FreeSans 1400 90 0 0 la_data_in[87]
+port 279 nsew
+flabel metal2 s 437864 -800 437976 480 0 FreeSans 1400 90 0 0 la_data_in[88]
+port 280 nsew
+flabel metal2 s 441410 -800 441522 480 0 FreeSans 1400 90 0 0 la_data_in[89]
+port 281 nsew
+flabel metal2 s 154184 -800 154296 480 0 FreeSans 1400 90 0 0 la_data_in[8]
+port 282 nsew
+flabel metal2 s 444956 -800 445068 480 0 FreeSans 1400 90 0 0 la_data_in[90]
+port 283 nsew
+flabel metal2 s 448502 -800 448614 480 0 FreeSans 1400 90 0 0 la_data_in[91]
+port 284 nsew
+flabel metal2 s 452048 -800 452160 480 0 FreeSans 1400 90 0 0 la_data_in[92]
+port 285 nsew
+flabel metal2 s 455594 -800 455706 480 0 FreeSans 1400 90 0 0 la_data_in[93]
+port 286 nsew
+flabel metal2 s 459140 -800 459252 480 0 FreeSans 1400 90 0 0 la_data_in[94]
+port 287 nsew
+flabel metal2 s 462686 -800 462798 480 0 FreeSans 1400 90 0 0 la_data_in[95]
+port 288 nsew
+flabel metal2 s 466232 -800 466344 480 0 FreeSans 1400 90 0 0 la_data_in[96]
+port 289 nsew
+flabel metal2 s 469778 -800 469890 480 0 FreeSans 1400 90 0 0 la_data_in[97]
+port 290 nsew
+flabel metal2 s 473324 -800 473436 480 0 FreeSans 1400 90 0 0 la_data_in[98]
+port 291 nsew
+flabel metal2 s 476870 -800 476982 480 0 FreeSans 1400 90 0 0 la_data_in[99]
+port 292 nsew
+flabel metal2 s 157730 -800 157842 480 0 FreeSans 1400 90 0 0 la_data_in[9]
+port 293 nsew
+flabel metal2 s 126998 -800 127110 480 0 FreeSans 1400 90 0 0 la_data_out[0]
+port 294 nsew
+flabel metal2 s 481598 -800 481710 480 0 FreeSans 1400 90 0 0 la_data_out[100]
+port 295 nsew
+flabel metal2 s 485144 -800 485256 480 0 FreeSans 1400 90 0 0 la_data_out[101]
+port 296 nsew
+flabel metal2 s 488690 -800 488802 480 0 FreeSans 1400 90 0 0 la_data_out[102]
+port 297 nsew
+flabel metal2 s 492236 -800 492348 480 0 FreeSans 1400 90 0 0 la_data_out[103]
+port 298 nsew
+flabel metal2 s 495782 -800 495894 480 0 FreeSans 1400 90 0 0 la_data_out[104]
+port 299 nsew
+flabel metal2 s 499328 -800 499440 480 0 FreeSans 1400 90 0 0 la_data_out[105]
+port 300 nsew
+flabel metal2 s 502874 -800 502986 480 0 FreeSans 1400 90 0 0 la_data_out[106]
+port 301 nsew
+flabel metal2 s 506420 -800 506532 480 0 FreeSans 1400 90 0 0 la_data_out[107]
+port 302 nsew
+flabel metal2 s 509966 -800 510078 480 0 FreeSans 1400 90 0 0 la_data_out[108]
+port 303 nsew
+flabel metal2 s 513512 -800 513624 480 0 FreeSans 1400 90 0 0 la_data_out[109]
+port 304 nsew
+flabel metal2 s 162458 -800 162570 480 0 FreeSans 1400 90 0 0 la_data_out[10]
+port 305 nsew
+flabel metal2 s 517058 -800 517170 480 0 FreeSans 1400 90 0 0 la_data_out[110]
+port 306 nsew
+flabel metal2 s 520604 -800 520716 480 0 FreeSans 1400 90 0 0 la_data_out[111]
+port 307 nsew
+flabel metal2 s 524150 -800 524262 480 0 FreeSans 1400 90 0 0 la_data_out[112]
+port 308 nsew
+flabel metal2 s 527696 -800 527808 480 0 FreeSans 1400 90 0 0 la_data_out[113]
+port 309 nsew
+flabel metal2 s 531242 -800 531354 480 0 FreeSans 1400 90 0 0 la_data_out[114]
+port 310 nsew
+flabel metal2 s 534788 -800 534900 480 0 FreeSans 1400 90 0 0 la_data_out[115]
+port 311 nsew
+flabel metal2 s 538334 -800 538446 480 0 FreeSans 1400 90 0 0 la_data_out[116]
+port 312 nsew
+flabel metal2 s 541880 -800 541992 480 0 FreeSans 1400 90 0 0 la_data_out[117]
+port 313 nsew
+flabel metal2 s 545426 -800 545538 480 0 FreeSans 1400 90 0 0 la_data_out[118]
+port 314 nsew
+flabel metal2 s 548972 -800 549084 480 0 FreeSans 1400 90 0 0 la_data_out[119]
+port 315 nsew
+flabel metal2 s 166004 -800 166116 480 0 FreeSans 1400 90 0 0 la_data_out[11]
+port 316 nsew
+flabel metal2 s 552518 -800 552630 480 0 FreeSans 1400 90 0 0 la_data_out[120]
+port 317 nsew
+flabel metal2 s 556064 -800 556176 480 0 FreeSans 1400 90 0 0 la_data_out[121]
+port 318 nsew
+flabel metal2 s 559610 -800 559722 480 0 FreeSans 1400 90 0 0 la_data_out[122]
+port 319 nsew
+flabel metal2 s 563156 -800 563268 480 0 FreeSans 1400 90 0 0 la_data_out[123]
+port 320 nsew
+flabel metal2 s 566702 -800 566814 480 0 FreeSans 1400 90 0 0 la_data_out[124]
+port 321 nsew
+flabel metal2 s 570248 -800 570360 480 0 FreeSans 1400 90 0 0 la_data_out[125]
+port 322 nsew
+flabel metal2 s 573794 -800 573906 480 0 FreeSans 1400 90 0 0 la_data_out[126]
+port 323 nsew
+flabel metal2 s 577340 -800 577452 480 0 FreeSans 1400 90 0 0 la_data_out[127]
+port 324 nsew
+flabel metal2 s 169550 -800 169662 480 0 FreeSans 1400 90 0 0 la_data_out[12]
+port 325 nsew
+flabel metal2 s 173096 -800 173208 480 0 FreeSans 1400 90 0 0 la_data_out[13]
+port 326 nsew
+flabel metal2 s 176642 -800 176754 480 0 FreeSans 1400 90 0 0 la_data_out[14]
+port 327 nsew
+flabel metal2 s 180188 -800 180300 480 0 FreeSans 1400 90 0 0 la_data_out[15]
+port 328 nsew
+flabel metal2 s 183734 -800 183846 480 0 FreeSans 1400 90 0 0 la_data_out[16]
+port 329 nsew
+flabel metal2 s 187280 -800 187392 480 0 FreeSans 1400 90 0 0 la_data_out[17]
+port 330 nsew
+flabel metal2 s 190826 -800 190938 480 0 FreeSans 1400 90 0 0 la_data_out[18]
+port 331 nsew
+flabel metal2 s 194372 -800 194484 480 0 FreeSans 1400 90 0 0 la_data_out[19]
+port 332 nsew
+flabel metal2 s 130544 -800 130656 480 0 FreeSans 1400 90 0 0 la_data_out[1]
+port 333 nsew
+flabel metal2 s 197918 -800 198030 480 0 FreeSans 1400 90 0 0 la_data_out[20]
+port 334 nsew
+flabel metal2 s 201464 -800 201576 480 0 FreeSans 1400 90 0 0 la_data_out[21]
+port 335 nsew
+flabel metal2 s 205010 -800 205122 480 0 FreeSans 1400 90 0 0 la_data_out[22]
+port 336 nsew
+flabel metal2 s 208556 -800 208668 480 0 FreeSans 1400 90 0 0 la_data_out[23]
+port 337 nsew
+flabel metal2 s 212102 -800 212214 480 0 FreeSans 1400 90 0 0 la_data_out[24]
+port 338 nsew
+flabel metal2 s 215648 -800 215760 480 0 FreeSans 1400 90 0 0 la_data_out[25]
+port 339 nsew
+flabel metal2 s 219194 -800 219306 480 0 FreeSans 1400 90 0 0 la_data_out[26]
+port 340 nsew
+flabel metal2 s 222740 -800 222852 480 0 FreeSans 1400 90 0 0 la_data_out[27]
+port 341 nsew
+flabel metal2 s 226286 -800 226398 480 0 FreeSans 1400 90 0 0 la_data_out[28]
+port 342 nsew
+flabel metal2 s 229832 -800 229944 480 0 FreeSans 1400 90 0 0 la_data_out[29]
+port 343 nsew
+flabel metal2 s 134090 -800 134202 480 0 FreeSans 1400 90 0 0 la_data_out[2]
+port 344 nsew
+flabel metal2 s 233378 -800 233490 480 0 FreeSans 1400 90 0 0 la_data_out[30]
+port 345 nsew
+flabel metal2 s 236924 -800 237036 480 0 FreeSans 1400 90 0 0 la_data_out[31]
+port 346 nsew
+flabel metal2 s 240470 -800 240582 480 0 FreeSans 1400 90 0 0 la_data_out[32]
+port 347 nsew
+flabel metal2 s 244016 -800 244128 480 0 FreeSans 1400 90 0 0 la_data_out[33]
+port 348 nsew
+flabel metal2 s 247562 -800 247674 480 0 FreeSans 1400 90 0 0 la_data_out[34]
+port 349 nsew
+flabel metal2 s 251108 -800 251220 480 0 FreeSans 1400 90 0 0 la_data_out[35]
+port 350 nsew
+flabel metal2 s 254654 -800 254766 480 0 FreeSans 1400 90 0 0 la_data_out[36]
+port 351 nsew
+flabel metal2 s 258200 -800 258312 480 0 FreeSans 1400 90 0 0 la_data_out[37]
+port 352 nsew
+flabel metal2 s 261746 -800 261858 480 0 FreeSans 1400 90 0 0 la_data_out[38]
+port 353 nsew
+flabel metal2 s 265292 -800 265404 480 0 FreeSans 1400 90 0 0 la_data_out[39]
+port 354 nsew
+flabel metal2 s 137636 -800 137748 480 0 FreeSans 1400 90 0 0 la_data_out[3]
+port 355 nsew
+flabel metal2 s 268838 -800 268950 480 0 FreeSans 1400 90 0 0 la_data_out[40]
+port 356 nsew
+flabel metal2 s 272384 -800 272496 480 0 FreeSans 1400 90 0 0 la_data_out[41]
+port 357 nsew
+flabel metal2 s 275930 -800 276042 480 0 FreeSans 1400 90 0 0 la_data_out[42]
+port 358 nsew
+flabel metal2 s 279476 -800 279588 480 0 FreeSans 1400 90 0 0 la_data_out[43]
+port 359 nsew
+flabel metal2 s 283022 -800 283134 480 0 FreeSans 1400 90 0 0 la_data_out[44]
+port 360 nsew
+flabel metal2 s 286568 -800 286680 480 0 FreeSans 1400 90 0 0 la_data_out[45]
+port 361 nsew
+flabel metal2 s 290114 -800 290226 480 0 FreeSans 1400 90 0 0 la_data_out[46]
+port 362 nsew
+flabel metal2 s 293660 -800 293772 480 0 FreeSans 1400 90 0 0 la_data_out[47]
+port 363 nsew
+flabel metal2 s 297206 -800 297318 480 0 FreeSans 1400 90 0 0 la_data_out[48]
+port 364 nsew
+flabel metal2 s 300752 -800 300864 480 0 FreeSans 1400 90 0 0 la_data_out[49]
+port 365 nsew
+flabel metal2 s 141182 -800 141294 480 0 FreeSans 1400 90 0 0 la_data_out[4]
+port 366 nsew
+flabel metal2 s 304298 -800 304410 480 0 FreeSans 1400 90 0 0 la_data_out[50]
+port 367 nsew
+flabel metal2 s 307844 -800 307956 480 0 FreeSans 1400 90 0 0 la_data_out[51]
+port 368 nsew
+flabel metal2 s 311390 -800 311502 480 0 FreeSans 1400 90 0 0 la_data_out[52]
+port 369 nsew
+flabel metal2 s 314936 -800 315048 480 0 FreeSans 1400 90 0 0 la_data_out[53]
+port 370 nsew
+flabel metal2 s 318482 -800 318594 480 0 FreeSans 1400 90 0 0 la_data_out[54]
+port 371 nsew
+flabel metal2 s 322028 -800 322140 480 0 FreeSans 1400 90 0 0 la_data_out[55]
+port 372 nsew
+flabel metal2 s 325574 -800 325686 480 0 FreeSans 1400 90 0 0 la_data_out[56]
+port 373 nsew
+flabel metal2 s 329120 -800 329232 480 0 FreeSans 1400 90 0 0 la_data_out[57]
+port 374 nsew
+flabel metal2 s 332666 -800 332778 480 0 FreeSans 1400 90 0 0 la_data_out[58]
+port 375 nsew
+flabel metal2 s 336212 -800 336324 480 0 FreeSans 1400 90 0 0 la_data_out[59]
+port 376 nsew
+flabel metal2 s 144728 -800 144840 480 0 FreeSans 1400 90 0 0 la_data_out[5]
+port 377 nsew
+flabel metal2 s 339758 -800 339870 480 0 FreeSans 1400 90 0 0 la_data_out[60]
+port 378 nsew
+flabel metal2 s 343304 -800 343416 480 0 FreeSans 1400 90 0 0 la_data_out[61]
+port 379 nsew
+flabel metal2 s 346850 -800 346962 480 0 FreeSans 1400 90 0 0 la_data_out[62]
+port 380 nsew
+flabel metal2 s 350396 -800 350508 480 0 FreeSans 1400 90 0 0 la_data_out[63]
+port 381 nsew
+flabel metal2 s 353942 -800 354054 480 0 FreeSans 1400 90 0 0 la_data_out[64]
+port 382 nsew
+flabel metal2 s 357488 -800 357600 480 0 FreeSans 1400 90 0 0 la_data_out[65]
+port 383 nsew
+flabel metal2 s 361034 -800 361146 480 0 FreeSans 1400 90 0 0 la_data_out[66]
+port 384 nsew
+flabel metal2 s 364580 -800 364692 480 0 FreeSans 1400 90 0 0 la_data_out[67]
+port 385 nsew
+flabel metal2 s 368126 -800 368238 480 0 FreeSans 1400 90 0 0 la_data_out[68]
+port 386 nsew
+flabel metal2 s 371672 -800 371784 480 0 FreeSans 1400 90 0 0 la_data_out[69]
+port 387 nsew
+flabel metal2 s 148274 -800 148386 480 0 FreeSans 1400 90 0 0 la_data_out[6]
+port 388 nsew
+flabel metal2 s 375218 -800 375330 480 0 FreeSans 1400 90 0 0 la_data_out[70]
+port 389 nsew
+flabel metal2 s 378764 -800 378876 480 0 FreeSans 1400 90 0 0 la_data_out[71]
+port 390 nsew
+flabel metal2 s 382310 -800 382422 480 0 FreeSans 1400 90 0 0 la_data_out[72]
+port 391 nsew
+flabel metal2 s 385856 -800 385968 480 0 FreeSans 1400 90 0 0 la_data_out[73]
+port 392 nsew
+flabel metal2 s 389402 -800 389514 480 0 FreeSans 1400 90 0 0 la_data_out[74]
+port 393 nsew
+flabel metal2 s 392948 -800 393060 480 0 FreeSans 1400 90 0 0 la_data_out[75]
+port 394 nsew
+flabel metal2 s 396494 -800 396606 480 0 FreeSans 1400 90 0 0 la_data_out[76]
+port 395 nsew
+flabel metal2 s 400040 -800 400152 480 0 FreeSans 1400 90 0 0 la_data_out[77]
+port 396 nsew
+flabel metal2 s 403586 -800 403698 480 0 FreeSans 1400 90 0 0 la_data_out[78]
+port 397 nsew
+flabel metal2 s 407132 -800 407244 480 0 FreeSans 1400 90 0 0 la_data_out[79]
+port 398 nsew
+flabel metal2 s 151820 -800 151932 480 0 FreeSans 1400 90 0 0 la_data_out[7]
+port 399 nsew
+flabel metal2 s 410678 -800 410790 480 0 FreeSans 1400 90 0 0 la_data_out[80]
+port 400 nsew
+flabel metal2 s 414224 -800 414336 480 0 FreeSans 1400 90 0 0 la_data_out[81]
+port 401 nsew
+flabel metal2 s 417770 -800 417882 480 0 FreeSans 1400 90 0 0 la_data_out[82]
+port 402 nsew
+flabel metal2 s 421316 -800 421428 480 0 FreeSans 1400 90 0 0 la_data_out[83]
+port 403 nsew
+flabel metal2 s 424862 -800 424974 480 0 FreeSans 1400 90 0 0 la_data_out[84]
+port 404 nsew
+flabel metal2 s 428408 -800 428520 480 0 FreeSans 1400 90 0 0 la_data_out[85]
+port 405 nsew
+flabel metal2 s 431954 -800 432066 480 0 FreeSans 1400 90 0 0 la_data_out[86]
+port 406 nsew
+flabel metal2 s 435500 -800 435612 480 0 FreeSans 1400 90 0 0 la_data_out[87]
+port 407 nsew
+flabel metal2 s 439046 -800 439158 480 0 FreeSans 1400 90 0 0 la_data_out[88]
+port 408 nsew
+flabel metal2 s 442592 -800 442704 480 0 FreeSans 1400 90 0 0 la_data_out[89]
+port 409 nsew
+flabel metal2 s 155366 -800 155478 480 0 FreeSans 1400 90 0 0 la_data_out[8]
+port 410 nsew
+flabel metal2 s 446138 -800 446250 480 0 FreeSans 1400 90 0 0 la_data_out[90]
+port 411 nsew
+flabel metal2 s 449684 -800 449796 480 0 FreeSans 1400 90 0 0 la_data_out[91]
+port 412 nsew
+flabel metal2 s 453230 -800 453342 480 0 FreeSans 1400 90 0 0 la_data_out[92]
+port 413 nsew
+flabel metal2 s 456776 -800 456888 480 0 FreeSans 1400 90 0 0 la_data_out[93]
+port 414 nsew
+flabel metal2 s 460322 -800 460434 480 0 FreeSans 1400 90 0 0 la_data_out[94]
+port 415 nsew
+flabel metal2 s 463868 -800 463980 480 0 FreeSans 1400 90 0 0 la_data_out[95]
+port 416 nsew
+flabel metal2 s 467414 -800 467526 480 0 FreeSans 1400 90 0 0 la_data_out[96]
+port 417 nsew
+flabel metal2 s 470960 -800 471072 480 0 FreeSans 1400 90 0 0 la_data_out[97]
+port 418 nsew
+flabel metal2 s 474506 -800 474618 480 0 FreeSans 1400 90 0 0 la_data_out[98]
+port 419 nsew
+flabel metal2 s 478052 -800 478164 480 0 FreeSans 1400 90 0 0 la_data_out[99]
+port 420 nsew
+flabel metal2 s 158912 -800 159024 480 0 FreeSans 1400 90 0 0 la_data_out[9]
+port 421 nsew
+flabel metal2 s 128180 -800 128292 480 0 FreeSans 1400 90 0 0 la_oenb[0]
+port 422 nsew
+flabel metal2 s 482780 -800 482892 480 0 FreeSans 1400 90 0 0 la_oenb[100]
+port 423 nsew
+flabel metal2 s 486326 -800 486438 480 0 FreeSans 1400 90 0 0 la_oenb[101]
+port 424 nsew
+flabel metal2 s 489872 -800 489984 480 0 FreeSans 1400 90 0 0 la_oenb[102]
+port 425 nsew
+flabel metal2 s 493418 -800 493530 480 0 FreeSans 1400 90 0 0 la_oenb[103]
+port 426 nsew
+flabel metal2 s 496964 -800 497076 480 0 FreeSans 1400 90 0 0 la_oenb[104]
+port 427 nsew
+flabel metal2 s 500510 -800 500622 480 0 FreeSans 1400 90 0 0 la_oenb[105]
+port 428 nsew
+flabel metal2 s 504056 -800 504168 480 0 FreeSans 1400 90 0 0 la_oenb[106]
+port 429 nsew
+flabel metal2 s 507602 -800 507714 480 0 FreeSans 1400 90 0 0 la_oenb[107]
+port 430 nsew
+flabel metal2 s 511148 -800 511260 480 0 FreeSans 1400 90 0 0 la_oenb[108]
+port 431 nsew
+flabel metal2 s 514694 -800 514806 480 0 FreeSans 1400 90 0 0 la_oenb[109]
+port 432 nsew
+flabel metal2 s 163640 -800 163752 480 0 FreeSans 1400 90 0 0 la_oenb[10]
+port 433 nsew
+flabel metal2 s 518240 -800 518352 480 0 FreeSans 1400 90 0 0 la_oenb[110]
+port 434 nsew
+flabel metal2 s 521786 -800 521898 480 0 FreeSans 1400 90 0 0 la_oenb[111]
+port 435 nsew
+flabel metal2 s 525332 -800 525444 480 0 FreeSans 1400 90 0 0 la_oenb[112]
+port 436 nsew
+flabel metal2 s 528878 -800 528990 480 0 FreeSans 1400 90 0 0 la_oenb[113]
+port 437 nsew
+flabel metal2 s 532424 -800 532536 480 0 FreeSans 1400 90 0 0 la_oenb[114]
+port 438 nsew
+flabel metal2 s 535970 -800 536082 480 0 FreeSans 1400 90 0 0 la_oenb[115]
+port 439 nsew
+flabel metal2 s 539516 -800 539628 480 0 FreeSans 1400 90 0 0 la_oenb[116]
+port 440 nsew
+flabel metal2 s 543062 -800 543174 480 0 FreeSans 1400 90 0 0 la_oenb[117]
+port 441 nsew
+flabel metal2 s 546608 -800 546720 480 0 FreeSans 1400 90 0 0 la_oenb[118]
+port 442 nsew
+flabel metal2 s 550154 -800 550266 480 0 FreeSans 1400 90 0 0 la_oenb[119]
+port 443 nsew
+flabel metal2 s 167186 -800 167298 480 0 FreeSans 1400 90 0 0 la_oenb[11]
+port 444 nsew
+flabel metal2 s 553700 -800 553812 480 0 FreeSans 1400 90 0 0 la_oenb[120]
+port 445 nsew
+flabel metal2 s 557246 -800 557358 480 0 FreeSans 1400 90 0 0 la_oenb[121]
+port 446 nsew
+flabel metal2 s 560792 -800 560904 480 0 FreeSans 1400 90 0 0 la_oenb[122]
+port 447 nsew
+flabel metal2 s 564338 -800 564450 480 0 FreeSans 1400 90 0 0 la_oenb[123]
+port 448 nsew
+flabel metal2 s 567884 -800 567996 480 0 FreeSans 1400 90 0 0 la_oenb[124]
+port 449 nsew
+flabel metal2 s 571430 -800 571542 480 0 FreeSans 1400 90 0 0 la_oenb[125]
+port 450 nsew
+flabel metal2 s 574976 -800 575088 480 0 FreeSans 1400 90 0 0 la_oenb[126]
+port 451 nsew
+flabel metal2 s 578522 -800 578634 480 0 FreeSans 1400 90 0 0 la_oenb[127]
+port 452 nsew
+flabel metal2 s 170732 -800 170844 480 0 FreeSans 1400 90 0 0 la_oenb[12]
+port 453 nsew
+flabel metal2 s 174278 -800 174390 480 0 FreeSans 1400 90 0 0 la_oenb[13]
+port 454 nsew
+flabel metal2 s 177824 -800 177936 480 0 FreeSans 1400 90 0 0 la_oenb[14]
+port 455 nsew
+flabel metal2 s 181370 -800 181482 480 0 FreeSans 1400 90 0 0 la_oenb[15]
+port 456 nsew
+flabel metal2 s 184916 -800 185028 480 0 FreeSans 1400 90 0 0 la_oenb[16]
+port 457 nsew
+flabel metal2 s 188462 -800 188574 480 0 FreeSans 1400 90 0 0 la_oenb[17]
+port 458 nsew
+flabel metal2 s 192008 -800 192120 480 0 FreeSans 1400 90 0 0 la_oenb[18]
+port 459 nsew
+flabel metal2 s 195554 -800 195666 480 0 FreeSans 1400 90 0 0 la_oenb[19]
+port 460 nsew
+flabel metal2 s 131726 -800 131838 480 0 FreeSans 1400 90 0 0 la_oenb[1]
+port 461 nsew
+flabel metal2 s 199100 -800 199212 480 0 FreeSans 1400 90 0 0 la_oenb[20]
+port 462 nsew
+flabel metal2 s 202646 -800 202758 480 0 FreeSans 1400 90 0 0 la_oenb[21]
+port 463 nsew
+flabel metal2 s 206192 -800 206304 480 0 FreeSans 1400 90 0 0 la_oenb[22]
+port 464 nsew
+flabel metal2 s 209738 -800 209850 480 0 FreeSans 1400 90 0 0 la_oenb[23]
+port 465 nsew
+flabel metal2 s 213284 -800 213396 480 0 FreeSans 1400 90 0 0 la_oenb[24]
+port 466 nsew
+flabel metal2 s 216830 -800 216942 480 0 FreeSans 1400 90 0 0 la_oenb[25]
+port 467 nsew
+flabel metal2 s 220376 -800 220488 480 0 FreeSans 1400 90 0 0 la_oenb[26]
+port 468 nsew
+flabel metal2 s 223922 -800 224034 480 0 FreeSans 1400 90 0 0 la_oenb[27]
+port 469 nsew
+flabel metal2 s 227468 -800 227580 480 0 FreeSans 1400 90 0 0 la_oenb[28]
+port 470 nsew
+flabel metal2 s 231014 -800 231126 480 0 FreeSans 1400 90 0 0 la_oenb[29]
+port 471 nsew
+flabel metal2 s 135272 -800 135384 480 0 FreeSans 1400 90 0 0 la_oenb[2]
+port 472 nsew
+flabel metal2 s 234560 -800 234672 480 0 FreeSans 1400 90 0 0 la_oenb[30]
+port 473 nsew
+flabel metal2 s 238106 -800 238218 480 0 FreeSans 1400 90 0 0 la_oenb[31]
+port 474 nsew
+flabel metal2 s 241652 -800 241764 480 0 FreeSans 1400 90 0 0 la_oenb[32]
+port 475 nsew
+flabel metal2 s 245198 -800 245310 480 0 FreeSans 1400 90 0 0 la_oenb[33]
+port 476 nsew
+flabel metal2 s 248744 -800 248856 480 0 FreeSans 1400 90 0 0 la_oenb[34]
+port 477 nsew
+flabel metal2 s 252290 -800 252402 480 0 FreeSans 1400 90 0 0 la_oenb[35]
+port 478 nsew
+flabel metal2 s 255836 -800 255948 480 0 FreeSans 1400 90 0 0 la_oenb[36]
+port 479 nsew
+flabel metal2 s 259382 -800 259494 480 0 FreeSans 1400 90 0 0 la_oenb[37]
+port 480 nsew
+flabel metal2 s 262928 -800 263040 480 0 FreeSans 1400 90 0 0 la_oenb[38]
+port 481 nsew
+flabel metal2 s 266474 -800 266586 480 0 FreeSans 1400 90 0 0 la_oenb[39]
+port 482 nsew
+flabel metal2 s 138818 -800 138930 480 0 FreeSans 1400 90 0 0 la_oenb[3]
+port 483 nsew
+flabel metal2 s 270020 -800 270132 480 0 FreeSans 1400 90 0 0 la_oenb[40]
+port 484 nsew
+flabel metal2 s 273566 -800 273678 480 0 FreeSans 1400 90 0 0 la_oenb[41]
+port 485 nsew
+flabel metal2 s 277112 -800 277224 480 0 FreeSans 1400 90 0 0 la_oenb[42]
+port 486 nsew
+flabel metal2 s 280658 -800 280770 480 0 FreeSans 1400 90 0 0 la_oenb[43]
+port 487 nsew
+flabel metal2 s 284204 -800 284316 480 0 FreeSans 1400 90 0 0 la_oenb[44]
+port 488 nsew
+flabel metal2 s 287750 -800 287862 480 0 FreeSans 1400 90 0 0 la_oenb[45]
+port 489 nsew
+flabel metal2 s 291296 -800 291408 480 0 FreeSans 1400 90 0 0 la_oenb[46]
+port 490 nsew
+flabel metal2 s 294842 -800 294954 480 0 FreeSans 1400 90 0 0 la_oenb[47]
+port 491 nsew
+flabel metal2 s 298388 -800 298500 480 0 FreeSans 1400 90 0 0 la_oenb[48]
+port 492 nsew
+flabel metal2 s 301934 -800 302046 480 0 FreeSans 1400 90 0 0 la_oenb[49]
+port 493 nsew
+flabel metal2 s 142364 -800 142476 480 0 FreeSans 1400 90 0 0 la_oenb[4]
+port 494 nsew
+flabel metal2 s 305480 -800 305592 480 0 FreeSans 1400 90 0 0 la_oenb[50]
+port 495 nsew
+flabel metal2 s 309026 -800 309138 480 0 FreeSans 1400 90 0 0 la_oenb[51]
+port 496 nsew
+flabel metal2 s 312572 -800 312684 480 0 FreeSans 1400 90 0 0 la_oenb[52]
+port 497 nsew
+flabel metal2 s 316118 -800 316230 480 0 FreeSans 1400 90 0 0 la_oenb[53]
+port 498 nsew
+flabel metal2 s 319664 -800 319776 480 0 FreeSans 1400 90 0 0 la_oenb[54]
+port 499 nsew
+flabel metal2 s 323210 -800 323322 480 0 FreeSans 1400 90 0 0 la_oenb[55]
+port 500 nsew
+flabel metal2 s 326756 -800 326868 480 0 FreeSans 1400 90 0 0 la_oenb[56]
+port 501 nsew
+flabel metal2 s 330302 -800 330414 480 0 FreeSans 1400 90 0 0 la_oenb[57]
+port 502 nsew
+flabel metal2 s 333848 -800 333960 480 0 FreeSans 1400 90 0 0 la_oenb[58]
+port 503 nsew
+flabel metal2 s 337394 -800 337506 480 0 FreeSans 1400 90 0 0 la_oenb[59]
+port 504 nsew
+flabel metal2 s 145910 -800 146022 480 0 FreeSans 1400 90 0 0 la_oenb[5]
+port 505 nsew
+flabel metal2 s 340940 -800 341052 480 0 FreeSans 1400 90 0 0 la_oenb[60]
+port 506 nsew
+flabel metal2 s 344486 -800 344598 480 0 FreeSans 1400 90 0 0 la_oenb[61]
+port 507 nsew
+flabel metal2 s 348032 -800 348144 480 0 FreeSans 1400 90 0 0 la_oenb[62]
+port 508 nsew
+flabel metal2 s 351578 -800 351690 480 0 FreeSans 1400 90 0 0 la_oenb[63]
+port 509 nsew
+flabel metal2 s 355124 -800 355236 480 0 FreeSans 1400 90 0 0 la_oenb[64]
+port 510 nsew
+flabel metal2 s 358670 -800 358782 480 0 FreeSans 1400 90 0 0 la_oenb[65]
+port 511 nsew
+flabel metal2 s 362216 -800 362328 480 0 FreeSans 1400 90 0 0 la_oenb[66]
+port 512 nsew
+flabel metal2 s 365762 -800 365874 480 0 FreeSans 1400 90 0 0 la_oenb[67]
+port 513 nsew
+flabel metal2 s 369308 -800 369420 480 0 FreeSans 1400 90 0 0 la_oenb[68]
+port 514 nsew
+flabel metal2 s 372854 -800 372966 480 0 FreeSans 1400 90 0 0 la_oenb[69]
+port 515 nsew
+flabel metal2 s 149456 -800 149568 480 0 FreeSans 1400 90 0 0 la_oenb[6]
+port 516 nsew
+flabel metal2 s 376400 -800 376512 480 0 FreeSans 1400 90 0 0 la_oenb[70]
+port 517 nsew
+flabel metal2 s 379946 -800 380058 480 0 FreeSans 1400 90 0 0 la_oenb[71]
+port 518 nsew
+flabel metal2 s 383492 -800 383604 480 0 FreeSans 1400 90 0 0 la_oenb[72]
+port 519 nsew
+flabel metal2 s 387038 -800 387150 480 0 FreeSans 1400 90 0 0 la_oenb[73]
+port 520 nsew
+flabel metal2 s 390584 -800 390696 480 0 FreeSans 1400 90 0 0 la_oenb[74]
+port 521 nsew
+flabel metal2 s 394130 -800 394242 480 0 FreeSans 1400 90 0 0 la_oenb[75]
+port 522 nsew
+flabel metal2 s 397676 -800 397788 480 0 FreeSans 1400 90 0 0 la_oenb[76]
+port 523 nsew
+flabel metal2 s 401222 -800 401334 480 0 FreeSans 1400 90 0 0 la_oenb[77]
+port 524 nsew
+flabel metal2 s 404768 -800 404880 480 0 FreeSans 1400 90 0 0 la_oenb[78]
+port 525 nsew
+flabel metal2 s 408314 -800 408426 480 0 FreeSans 1400 90 0 0 la_oenb[79]
+port 526 nsew
+flabel metal2 s 153002 -800 153114 480 0 FreeSans 1400 90 0 0 la_oenb[7]
+port 527 nsew
+flabel metal2 s 411860 -800 411972 480 0 FreeSans 1400 90 0 0 la_oenb[80]
+port 528 nsew
+flabel metal2 s 415406 -800 415518 480 0 FreeSans 1400 90 0 0 la_oenb[81]
+port 529 nsew
+flabel metal2 s 418952 -800 419064 480 0 FreeSans 1400 90 0 0 la_oenb[82]
+port 530 nsew
+flabel metal2 s 422498 -800 422610 480 0 FreeSans 1400 90 0 0 la_oenb[83]
+port 531 nsew
+flabel metal2 s 426044 -800 426156 480 0 FreeSans 1400 90 0 0 la_oenb[84]
+port 532 nsew
+flabel metal2 s 429590 -800 429702 480 0 FreeSans 1400 90 0 0 la_oenb[85]
+port 533 nsew
+flabel metal2 s 433136 -800 433248 480 0 FreeSans 1400 90 0 0 la_oenb[86]
+port 534 nsew
+flabel metal2 s 436682 -800 436794 480 0 FreeSans 1400 90 0 0 la_oenb[87]
+port 535 nsew
+flabel metal2 s 440228 -800 440340 480 0 FreeSans 1400 90 0 0 la_oenb[88]
+port 536 nsew
+flabel metal2 s 443774 -800 443886 480 0 FreeSans 1400 90 0 0 la_oenb[89]
+port 537 nsew
+flabel metal2 s 156548 -800 156660 480 0 FreeSans 1400 90 0 0 la_oenb[8]
+port 538 nsew
+flabel metal2 s 447320 -800 447432 480 0 FreeSans 1400 90 0 0 la_oenb[90]
+port 539 nsew
+flabel metal2 s 450866 -800 450978 480 0 FreeSans 1400 90 0 0 la_oenb[91]
+port 540 nsew
+flabel metal2 s 454412 -800 454524 480 0 FreeSans 1400 90 0 0 la_oenb[92]
+port 541 nsew
+flabel metal2 s 457958 -800 458070 480 0 FreeSans 1400 90 0 0 la_oenb[93]
+port 542 nsew
+flabel metal2 s 461504 -800 461616 480 0 FreeSans 1400 90 0 0 la_oenb[94]
+port 543 nsew
+flabel metal2 s 465050 -800 465162 480 0 FreeSans 1400 90 0 0 la_oenb[95]
+port 544 nsew
+flabel metal2 s 468596 -800 468708 480 0 FreeSans 1400 90 0 0 la_oenb[96]
+port 545 nsew
+flabel metal2 s 472142 -800 472254 480 0 FreeSans 1400 90 0 0 la_oenb[97]
+port 546 nsew
+flabel metal2 s 475688 -800 475800 480 0 FreeSans 1400 90 0 0 la_oenb[98]
+port 547 nsew
+flabel metal2 s 479234 -800 479346 480 0 FreeSans 1400 90 0 0 la_oenb[99]
+port 548 nsew
+flabel metal2 s 160094 -800 160206 480 0 FreeSans 1400 90 0 0 la_oenb[9]
+port 549 nsew
+flabel metal2 s 579704 -800 579816 480 0 FreeSans 1400 90 0 0 user_clock2
+port 550 nsew
+flabel metal2 s 580886 -800 580998 480 0 FreeSans 1400 90 0 0 user_irq[0]
+port 551 nsew
+flabel metal2 s 582068 -800 582180 480 0 FreeSans 1400 90 0 0 user_irq[1]
+port 552 nsew
+flabel metal2 s 583250 -800 583362 480 0 FreeSans 1400 90 0 0 user_irq[2]
+port 553 nsew
+flabel metal3 s 582340 639784 584800 644584 0 FreeSans 1400 0 0 0 vccd1
+port 554 nsew
+flabel metal3 s 582340 629784 584800 634584 0 FreeSans 1400 0 0 0 vccd1
+port 554 nsew
+flabel metal3 s 0 643842 1660 648642 0 FreeSans 1400 0 0 0 vccd2
+port 555 nsew
+flabel metal3 s 0 633842 1660 638642 0 FreeSans 1400 0 0 0 vccd2
+port 555 nsew
+flabel metal3 s 582340 540562 584800 545362 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 550562 584800 555362 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 235230 584800 240030 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 225230 584800 230030 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 0 204888 1660 209688 0 FreeSans 1400 0 0 0 vdda2
+port 557 nsew
+flabel metal3 s 0 214888 1660 219688 0 FreeSans 1400 0 0 0 vdda2
+port 557 nsew
+flabel metal3 s 520594 702340 525394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 558 nsew
+flabel metal3 s 510594 702340 515394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 558 nsew
+flabel metal3 s 582340 146830 584800 151630 0 FreeSans 1400 0 0 0 vssa1
+port 558 nsew
+flabel metal3 s 582340 136830 584800 141630 0 FreeSans 1400 0 0 0 vssa1
+port 558 nsew
+flabel metal3 s 0 559442 1660 564242 0 FreeSans 1400 0 0 0 vssa2
+port 559 nsew
+flabel metal3 s 0 549442 1660 554242 0 FreeSans 1400 0 0 0 vssa2
+port 559 nsew
+flabel metal3 s 582340 191430 584800 196230 0 FreeSans 1400 0 0 0 vssd1
+port 560 nsew
+flabel metal3 s 582340 181430 584800 186230 0 FreeSans 1400 0 0 0 vssd1
+port 560 nsew
+flabel metal3 s 0 172888 1660 177688 0 FreeSans 1400 0 0 0 vssd2
+port 561 nsew
+flabel metal3 s 0 162888 1660 167688 0 FreeSans 1400 0 0 0 vssd2
+port 561 nsew
+flabel metal2 s 524 -800 636 480 0 FreeSans 1400 90 0 0 wb_clk_i
+port 562 nsew
+flabel metal2 s 1706 -800 1818 480 0 FreeSans 1400 90 0 0 wb_rst_i
+port 563 nsew
+flabel metal2 s 2888 -800 3000 480 0 FreeSans 1400 90 0 0 wbs_ack_o
+port 564 nsew
+flabel metal2 s 7616 -800 7728 480 0 FreeSans 1400 90 0 0 wbs_adr_i[0]
+port 565 nsew
+flabel metal2 s 47804 -800 47916 480 0 FreeSans 1400 90 0 0 wbs_adr_i[10]
+port 566 nsew
+flabel metal2 s 51350 -800 51462 480 0 FreeSans 1400 90 0 0 wbs_adr_i[11]
+port 567 nsew
+flabel metal2 s 54896 -800 55008 480 0 FreeSans 1400 90 0 0 wbs_adr_i[12]
+port 568 nsew
+flabel metal2 s 58442 -800 58554 480 0 FreeSans 1400 90 0 0 wbs_adr_i[13]
+port 569 nsew
+flabel metal2 s 61988 -800 62100 480 0 FreeSans 1400 90 0 0 wbs_adr_i[14]
+port 570 nsew
+flabel metal2 s 65534 -800 65646 480 0 FreeSans 1400 90 0 0 wbs_adr_i[15]
+port 571 nsew
+flabel metal2 s 69080 -800 69192 480 0 FreeSans 1400 90 0 0 wbs_adr_i[16]
+port 572 nsew
+flabel metal2 s 72626 -800 72738 480 0 FreeSans 1400 90 0 0 wbs_adr_i[17]
+port 573 nsew
+flabel metal2 s 76172 -800 76284 480 0 FreeSans 1400 90 0 0 wbs_adr_i[18]
+port 574 nsew
+flabel metal2 s 79718 -800 79830 480 0 FreeSans 1400 90 0 0 wbs_adr_i[19]
+port 575 nsew
+flabel metal2 s 12344 -800 12456 480 0 FreeSans 1400 90 0 0 wbs_adr_i[1]
+port 576 nsew
+flabel metal2 s 83264 -800 83376 480 0 FreeSans 1400 90 0 0 wbs_adr_i[20]
+port 577 nsew
+flabel metal2 s 86810 -800 86922 480 0 FreeSans 1400 90 0 0 wbs_adr_i[21]
+port 578 nsew
+flabel metal2 s 90356 -800 90468 480 0 FreeSans 1400 90 0 0 wbs_adr_i[22]
+port 579 nsew
+flabel metal2 s 93902 -800 94014 480 0 FreeSans 1400 90 0 0 wbs_adr_i[23]
+port 580 nsew
+flabel metal2 s 97448 -800 97560 480 0 FreeSans 1400 90 0 0 wbs_adr_i[24]
+port 581 nsew
+flabel metal2 s 100994 -800 101106 480 0 FreeSans 1400 90 0 0 wbs_adr_i[25]
+port 582 nsew
+flabel metal2 s 104540 -800 104652 480 0 FreeSans 1400 90 0 0 wbs_adr_i[26]
+port 583 nsew
+flabel metal2 s 108086 -800 108198 480 0 FreeSans 1400 90 0 0 wbs_adr_i[27]
+port 584 nsew
+flabel metal2 s 111632 -800 111744 480 0 FreeSans 1400 90 0 0 wbs_adr_i[28]
+port 585 nsew
+flabel metal2 s 115178 -800 115290 480 0 FreeSans 1400 90 0 0 wbs_adr_i[29]
+port 586 nsew
+flabel metal2 s 17072 -800 17184 480 0 FreeSans 1400 90 0 0 wbs_adr_i[2]
+port 587 nsew
+flabel metal2 s 118724 -800 118836 480 0 FreeSans 1400 90 0 0 wbs_adr_i[30]
+port 588 nsew
+flabel metal2 s 122270 -800 122382 480 0 FreeSans 1400 90 0 0 wbs_adr_i[31]
+port 589 nsew
+flabel metal2 s 21800 -800 21912 480 0 FreeSans 1400 90 0 0 wbs_adr_i[3]
+port 590 nsew
+flabel metal2 s 26528 -800 26640 480 0 FreeSans 1400 90 0 0 wbs_adr_i[4]
+port 591 nsew
+flabel metal2 s 30074 -800 30186 480 0 FreeSans 1400 90 0 0 wbs_adr_i[5]
+port 592 nsew
+flabel metal2 s 33620 -800 33732 480 0 FreeSans 1400 90 0 0 wbs_adr_i[6]
+port 593 nsew
+flabel metal2 s 37166 -800 37278 480 0 FreeSans 1400 90 0 0 wbs_adr_i[7]
+port 594 nsew
+flabel metal2 s 40712 -800 40824 480 0 FreeSans 1400 90 0 0 wbs_adr_i[8]
+port 595 nsew
+flabel metal2 s 44258 -800 44370 480 0 FreeSans 1400 90 0 0 wbs_adr_i[9]
+port 596 nsew
+flabel metal2 s 4070 -800 4182 480 0 FreeSans 1400 90 0 0 wbs_cyc_i
+port 597 nsew
+flabel metal2 s 8798 -800 8910 480 0 FreeSans 1400 90 0 0 wbs_dat_i[0]
+port 598 nsew
+flabel metal2 s 48986 -800 49098 480 0 FreeSans 1400 90 0 0 wbs_dat_i[10]
+port 599 nsew
+flabel metal2 s 52532 -800 52644 480 0 FreeSans 1400 90 0 0 wbs_dat_i[11]
+port 600 nsew
+flabel metal2 s 56078 -800 56190 480 0 FreeSans 1400 90 0 0 wbs_dat_i[12]
+port 601 nsew
+flabel metal2 s 59624 -800 59736 480 0 FreeSans 1400 90 0 0 wbs_dat_i[13]
+port 602 nsew
+flabel metal2 s 63170 -800 63282 480 0 FreeSans 1400 90 0 0 wbs_dat_i[14]
+port 603 nsew
+flabel metal2 s 66716 -800 66828 480 0 FreeSans 1400 90 0 0 wbs_dat_i[15]
+port 604 nsew
+flabel metal2 s 70262 -800 70374 480 0 FreeSans 1400 90 0 0 wbs_dat_i[16]
+port 605 nsew
+flabel metal2 s 73808 -800 73920 480 0 FreeSans 1400 90 0 0 wbs_dat_i[17]
+port 606 nsew
+flabel metal2 s 77354 -800 77466 480 0 FreeSans 1400 90 0 0 wbs_dat_i[18]
+port 607 nsew
+flabel metal2 s 80900 -800 81012 480 0 FreeSans 1400 90 0 0 wbs_dat_i[19]
+port 608 nsew
+flabel metal2 s 13526 -800 13638 480 0 FreeSans 1400 90 0 0 wbs_dat_i[1]
+port 609 nsew
+flabel metal2 s 84446 -800 84558 480 0 FreeSans 1400 90 0 0 wbs_dat_i[20]
+port 610 nsew
+flabel metal2 s 87992 -800 88104 480 0 FreeSans 1400 90 0 0 wbs_dat_i[21]
+port 611 nsew
+flabel metal2 s 91538 -800 91650 480 0 FreeSans 1400 90 0 0 wbs_dat_i[22]
+port 612 nsew
+flabel metal2 s 95084 -800 95196 480 0 FreeSans 1400 90 0 0 wbs_dat_i[23]
+port 613 nsew
+flabel metal2 s 98630 -800 98742 480 0 FreeSans 1400 90 0 0 wbs_dat_i[24]
+port 614 nsew
+flabel metal2 s 102176 -800 102288 480 0 FreeSans 1400 90 0 0 wbs_dat_i[25]
+port 615 nsew
+flabel metal2 s 105722 -800 105834 480 0 FreeSans 1400 90 0 0 wbs_dat_i[26]
+port 616 nsew
+flabel metal2 s 109268 -800 109380 480 0 FreeSans 1400 90 0 0 wbs_dat_i[27]
+port 617 nsew
+flabel metal2 s 112814 -800 112926 480 0 FreeSans 1400 90 0 0 wbs_dat_i[28]
+port 618 nsew
+flabel metal2 s 116360 -800 116472 480 0 FreeSans 1400 90 0 0 wbs_dat_i[29]
+port 619 nsew
+flabel metal2 s 18254 -800 18366 480 0 FreeSans 1400 90 0 0 wbs_dat_i[2]
+port 620 nsew
+flabel metal2 s 119906 -800 120018 480 0 FreeSans 1400 90 0 0 wbs_dat_i[30]
+port 621 nsew
+flabel metal2 s 123452 -800 123564 480 0 FreeSans 1400 90 0 0 wbs_dat_i[31]
+port 622 nsew
+flabel metal2 s 22982 -800 23094 480 0 FreeSans 1400 90 0 0 wbs_dat_i[3]
+port 623 nsew
+flabel metal2 s 27710 -800 27822 480 0 FreeSans 1400 90 0 0 wbs_dat_i[4]
+port 624 nsew
+flabel metal2 s 31256 -800 31368 480 0 FreeSans 1400 90 0 0 wbs_dat_i[5]
+port 625 nsew
+flabel metal2 s 34802 -800 34914 480 0 FreeSans 1400 90 0 0 wbs_dat_i[6]
+port 626 nsew
+flabel metal2 s 38348 -800 38460 480 0 FreeSans 1400 90 0 0 wbs_dat_i[7]
+port 627 nsew
+flabel metal2 s 41894 -800 42006 480 0 FreeSans 1400 90 0 0 wbs_dat_i[8]
+port 628 nsew
+flabel metal2 s 45440 -800 45552 480 0 FreeSans 1400 90 0 0 wbs_dat_i[9]
+port 629 nsew
+flabel metal2 s 9980 -800 10092 480 0 FreeSans 1400 90 0 0 wbs_dat_o[0]
+port 630 nsew
+flabel metal2 s 50168 -800 50280 480 0 FreeSans 1400 90 0 0 wbs_dat_o[10]
+port 631 nsew
+flabel metal2 s 53714 -800 53826 480 0 FreeSans 1400 90 0 0 wbs_dat_o[11]
+port 632 nsew
+flabel metal2 s 57260 -800 57372 480 0 FreeSans 1400 90 0 0 wbs_dat_o[12]
+port 633 nsew
+flabel metal2 s 60806 -800 60918 480 0 FreeSans 1400 90 0 0 wbs_dat_o[13]
+port 634 nsew
+flabel metal2 s 64352 -800 64464 480 0 FreeSans 1400 90 0 0 wbs_dat_o[14]
+port 635 nsew
+flabel metal2 s 67898 -800 68010 480 0 FreeSans 1400 90 0 0 wbs_dat_o[15]
+port 636 nsew
+flabel metal2 s 71444 -800 71556 480 0 FreeSans 1400 90 0 0 wbs_dat_o[16]
+port 637 nsew
+flabel metal2 s 74990 -800 75102 480 0 FreeSans 1400 90 0 0 wbs_dat_o[17]
+port 638 nsew
+flabel metal2 s 78536 -800 78648 480 0 FreeSans 1400 90 0 0 wbs_dat_o[18]
+port 639 nsew
+flabel metal2 s 82082 -800 82194 480 0 FreeSans 1400 90 0 0 wbs_dat_o[19]
+port 640 nsew
+flabel metal2 s 14708 -800 14820 480 0 FreeSans 1400 90 0 0 wbs_dat_o[1]
+port 641 nsew
+flabel metal2 s 85628 -800 85740 480 0 FreeSans 1400 90 0 0 wbs_dat_o[20]
+port 642 nsew
+flabel metal2 s 89174 -800 89286 480 0 FreeSans 1400 90 0 0 wbs_dat_o[21]
+port 643 nsew
+flabel metal2 s 92720 -800 92832 480 0 FreeSans 1400 90 0 0 wbs_dat_o[22]
+port 644 nsew
+flabel metal2 s 96266 -800 96378 480 0 FreeSans 1400 90 0 0 wbs_dat_o[23]
+port 645 nsew
+flabel metal2 s 99812 -800 99924 480 0 FreeSans 1400 90 0 0 wbs_dat_o[24]
+port 646 nsew
+flabel metal2 s 103358 -800 103470 480 0 FreeSans 1400 90 0 0 wbs_dat_o[25]
+port 647 nsew
+flabel metal2 s 106904 -800 107016 480 0 FreeSans 1400 90 0 0 wbs_dat_o[26]
+port 648 nsew
+flabel metal2 s 110450 -800 110562 480 0 FreeSans 1400 90 0 0 wbs_dat_o[27]
+port 649 nsew
+flabel metal2 s 113996 -800 114108 480 0 FreeSans 1400 90 0 0 wbs_dat_o[28]
+port 650 nsew
+flabel metal2 s 117542 -800 117654 480 0 FreeSans 1400 90 0 0 wbs_dat_o[29]
+port 651 nsew
+flabel metal2 s 19436 -800 19548 480 0 FreeSans 1400 90 0 0 wbs_dat_o[2]
+port 652 nsew
+flabel metal2 s 121088 -800 121200 480 0 FreeSans 1400 90 0 0 wbs_dat_o[30]
+port 653 nsew
+flabel metal2 s 124634 -800 124746 480 0 FreeSans 1400 90 0 0 wbs_dat_o[31]
+port 654 nsew
+flabel metal2 s 24164 -800 24276 480 0 FreeSans 1400 90 0 0 wbs_dat_o[3]
+port 655 nsew
+flabel metal2 s 28892 -800 29004 480 0 FreeSans 1400 90 0 0 wbs_dat_o[4]
+port 656 nsew
+flabel metal2 s 32438 -800 32550 480 0 FreeSans 1400 90 0 0 wbs_dat_o[5]
+port 657 nsew
+flabel metal2 s 35984 -800 36096 480 0 FreeSans 1400 90 0 0 wbs_dat_o[6]
+port 658 nsew
+flabel metal2 s 39530 -800 39642 480 0 FreeSans 1400 90 0 0 wbs_dat_o[7]
+port 659 nsew
+flabel metal2 s 43076 -800 43188 480 0 FreeSans 1400 90 0 0 wbs_dat_o[8]
+port 660 nsew
+flabel metal2 s 46622 -800 46734 480 0 FreeSans 1400 90 0 0 wbs_dat_o[9]
+port 661 nsew
+flabel metal2 s 11162 -800 11274 480 0 FreeSans 1400 90 0 0 wbs_sel_i[0]
+port 662 nsew
+flabel metal2 s 15890 -800 16002 480 0 FreeSans 1400 90 0 0 wbs_sel_i[1]
+port 663 nsew
+flabel metal2 s 20618 -800 20730 480 0 FreeSans 1400 90 0 0 wbs_sel_i[2]
+port 664 nsew
+flabel metal2 s 25346 -800 25458 480 0 FreeSans 1400 90 0 0 wbs_sel_i[3]
+port 665 nsew
+flabel metal2 s 5252 -800 5364 480 0 FreeSans 1400 90 0 0 wbs_stb_i
+port 666 nsew
+flabel metal2 s 6434 -800 6546 480 0 FreeSans 1400 90 0 0 wbs_we_i
+port 667 nsew
+<< properties >>
+string FIXED_BBOX 0 0 584000 704000
+<< end >>
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.xor.gds b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.xor.gds
new file mode 100644
index 0000000..c2e17b2
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper.xor.gds
Binary files differ
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_empty_erased.gds b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..a513b39
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_erased.gds b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_erased.gds
new file mode 100644
index 0000000..943b380
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_erased.gds
Binary files differ
diff --git a/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_no_zero_areas.gds b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_no_zero_areas.gds
new file mode 100644
index 0000000..1120acd
--- /dev/null
+++ b/precheck_results/05_MAR_2022___02_22_07/outputs/user_analog_project_wrapper_no_zero_areas.gds
Binary files differ
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/gds.info b/precheck_results/06_MAR_2022___14_59_11/logs/gds.info
new file mode 100644
index 0000000..7722beb
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/gds.info
@@ -0,0 +1 @@
+user_analog_project_wrapper.gds: c3bbd321d8e134e18ebb015ae4cd1d8fad84e162
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_beol_check.log b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_beol_check.log
new file mode 100644
index 0000000..881f3fe
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_beol_check.log
@@ -0,0 +1,992 @@
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:38: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:42: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:107
+ Polygons (raw): 42 (flat) 16 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:108
+ Polygons (raw): 121 (flat) 47 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_beol_check.xml ..
+Total elapsed: 14.210s Memory: 1159.00M
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_beol_check.total b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_feol_check.log b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_feol_check.log
new file mode 100644
index 0000000..9e2ebda
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_feol_check.log
@@ -0,0 +1,780 @@
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:36: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:44: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
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diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_feol_check.total b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_feol_check.total
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diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_met_min_ca_density_check.log b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_met_min_ca_density_check.log
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+"area" in: met_min_ca_density.lydrc:59
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+li1_ca_density is 0.9998641619415474
+"polygons" in: met_min_ca_density.lydrc:69
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+"area" in: met_min_ca_density.lydrc:69
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+m1_ca_density is 0.9997733599490193
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+ Elapsed: 0.010s Memory: 524.00M
+"area" in: met_min_ca_density.lydrc:79
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+m2_ca_density is 0.9997981502325265
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+"area" in: met_min_ca_density.lydrc:89
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+m3_ca_density is 0.9865330887054405
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+"area" in: met_min_ca_density.lydrc:99
+ Elapsed: 0.010s Memory: 524.00M
+m4_ca_density is 0.9772117312981592
+"polygons" in: met_min_ca_density.lydrc:109
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+ Elapsed: 0.010s Memory: 524.00M
+"area" in: met_min_ca_density.lydrc:109
+ Elapsed: 0.010s Memory: 524.00M
+m5_ca_density is 0.9993486224777203
+Writing report database: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_met_min_ca_density_check.xml ..
+Total elapsed: 0.420s Memory: 523.00M
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_met_min_ca_density_check.total b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_offgrid_check.log b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_offgrid_check.log
new file mode 100644
index 0000000..bc7e937
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_offgrid_check.log
@@ -0,0 +1,744 @@
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 3.930s Memory: 540.00M
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_offgrid_check.total b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..262d34f
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper, output to /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+ deep:true tiled:false threads:4
+--- #err|description, table for cell: user_analog_project_wrapper
+NO-Check ---- pwell:64/44/EMP 122/16/EMP 64/59/EMP 44/16/EMP 44/5/EMP
+ ---- nwell:64/20/dat 64/16/EMP 64/5/EMP
+ ---- diff:65/20/dat 65/16/EMP 65/6/EMP
+ ---- tap:65/44/dat 65/48/EMP 65/5/EMP
+ ---- poly:66/20/dat 66/16/EMP 66/5/EMP
+ ---- licon1:66/44/dat 66/58/EMP
+ ---- li1:67/20/dat 67/16/dat 67/5/EMP
+ ---- mcon:67/44/dat 67/48/EMP
+ ---- met1:68/20/dat 68/16/dat 68/5/EMP
+ ---- via:68/44/dat 68/58/EMP
+ ---- met2:69/20/dat 69/16/dat 69/5/EMP
+ ---- via2:69/44/dat 69/58/EMP
+ ---- met3:70/20/dat 70/16/dat 70/5/dat
+ ---- via3:70/44/dat 70/48/EMP
+ ---- met4:71/20/dat 71/16/dat 71/5/EMP
+ ---- via4:71/44/dat 71/48/EMP
+ ---- met5:72/20/dat 72/16/dat 72/5/EMP
+ ---- pad:76/20/EMP 76/5/EMP 76/16/EMP
+ ---- pnp:82/44/EMP 82/59/EMP
+ ---- npn:82/20/EMP 82/5/EMP
+ ---- rdl:74/20/EMP 74/16/EMP 74/5/EMP
+ ---- inductor:82/24/EMP 82/25/EMP
+ 0 total error(s) among 0 error type(s), 33 checks, cell: user_analog_project_wrapper
+Writing report...
+VmPeak: 1190860 kB
+VmHWM: 260944 kB
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_zeroarea_check.log b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..e7cd53b
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_zeroarea_check.log
@@ -0,0 +1,4 @@
+0 zero-area shapes
+writing to /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_no_zero_areas.gds
+VmPeak: 547060 kB
+VmHWM: 267888 kB
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/klayout_zeroarea_check.total b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/magic_drc_check.log b/precheck_results/06_MAR_2022___14_59_11/logs/magic_drc_check.log
new file mode 100644
index 0000000..81bda45
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/magic_drc_check.log
@@ -0,0 +1,46 @@
+
+Magic 8.3 revision 274 - Compiled on Fri Mar 4 22:54:15 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__buf_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "example_por".
+Reading "user_analog_proj_example".
+Reading "user_analog_project_wrapper".
+[INFO]: Loading user_analog_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/magic_drc_check.total b/precheck_results/06_MAR_2022___14_59_11/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/pdks.info b/precheck_results/06_MAR_2022___14_59_11/logs/pdks.info
new file mode 100644
index 0000000..19f87e1
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 27ecf1c16911f7dd4428ffab96f62c1fb876ea70
+Skywater PDK c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/precheck.log b/precheck_results/06_MAR_2022___14_59_11/logs/precheck.log
new file mode 100644
index 0000000..e7fafc6
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/precheck.log
@@ -0,0 +1,59 @@
+2022-03-06 14:59:11 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog
+2022-03-06 14:59:11 - [INFO] - {{Project Type Info}} analog
+2022-03-06 14:59:11 - [INFO] - {{Project GDS Info}} user_analog_project_wrapper: c3bbd321d8e134e18ebb015ae4cd1d8fad84e162
+2022-03-06 14:59:11 - [INFO] - {{Tools Info}} KLayout: v0.27.8 | Magic: v8.3.274
+2022-03-06 14:59:11 - [INFO] - {{PDKs Info}} Open PDKs: 27ecf1c16911f7dd4428ffab96f62c1fb876ea70 | Skywater PDK: c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
+2022-03-06 14:59:11 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in '/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/logs'
+2022-03-06 14:59:11 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-03-06 14:59:11 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 13: License
+2022-03-06 14:59:13 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog.
+2022-03-06 14:59:13 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-03-06 14:59:15 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog.
+2022-03-06 14:59:16 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog.
+2022-03-06 14:59:16 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-03-06 14:59:16 - [INFO] - {{SPDX COMPLIANCE CHECK PASSED}} Project is compliant with the SPDX Standard
+2022-03-06 14:59:16 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 13: Makefile
+2022-03-06 14:59:16 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-03-06 14:59:16 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 13: Default
+2022-03-06 14:59:16 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-03-06 14:59:17 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-03-06 14:59:17 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 13: Documentation
+2022-03-06 14:59:17 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-03-06 14:59:17 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 13: Consistency
+2022-03-06 14:59:19 - [INFO] - HIERARCHY CHECK PASSED: Module user_analog_project_wrapper is instantiated in caravan.
+2022-03-06 14:59:19 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravan contains at least 8 instances (68 instances).
+2022-03-06 14:59:19 - [INFO] - MODELING CHECK PASSED: Netlist caravan is structural.
+2022-03-06 14:59:19 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_analog_project_wrapper are correctly connected in the top level netlist caravan.
+2022-03-06 14:59:19 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravan netlist passed all consistency checks.
+2022-03-06 14:59:19 - [INFO] - PORTS CHECK PASSED: Netlist user_analog_project_wrapper ports match the golden wrapper ports
+2022-03-06 14:59:19 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_analog_project_wrapper contains at least 1 instances (11 instances).
+2022-03-06 14:59:19 - [INFO] - MODELING CHECK PASSED: Netlist user_analog_project_wrapper is structural.
+2022-03-06 14:59:19 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_analog_project_wrapper matches the provided structural netlist.
+2022-03-06 14:59:19 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_analog_project_wrapper netlist passed all consistency checks.
+2022-03-06 14:59:19 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2022-03-06 14:59:19 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 13: XOR
+2022-03-06 14:59:25 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.xor.gds
+2022-03-06 14:59:25 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2022-03-06 14:59:25 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 13: Magic DRC
+2022-03-06 14:59:28 - [INFO] - 0 DRC violations
+2022-03-06 14:59:28 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-06 14:59:28 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 13: Klayout FEOL
+2022-03-06 14:59:33 - [INFO] - No DRC Violations found
+2022-03-06 14:59:33 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-06 14:59:33 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 13: Klayout BEOL
+2022-03-06 14:59:49 - [INFO] - No DRC Violations found
+2022-03-06 14:59:49 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-06 14:59:49 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 13: Klayout Offgrid
+2022-03-06 14:59:55 - [INFO] - No DRC Violations found
+2022-03-06 14:59:55 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-06 14:59:55 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 13: Klayout Metal Minimum Clear Area Density
+2022-03-06 14:59:57 - [INFO] - No DRC Violations found
+2022-03-06 14:59:57 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-06 14:59:57 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 13: Klayout Pin Label Purposes Overlapping Drawing
+2022-03-06 15:00:00 - [INFO] - No DRC Violations found
+2022-03-06 15:00:00 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-06 15:00:00 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 13: Klayout ZeroArea
+2022-03-06 15:00:02 - [INFO] - No DRC Violations found
+2022-03-06 15:00:02 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-06 15:00:02 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in '/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/logs'
+2022-03-06 15:00:02 - [INFO] - {{SUCCESS}} All Checks Passed !!!
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/tools.info b/precheck_results/06_MAR_2022___14_59_11/logs/tools.info
new file mode 100644
index 0000000..9b2230a
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.8
+Magic: 8.3.274
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/xor_check.log b/precheck_results/06_MAR_2022___14_59_11/logs/xor_check.log
new file mode 100644
index 0000000..93e3a8f
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/xor_check.log
@@ -0,0 +1,174 @@
+Reading file /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/gds/user_analog_project_wrapper.gds for cell user_analog_project_wrapper
+dbu=0.001
+cell user_analog_project_wrapper dbu-bbox(ll;ur)=(-4000,-4000;2924000,3524000)
+cell user_analog_project_wrapper dbu-bbox(left,bottom,right,top)=(-4000,-4000,2924000,3524000)
+cell user_analog_project_wrapper dbu-size(width,height)=(2928000,3528000)
+cell user_analog_project_wrapper micron-bbox(left,bottom,right,top)=(-4.0,-4.0,2924.0,3524.0)
+cell user_analog_project_wrapper micron-size(width,height)=(2928.0,3528.0)
+Done.
+
+Magic 8.3 revision 274 - Compiled on Fri Mar 4 22:54:15 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__buf_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "example_por".
+Reading "user_analog_proj_example".
+Reading "user_analog_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.880 x 3520.000 (-42.880, 0.000), ( 0.000, 3520.000) 150937.594
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.500 x 3520.000 ( 2920.000, 0.000), ( 2962.500, 3520.000) 149600.000
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.530 (-42.880, -37.530), ( 2962.500, 0.000) 112791.906
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.210 (-42.880, 3520.000), ( 2962.500, 3557.210) 111830.188
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+
+Magic 8.3 revision 274 - Compiled on Fri Mar 4 22:54:15 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 6.0
+Library name: user_analog_project_wrapper_empty
+Reading "user_analog_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.880 x 3520.000 (-42.880, 0.000), ( 0.000, 3520.000) 150937.594
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.500 x 3520.000 ( 2920.000, 0.000), ( 2962.500, 3520.000) 149600.000
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.530 (-42.880, -37.530), ( 2962.500, 0.000) 112791.906
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.210 (-42.880, 3520.000), ( 2962.500, 3557.210) 111830.188
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+Reading /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_erased.gds ..
+Reading /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 494 (flat) 494 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 494 (flat) 494 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 184 (flat) 184 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 184 (flat) 184 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.020s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 6 (flat) 6 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 6 (flat) 6 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+Writing layout file: /home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.xor.gds ..
+Total elapsed: 0.190s Memory: 521.00M
diff --git a/precheck_results/06_MAR_2022___14_59_11/logs/xor_check.total b/precheck_results/06_MAR_2022___14_59_11/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_beol_check.xml b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..261c933
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>li.1</name>
+ <description>li.1 : min. li width : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.3</name>
+ <description>li.3 : min. li spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.5</name>
+ <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.6</name>
+ <description>li.6 : min. li area : 0.0561um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1</name>
+ <description>ct.1: non-ring mcon should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_a</name>
+ <description>ct.1_a : minimum width of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_b</name>
+ <description>ct.1_b : maximum length of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.2</name>
+ <description>ct.2 : min. mcon spacing : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.4</name>
+ <description>ct.4 : mcon should covered by li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.1</name>
+ <description>m1.1 : min. m1 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.2</name>
+ <description>m1.2 : min. m1 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.3ab</name>
+ <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>791_m1.4</name>
+ <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4</name>
+ <description>m1.4 : mcon periphery must be enclosed by m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a</name>
+ <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a_a</name>
+ <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.6</name>
+ <description>m1.6 : min. m1 area : 0.083um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.7</name>
+ <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.5</name>
+ <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a</name>
+ <description>via.1a : via outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_a</name>
+ <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_b</name>
+ <description>via.1a_b : maximum length of via : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.2</name>
+ <description>via.2 : min. via spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a</name>
+ <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a_a</name>
+ <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.5a</name>
+ <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.1</name>
+ <description>m2.1 : min. m2 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.2</name>
+ <description>m2.2 : min. m2 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.3ab</name>
+ <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.6</name>
+ <description>m2.6 : min. m2 area : 0.0676um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.7</name>
+ <description>m2.7 : min. m2 holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4</name>
+ <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4_a</name>
+ <description>m2.4_a : via in periphery must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.5</name>
+ <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a</name>
+ <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_a</name>
+ <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_b</name>
+ <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.2</name>
+ <description>via2.2 : min. via2 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4</name>
+ <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4_a</name>
+ <description>via2.4_a : via must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.5</name>
+ <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.1</name>
+ <description>m3.1 : min. m3 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.2</name>
+ <description>m3.2 : min. m3 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.3cd</name>
+ <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4</name>
+ <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4_a</name>
+ <description>m3.4_a : via2 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1</name>
+ <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_a</name>
+ <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_b</name>
+ <description>via3.1_b : maximum length of via3 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.2</name>
+ <description>via3.2 : min. via3 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4</name>
+ <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4_a</name>
+ <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.5</name>
+ <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.1</name>
+ <description>m4.1 : min. m4 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.2</name>
+ <description>m4.2 : min. m4 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.4a</name>
+ <description>m4.4a : min. m4 area : 0.240um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.5ab</name>
+ <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3</name>
+ <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3_a</name>
+ <description>m4.3_a : via3 must be enclosed by met4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1</name>
+ <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_a</name>
+ <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_b</name>
+ <description>via4.1_b : maximum length of via4 : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.2</name>
+ <description>via4.2 : min. via4 spacing : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4</name>
+ <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4_a</name>
+ <description>via4.4_a : m4 must enclose all via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.1</name>
+ <description>m5.1 : min. m5 width : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.2</name>
+ <description>m5.2 : min. m5 spacing : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3</name>
+ <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3_a</name>
+ <description>m5.3_a : via must be enclosed by m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.4</name>
+ <description>m5.4 : min. m5 area : 4.0um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad.2</name>
+ <description>pad.2 : min. pad spacing : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_feol_check.xml b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..a352e7c
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,363 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell.2</name>
+ <description>dnwell.2 : min. dnwell width : 3.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.1</name>
+ <description>nwell.1 : min. nwell width : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.2a</name>
+ <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.6</name>
+ <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.1</name>
+ <description>hvtp.1 : min. hvtp width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.2</name>
+ <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.1</name>
+ <description>hvtr.1 : min. hvtr width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2</name>
+ <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2_a</name>
+ <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.1a</name>
+ <description>lvtn.1a : min. lvtn width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.2</name>
+ <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.1</name>
+ <description>ncm.1 : min. ncm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.2a</name>
+ <description>ncm.2a : min. ncm spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1</name>
+ <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_a</name>
+ <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_b</name>
+ <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_c</name>
+ <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.3</name>
+ <description>difftap.3 : min. difftap spacing : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.1</name>
+ <description>tunm.1 : min. tunm width : 0.41um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.2</name>
+ <description>tunm.2 : min. tunm spacing : 0.5um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.1a</name>
+ <description>poly.1a : min. poly width : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.2</name>
+ <description>poly.2 : min. poly spacing : 0.21um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.1a</name>
+ <description>rpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.2</name>
+ <description>rpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.1a</name>
+ <description>urpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.2</name>
+ <description>urpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.1</name>
+ <description>npc.1 : min. npc width : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.2</name>
+ <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsd.1</name>
+ <description>nsd.1 : min. nsdm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsd.2</name>
+ <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psd.1</name>
+ <description>psd.1 : min. psdm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psd.2</name>
+ <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1</name>
+ <description>licon.1 : licon should be rectangle</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1_a/b</name>
+ <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13</name>
+ <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13_a</name>
+ <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.17</name>
+ <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.1</name>
+ <description>capm.1 : min. capm width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2a</name>
+ <description>capm.2a : min. capm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b</name>
+ <description>capm.2b : min. capm spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b_a</name>
+ <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3</name>
+ <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3_a</name>
+ <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.4</name>
+ <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.5</name>
+ <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.1</name>
+ <description>cap2m.1 : min. cap2m width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2a</name>
+ <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b</name>
+ <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b_a</name>
+ <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3</name>
+ <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3_a</name>
+ <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.4</name>
+ <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.5</name>
+ <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.1</name>
+ <description>hvi.1 : min. hvi width : 0.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.2a</name>
+ <description>hvi.2a : min. hvi spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.1</name>
+ <description>hvntm.1 : min. hvntm width : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.2</name>
+ <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_met_min_ca_density_check.xml b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..b91529c
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_offgrid_check.xml b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..fa805b1
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/offgrid.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_angle</name>
+ <description>x.3a : non 45 degree angle dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_angle</name>
+ <description>x.3a : non 45 degree angle nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_angle</name>
+ <description>x.3a : non 45 degree angle pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_angle</name>
+ <description>x.3a : non 45 degree angle pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_angle</name>
+ <description>x.3a : non 45 degree angle hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_angle</name>
+ <description>x.3a : non 45 degree angle hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_angle</name>
+ <description>x.3a : non 45 degree angle lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_angle</name>
+ <description>x.3a : non 45 degree angle ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2 : non 90 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2c : non 45 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2 : non 90 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2c : non 45 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_angle</name>
+ <description>x.3a : non 45 degree angle tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_angle</name>
+ <description>x.2 : non 90 degree angle poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_angle</name>
+ <description>x.3a : non 45 degree angle rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_angle</name>
+ <description>x.3a : non 45 degree angle npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_angle</name>
+ <description>x.3a : non 45 degree angle nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_angle</name>
+ <description>x.3a : non 45 degree angle psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_angle</name>
+ <description>x.2 : non 90 degree angle licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_angle</name>
+ <description>x.3a : non 45 degree angle li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_angle</name>
+ <description>x.2 : non 90 degree angle mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_angle</name>
+ <description>x.3a : non 45 degree angle vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_angle</name>
+ <description>x.3a : non 45 degree angle m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_angle</name>
+ <description>x.2 : non 90 degree angle via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_angle</name>
+ <description>x.3a : non 45 degree angle m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_angle</name>
+ <description>x.2 : non 90 degree angle via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_angle</name>
+ <description>x.3a : non 45 degree angle m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_angle</name>
+ <description>x.2 : non 90 degree angle via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_angle</name>
+ <description>x.3a : non 45 degree angle nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_angle</name>
+ <description>x.3a : non 45 degree angle m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_angle</name>
+ <description>x.2 : non 90 degree angle via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_angle</name>
+ <description>x.3a : non 45 degree angle m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_angle</name>
+ <description>x.3a : non 45 degree angle pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_angle</name>
+ <description>x.2 : non 90 degree angle mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_angle</name>
+ <description>x.3a : non 45 degree angle hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_angle</name>
+ <description>x.3a : non 45 degree angle hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_angle</name>
+ <description>x.3a : non 45 degree angle vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_angle</name>
+ <description>x.3a : non 45 degree angle uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_angle</name>
+ <description>x.3a : non 45 degree angle pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>areaid_re_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on areaid.re</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..4b51167
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/home/hugodg/projects_sky130/temp_sensor/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_zeroarea_check.xml b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..6d97219
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.drc.report b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..829b9d5
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,5 @@
+user_analog_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.rdb b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..8a882f3
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,2 @@
+$user_analog_project_wrapper
+ 100
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.tcl b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.tcl
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.tr b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.tr
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.xml b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..7161d7c
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+ <categories/>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ </cell>
+ </cells>
+ <items/>
+</report-database>
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.magic.drc.mag b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..65b9acc
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.magic.drc.mag
@@ -0,0 +1,2926 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1646578768
+<< checkpaint >>
+rect -4732 -4732 588732 708732
+<< pwell >>
+rect 345714 628229 371128 629058
+<< mvpsubdiff >>
+rect 345740 629000 371102 629032
+rect 345740 628286 345790 629000
+rect 371052 628286 371102 629000
+rect 345740 628255 371102 628286
+<< mvpsubdiffcont >>
+rect 345790 628286 371052 629000
+<< locali >>
+rect 345748 629000 371094 629032
+rect 345748 628286 345790 629000
+rect 371052 628286 371094 629000
+rect 345748 628255 371094 628286
+<< viali >>
+rect 357600 628309 359290 628991
+<< metal1 >>
+rect 357470 629394 359442 629457
+rect 357470 628062 357541 629394
+rect 359385 628062 359442 629394
+rect 357470 627990 359442 628062
+<< via1 >>
+rect 357541 628991 359385 629394
+rect 357541 628309 357600 628991
+rect 357600 628309 359290 628991
+rect 359290 628309 359385 628991
+rect 357541 628062 359385 628309
+<< metal2 >>
+rect 357470 629396 359442 629457
+rect 357470 629394 357555 629396
+rect 359371 629394 359442 629396
+rect 357470 628062 357541 629394
+rect 359385 628062 359442 629394
+rect 357470 628060 357555 628062
+rect 359371 628060 359442 628062
+rect 357470 627990 359442 628060
+rect 524 -800 636 480
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+rect 17415 419200 17431 419264
+rect 17495 419200 17511 419264
+rect 17575 419200 17684 419264
+rect 13814 227257 17684 419200
+rect 573464 455716 576816 500074
+rect 573464 455652 573591 455716
+rect 573655 455652 573671 455716
+rect 573735 455652 573751 455716
+rect 573815 455652 573831 455716
+rect 573895 455652 573911 455716
+rect 573975 455652 573991 455716
+rect 574055 455652 574071 455716
+rect 574135 455652 574151 455716
+rect 574215 455652 574231 455716
+rect 574295 455652 574311 455716
+rect 574375 455652 574391 455716
+rect 574455 455652 574471 455716
+rect 574535 455652 574551 455716
+rect 574615 455652 574631 455716
+rect 574695 455652 574711 455716
+rect 574775 455652 574791 455716
+rect 574855 455652 574871 455716
+rect 574935 455652 574951 455716
+rect 575015 455652 575031 455716
+rect 575095 455652 575111 455716
+rect 575175 455652 575191 455716
+rect 575255 455652 575271 455716
+rect 575335 455652 575351 455716
+rect 575415 455652 575431 455716
+rect 575495 455652 575511 455716
+rect 575575 455652 575591 455716
+rect 575655 455652 575671 455716
+rect 575735 455652 575751 455716
+rect 575815 455652 575831 455716
+rect 575895 455652 575911 455716
+rect 575975 455652 575991 455716
+rect 576055 455652 576071 455716
+rect 576135 455652 576151 455716
+rect 576215 455652 576231 455716
+rect 576295 455652 576311 455716
+rect 576375 455652 576391 455716
+rect 576455 455652 576471 455716
+rect 576535 455652 576551 455716
+rect 576615 455652 576631 455716
+rect 576695 455652 576816 455716
+rect 13811 196222 17688 227257
+rect 13811 191438 13997 196222
+rect 17421 191438 17688 196222
+rect 13811 191098 17688 191438
+rect 573464 196222 576816 455652
+rect 573464 191438 573605 196222
+rect 576629 191438 576816 196222
+rect 573464 191191 576816 191438
+<< via4 >>
+rect 357678 643457 359194 649773
+rect 352057 615301 353573 617777
+rect 363441 615307 364957 617783
+rect 363445 597363 364961 601439
+<< metal5 >>
+rect 165594 702300 170594 704800
+rect 175894 702300 180894 704800
+rect 217294 702300 222294 704800
+rect 227594 702300 232594 704800
+rect 318994 702300 323994 704800
+rect 329294 702300 334294 704800
+rect 357521 649773 359350 649991
+rect 357521 643457 357678 649773
+rect 359194 643457 359350 649773
+rect 351918 617777 353747 617929
+rect 351918 615301 352057 617777
+rect 353573 615301 353747 617777
+rect 351918 614900 353747 615301
+rect 357521 614900 359350 643457
+rect 351918 613071 359350 614900
+rect 363318 617783 365147 617929
+rect 363318 615307 363441 617783
+rect 364957 615307 365147 617783
+rect 363318 601439 365147 615307
+rect 363318 597363 363445 601439
+rect 364961 597363 365147 601439
+rect 363318 597052 365147 597363
+use user_analog_proj_example user_analog_proj_example_0
+timestamp 1639823760
+transform 1 0 345668 0 -1 627114
+box -73 -12 25490 8324
+<< labels >>
+flabel metal3 s 572152 640142 580220 644150 0 FreeSans 20000 0 0 0 VCCD1
+port 1 nsew
+flabel metal3 s 567038 550960 577302 554546 0 FreeSans 20000 0 0 0 VDDA1
+port 2 nsew
+flabel metal3 s 511190 664896 514962 676272 0 FreeSans 20000 90 0 0 VSSA1
+port 3 nsew
+flabel metal3 s 561703 191929 571721 195859 0 FreeSans 20000 0 0 0 VSSD1
+port 4 nsew
+flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1400 0 0 0 gpio_analog[0]
+port 5 nsew
+flabel metal3 s -800 381864 480 381976 0 FreeSans 1400 0 0 0 gpio_analog[10]
+port 6 nsew
+flabel metal3 s -800 338642 480 338754 0 FreeSans 1400 0 0 0 gpio_analog[11]
+port 7 nsew
+flabel metal3 s -800 295420 480 295532 0 FreeSans 1400 0 0 0 gpio_analog[12]
+port 8 nsew
+flabel metal3 s -800 252398 480 252510 0 FreeSans 1400 0 0 0 gpio_analog[13]
+port 9 nsew
+flabel metal3 s -800 124776 480 124888 0 FreeSans 1400 0 0 0 gpio_analog[14]
+port 10 nsew
+flabel metal3 s -800 81554 480 81666 0 FreeSans 1400 0 0 0 gpio_analog[15]
+port 11 nsew
+flabel metal3 s -800 38332 480 38444 0 FreeSans 1400 0 0 0 gpio_analog[16]
+port 12 nsew
+flabel metal3 s -800 16910 480 17022 0 FreeSans 1400 0 0 0 gpio_analog[17]
+port 13 nsew
+flabel metal3 s 583520 313652 584800 313764 0 FreeSans 1400 0 0 0 gpio_analog[1]
+port 14 nsew
+flabel metal3 s 583520 358874 584800 358986 0 FreeSans 1400 0 0 0 gpio_analog[2]
+port 15 nsew
+flabel metal3 s 583520 405296 584800 405408 0 FreeSans 1400 0 0 0 gpio_analog[3]
+port 16 nsew
+flabel metal3 s 583520 449718 584800 449830 0 FreeSans 1400 0 0 0 gpio_analog[4]
+port 17 nsew
+flabel metal3 s 583520 494140 584800 494252 0 FreeSans 1400 0 0 0 gpio_analog[5]
+port 18 nsew
+flabel metal3 s 583520 583562 584800 583674 0 FreeSans 1400 0 0 0 gpio_analog[6]
+port 19 nsew
+flabel metal3 s -800 511530 480 511642 0 FreeSans 1400 0 0 0 gpio_analog[7]
+port 20 nsew
+flabel metal3 s -800 468308 480 468420 0 FreeSans 1400 0 0 0 gpio_analog[8]
+port 21 nsew
+flabel metal3 s -800 425086 480 425198 0 FreeSans 1400 0 0 0 gpio_analog[9]
+port 22 nsew
+flabel metal3 s 583520 270412 584800 270524 0 FreeSans 1400 0 0 0 gpio_noesd[0]
+port 23 nsew
+flabel metal3 s -800 380682 480 380794 0 FreeSans 1400 0 0 0 gpio_noesd[10]
+port 24 nsew
+flabel metal3 s -800 337460 480 337572 0 FreeSans 1400 0 0 0 gpio_noesd[11]
+port 25 nsew
+flabel metal3 s -800 294238 480 294350 0 FreeSans 1400 0 0 0 gpio_noesd[12]
+port 26 nsew
+flabel metal3 s -800 251216 480 251328 0 FreeSans 1400 0 0 0 gpio_noesd[13]
+port 27 nsew
+flabel metal3 s -800 123594 480 123706 0 FreeSans 1400 0 0 0 gpio_noesd[14]
+port 28 nsew
+flabel metal3 s -800 80372 480 80484 0 FreeSans 1400 0 0 0 gpio_noesd[15]
+port 29 nsew
+flabel metal3 s -800 37150 480 37262 0 FreeSans 1400 0 0 0 gpio_noesd[16]
+port 30 nsew
+flabel metal3 s -800 15728 480 15840 0 FreeSans 1400 0 0 0 gpio_noesd[17]
+port 31 nsew
+flabel metal3 s 583520 314834 584800 314946 0 FreeSans 1400 0 0 0 gpio_noesd[1]
+port 32 nsew
+flabel metal3 s 583520 360056 584800 360168 0 FreeSans 1400 0 0 0 gpio_noesd[2]
+port 33 nsew
+flabel metal3 s 583520 406478 584800 406590 0 FreeSans 1400 0 0 0 gpio_noesd[3]
+port 34 nsew
+flabel metal3 s 583520 450900 584800 451012 0 FreeSans 1400 0 0 0 gpio_noesd[4]
+port 35 nsew
+flabel metal3 s 583520 495322 584800 495434 0 FreeSans 1400 0 0 0 gpio_noesd[5]
+port 36 nsew
+flabel metal3 s 583520 584744 584800 584856 0 FreeSans 1400 0 0 0 gpio_noesd[6]
+port 37 nsew
+flabel metal3 s -800 510348 480 510460 0 FreeSans 1400 0 0 0 gpio_noesd[7]
+port 38 nsew
+flabel metal3 s -800 467126 480 467238 0 FreeSans 1400 0 0 0 gpio_noesd[8]
+port 39 nsew
+flabel metal3 s -800 423904 480 424016 0 FreeSans 1400 0 0 0 gpio_noesd[9]
+port 40 nsew
+flabel metal3 s 582300 677984 584800 682984 0 FreeSans 1400 0 0 0 io_analog[0]
+port 41 nsew
+flabel metal3 s 0 680242 1700 685242 0 FreeSans 1400 0 0 0 io_analog[10]
+port 42 nsew
+flabel metal3 s 566594 702300 571594 704800 0 FreeSans 2400 180 0 0 io_analog[1]
+port 43 nsew
+flabel metal3 s 465394 702300 470394 704800 0 FreeSans 2400 180 0 0 io_analog[2]
+port 44 nsew
+flabel metal3 s 413394 702300 418394 704800 0 FreeSans 2400 180 0 0 io_analog[3]
+port 45 nsew
+flabel metal3 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal4 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal5 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal3 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal4 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal5 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal3 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal4 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal5 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal3 s 120194 702300 125194 704800 0 FreeSans 2400 180 0 0 io_analog[7]
+port 49 nsew
+flabel metal3 s 68194 702300 73194 704800 0 FreeSans 2400 180 0 0 io_analog[8]
+port 50 nsew
+flabel metal3 s 16194 702300 21194 704800 0 FreeSans 2400 180 0 0 io_analog[9]
+port 51 nsew
+flabel metal3 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal4 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal5 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal3 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal4 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal5 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal3 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal4 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal5 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal3 s 326794 702300 328994 704800 0 FreeSans 2400 180 0 0 io_clamp_high[0]
+port 52 nsew
+flabel metal3 s 225094 702300 227294 704800 0 FreeSans 2400 180 0 0 io_clamp_high[1]
+port 53 nsew
+flabel metal3 s 173394 702300 175594 704800 0 FreeSans 2400 180 0 0 io_clamp_high[2]
+port 54 nsew
+flabel metal3 s 324294 702300 326494 704800 0 FreeSans 2400 180 0 0 io_clamp_low[0]
+port 55 nsew
+flabel metal3 s 222594 702300 224794 704800 0 FreeSans 2400 180 0 0 io_clamp_low[1]
+port 56 nsew
+flabel metal3 s 170894 702300 173094 704800 0 FreeSans 2400 180 0 0 io_clamp_low[2]
+port 57 nsew
+flabel metal3 s 583520 2726 584800 2838 0 FreeSans 1400 0 0 0 io_in[0]
+port 58 nsew
+flabel metal3 s 583520 408842 584800 408954 0 FreeSans 1400 0 0 0 io_in[10]
+port 59 nsew
+flabel metal3 s 583520 453264 584800 453376 0 FreeSans 1400 0 0 0 io_in[11]
+port 60 nsew
+flabel metal3 s 583520 497686 584800 497798 0 FreeSans 1400 0 0 0 io_in[12]
+port 61 nsew
+flabel metal3 s 583520 587108 584800 587220 0 FreeSans 1400 0 0 0 io_in[13]
+port 62 nsew
+flabel metal3 s -800 507984 480 508096 0 FreeSans 1400 0 0 0 io_in[14]
+port 63 nsew
+flabel metal3 s -800 464762 480 464874 0 FreeSans 1400 0 0 0 io_in[15]
+port 64 nsew
+flabel metal3 s -800 421540 480 421652 0 FreeSans 1400 0 0 0 io_in[16]
+port 65 nsew
+flabel metal3 s -800 378318 480 378430 0 FreeSans 1400 0 0 0 io_in[17]
+port 66 nsew
+flabel metal3 s -800 335096 480 335208 0 FreeSans 1400 0 0 0 io_in[18]
+port 67 nsew
+flabel metal3 s -800 291874 480 291986 0 FreeSans 1400 0 0 0 io_in[19]
+port 68 nsew
+flabel metal3 s 583520 7454 584800 7566 0 FreeSans 1400 0 0 0 io_in[1]
+port 69 nsew
+flabel metal3 s -800 248852 480 248964 0 FreeSans 1400 0 0 0 io_in[20]
+port 70 nsew
+flabel metal3 s -800 121230 480 121342 0 FreeSans 1400 0 0 0 io_in[21]
+port 71 nsew
+flabel metal3 s -800 78008 480 78120 0 FreeSans 1400 0 0 0 io_in[22]
+port 72 nsew
+flabel metal3 s -800 34786 480 34898 0 FreeSans 1400 0 0 0 io_in[23]
+port 73 nsew
+flabel metal3 s -800 13364 480 13476 0 FreeSans 1400 0 0 0 io_in[24]
+port 74 nsew
+flabel metal3 s -800 8636 480 8748 0 FreeSans 1400 0 0 0 io_in[25]
+port 75 nsew
+flabel metal3 s -800 3908 480 4020 0 FreeSans 1400 0 0 0 io_in[26]
+port 76 nsew
+flabel metal3 s 583520 12182 584800 12294 0 FreeSans 1400 0 0 0 io_in[2]
+port 77 nsew
+flabel metal3 s 583520 16910 584800 17022 0 FreeSans 1400 0 0 0 io_in[3]
+port 78 nsew
+flabel metal3 s 583520 21638 584800 21750 0 FreeSans 1400 0 0 0 io_in[4]
+port 79 nsew
+flabel metal3 s 583520 48096 584800 48208 0 FreeSans 1400 0 0 0 io_in[5]
+port 80 nsew
+flabel metal3 s 583520 92754 584800 92866 0 FreeSans 1400 0 0 0 io_in[6]
+port 81 nsew
+flabel metal3 s 583520 272776 584800 272888 0 FreeSans 1400 0 0 0 io_in[7]
+port 82 nsew
+flabel metal3 s 583520 317198 584800 317310 0 FreeSans 1400 0 0 0 io_in[8]
+port 83 nsew
+flabel metal3 s 583520 362420 584800 362532 0 FreeSans 1400 0 0 0 io_in[9]
+port 84 nsew
+flabel metal3 s 583520 1544 584800 1656 0 FreeSans 1400 0 0 0 io_in_3v3[0]
+port 85 nsew
+flabel metal3 s 583520 407660 584800 407772 0 FreeSans 1400 0 0 0 io_in_3v3[10]
+port 86 nsew
+flabel metal3 s 583520 452082 584800 452194 0 FreeSans 1400 0 0 0 io_in_3v3[11]
+port 87 nsew
+flabel metal3 s 583520 496504 584800 496616 0 FreeSans 1400 0 0 0 io_in_3v3[12]
+port 88 nsew
+flabel metal3 s 583520 585926 584800 586038 0 FreeSans 1400 0 0 0 io_in_3v3[13]
+port 89 nsew
+flabel metal3 s -800 509166 480 509278 0 FreeSans 1400 0 0 0 io_in_3v3[14]
+port 90 nsew
+flabel metal3 s -800 465944 480 466056 0 FreeSans 1400 0 0 0 io_in_3v3[15]
+port 91 nsew
+flabel metal3 s -800 422722 480 422834 0 FreeSans 1400 0 0 0 io_in_3v3[16]
+port 92 nsew
+flabel metal3 s -800 379500 480 379612 0 FreeSans 1400 0 0 0 io_in_3v3[17]
+port 93 nsew
+flabel metal3 s -800 336278 480 336390 0 FreeSans 1400 0 0 0 io_in_3v3[18]
+port 94 nsew
+flabel metal3 s -800 293056 480 293168 0 FreeSans 1400 0 0 0 io_in_3v3[19]
+port 95 nsew
+flabel metal3 s 583520 6272 584800 6384 0 FreeSans 1400 0 0 0 io_in_3v3[1]
+port 96 nsew
+flabel metal3 s -800 250034 480 250146 0 FreeSans 1400 0 0 0 io_in_3v3[20]
+port 97 nsew
+flabel metal3 s -800 122412 480 122524 0 FreeSans 1400 0 0 0 io_in_3v3[21]
+port 98 nsew
+flabel metal3 s -800 79190 480 79302 0 FreeSans 1400 0 0 0 io_in_3v3[22]
+port 99 nsew
+flabel metal3 s -800 35968 480 36080 0 FreeSans 1400 0 0 0 io_in_3v3[23]
+port 100 nsew
+flabel metal3 s -800 14546 480 14658 0 FreeSans 1400 0 0 0 io_in_3v3[24]
+port 101 nsew
+flabel metal3 s -800 9818 480 9930 0 FreeSans 1400 0 0 0 io_in_3v3[25]
+port 102 nsew
+flabel metal3 s -800 5090 480 5202 0 FreeSans 1400 0 0 0 io_in_3v3[26]
+port 103 nsew
+flabel metal3 s 583520 11000 584800 11112 0 FreeSans 1400 0 0 0 io_in_3v3[2]
+port 104 nsew
+flabel metal3 s 583520 15728 584800 15840 0 FreeSans 1400 0 0 0 io_in_3v3[3]
+port 105 nsew
+flabel metal3 s 583520 20456 584800 20568 0 FreeSans 1400 0 0 0 io_in_3v3[4]
+port 106 nsew
+flabel metal3 s 583520 46914 584800 47026 0 FreeSans 1400 0 0 0 io_in_3v3[5]
+port 107 nsew
+flabel metal3 s 583520 91572 584800 91684 0 FreeSans 1400 0 0 0 io_in_3v3[6]
+port 108 nsew
+flabel metal3 s 583520 271594 584800 271706 0 FreeSans 1400 0 0 0 io_in_3v3[7]
+port 109 nsew
+flabel metal3 s 583520 316016 584800 316128 0 FreeSans 1400 0 0 0 io_in_3v3[8]
+port 110 nsew
+flabel metal3 s 583520 361238 584800 361350 0 FreeSans 1400 0 0 0 io_in_3v3[9]
+port 111 nsew
+flabel metal3 s 583520 5090 584800 5202 0 FreeSans 1400 0 0 0 io_oeb[0]
+port 112 nsew
+flabel metal3 s 583520 411206 584800 411318 0 FreeSans 1400 0 0 0 io_oeb[10]
+port 113 nsew
+flabel metal3 s 583520 455628 584800 455740 0 FreeSans 1400 0 0 0 io_oeb[11]
+port 114 nsew
+flabel metal3 s 583520 500050 584800 500162 0 FreeSans 1400 0 0 0 io_oeb[12]
+port 115 nsew
+flabel metal3 s 583520 589472 584800 589584 0 FreeSans 1400 0 0 0 io_oeb[13]
+port 116 nsew
+flabel metal3 s -800 505620 480 505732 0 FreeSans 1400 0 0 0 io_oeb[14]
+port 117 nsew
+flabel metal3 s -800 462398 480 462510 0 FreeSans 1400 0 0 0 io_oeb[15]
+port 118 nsew
+flabel metal3 s -800 419176 480 419288 0 FreeSans 1400 0 0 0 io_oeb[16]
+port 119 nsew
+flabel metal3 s -800 375954 480 376066 0 FreeSans 1400 0 0 0 io_oeb[17]
+port 120 nsew
+flabel metal3 s -800 332732 480 332844 0 FreeSans 1400 0 0 0 io_oeb[18]
+port 121 nsew
+flabel metal3 s -800 289510 480 289622 0 FreeSans 1400 0 0 0 io_oeb[19]
+port 122 nsew
+flabel metal3 s 583520 9818 584800 9930 0 FreeSans 1400 0 0 0 io_oeb[1]
+port 123 nsew
+flabel metal3 s -800 246488 480 246600 0 FreeSans 1400 0 0 0 io_oeb[20]
+port 124 nsew
+flabel metal3 s -800 118866 480 118978 0 FreeSans 1400 0 0 0 io_oeb[21]
+port 125 nsew
+flabel metal3 s -800 75644 480 75756 0 FreeSans 1400 0 0 0 io_oeb[22]
+port 126 nsew
+flabel metal3 s -800 32422 480 32534 0 FreeSans 1400 0 0 0 io_oeb[23]
+port 127 nsew
+flabel metal3 s -800 11000 480 11112 0 FreeSans 1400 0 0 0 io_oeb[24]
+port 128 nsew
+flabel metal3 s -800 6272 480 6384 0 FreeSans 1400 0 0 0 io_oeb[25]
+port 129 nsew
+flabel metal3 s -800 1544 480 1656 0 FreeSans 1400 0 0 0 io_oeb[26]
+port 130 nsew
+flabel metal3 s 583520 14546 584800 14658 0 FreeSans 1400 0 0 0 io_oeb[2]
+port 131 nsew
+flabel metal3 s 583520 19274 584800 19386 0 FreeSans 1400 0 0 0 io_oeb[3]
+port 132 nsew
+flabel metal3 s 583520 24002 584800 24114 0 FreeSans 1400 0 0 0 io_oeb[4]
+port 133 nsew
+flabel metal3 s 583520 50460 584800 50572 0 FreeSans 1400 0 0 0 io_oeb[5]
+port 134 nsew
+flabel metal3 s 583520 95118 584800 95230 0 FreeSans 1400 0 0 0 io_oeb[6]
+port 135 nsew
+flabel metal3 s 583520 275140 584800 275252 0 FreeSans 1400 0 0 0 io_oeb[7]
+port 136 nsew
+flabel metal3 s 583520 319562 584800 319674 0 FreeSans 1400 0 0 0 io_oeb[8]
+port 137 nsew
+flabel metal3 s 583520 364784 584800 364896 0 FreeSans 1400 0 0 0 io_oeb[9]
+port 138 nsew
+flabel metal3 s 583520 3908 584800 4020 0 FreeSans 1400 0 0 0 io_out[0]
+port 139 nsew
+flabel metal3 s 583520 410024 584800 410136 0 FreeSans 1400 0 0 0 io_out[10]
+port 140 nsew
+flabel metal3 s 583520 454446 584800 454558 0 FreeSans 1400 0 0 0 io_out[11]
+port 141 nsew
+flabel metal3 s 583520 498868 584800 498980 0 FreeSans 1400 0 0 0 io_out[12]
+port 142 nsew
+flabel metal3 s 583520 588290 584800 588402 0 FreeSans 1400 0 0 0 io_out[13]
+port 143 nsew
+flabel metal3 s -800 506802 480 506914 0 FreeSans 1400 0 0 0 io_out[14]
+port 144 nsew
+flabel metal3 s -800 463580 480 463692 0 FreeSans 1400 0 0 0 io_out[15]
+port 145 nsew
+flabel metal3 s -800 420358 480 420470 0 FreeSans 1400 0 0 0 io_out[16]
+port 146 nsew
+flabel metal3 s -800 377136 480 377248 0 FreeSans 1400 0 0 0 io_out[17]
+port 147 nsew
+flabel metal3 s -800 333914 480 334026 0 FreeSans 1400 0 0 0 io_out[18]
+port 148 nsew
+flabel metal3 s -800 290692 480 290804 0 FreeSans 1400 0 0 0 io_out[19]
+port 149 nsew
+flabel metal3 s 583520 8636 584800 8748 0 FreeSans 1400 0 0 0 io_out[1]
+port 150 nsew
+flabel metal3 s -800 247670 480 247782 0 FreeSans 1400 0 0 0 io_out[20]
+port 151 nsew
+flabel metal3 s -800 120048 480 120160 0 FreeSans 1400 0 0 0 io_out[21]
+port 152 nsew
+flabel metal3 s -800 76826 480 76938 0 FreeSans 1400 0 0 0 io_out[22]
+port 153 nsew
+flabel metal3 s -800 33604 480 33716 0 FreeSans 1400 0 0 0 io_out[23]
+port 154 nsew
+flabel metal3 s -800 12182 480 12294 0 FreeSans 1400 0 0 0 io_out[24]
+port 155 nsew
+flabel metal3 s -800 7454 480 7566 0 FreeSans 1400 0 0 0 io_out[25]
+port 156 nsew
+flabel metal3 s -800 2726 480 2838 0 FreeSans 1400 0 0 0 io_out[26]
+port 157 nsew
+flabel metal3 s 583520 13364 584800 13476 0 FreeSans 1400 0 0 0 io_out[2]
+port 158 nsew
+flabel metal3 s 583520 18092 584800 18204 0 FreeSans 1400 0 0 0 io_out[3]
+port 159 nsew
+flabel metal3 s 583520 22820 584800 22932 0 FreeSans 1400 0 0 0 io_out[4]
+port 160 nsew
+flabel metal3 s 583520 49278 584800 49390 0 FreeSans 1400 0 0 0 io_out[5]
+port 161 nsew
+flabel metal3 s 583520 93936 584800 94048 0 FreeSans 1400 0 0 0 io_out[6]
+port 162 nsew
+flabel metal3 s 583520 273958 584800 274070 0 FreeSans 1400 0 0 0 io_out[7]
+port 163 nsew
+flabel metal3 s 583520 318380 584800 318492 0 FreeSans 1400 0 0 0 io_out[8]
+port 164 nsew
+flabel metal3 s 583520 363602 584800 363714 0 FreeSans 1400 0 0 0 io_out[9]
+port 165 nsew
+flabel metal2 s 125816 -800 125928 480 0 FreeSans 1400 90 0 0 la_data_in[0]
+port 166 nsew
+flabel metal2 s 480416 -800 480528 480 0 FreeSans 1400 90 0 0 la_data_in[100]
+port 167 nsew
+flabel metal2 s 483962 -800 484074 480 0 FreeSans 1400 90 0 0 la_data_in[101]
+port 168 nsew
+flabel metal2 s 487508 -800 487620 480 0 FreeSans 1400 90 0 0 la_data_in[102]
+port 169 nsew
+flabel metal2 s 491054 -800 491166 480 0 FreeSans 1400 90 0 0 la_data_in[103]
+port 170 nsew
+flabel metal2 s 494600 -800 494712 480 0 FreeSans 1400 90 0 0 la_data_in[104]
+port 171 nsew
+flabel metal2 s 498146 -800 498258 480 0 FreeSans 1400 90 0 0 la_data_in[105]
+port 172 nsew
+flabel metal2 s 501692 -800 501804 480 0 FreeSans 1400 90 0 0 la_data_in[106]
+port 173 nsew
+flabel metal2 s 505238 -800 505350 480 0 FreeSans 1400 90 0 0 la_data_in[107]
+port 174 nsew
+flabel metal2 s 508784 -800 508896 480 0 FreeSans 1400 90 0 0 la_data_in[108]
+port 175 nsew
+flabel metal2 s 512330 -800 512442 480 0 FreeSans 1400 90 0 0 la_data_in[109]
+port 176 nsew
+flabel metal2 s 161276 -800 161388 480 0 FreeSans 1400 90 0 0 la_data_in[10]
+port 177 nsew
+flabel metal2 s 515876 -800 515988 480 0 FreeSans 1400 90 0 0 la_data_in[110]
+port 178 nsew
+flabel metal2 s 519422 -800 519534 480 0 FreeSans 1400 90 0 0 la_data_in[111]
+port 179 nsew
+flabel metal2 s 522968 -800 523080 480 0 FreeSans 1400 90 0 0 la_data_in[112]
+port 180 nsew
+flabel metal2 s 526514 -800 526626 480 0 FreeSans 1400 90 0 0 la_data_in[113]
+port 181 nsew
+flabel metal2 s 530060 -800 530172 480 0 FreeSans 1400 90 0 0 la_data_in[114]
+port 182 nsew
+flabel metal2 s 533606 -800 533718 480 0 FreeSans 1400 90 0 0 la_data_in[115]
+port 183 nsew
+flabel metal2 s 537152 -800 537264 480 0 FreeSans 1400 90 0 0 la_data_in[116]
+port 184 nsew
+flabel metal2 s 540698 -800 540810 480 0 FreeSans 1400 90 0 0 la_data_in[117]
+port 185 nsew
+flabel metal2 s 544244 -800 544356 480 0 FreeSans 1400 90 0 0 la_data_in[118]
+port 186 nsew
+flabel metal2 s 547790 -800 547902 480 0 FreeSans 1400 90 0 0 la_data_in[119]
+port 187 nsew
+flabel metal2 s 164822 -800 164934 480 0 FreeSans 1400 90 0 0 la_data_in[11]
+port 188 nsew
+flabel metal2 s 551336 -800 551448 480 0 FreeSans 1400 90 0 0 la_data_in[120]
+port 189 nsew
+flabel metal2 s 554882 -800 554994 480 0 FreeSans 1400 90 0 0 la_data_in[121]
+port 190 nsew
+flabel metal2 s 558428 -800 558540 480 0 FreeSans 1400 90 0 0 la_data_in[122]
+port 191 nsew
+flabel metal2 s 561974 -800 562086 480 0 FreeSans 1400 90 0 0 la_data_in[123]
+port 192 nsew
+flabel metal2 s 565520 -800 565632 480 0 FreeSans 1400 90 0 0 la_data_in[124]
+port 193 nsew
+flabel metal2 s 569066 -800 569178 480 0 FreeSans 1400 90 0 0 la_data_in[125]
+port 194 nsew
+flabel metal2 s 572612 -800 572724 480 0 FreeSans 1400 90 0 0 la_data_in[126]
+port 195 nsew
+flabel metal2 s 576158 -800 576270 480 0 FreeSans 1400 90 0 0 la_data_in[127]
+port 196 nsew
+flabel metal2 s 168368 -800 168480 480 0 FreeSans 1400 90 0 0 la_data_in[12]
+port 197 nsew
+flabel metal2 s 171914 -800 172026 480 0 FreeSans 1400 90 0 0 la_data_in[13]
+port 198 nsew
+flabel metal2 s 175460 -800 175572 480 0 FreeSans 1400 90 0 0 la_data_in[14]
+port 199 nsew
+flabel metal2 s 179006 -800 179118 480 0 FreeSans 1400 90 0 0 la_data_in[15]
+port 200 nsew
+flabel metal2 s 182552 -800 182664 480 0 FreeSans 1400 90 0 0 la_data_in[16]
+port 201 nsew
+flabel metal2 s 186098 -800 186210 480 0 FreeSans 1400 90 0 0 la_data_in[17]
+port 202 nsew
+flabel metal2 s 189644 -800 189756 480 0 FreeSans 1400 90 0 0 la_data_in[18]
+port 203 nsew
+flabel metal2 s 193190 -800 193302 480 0 FreeSans 1400 90 0 0 la_data_in[19]
+port 204 nsew
+flabel metal2 s 129362 -800 129474 480 0 FreeSans 1400 90 0 0 la_data_in[1]
+port 205 nsew
+flabel metal2 s 196736 -800 196848 480 0 FreeSans 1400 90 0 0 la_data_in[20]
+port 206 nsew
+flabel metal2 s 200282 -800 200394 480 0 FreeSans 1400 90 0 0 la_data_in[21]
+port 207 nsew
+flabel metal2 s 203828 -800 203940 480 0 FreeSans 1400 90 0 0 la_data_in[22]
+port 208 nsew
+flabel metal2 s 207374 -800 207486 480 0 FreeSans 1400 90 0 0 la_data_in[23]
+port 209 nsew
+flabel metal2 s 210920 -800 211032 480 0 FreeSans 1400 90 0 0 la_data_in[24]
+port 210 nsew
+flabel metal2 s 214466 -800 214578 480 0 FreeSans 1400 90 0 0 la_data_in[25]
+port 211 nsew
+flabel metal2 s 218012 -800 218124 480 0 FreeSans 1400 90 0 0 la_data_in[26]
+port 212 nsew
+flabel metal2 s 221558 -800 221670 480 0 FreeSans 1400 90 0 0 la_data_in[27]
+port 213 nsew
+flabel metal2 s 225104 -800 225216 480 0 FreeSans 1400 90 0 0 la_data_in[28]
+port 214 nsew
+flabel metal2 s 228650 -800 228762 480 0 FreeSans 1400 90 0 0 la_data_in[29]
+port 215 nsew
+flabel metal2 s 132908 -800 133020 480 0 FreeSans 1400 90 0 0 la_data_in[2]
+port 216 nsew
+flabel metal2 s 232196 -800 232308 480 0 FreeSans 1400 90 0 0 la_data_in[30]
+port 217 nsew
+flabel metal2 s 235742 -800 235854 480 0 FreeSans 1400 90 0 0 la_data_in[31]
+port 218 nsew
+flabel metal2 s 239288 -800 239400 480 0 FreeSans 1400 90 0 0 la_data_in[32]
+port 219 nsew
+flabel metal2 s 242834 -800 242946 480 0 FreeSans 1400 90 0 0 la_data_in[33]
+port 220 nsew
+flabel metal2 s 246380 -800 246492 480 0 FreeSans 1400 90 0 0 la_data_in[34]
+port 221 nsew
+flabel metal2 s 249926 -800 250038 480 0 FreeSans 1400 90 0 0 la_data_in[35]
+port 222 nsew
+flabel metal2 s 253472 -800 253584 480 0 FreeSans 1400 90 0 0 la_data_in[36]
+port 223 nsew
+flabel metal2 s 257018 -800 257130 480 0 FreeSans 1400 90 0 0 la_data_in[37]
+port 224 nsew
+flabel metal2 s 260564 -800 260676 480 0 FreeSans 1400 90 0 0 la_data_in[38]
+port 225 nsew
+flabel metal2 s 264110 -800 264222 480 0 FreeSans 1400 90 0 0 la_data_in[39]
+port 226 nsew
+flabel metal2 s 136454 -800 136566 480 0 FreeSans 1400 90 0 0 la_data_in[3]
+port 227 nsew
+flabel metal2 s 267656 -800 267768 480 0 FreeSans 1400 90 0 0 la_data_in[40]
+port 228 nsew
+flabel metal2 s 271202 -800 271314 480 0 FreeSans 1400 90 0 0 la_data_in[41]
+port 229 nsew
+flabel metal2 s 274748 -800 274860 480 0 FreeSans 1400 90 0 0 la_data_in[42]
+port 230 nsew
+flabel metal2 s 278294 -800 278406 480 0 FreeSans 1400 90 0 0 la_data_in[43]
+port 231 nsew
+flabel metal2 s 281840 -800 281952 480 0 FreeSans 1400 90 0 0 la_data_in[44]
+port 232 nsew
+flabel metal2 s 285386 -800 285498 480 0 FreeSans 1400 90 0 0 la_data_in[45]
+port 233 nsew
+flabel metal2 s 288932 -800 289044 480 0 FreeSans 1400 90 0 0 la_data_in[46]
+port 234 nsew
+flabel metal2 s 292478 -800 292590 480 0 FreeSans 1400 90 0 0 la_data_in[47]
+port 235 nsew
+flabel metal2 s 296024 -800 296136 480 0 FreeSans 1400 90 0 0 la_data_in[48]
+port 236 nsew
+flabel metal2 s 299570 -800 299682 480 0 FreeSans 1400 90 0 0 la_data_in[49]
+port 237 nsew
+flabel metal2 s 140000 -800 140112 480 0 FreeSans 1400 90 0 0 la_data_in[4]
+port 238 nsew
+flabel metal2 s 303116 -800 303228 480 0 FreeSans 1400 90 0 0 la_data_in[50]
+port 239 nsew
+flabel metal2 s 306662 -800 306774 480 0 FreeSans 1400 90 0 0 la_data_in[51]
+port 240 nsew
+flabel metal2 s 310208 -800 310320 480 0 FreeSans 1400 90 0 0 la_data_in[52]
+port 241 nsew
+flabel metal2 s 313754 -800 313866 480 0 FreeSans 1400 90 0 0 la_data_in[53]
+port 242 nsew
+flabel metal2 s 317300 -800 317412 480 0 FreeSans 1400 90 0 0 la_data_in[54]
+port 243 nsew
+flabel metal2 s 320846 -800 320958 480 0 FreeSans 1400 90 0 0 la_data_in[55]
+port 244 nsew
+flabel metal2 s 324392 -800 324504 480 0 FreeSans 1400 90 0 0 la_data_in[56]
+port 245 nsew
+flabel metal2 s 327938 -800 328050 480 0 FreeSans 1400 90 0 0 la_data_in[57]
+port 246 nsew
+flabel metal2 s 331484 -800 331596 480 0 FreeSans 1400 90 0 0 la_data_in[58]
+port 247 nsew
+flabel metal2 s 335030 -800 335142 480 0 FreeSans 1400 90 0 0 la_data_in[59]
+port 248 nsew
+flabel metal2 s 143546 -800 143658 480 0 FreeSans 1400 90 0 0 la_data_in[5]
+port 249 nsew
+flabel metal2 s 338576 -800 338688 480 0 FreeSans 1400 90 0 0 la_data_in[60]
+port 250 nsew
+flabel metal2 s 342122 -800 342234 480 0 FreeSans 1400 90 0 0 la_data_in[61]
+port 251 nsew
+flabel metal2 s 345668 -800 345780 480 0 FreeSans 1400 90 0 0 la_data_in[62]
+port 252 nsew
+flabel metal2 s 349214 -800 349326 480 0 FreeSans 1400 90 0 0 la_data_in[63]
+port 253 nsew
+flabel metal2 s 352760 -800 352872 480 0 FreeSans 1400 90 0 0 la_data_in[64]
+port 254 nsew
+flabel metal2 s 356306 -800 356418 480 0 FreeSans 1400 90 0 0 la_data_in[65]
+port 255 nsew
+flabel metal2 s 359852 -800 359964 480 0 FreeSans 1400 90 0 0 la_data_in[66]
+port 256 nsew
+flabel metal2 s 363398 -800 363510 480 0 FreeSans 1400 90 0 0 la_data_in[67]
+port 257 nsew
+flabel metal2 s 366944 -800 367056 480 0 FreeSans 1400 90 0 0 la_data_in[68]
+port 258 nsew
+flabel metal2 s 370490 -800 370602 480 0 FreeSans 1400 90 0 0 la_data_in[69]
+port 259 nsew
+flabel metal2 s 147092 -800 147204 480 0 FreeSans 1400 90 0 0 la_data_in[6]
+port 260 nsew
+flabel metal2 s 374036 -800 374148 480 0 FreeSans 1400 90 0 0 la_data_in[70]
+port 261 nsew
+flabel metal2 s 377582 -800 377694 480 0 FreeSans 1400 90 0 0 la_data_in[71]
+port 262 nsew
+flabel metal2 s 381128 -800 381240 480 0 FreeSans 1400 90 0 0 la_data_in[72]
+port 263 nsew
+flabel metal2 s 384674 -800 384786 480 0 FreeSans 1400 90 0 0 la_data_in[73]
+port 264 nsew
+flabel metal2 s 388220 -800 388332 480 0 FreeSans 1400 90 0 0 la_data_in[74]
+port 265 nsew
+flabel metal2 s 391766 -800 391878 480 0 FreeSans 1400 90 0 0 la_data_in[75]
+port 266 nsew
+flabel metal2 s 395312 -800 395424 480 0 FreeSans 1400 90 0 0 la_data_in[76]
+port 267 nsew
+flabel metal2 s 398858 -800 398970 480 0 FreeSans 1400 90 0 0 la_data_in[77]
+port 268 nsew
+flabel metal2 s 402404 -800 402516 480 0 FreeSans 1400 90 0 0 la_data_in[78]
+port 269 nsew
+flabel metal2 s 405950 -800 406062 480 0 FreeSans 1400 90 0 0 la_data_in[79]
+port 270 nsew
+flabel metal2 s 150638 -800 150750 480 0 FreeSans 1400 90 0 0 la_data_in[7]
+port 271 nsew
+flabel metal2 s 409496 -800 409608 480 0 FreeSans 1400 90 0 0 la_data_in[80]
+port 272 nsew
+flabel metal2 s 413042 -800 413154 480 0 FreeSans 1400 90 0 0 la_data_in[81]
+port 273 nsew
+flabel metal2 s 416588 -800 416700 480 0 FreeSans 1400 90 0 0 la_data_in[82]
+port 274 nsew
+flabel metal2 s 420134 -800 420246 480 0 FreeSans 1400 90 0 0 la_data_in[83]
+port 275 nsew
+flabel metal2 s 423680 -800 423792 480 0 FreeSans 1400 90 0 0 la_data_in[84]
+port 276 nsew
+flabel metal2 s 427226 -800 427338 480 0 FreeSans 1400 90 0 0 la_data_in[85]
+port 277 nsew
+flabel metal2 s 430772 -800 430884 480 0 FreeSans 1400 90 0 0 la_data_in[86]
+port 278 nsew
+flabel metal2 s 434318 -800 434430 480 0 FreeSans 1400 90 0 0 la_data_in[87]
+port 279 nsew
+flabel metal2 s 437864 -800 437976 480 0 FreeSans 1400 90 0 0 la_data_in[88]
+port 280 nsew
+flabel metal2 s 441410 -800 441522 480 0 FreeSans 1400 90 0 0 la_data_in[89]
+port 281 nsew
+flabel metal2 s 154184 -800 154296 480 0 FreeSans 1400 90 0 0 la_data_in[8]
+port 282 nsew
+flabel metal2 s 444956 -800 445068 480 0 FreeSans 1400 90 0 0 la_data_in[90]
+port 283 nsew
+flabel metal2 s 448502 -800 448614 480 0 FreeSans 1400 90 0 0 la_data_in[91]
+port 284 nsew
+flabel metal2 s 452048 -800 452160 480 0 FreeSans 1400 90 0 0 la_data_in[92]
+port 285 nsew
+flabel metal2 s 455594 -800 455706 480 0 FreeSans 1400 90 0 0 la_data_in[93]
+port 286 nsew
+flabel metal2 s 459140 -800 459252 480 0 FreeSans 1400 90 0 0 la_data_in[94]
+port 287 nsew
+flabel metal2 s 462686 -800 462798 480 0 FreeSans 1400 90 0 0 la_data_in[95]
+port 288 nsew
+flabel metal2 s 466232 -800 466344 480 0 FreeSans 1400 90 0 0 la_data_in[96]
+port 289 nsew
+flabel metal2 s 469778 -800 469890 480 0 FreeSans 1400 90 0 0 la_data_in[97]
+port 290 nsew
+flabel metal2 s 473324 -800 473436 480 0 FreeSans 1400 90 0 0 la_data_in[98]
+port 291 nsew
+flabel metal2 s 476870 -800 476982 480 0 FreeSans 1400 90 0 0 la_data_in[99]
+port 292 nsew
+flabel metal2 s 157730 -800 157842 480 0 FreeSans 1400 90 0 0 la_data_in[9]
+port 293 nsew
+flabel metal2 s 126998 -800 127110 480 0 FreeSans 1400 90 0 0 la_data_out[0]
+port 294 nsew
+flabel metal2 s 481598 -800 481710 480 0 FreeSans 1400 90 0 0 la_data_out[100]
+port 295 nsew
+flabel metal2 s 485144 -800 485256 480 0 FreeSans 1400 90 0 0 la_data_out[101]
+port 296 nsew
+flabel metal2 s 488690 -800 488802 480 0 FreeSans 1400 90 0 0 la_data_out[102]
+port 297 nsew
+flabel metal2 s 492236 -800 492348 480 0 FreeSans 1400 90 0 0 la_data_out[103]
+port 298 nsew
+flabel metal2 s 495782 -800 495894 480 0 FreeSans 1400 90 0 0 la_data_out[104]
+port 299 nsew
+flabel metal2 s 499328 -800 499440 480 0 FreeSans 1400 90 0 0 la_data_out[105]
+port 300 nsew
+flabel metal2 s 502874 -800 502986 480 0 FreeSans 1400 90 0 0 la_data_out[106]
+port 301 nsew
+flabel metal2 s 506420 -800 506532 480 0 FreeSans 1400 90 0 0 la_data_out[107]
+port 302 nsew
+flabel metal2 s 509966 -800 510078 480 0 FreeSans 1400 90 0 0 la_data_out[108]
+port 303 nsew
+flabel metal2 s 513512 -800 513624 480 0 FreeSans 1400 90 0 0 la_data_out[109]
+port 304 nsew
+flabel metal2 s 162458 -800 162570 480 0 FreeSans 1400 90 0 0 la_data_out[10]
+port 305 nsew
+flabel metal2 s 517058 -800 517170 480 0 FreeSans 1400 90 0 0 la_data_out[110]
+port 306 nsew
+flabel metal2 s 520604 -800 520716 480 0 FreeSans 1400 90 0 0 la_data_out[111]
+port 307 nsew
+flabel metal2 s 524150 -800 524262 480 0 FreeSans 1400 90 0 0 la_data_out[112]
+port 308 nsew
+flabel metal2 s 527696 -800 527808 480 0 FreeSans 1400 90 0 0 la_data_out[113]
+port 309 nsew
+flabel metal2 s 531242 -800 531354 480 0 FreeSans 1400 90 0 0 la_data_out[114]
+port 310 nsew
+flabel metal2 s 534788 -800 534900 480 0 FreeSans 1400 90 0 0 la_data_out[115]
+port 311 nsew
+flabel metal2 s 538334 -800 538446 480 0 FreeSans 1400 90 0 0 la_data_out[116]
+port 312 nsew
+flabel metal2 s 541880 -800 541992 480 0 FreeSans 1400 90 0 0 la_data_out[117]
+port 313 nsew
+flabel metal2 s 545426 -800 545538 480 0 FreeSans 1400 90 0 0 la_data_out[118]
+port 314 nsew
+flabel metal2 s 548972 -800 549084 480 0 FreeSans 1400 90 0 0 la_data_out[119]
+port 315 nsew
+flabel metal2 s 166004 -800 166116 480 0 FreeSans 1400 90 0 0 la_data_out[11]
+port 316 nsew
+flabel metal2 s 552518 -800 552630 480 0 FreeSans 1400 90 0 0 la_data_out[120]
+port 317 nsew
+flabel metal2 s 556064 -800 556176 480 0 FreeSans 1400 90 0 0 la_data_out[121]
+port 318 nsew
+flabel metal2 s 559610 -800 559722 480 0 FreeSans 1400 90 0 0 la_data_out[122]
+port 319 nsew
+flabel metal2 s 563156 -800 563268 480 0 FreeSans 1400 90 0 0 la_data_out[123]
+port 320 nsew
+flabel metal2 s 566702 -800 566814 480 0 FreeSans 1400 90 0 0 la_data_out[124]
+port 321 nsew
+flabel metal2 s 570248 -800 570360 480 0 FreeSans 1400 90 0 0 la_data_out[125]
+port 322 nsew
+flabel metal2 s 573794 -800 573906 480 0 FreeSans 1400 90 0 0 la_data_out[126]
+port 323 nsew
+flabel metal2 s 577340 -800 577452 480 0 FreeSans 1400 90 0 0 la_data_out[127]
+port 324 nsew
+flabel metal2 s 169550 -800 169662 480 0 FreeSans 1400 90 0 0 la_data_out[12]
+port 325 nsew
+flabel metal2 s 173096 -800 173208 480 0 FreeSans 1400 90 0 0 la_data_out[13]
+port 326 nsew
+flabel metal2 s 176642 -800 176754 480 0 FreeSans 1400 90 0 0 la_data_out[14]
+port 327 nsew
+flabel metal2 s 180188 -800 180300 480 0 FreeSans 1400 90 0 0 la_data_out[15]
+port 328 nsew
+flabel metal2 s 183734 -800 183846 480 0 FreeSans 1400 90 0 0 la_data_out[16]
+port 329 nsew
+flabel metal2 s 187280 -800 187392 480 0 FreeSans 1400 90 0 0 la_data_out[17]
+port 330 nsew
+flabel metal2 s 190826 -800 190938 480 0 FreeSans 1400 90 0 0 la_data_out[18]
+port 331 nsew
+flabel metal2 s 194372 -800 194484 480 0 FreeSans 1400 90 0 0 la_data_out[19]
+port 332 nsew
+flabel metal2 s 130544 -800 130656 480 0 FreeSans 1400 90 0 0 la_data_out[1]
+port 333 nsew
+flabel metal2 s 197918 -800 198030 480 0 FreeSans 1400 90 0 0 la_data_out[20]
+port 334 nsew
+flabel metal2 s 201464 -800 201576 480 0 FreeSans 1400 90 0 0 la_data_out[21]
+port 335 nsew
+flabel metal2 s 205010 -800 205122 480 0 FreeSans 1400 90 0 0 la_data_out[22]
+port 336 nsew
+flabel metal2 s 208556 -800 208668 480 0 FreeSans 1400 90 0 0 la_data_out[23]
+port 337 nsew
+flabel metal2 s 212102 -800 212214 480 0 FreeSans 1400 90 0 0 la_data_out[24]
+port 338 nsew
+flabel metal2 s 215648 -800 215760 480 0 FreeSans 1400 90 0 0 la_data_out[25]
+port 339 nsew
+flabel metal2 s 219194 -800 219306 480 0 FreeSans 1400 90 0 0 la_data_out[26]
+port 340 nsew
+flabel metal2 s 222740 -800 222852 480 0 FreeSans 1400 90 0 0 la_data_out[27]
+port 341 nsew
+flabel metal2 s 226286 -800 226398 480 0 FreeSans 1400 90 0 0 la_data_out[28]
+port 342 nsew
+flabel metal2 s 229832 -800 229944 480 0 FreeSans 1400 90 0 0 la_data_out[29]
+port 343 nsew
+flabel metal2 s 134090 -800 134202 480 0 FreeSans 1400 90 0 0 la_data_out[2]
+port 344 nsew
+flabel metal2 s 233378 -800 233490 480 0 FreeSans 1400 90 0 0 la_data_out[30]
+port 345 nsew
+flabel metal2 s 236924 -800 237036 480 0 FreeSans 1400 90 0 0 la_data_out[31]
+port 346 nsew
+flabel metal2 s 240470 -800 240582 480 0 FreeSans 1400 90 0 0 la_data_out[32]
+port 347 nsew
+flabel metal2 s 244016 -800 244128 480 0 FreeSans 1400 90 0 0 la_data_out[33]
+port 348 nsew
+flabel metal2 s 247562 -800 247674 480 0 FreeSans 1400 90 0 0 la_data_out[34]
+port 349 nsew
+flabel metal2 s 251108 -800 251220 480 0 FreeSans 1400 90 0 0 la_data_out[35]
+port 350 nsew
+flabel metal2 s 254654 -800 254766 480 0 FreeSans 1400 90 0 0 la_data_out[36]
+port 351 nsew
+flabel metal2 s 258200 -800 258312 480 0 FreeSans 1400 90 0 0 la_data_out[37]
+port 352 nsew
+flabel metal2 s 261746 -800 261858 480 0 FreeSans 1400 90 0 0 la_data_out[38]
+port 353 nsew
+flabel metal2 s 265292 -800 265404 480 0 FreeSans 1400 90 0 0 la_data_out[39]
+port 354 nsew
+flabel metal2 s 137636 -800 137748 480 0 FreeSans 1400 90 0 0 la_data_out[3]
+port 355 nsew
+flabel metal2 s 268838 -800 268950 480 0 FreeSans 1400 90 0 0 la_data_out[40]
+port 356 nsew
+flabel metal2 s 272384 -800 272496 480 0 FreeSans 1400 90 0 0 la_data_out[41]
+port 357 nsew
+flabel metal2 s 275930 -800 276042 480 0 FreeSans 1400 90 0 0 la_data_out[42]
+port 358 nsew
+flabel metal2 s 279476 -800 279588 480 0 FreeSans 1400 90 0 0 la_data_out[43]
+port 359 nsew
+flabel metal2 s 283022 -800 283134 480 0 FreeSans 1400 90 0 0 la_data_out[44]
+port 360 nsew
+flabel metal2 s 286568 -800 286680 480 0 FreeSans 1400 90 0 0 la_data_out[45]
+port 361 nsew
+flabel metal2 s 290114 -800 290226 480 0 FreeSans 1400 90 0 0 la_data_out[46]
+port 362 nsew
+flabel metal2 s 293660 -800 293772 480 0 FreeSans 1400 90 0 0 la_data_out[47]
+port 363 nsew
+flabel metal2 s 297206 -800 297318 480 0 FreeSans 1400 90 0 0 la_data_out[48]
+port 364 nsew
+flabel metal2 s 300752 -800 300864 480 0 FreeSans 1400 90 0 0 la_data_out[49]
+port 365 nsew
+flabel metal2 s 141182 -800 141294 480 0 FreeSans 1400 90 0 0 la_data_out[4]
+port 366 nsew
+flabel metal2 s 304298 -800 304410 480 0 FreeSans 1400 90 0 0 la_data_out[50]
+port 367 nsew
+flabel metal2 s 307844 -800 307956 480 0 FreeSans 1400 90 0 0 la_data_out[51]
+port 368 nsew
+flabel metal2 s 311390 -800 311502 480 0 FreeSans 1400 90 0 0 la_data_out[52]
+port 369 nsew
+flabel metal2 s 314936 -800 315048 480 0 FreeSans 1400 90 0 0 la_data_out[53]
+port 370 nsew
+flabel metal2 s 318482 -800 318594 480 0 FreeSans 1400 90 0 0 la_data_out[54]
+port 371 nsew
+flabel metal2 s 322028 -800 322140 480 0 FreeSans 1400 90 0 0 la_data_out[55]
+port 372 nsew
+flabel metal2 s 325574 -800 325686 480 0 FreeSans 1400 90 0 0 la_data_out[56]
+port 373 nsew
+flabel metal2 s 329120 -800 329232 480 0 FreeSans 1400 90 0 0 la_data_out[57]
+port 374 nsew
+flabel metal2 s 332666 -800 332778 480 0 FreeSans 1400 90 0 0 la_data_out[58]
+port 375 nsew
+flabel metal2 s 336212 -800 336324 480 0 FreeSans 1400 90 0 0 la_data_out[59]
+port 376 nsew
+flabel metal2 s 144728 -800 144840 480 0 FreeSans 1400 90 0 0 la_data_out[5]
+port 377 nsew
+flabel metal2 s 339758 -800 339870 480 0 FreeSans 1400 90 0 0 la_data_out[60]
+port 378 nsew
+flabel metal2 s 343304 -800 343416 480 0 FreeSans 1400 90 0 0 la_data_out[61]
+port 379 nsew
+flabel metal2 s 346850 -800 346962 480 0 FreeSans 1400 90 0 0 la_data_out[62]
+port 380 nsew
+flabel metal2 s 350396 -800 350508 480 0 FreeSans 1400 90 0 0 la_data_out[63]
+port 381 nsew
+flabel metal2 s 353942 -800 354054 480 0 FreeSans 1400 90 0 0 la_data_out[64]
+port 382 nsew
+flabel metal2 s 357488 -800 357600 480 0 FreeSans 1400 90 0 0 la_data_out[65]
+port 383 nsew
+flabel metal2 s 361034 -800 361146 480 0 FreeSans 1400 90 0 0 la_data_out[66]
+port 384 nsew
+flabel metal2 s 364580 -800 364692 480 0 FreeSans 1400 90 0 0 la_data_out[67]
+port 385 nsew
+flabel metal2 s 368126 -800 368238 480 0 FreeSans 1400 90 0 0 la_data_out[68]
+port 386 nsew
+flabel metal2 s 371672 -800 371784 480 0 FreeSans 1400 90 0 0 la_data_out[69]
+port 387 nsew
+flabel metal2 s 148274 -800 148386 480 0 FreeSans 1400 90 0 0 la_data_out[6]
+port 388 nsew
+flabel metal2 s 375218 -800 375330 480 0 FreeSans 1400 90 0 0 la_data_out[70]
+port 389 nsew
+flabel metal2 s 378764 -800 378876 480 0 FreeSans 1400 90 0 0 la_data_out[71]
+port 390 nsew
+flabel metal2 s 382310 -800 382422 480 0 FreeSans 1400 90 0 0 la_data_out[72]
+port 391 nsew
+flabel metal2 s 385856 -800 385968 480 0 FreeSans 1400 90 0 0 la_data_out[73]
+port 392 nsew
+flabel metal2 s 389402 -800 389514 480 0 FreeSans 1400 90 0 0 la_data_out[74]
+port 393 nsew
+flabel metal2 s 392948 -800 393060 480 0 FreeSans 1400 90 0 0 la_data_out[75]
+port 394 nsew
+flabel metal2 s 396494 -800 396606 480 0 FreeSans 1400 90 0 0 la_data_out[76]
+port 395 nsew
+flabel metal2 s 400040 -800 400152 480 0 FreeSans 1400 90 0 0 la_data_out[77]
+port 396 nsew
+flabel metal2 s 403586 -800 403698 480 0 FreeSans 1400 90 0 0 la_data_out[78]
+port 397 nsew
+flabel metal2 s 407132 -800 407244 480 0 FreeSans 1400 90 0 0 la_data_out[79]
+port 398 nsew
+flabel metal2 s 151820 -800 151932 480 0 FreeSans 1400 90 0 0 la_data_out[7]
+port 399 nsew
+flabel metal2 s 410678 -800 410790 480 0 FreeSans 1400 90 0 0 la_data_out[80]
+port 400 nsew
+flabel metal2 s 414224 -800 414336 480 0 FreeSans 1400 90 0 0 la_data_out[81]
+port 401 nsew
+flabel metal2 s 417770 -800 417882 480 0 FreeSans 1400 90 0 0 la_data_out[82]
+port 402 nsew
+flabel metal2 s 421316 -800 421428 480 0 FreeSans 1400 90 0 0 la_data_out[83]
+port 403 nsew
+flabel metal2 s 424862 -800 424974 480 0 FreeSans 1400 90 0 0 la_data_out[84]
+port 404 nsew
+flabel metal2 s 428408 -800 428520 480 0 FreeSans 1400 90 0 0 la_data_out[85]
+port 405 nsew
+flabel metal2 s 431954 -800 432066 480 0 FreeSans 1400 90 0 0 la_data_out[86]
+port 406 nsew
+flabel metal2 s 435500 -800 435612 480 0 FreeSans 1400 90 0 0 la_data_out[87]
+port 407 nsew
+flabel metal2 s 439046 -800 439158 480 0 FreeSans 1400 90 0 0 la_data_out[88]
+port 408 nsew
+flabel metal2 s 442592 -800 442704 480 0 FreeSans 1400 90 0 0 la_data_out[89]
+port 409 nsew
+flabel metal2 s 155366 -800 155478 480 0 FreeSans 1400 90 0 0 la_data_out[8]
+port 410 nsew
+flabel metal2 s 446138 -800 446250 480 0 FreeSans 1400 90 0 0 la_data_out[90]
+port 411 nsew
+flabel metal2 s 449684 -800 449796 480 0 FreeSans 1400 90 0 0 la_data_out[91]
+port 412 nsew
+flabel metal2 s 453230 -800 453342 480 0 FreeSans 1400 90 0 0 la_data_out[92]
+port 413 nsew
+flabel metal2 s 456776 -800 456888 480 0 FreeSans 1400 90 0 0 la_data_out[93]
+port 414 nsew
+flabel metal2 s 460322 -800 460434 480 0 FreeSans 1400 90 0 0 la_data_out[94]
+port 415 nsew
+flabel metal2 s 463868 -800 463980 480 0 FreeSans 1400 90 0 0 la_data_out[95]
+port 416 nsew
+flabel metal2 s 467414 -800 467526 480 0 FreeSans 1400 90 0 0 la_data_out[96]
+port 417 nsew
+flabel metal2 s 470960 -800 471072 480 0 FreeSans 1400 90 0 0 la_data_out[97]
+port 418 nsew
+flabel metal2 s 474506 -800 474618 480 0 FreeSans 1400 90 0 0 la_data_out[98]
+port 419 nsew
+flabel metal2 s 478052 -800 478164 480 0 FreeSans 1400 90 0 0 la_data_out[99]
+port 420 nsew
+flabel metal2 s 158912 -800 159024 480 0 FreeSans 1400 90 0 0 la_data_out[9]
+port 421 nsew
+flabel metal2 s 128180 -800 128292 480 0 FreeSans 1400 90 0 0 la_oenb[0]
+port 422 nsew
+flabel metal2 s 482780 -800 482892 480 0 FreeSans 1400 90 0 0 la_oenb[100]
+port 423 nsew
+flabel metal2 s 486326 -800 486438 480 0 FreeSans 1400 90 0 0 la_oenb[101]
+port 424 nsew
+flabel metal2 s 489872 -800 489984 480 0 FreeSans 1400 90 0 0 la_oenb[102]
+port 425 nsew
+flabel metal2 s 493418 -800 493530 480 0 FreeSans 1400 90 0 0 la_oenb[103]
+port 426 nsew
+flabel metal2 s 496964 -800 497076 480 0 FreeSans 1400 90 0 0 la_oenb[104]
+port 427 nsew
+flabel metal2 s 500510 -800 500622 480 0 FreeSans 1400 90 0 0 la_oenb[105]
+port 428 nsew
+flabel metal2 s 504056 -800 504168 480 0 FreeSans 1400 90 0 0 la_oenb[106]
+port 429 nsew
+flabel metal2 s 507602 -800 507714 480 0 FreeSans 1400 90 0 0 la_oenb[107]
+port 430 nsew
+flabel metal2 s 511148 -800 511260 480 0 FreeSans 1400 90 0 0 la_oenb[108]
+port 431 nsew
+flabel metal2 s 514694 -800 514806 480 0 FreeSans 1400 90 0 0 la_oenb[109]
+port 432 nsew
+flabel metal2 s 163640 -800 163752 480 0 FreeSans 1400 90 0 0 la_oenb[10]
+port 433 nsew
+flabel metal2 s 518240 -800 518352 480 0 FreeSans 1400 90 0 0 la_oenb[110]
+port 434 nsew
+flabel metal2 s 521786 -800 521898 480 0 FreeSans 1400 90 0 0 la_oenb[111]
+port 435 nsew
+flabel metal2 s 525332 -800 525444 480 0 FreeSans 1400 90 0 0 la_oenb[112]
+port 436 nsew
+flabel metal2 s 528878 -800 528990 480 0 FreeSans 1400 90 0 0 la_oenb[113]
+port 437 nsew
+flabel metal2 s 532424 -800 532536 480 0 FreeSans 1400 90 0 0 la_oenb[114]
+port 438 nsew
+flabel metal2 s 535970 -800 536082 480 0 FreeSans 1400 90 0 0 la_oenb[115]
+port 439 nsew
+flabel metal2 s 539516 -800 539628 480 0 FreeSans 1400 90 0 0 la_oenb[116]
+port 440 nsew
+flabel metal2 s 543062 -800 543174 480 0 FreeSans 1400 90 0 0 la_oenb[117]
+port 441 nsew
+flabel metal2 s 546608 -800 546720 480 0 FreeSans 1400 90 0 0 la_oenb[118]
+port 442 nsew
+flabel metal2 s 550154 -800 550266 480 0 FreeSans 1400 90 0 0 la_oenb[119]
+port 443 nsew
+flabel metal2 s 167186 -800 167298 480 0 FreeSans 1400 90 0 0 la_oenb[11]
+port 444 nsew
+flabel metal2 s 553700 -800 553812 480 0 FreeSans 1400 90 0 0 la_oenb[120]
+port 445 nsew
+flabel metal2 s 557246 -800 557358 480 0 FreeSans 1400 90 0 0 la_oenb[121]
+port 446 nsew
+flabel metal2 s 560792 -800 560904 480 0 FreeSans 1400 90 0 0 la_oenb[122]
+port 447 nsew
+flabel metal2 s 564338 -800 564450 480 0 FreeSans 1400 90 0 0 la_oenb[123]
+port 448 nsew
+flabel metal2 s 567884 -800 567996 480 0 FreeSans 1400 90 0 0 la_oenb[124]
+port 449 nsew
+flabel metal2 s 571430 -800 571542 480 0 FreeSans 1400 90 0 0 la_oenb[125]
+port 450 nsew
+flabel metal2 s 574976 -800 575088 480 0 FreeSans 1400 90 0 0 la_oenb[126]
+port 451 nsew
+flabel metal2 s 578522 -800 578634 480 0 FreeSans 1400 90 0 0 la_oenb[127]
+port 452 nsew
+flabel metal2 s 170732 -800 170844 480 0 FreeSans 1400 90 0 0 la_oenb[12]
+port 453 nsew
+flabel metal2 s 174278 -800 174390 480 0 FreeSans 1400 90 0 0 la_oenb[13]
+port 454 nsew
+flabel metal2 s 177824 -800 177936 480 0 FreeSans 1400 90 0 0 la_oenb[14]
+port 455 nsew
+flabel metal2 s 181370 -800 181482 480 0 FreeSans 1400 90 0 0 la_oenb[15]
+port 456 nsew
+flabel metal2 s 184916 -800 185028 480 0 FreeSans 1400 90 0 0 la_oenb[16]
+port 457 nsew
+flabel metal2 s 188462 -800 188574 480 0 FreeSans 1400 90 0 0 la_oenb[17]
+port 458 nsew
+flabel metal2 s 192008 -800 192120 480 0 FreeSans 1400 90 0 0 la_oenb[18]
+port 459 nsew
+flabel metal2 s 195554 -800 195666 480 0 FreeSans 1400 90 0 0 la_oenb[19]
+port 460 nsew
+flabel metal2 s 131726 -800 131838 480 0 FreeSans 1400 90 0 0 la_oenb[1]
+port 461 nsew
+flabel metal2 s 199100 -800 199212 480 0 FreeSans 1400 90 0 0 la_oenb[20]
+port 462 nsew
+flabel metal2 s 202646 -800 202758 480 0 FreeSans 1400 90 0 0 la_oenb[21]
+port 463 nsew
+flabel metal2 s 206192 -800 206304 480 0 FreeSans 1400 90 0 0 la_oenb[22]
+port 464 nsew
+flabel metal2 s 209738 -800 209850 480 0 FreeSans 1400 90 0 0 la_oenb[23]
+port 465 nsew
+flabel metal2 s 213284 -800 213396 480 0 FreeSans 1400 90 0 0 la_oenb[24]
+port 466 nsew
+flabel metal2 s 216830 -800 216942 480 0 FreeSans 1400 90 0 0 la_oenb[25]
+port 467 nsew
+flabel metal2 s 220376 -800 220488 480 0 FreeSans 1400 90 0 0 la_oenb[26]
+port 468 nsew
+flabel metal2 s 223922 -800 224034 480 0 FreeSans 1400 90 0 0 la_oenb[27]
+port 469 nsew
+flabel metal2 s 227468 -800 227580 480 0 FreeSans 1400 90 0 0 la_oenb[28]
+port 470 nsew
+flabel metal2 s 231014 -800 231126 480 0 FreeSans 1400 90 0 0 la_oenb[29]
+port 471 nsew
+flabel metal2 s 135272 -800 135384 480 0 FreeSans 1400 90 0 0 la_oenb[2]
+port 472 nsew
+flabel metal2 s 234560 -800 234672 480 0 FreeSans 1400 90 0 0 la_oenb[30]
+port 473 nsew
+flabel metal2 s 238106 -800 238218 480 0 FreeSans 1400 90 0 0 la_oenb[31]
+port 474 nsew
+flabel metal2 s 241652 -800 241764 480 0 FreeSans 1400 90 0 0 la_oenb[32]
+port 475 nsew
+flabel metal2 s 245198 -800 245310 480 0 FreeSans 1400 90 0 0 la_oenb[33]
+port 476 nsew
+flabel metal2 s 248744 -800 248856 480 0 FreeSans 1400 90 0 0 la_oenb[34]
+port 477 nsew
+flabel metal2 s 252290 -800 252402 480 0 FreeSans 1400 90 0 0 la_oenb[35]
+port 478 nsew
+flabel metal2 s 255836 -800 255948 480 0 FreeSans 1400 90 0 0 la_oenb[36]
+port 479 nsew
+flabel metal2 s 259382 -800 259494 480 0 FreeSans 1400 90 0 0 la_oenb[37]
+port 480 nsew
+flabel metal2 s 262928 -800 263040 480 0 FreeSans 1400 90 0 0 la_oenb[38]
+port 481 nsew
+flabel metal2 s 266474 -800 266586 480 0 FreeSans 1400 90 0 0 la_oenb[39]
+port 482 nsew
+flabel metal2 s 138818 -800 138930 480 0 FreeSans 1400 90 0 0 la_oenb[3]
+port 483 nsew
+flabel metal2 s 270020 -800 270132 480 0 FreeSans 1400 90 0 0 la_oenb[40]
+port 484 nsew
+flabel metal2 s 273566 -800 273678 480 0 FreeSans 1400 90 0 0 la_oenb[41]
+port 485 nsew
+flabel metal2 s 277112 -800 277224 480 0 FreeSans 1400 90 0 0 la_oenb[42]
+port 486 nsew
+flabel metal2 s 280658 -800 280770 480 0 FreeSans 1400 90 0 0 la_oenb[43]
+port 487 nsew
+flabel metal2 s 284204 -800 284316 480 0 FreeSans 1400 90 0 0 la_oenb[44]
+port 488 nsew
+flabel metal2 s 287750 -800 287862 480 0 FreeSans 1400 90 0 0 la_oenb[45]
+port 489 nsew
+flabel metal2 s 291296 -800 291408 480 0 FreeSans 1400 90 0 0 la_oenb[46]
+port 490 nsew
+flabel metal2 s 294842 -800 294954 480 0 FreeSans 1400 90 0 0 la_oenb[47]
+port 491 nsew
+flabel metal2 s 298388 -800 298500 480 0 FreeSans 1400 90 0 0 la_oenb[48]
+port 492 nsew
+flabel metal2 s 301934 -800 302046 480 0 FreeSans 1400 90 0 0 la_oenb[49]
+port 493 nsew
+flabel metal2 s 142364 -800 142476 480 0 FreeSans 1400 90 0 0 la_oenb[4]
+port 494 nsew
+flabel metal2 s 305480 -800 305592 480 0 FreeSans 1400 90 0 0 la_oenb[50]
+port 495 nsew
+flabel metal2 s 309026 -800 309138 480 0 FreeSans 1400 90 0 0 la_oenb[51]
+port 496 nsew
+flabel metal2 s 312572 -800 312684 480 0 FreeSans 1400 90 0 0 la_oenb[52]
+port 497 nsew
+flabel metal2 s 316118 -800 316230 480 0 FreeSans 1400 90 0 0 la_oenb[53]
+port 498 nsew
+flabel metal2 s 319664 -800 319776 480 0 FreeSans 1400 90 0 0 la_oenb[54]
+port 499 nsew
+flabel metal2 s 323210 -800 323322 480 0 FreeSans 1400 90 0 0 la_oenb[55]
+port 500 nsew
+flabel metal2 s 326756 -800 326868 480 0 FreeSans 1400 90 0 0 la_oenb[56]
+port 501 nsew
+flabel metal2 s 330302 -800 330414 480 0 FreeSans 1400 90 0 0 la_oenb[57]
+port 502 nsew
+flabel metal2 s 333848 -800 333960 480 0 FreeSans 1400 90 0 0 la_oenb[58]
+port 503 nsew
+flabel metal2 s 337394 -800 337506 480 0 FreeSans 1400 90 0 0 la_oenb[59]
+port 504 nsew
+flabel metal2 s 145910 -800 146022 480 0 FreeSans 1400 90 0 0 la_oenb[5]
+port 505 nsew
+flabel metal2 s 340940 -800 341052 480 0 FreeSans 1400 90 0 0 la_oenb[60]
+port 506 nsew
+flabel metal2 s 344486 -800 344598 480 0 FreeSans 1400 90 0 0 la_oenb[61]
+port 507 nsew
+flabel metal2 s 348032 -800 348144 480 0 FreeSans 1400 90 0 0 la_oenb[62]
+port 508 nsew
+flabel metal2 s 351578 -800 351690 480 0 FreeSans 1400 90 0 0 la_oenb[63]
+port 509 nsew
+flabel metal2 s 355124 -800 355236 480 0 FreeSans 1400 90 0 0 la_oenb[64]
+port 510 nsew
+flabel metal2 s 358670 -800 358782 480 0 FreeSans 1400 90 0 0 la_oenb[65]
+port 511 nsew
+flabel metal2 s 362216 -800 362328 480 0 FreeSans 1400 90 0 0 la_oenb[66]
+port 512 nsew
+flabel metal2 s 365762 -800 365874 480 0 FreeSans 1400 90 0 0 la_oenb[67]
+port 513 nsew
+flabel metal2 s 369308 -800 369420 480 0 FreeSans 1400 90 0 0 la_oenb[68]
+port 514 nsew
+flabel metal2 s 372854 -800 372966 480 0 FreeSans 1400 90 0 0 la_oenb[69]
+port 515 nsew
+flabel metal2 s 149456 -800 149568 480 0 FreeSans 1400 90 0 0 la_oenb[6]
+port 516 nsew
+flabel metal2 s 376400 -800 376512 480 0 FreeSans 1400 90 0 0 la_oenb[70]
+port 517 nsew
+flabel metal2 s 379946 -800 380058 480 0 FreeSans 1400 90 0 0 la_oenb[71]
+port 518 nsew
+flabel metal2 s 383492 -800 383604 480 0 FreeSans 1400 90 0 0 la_oenb[72]
+port 519 nsew
+flabel metal2 s 387038 -800 387150 480 0 FreeSans 1400 90 0 0 la_oenb[73]
+port 520 nsew
+flabel metal2 s 390584 -800 390696 480 0 FreeSans 1400 90 0 0 la_oenb[74]
+port 521 nsew
+flabel metal2 s 394130 -800 394242 480 0 FreeSans 1400 90 0 0 la_oenb[75]
+port 522 nsew
+flabel metal2 s 397676 -800 397788 480 0 FreeSans 1400 90 0 0 la_oenb[76]
+port 523 nsew
+flabel metal2 s 401222 -800 401334 480 0 FreeSans 1400 90 0 0 la_oenb[77]
+port 524 nsew
+flabel metal2 s 404768 -800 404880 480 0 FreeSans 1400 90 0 0 la_oenb[78]
+port 525 nsew
+flabel metal2 s 408314 -800 408426 480 0 FreeSans 1400 90 0 0 la_oenb[79]
+port 526 nsew
+flabel metal2 s 153002 -800 153114 480 0 FreeSans 1400 90 0 0 la_oenb[7]
+port 527 nsew
+flabel metal2 s 411860 -800 411972 480 0 FreeSans 1400 90 0 0 la_oenb[80]
+port 528 nsew
+flabel metal2 s 415406 -800 415518 480 0 FreeSans 1400 90 0 0 la_oenb[81]
+port 529 nsew
+flabel metal2 s 418952 -800 419064 480 0 FreeSans 1400 90 0 0 la_oenb[82]
+port 530 nsew
+flabel metal2 s 422498 -800 422610 480 0 FreeSans 1400 90 0 0 la_oenb[83]
+port 531 nsew
+flabel metal2 s 426044 -800 426156 480 0 FreeSans 1400 90 0 0 la_oenb[84]
+port 532 nsew
+flabel metal2 s 429590 -800 429702 480 0 FreeSans 1400 90 0 0 la_oenb[85]
+port 533 nsew
+flabel metal2 s 433136 -800 433248 480 0 FreeSans 1400 90 0 0 la_oenb[86]
+port 534 nsew
+flabel metal2 s 436682 -800 436794 480 0 FreeSans 1400 90 0 0 la_oenb[87]
+port 535 nsew
+flabel metal2 s 440228 -800 440340 480 0 FreeSans 1400 90 0 0 la_oenb[88]
+port 536 nsew
+flabel metal2 s 443774 -800 443886 480 0 FreeSans 1400 90 0 0 la_oenb[89]
+port 537 nsew
+flabel metal2 s 156548 -800 156660 480 0 FreeSans 1400 90 0 0 la_oenb[8]
+port 538 nsew
+flabel metal2 s 447320 -800 447432 480 0 FreeSans 1400 90 0 0 la_oenb[90]
+port 539 nsew
+flabel metal2 s 450866 -800 450978 480 0 FreeSans 1400 90 0 0 la_oenb[91]
+port 540 nsew
+flabel metal2 s 454412 -800 454524 480 0 FreeSans 1400 90 0 0 la_oenb[92]
+port 541 nsew
+flabel metal2 s 457958 -800 458070 480 0 FreeSans 1400 90 0 0 la_oenb[93]
+port 542 nsew
+flabel metal2 s 461504 -800 461616 480 0 FreeSans 1400 90 0 0 la_oenb[94]
+port 543 nsew
+flabel metal2 s 465050 -800 465162 480 0 FreeSans 1400 90 0 0 la_oenb[95]
+port 544 nsew
+flabel metal2 s 468596 -800 468708 480 0 FreeSans 1400 90 0 0 la_oenb[96]
+port 545 nsew
+flabel metal2 s 472142 -800 472254 480 0 FreeSans 1400 90 0 0 la_oenb[97]
+port 546 nsew
+flabel metal2 s 475688 -800 475800 480 0 FreeSans 1400 90 0 0 la_oenb[98]
+port 547 nsew
+flabel metal2 s 479234 -800 479346 480 0 FreeSans 1400 90 0 0 la_oenb[99]
+port 548 nsew
+flabel metal2 s 160094 -800 160206 480 0 FreeSans 1400 90 0 0 la_oenb[9]
+port 549 nsew
+flabel metal2 s 579704 -800 579816 480 0 FreeSans 1400 90 0 0 user_clock2
+port 550 nsew
+flabel metal2 s 580886 -800 580998 480 0 FreeSans 1400 90 0 0 user_irq[0]
+port 551 nsew
+flabel metal2 s 582068 -800 582180 480 0 FreeSans 1400 90 0 0 user_irq[1]
+port 552 nsew
+flabel metal2 s 583250 -800 583362 480 0 FreeSans 1400 90 0 0 user_irq[2]
+port 553 nsew
+flabel metal3 s 582340 639784 584800 644584 0 FreeSans 1400 0 0 0 vccd1
+port 554 nsew
+flabel metal3 s 582340 629784 584800 634584 0 FreeSans 1400 0 0 0 vccd1
+port 554 nsew
+flabel metal3 s 0 643842 1660 648642 0 FreeSans 1400 0 0 0 vccd2
+port 555 nsew
+flabel metal3 s 0 633842 1660 638642 0 FreeSans 1400 0 0 0 vccd2
+port 555 nsew
+flabel metal3 s 582340 540562 584800 545362 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 550562 584800 555362 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 235230 584800 240030 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 225230 584800 230030 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 0 204888 1660 209688 0 FreeSans 1400 0 0 0 vdda2
+port 557 nsew
+flabel metal3 s 0 214888 1660 219688 0 FreeSans 1400 0 0 0 vdda2
+port 557 nsew
+flabel metal3 s 520594 702340 525394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 558 nsew
+flabel metal3 s 510594 702340 515394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 558 nsew
+flabel metal3 s 582340 146830 584800 151630 0 FreeSans 1400 0 0 0 vssa1
+port 558 nsew
+flabel metal3 s 582340 136830 584800 141630 0 FreeSans 1400 0 0 0 vssa1
+port 558 nsew
+flabel metal3 s 0 559442 1660 564242 0 FreeSans 1400 0 0 0 vssa2
+port 559 nsew
+flabel metal3 s 0 549442 1660 554242 0 FreeSans 1400 0 0 0 vssa2
+port 559 nsew
+flabel metal3 s 582340 191430 584800 196230 0 FreeSans 1400 0 0 0 vssd1
+port 560 nsew
+flabel metal3 s 582340 181430 584800 186230 0 FreeSans 1400 0 0 0 vssd1
+port 560 nsew
+flabel metal3 s 0 172888 1660 177688 0 FreeSans 1400 0 0 0 vssd2
+port 561 nsew
+flabel metal3 s 0 162888 1660 167688 0 FreeSans 1400 0 0 0 vssd2
+port 561 nsew
+flabel metal2 s 524 -800 636 480 0 FreeSans 1400 90 0 0 wb_clk_i
+port 562 nsew
+flabel metal2 s 1706 -800 1818 480 0 FreeSans 1400 90 0 0 wb_rst_i
+port 563 nsew
+flabel metal2 s 2888 -800 3000 480 0 FreeSans 1400 90 0 0 wbs_ack_o
+port 564 nsew
+flabel metal2 s 7616 -800 7728 480 0 FreeSans 1400 90 0 0 wbs_adr_i[0]
+port 565 nsew
+flabel metal2 s 47804 -800 47916 480 0 FreeSans 1400 90 0 0 wbs_adr_i[10]
+port 566 nsew
+flabel metal2 s 51350 -800 51462 480 0 FreeSans 1400 90 0 0 wbs_adr_i[11]
+port 567 nsew
+flabel metal2 s 54896 -800 55008 480 0 FreeSans 1400 90 0 0 wbs_adr_i[12]
+port 568 nsew
+flabel metal2 s 58442 -800 58554 480 0 FreeSans 1400 90 0 0 wbs_adr_i[13]
+port 569 nsew
+flabel metal2 s 61988 -800 62100 480 0 FreeSans 1400 90 0 0 wbs_adr_i[14]
+port 570 nsew
+flabel metal2 s 65534 -800 65646 480 0 FreeSans 1400 90 0 0 wbs_adr_i[15]
+port 571 nsew
+flabel metal2 s 69080 -800 69192 480 0 FreeSans 1400 90 0 0 wbs_adr_i[16]
+port 572 nsew
+flabel metal2 s 72626 -800 72738 480 0 FreeSans 1400 90 0 0 wbs_adr_i[17]
+port 573 nsew
+flabel metal2 s 76172 -800 76284 480 0 FreeSans 1400 90 0 0 wbs_adr_i[18]
+port 574 nsew
+flabel metal2 s 79718 -800 79830 480 0 FreeSans 1400 90 0 0 wbs_adr_i[19]
+port 575 nsew
+flabel metal2 s 12344 -800 12456 480 0 FreeSans 1400 90 0 0 wbs_adr_i[1]
+port 576 nsew
+flabel metal2 s 83264 -800 83376 480 0 FreeSans 1400 90 0 0 wbs_adr_i[20]
+port 577 nsew
+flabel metal2 s 86810 -800 86922 480 0 FreeSans 1400 90 0 0 wbs_adr_i[21]
+port 578 nsew
+flabel metal2 s 90356 -800 90468 480 0 FreeSans 1400 90 0 0 wbs_adr_i[22]
+port 579 nsew
+flabel metal2 s 93902 -800 94014 480 0 FreeSans 1400 90 0 0 wbs_adr_i[23]
+port 580 nsew
+flabel metal2 s 97448 -800 97560 480 0 FreeSans 1400 90 0 0 wbs_adr_i[24]
+port 581 nsew
+flabel metal2 s 100994 -800 101106 480 0 FreeSans 1400 90 0 0 wbs_adr_i[25]
+port 582 nsew
+flabel metal2 s 104540 -800 104652 480 0 FreeSans 1400 90 0 0 wbs_adr_i[26]
+port 583 nsew
+flabel metal2 s 108086 -800 108198 480 0 FreeSans 1400 90 0 0 wbs_adr_i[27]
+port 584 nsew
+flabel metal2 s 111632 -800 111744 480 0 FreeSans 1400 90 0 0 wbs_adr_i[28]
+port 585 nsew
+flabel metal2 s 115178 -800 115290 480 0 FreeSans 1400 90 0 0 wbs_adr_i[29]
+port 586 nsew
+flabel metal2 s 17072 -800 17184 480 0 FreeSans 1400 90 0 0 wbs_adr_i[2]
+port 587 nsew
+flabel metal2 s 118724 -800 118836 480 0 FreeSans 1400 90 0 0 wbs_adr_i[30]
+port 588 nsew
+flabel metal2 s 122270 -800 122382 480 0 FreeSans 1400 90 0 0 wbs_adr_i[31]
+port 589 nsew
+flabel metal2 s 21800 -800 21912 480 0 FreeSans 1400 90 0 0 wbs_adr_i[3]
+port 590 nsew
+flabel metal2 s 26528 -800 26640 480 0 FreeSans 1400 90 0 0 wbs_adr_i[4]
+port 591 nsew
+flabel metal2 s 30074 -800 30186 480 0 FreeSans 1400 90 0 0 wbs_adr_i[5]
+port 592 nsew
+flabel metal2 s 33620 -800 33732 480 0 FreeSans 1400 90 0 0 wbs_adr_i[6]
+port 593 nsew
+flabel metal2 s 37166 -800 37278 480 0 FreeSans 1400 90 0 0 wbs_adr_i[7]
+port 594 nsew
+flabel metal2 s 40712 -800 40824 480 0 FreeSans 1400 90 0 0 wbs_adr_i[8]
+port 595 nsew
+flabel metal2 s 44258 -800 44370 480 0 FreeSans 1400 90 0 0 wbs_adr_i[9]
+port 596 nsew
+flabel metal2 s 4070 -800 4182 480 0 FreeSans 1400 90 0 0 wbs_cyc_i
+port 597 nsew
+flabel metal2 s 8798 -800 8910 480 0 FreeSans 1400 90 0 0 wbs_dat_i[0]
+port 598 nsew
+flabel metal2 s 48986 -800 49098 480 0 FreeSans 1400 90 0 0 wbs_dat_i[10]
+port 599 nsew
+flabel metal2 s 52532 -800 52644 480 0 FreeSans 1400 90 0 0 wbs_dat_i[11]
+port 600 nsew
+flabel metal2 s 56078 -800 56190 480 0 FreeSans 1400 90 0 0 wbs_dat_i[12]
+port 601 nsew
+flabel metal2 s 59624 -800 59736 480 0 FreeSans 1400 90 0 0 wbs_dat_i[13]
+port 602 nsew
+flabel metal2 s 63170 -800 63282 480 0 FreeSans 1400 90 0 0 wbs_dat_i[14]
+port 603 nsew
+flabel metal2 s 66716 -800 66828 480 0 FreeSans 1400 90 0 0 wbs_dat_i[15]
+port 604 nsew
+flabel metal2 s 70262 -800 70374 480 0 FreeSans 1400 90 0 0 wbs_dat_i[16]
+port 605 nsew
+flabel metal2 s 73808 -800 73920 480 0 FreeSans 1400 90 0 0 wbs_dat_i[17]
+port 606 nsew
+flabel metal2 s 77354 -800 77466 480 0 FreeSans 1400 90 0 0 wbs_dat_i[18]
+port 607 nsew
+flabel metal2 s 80900 -800 81012 480 0 FreeSans 1400 90 0 0 wbs_dat_i[19]
+port 608 nsew
+flabel metal2 s 13526 -800 13638 480 0 FreeSans 1400 90 0 0 wbs_dat_i[1]
+port 609 nsew
+flabel metal2 s 84446 -800 84558 480 0 FreeSans 1400 90 0 0 wbs_dat_i[20]
+port 610 nsew
+flabel metal2 s 87992 -800 88104 480 0 FreeSans 1400 90 0 0 wbs_dat_i[21]
+port 611 nsew
+flabel metal2 s 91538 -800 91650 480 0 FreeSans 1400 90 0 0 wbs_dat_i[22]
+port 612 nsew
+flabel metal2 s 95084 -800 95196 480 0 FreeSans 1400 90 0 0 wbs_dat_i[23]
+port 613 nsew
+flabel metal2 s 98630 -800 98742 480 0 FreeSans 1400 90 0 0 wbs_dat_i[24]
+port 614 nsew
+flabel metal2 s 102176 -800 102288 480 0 FreeSans 1400 90 0 0 wbs_dat_i[25]
+port 615 nsew
+flabel metal2 s 105722 -800 105834 480 0 FreeSans 1400 90 0 0 wbs_dat_i[26]
+port 616 nsew
+flabel metal2 s 109268 -800 109380 480 0 FreeSans 1400 90 0 0 wbs_dat_i[27]
+port 617 nsew
+flabel metal2 s 112814 -800 112926 480 0 FreeSans 1400 90 0 0 wbs_dat_i[28]
+port 618 nsew
+flabel metal2 s 116360 -800 116472 480 0 FreeSans 1400 90 0 0 wbs_dat_i[29]
+port 619 nsew
+flabel metal2 s 18254 -800 18366 480 0 FreeSans 1400 90 0 0 wbs_dat_i[2]
+port 620 nsew
+flabel metal2 s 119906 -800 120018 480 0 FreeSans 1400 90 0 0 wbs_dat_i[30]
+port 621 nsew
+flabel metal2 s 123452 -800 123564 480 0 FreeSans 1400 90 0 0 wbs_dat_i[31]
+port 622 nsew
+flabel metal2 s 22982 -800 23094 480 0 FreeSans 1400 90 0 0 wbs_dat_i[3]
+port 623 nsew
+flabel metal2 s 27710 -800 27822 480 0 FreeSans 1400 90 0 0 wbs_dat_i[4]
+port 624 nsew
+flabel metal2 s 31256 -800 31368 480 0 FreeSans 1400 90 0 0 wbs_dat_i[5]
+port 625 nsew
+flabel metal2 s 34802 -800 34914 480 0 FreeSans 1400 90 0 0 wbs_dat_i[6]
+port 626 nsew
+flabel metal2 s 38348 -800 38460 480 0 FreeSans 1400 90 0 0 wbs_dat_i[7]
+port 627 nsew
+flabel metal2 s 41894 -800 42006 480 0 FreeSans 1400 90 0 0 wbs_dat_i[8]
+port 628 nsew
+flabel metal2 s 45440 -800 45552 480 0 FreeSans 1400 90 0 0 wbs_dat_i[9]
+port 629 nsew
+flabel metal2 s 9980 -800 10092 480 0 FreeSans 1400 90 0 0 wbs_dat_o[0]
+port 630 nsew
+flabel metal2 s 50168 -800 50280 480 0 FreeSans 1400 90 0 0 wbs_dat_o[10]
+port 631 nsew
+flabel metal2 s 53714 -800 53826 480 0 FreeSans 1400 90 0 0 wbs_dat_o[11]
+port 632 nsew
+flabel metal2 s 57260 -800 57372 480 0 FreeSans 1400 90 0 0 wbs_dat_o[12]
+port 633 nsew
+flabel metal2 s 60806 -800 60918 480 0 FreeSans 1400 90 0 0 wbs_dat_o[13]
+port 634 nsew
+flabel metal2 s 64352 -800 64464 480 0 FreeSans 1400 90 0 0 wbs_dat_o[14]
+port 635 nsew
+flabel metal2 s 67898 -800 68010 480 0 FreeSans 1400 90 0 0 wbs_dat_o[15]
+port 636 nsew
+flabel metal2 s 71444 -800 71556 480 0 FreeSans 1400 90 0 0 wbs_dat_o[16]
+port 637 nsew
+flabel metal2 s 74990 -800 75102 480 0 FreeSans 1400 90 0 0 wbs_dat_o[17]
+port 638 nsew
+flabel metal2 s 78536 -800 78648 480 0 FreeSans 1400 90 0 0 wbs_dat_o[18]
+port 639 nsew
+flabel metal2 s 82082 -800 82194 480 0 FreeSans 1400 90 0 0 wbs_dat_o[19]
+port 640 nsew
+flabel metal2 s 14708 -800 14820 480 0 FreeSans 1400 90 0 0 wbs_dat_o[1]
+port 641 nsew
+flabel metal2 s 85628 -800 85740 480 0 FreeSans 1400 90 0 0 wbs_dat_o[20]
+port 642 nsew
+flabel metal2 s 89174 -800 89286 480 0 FreeSans 1400 90 0 0 wbs_dat_o[21]
+port 643 nsew
+flabel metal2 s 92720 -800 92832 480 0 FreeSans 1400 90 0 0 wbs_dat_o[22]
+port 644 nsew
+flabel metal2 s 96266 -800 96378 480 0 FreeSans 1400 90 0 0 wbs_dat_o[23]
+port 645 nsew
+flabel metal2 s 99812 -800 99924 480 0 FreeSans 1400 90 0 0 wbs_dat_o[24]
+port 646 nsew
+flabel metal2 s 103358 -800 103470 480 0 FreeSans 1400 90 0 0 wbs_dat_o[25]
+port 647 nsew
+flabel metal2 s 106904 -800 107016 480 0 FreeSans 1400 90 0 0 wbs_dat_o[26]
+port 648 nsew
+flabel metal2 s 110450 -800 110562 480 0 FreeSans 1400 90 0 0 wbs_dat_o[27]
+port 649 nsew
+flabel metal2 s 113996 -800 114108 480 0 FreeSans 1400 90 0 0 wbs_dat_o[28]
+port 650 nsew
+flabel metal2 s 117542 -800 117654 480 0 FreeSans 1400 90 0 0 wbs_dat_o[29]
+port 651 nsew
+flabel metal2 s 19436 -800 19548 480 0 FreeSans 1400 90 0 0 wbs_dat_o[2]
+port 652 nsew
+flabel metal2 s 121088 -800 121200 480 0 FreeSans 1400 90 0 0 wbs_dat_o[30]
+port 653 nsew
+flabel metal2 s 124634 -800 124746 480 0 FreeSans 1400 90 0 0 wbs_dat_o[31]
+port 654 nsew
+flabel metal2 s 24164 -800 24276 480 0 FreeSans 1400 90 0 0 wbs_dat_o[3]
+port 655 nsew
+flabel metal2 s 28892 -800 29004 480 0 FreeSans 1400 90 0 0 wbs_dat_o[4]
+port 656 nsew
+flabel metal2 s 32438 -800 32550 480 0 FreeSans 1400 90 0 0 wbs_dat_o[5]
+port 657 nsew
+flabel metal2 s 35984 -800 36096 480 0 FreeSans 1400 90 0 0 wbs_dat_o[6]
+port 658 nsew
+flabel metal2 s 39530 -800 39642 480 0 FreeSans 1400 90 0 0 wbs_dat_o[7]
+port 659 nsew
+flabel metal2 s 43076 -800 43188 480 0 FreeSans 1400 90 0 0 wbs_dat_o[8]
+port 660 nsew
+flabel metal2 s 46622 -800 46734 480 0 FreeSans 1400 90 0 0 wbs_dat_o[9]
+port 661 nsew
+flabel metal2 s 11162 -800 11274 480 0 FreeSans 1400 90 0 0 wbs_sel_i[0]
+port 662 nsew
+flabel metal2 s 15890 -800 16002 480 0 FreeSans 1400 90 0 0 wbs_sel_i[1]
+port 663 nsew
+flabel metal2 s 20618 -800 20730 480 0 FreeSans 1400 90 0 0 wbs_sel_i[2]
+port 664 nsew
+flabel metal2 s 25346 -800 25458 480 0 FreeSans 1400 90 0 0 wbs_sel_i[3]
+port 665 nsew
+flabel metal2 s 5252 -800 5364 480 0 FreeSans 1400 90 0 0 wbs_stb_i
+port 666 nsew
+flabel metal2 s 6434 -800 6546 480 0 FreeSans 1400 90 0 0 wbs_we_i
+port 667 nsew
+<< properties >>
+string FIXED_BBOX 0 0 584000 704000
+<< end >>
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.xor.gds b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.xor.gds
new file mode 100644
index 0000000..5132054
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper.xor.gds
Binary files differ
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_empty_erased.gds b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..a121528
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_erased.gds b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_erased.gds
new file mode 100644
index 0000000..5107c48
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_erased.gds
Binary files differ
diff --git a/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_no_zero_areas.gds b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_no_zero_areas.gds
new file mode 100644
index 0000000..5aaa679
--- /dev/null
+++ b/precheck_results/06_MAR_2022___14_59_11/outputs/user_analog_project_wrapper_no_zero_areas.gds
Binary files differ
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/gds.info b/precheck_results/22_FEB_2022___17_55_09/logs/gds.info
new file mode 100644
index 0000000..7722beb
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/gds.info
@@ -0,0 +1 @@
+user_analog_project_wrapper.gds: c3bbd321d8e134e18ebb015ae4cd1d8fad84e162
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_beol_check.log b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_beol_check.log
new file mode 100644
index 0000000..b6189cb
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_beol_check.log
@@ -0,0 +1,992 @@
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:38: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:42: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:107
+ Polygons (raw): 42 (flat) 16 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:108
+ Polygons (raw): 121 (flat) 47 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:109
+ Polygons (raw): 30 (flat) 11 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:110
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:111
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:112
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:113
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:114
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:115
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:116
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:117
+ Polygons (raw): 43 (flat) 18 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:118
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:119
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:120
+ Polygons (raw): 182 (flat) 82 (hierarchical)
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_beol_check.xml ..
+Total elapsed: 6.420s Memory: 1159.00M
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_beol_check.total b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_feol_check.log b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_feol_check.log
new file mode 100644
index 0000000..5f91751
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_feol_check.log
@@ -0,0 +1,780 @@
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:36: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:44: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_feol_check.xml ..
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diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_feol_check.total b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_feol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_feol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_met_min_ca_density_check.log b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_met_min_ca_density_check.log
new file mode 100644
index 0000000..11287e1
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_met_min_ca_density_check.log
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diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_met_min_ca_density_check.total b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
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\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_offgrid_check.log b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_offgrid_check.log
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index 0000000..3a0397e
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 1.970s Memory: 540.00M
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_offgrid_check.total b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..921b814
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper, output to /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+ deep:true tiled:false threads:4
+--- #err|description, table for cell: user_analog_project_wrapper
+NO-Check ---- pwell:64/44/EMP 122/16/EMP 64/59/EMP 44/16/EMP 44/5/EMP
+ ---- nwell:64/20/dat 64/16/EMP 64/5/EMP
+ ---- diff:65/20/dat 65/16/EMP 65/6/EMP
+ ---- tap:65/44/dat 65/48/EMP 65/5/EMP
+ ---- poly:66/20/dat 66/16/EMP 66/5/EMP
+ ---- licon1:66/44/dat 66/58/EMP
+ ---- li1:67/20/dat 67/16/dat 67/5/EMP
+ ---- mcon:67/44/dat 67/48/EMP
+ ---- met1:68/20/dat 68/16/dat 68/5/EMP
+ ---- via:68/44/dat 68/58/EMP
+ ---- met2:69/20/dat 69/16/dat 69/5/EMP
+ ---- via2:69/44/dat 69/58/EMP
+ ---- met3:70/20/dat 70/16/dat 70/5/dat
+ ---- via3:70/44/dat 70/48/EMP
+ ---- met4:71/20/dat 71/16/dat 71/5/EMP
+ ---- via4:71/44/dat 71/48/EMP
+ ---- met5:72/20/dat 72/16/dat 72/5/EMP
+ ---- pad:76/20/EMP 76/5/EMP 76/16/EMP
+ ---- pnp:82/44/EMP 82/59/EMP
+ ---- npn:82/20/EMP 82/5/EMP
+ ---- rdl:74/20/EMP 74/16/EMP 74/5/EMP
+ ---- inductor:82/24/EMP 82/25/EMP
+ 0 total error(s) among 0 error type(s), 33 checks, cell: user_analog_project_wrapper
+Writing report...
+VmPeak: 1127304 kB
+VmHWM: 260156 kB
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_zeroarea_check.log b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..fe4bb6b
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_zeroarea_check.log
@@ -0,0 +1,4 @@
+0 zero-area shapes
+writing to /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_no_zero_areas.gds
+VmPeak: 547040 kB
+VmHWM: 267292 kB
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/klayout_zeroarea_check.total b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/magic_drc_check.log b/precheck_results/22_FEB_2022___17_55_09/logs/magic_drc_check.log
new file mode 100644
index 0000000..d95ee03
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/magic_drc_check.log
@@ -0,0 +1,46 @@
+
+Magic 8.3 revision 265 - Compiled on Thu Feb 17 20:05:42 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__buf_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "example_por".
+Reading "user_analog_proj_example".
+Reading "user_analog_project_wrapper".
+[INFO]: Loading user_analog_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/magic_drc_check.total b/precheck_results/22_FEB_2022___17_55_09/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/pdks.info b/precheck_results/22_FEB_2022___17_55_09/logs/pdks.info
new file mode 100644
index 0000000..19f87e1
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 27ecf1c16911f7dd4428ffab96f62c1fb876ea70
+Skywater PDK c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/precheck.log b/precheck_results/22_FEB_2022___17_55_09/logs/precheck.log
new file mode 100644
index 0000000..b4f88c6
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/precheck.log
@@ -0,0 +1,59 @@
+2022-02-22 17:55:09 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog
+2022-02-22 17:55:09 - [INFO] - {{Project Type Info}} analog
+2022-02-22 17:55:09 - [INFO] - {{Project GDS Info}} user_analog_project_wrapper: c3bbd321d8e134e18ebb015ae4cd1d8fad84e162
+2022-02-22 17:55:09 - [INFO] - {{Tools Info}} KLayout: v0.27.7 | Magic: v8.3.265
+2022-02-22 17:55:09 - [INFO] - {{PDKs Info}} Open PDKs: 27ecf1c16911f7dd4428ffab96f62c1fb876ea70 | Skywater PDK: c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
+2022-02-22 17:55:09 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in '/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/logs'
+2022-02-22 17:55:09 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-02-22 17:55:09 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 13: License
+2022-02-22 17:55:10 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog.
+2022-02-22 17:55:10 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-02-22 17:55:11 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog.
+2022-02-22 17:55:12 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog.
+2022-02-22 17:55:12 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-02-22 17:55:12 - [INFO] - {{SPDX COMPLIANCE CHECK PASSED}} Project is compliant with the SPDX Standard
+2022-02-22 17:55:12 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 13: Makefile
+2022-02-22 17:55:12 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-02-22 17:55:12 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 13: Default
+2022-02-22 17:55:12 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-02-22 17:55:12 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-02-22 17:55:12 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 13: Documentation
+2022-02-22 17:55:12 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-02-22 17:55:12 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 13: Consistency
+2022-02-22 17:55:13 - [INFO] - HIERARCHY CHECK PASSED: Module user_analog_project_wrapper is instantiated in caravan.
+2022-02-22 17:55:13 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravan contains at least 8 instances (68 instances).
+2022-02-22 17:55:13 - [INFO] - MODELING CHECK PASSED: Netlist caravan is structural.
+2022-02-22 17:55:13 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_analog_project_wrapper are correctly connected in the top level netlist caravan.
+2022-02-22 17:55:13 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravan netlist passed all consistency checks.
+2022-02-22 17:55:13 - [INFO] - PORTS CHECK PASSED: Netlist user_analog_project_wrapper ports match the golden wrapper ports
+2022-02-22 17:55:13 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_analog_project_wrapper contains at least 1 instances (11 instances).
+2022-02-22 17:55:13 - [INFO] - MODELING CHECK PASSED: Netlist user_analog_project_wrapper is structural.
+2022-02-22 17:55:13 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_analog_project_wrapper matches the provided structural netlist.
+2022-02-22 17:55:13 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_analog_project_wrapper netlist passed all consistency checks.
+2022-02-22 17:55:13 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2022-02-22 17:55:13 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 13: XOR
+2022-02-22 17:55:18 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.xor.gds
+2022-02-22 17:55:18 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2022-02-22 17:55:18 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 13: Magic DRC
+2022-02-22 17:55:19 - [INFO] - 0 DRC violations
+2022-02-22 17:55:19 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-22 17:55:19 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 13: Klayout FEOL
+2022-02-22 17:55:21 - [INFO] - No DRC Violations found
+2022-02-22 17:55:21 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-22 17:55:21 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 13: Klayout BEOL
+2022-02-22 17:55:28 - [INFO] - No DRC Violations found
+2022-02-22 17:55:28 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-22 17:55:28 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 13: Klayout Offgrid
+2022-02-22 17:55:31 - [INFO] - No DRC Violations found
+2022-02-22 17:55:31 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-22 17:55:31 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 13: Klayout Metal Minimum Clear Area Density
+2022-02-22 17:55:32 - [INFO] - No DRC Violations found
+2022-02-22 17:55:32 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-22 17:55:32 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 13: Klayout Pin Label Purposes Overlapping Drawing
+2022-02-22 17:55:34 - [INFO] - No DRC Violations found
+2022-02-22 17:55:34 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-22 17:55:34 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 13: Klayout ZeroArea
+2022-02-22 17:55:35 - [INFO] - No DRC Violations found
+2022-02-22 17:55:35 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-22 17:55:35 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in '/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/logs'
+2022-02-22 17:55:35 - [INFO] - {{SUCCESS}} All Checks Passed !!!
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/tools.info b/precheck_results/22_FEB_2022___17_55_09/logs/tools.info
new file mode 100644
index 0000000..b904646
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.7
+Magic: 8.3.265
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/xor_check.log b/precheck_results/22_FEB_2022___17_55_09/logs/xor_check.log
new file mode 100644
index 0000000..24c06ca
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/xor_check.log
@@ -0,0 +1,174 @@
+Reading file /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/gds/user_analog_project_wrapper.gds for cell user_analog_project_wrapper
+dbu=0.001
+cell user_analog_project_wrapper dbu-bbox(ll;ur)=(-4000,-4000;2924000,3524000)
+cell user_analog_project_wrapper dbu-bbox(left,bottom,right,top)=(-4000,-4000,2924000,3524000)
+cell user_analog_project_wrapper dbu-size(width,height)=(2928000,3528000)
+cell user_analog_project_wrapper micron-bbox(left,bottom,right,top)=(-4.0,-4.0,2924.0,3524.0)
+cell user_analog_project_wrapper micron-size(width,height)=(2928.0,3528.0)
+Done.
+
+Magic 8.3 revision 265 - Compiled on Thu Feb 17 20:05:42 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__buf_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "example_por".
+Reading "user_analog_proj_example".
+Reading "user_analog_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.880 x 3520.000 (-42.880, 0.000), ( 0.000, 3520.000) 150937.594
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.500 x 3520.000 ( 2920.000, 0.000), ( 2962.500, 3520.000) 149600.000
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.530 (-42.880, -37.530), ( 2962.500, 0.000) 112791.906
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.210 (-42.880, 3520.000), ( 2962.500, 3557.210) 111830.188
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+
+Magic 8.3 revision 265 - Compiled on Thu Feb 17 20:05:42 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 6.0
+Library name: user_analog_project_wrapper_empty
+Reading "user_analog_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.880 x 3520.000 (-42.880, 0.000), ( 0.000, 3520.000) 150937.594
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.500 x 3520.000 ( 2920.000, 0.000), ( 2962.500, 3520.000) 149600.000
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.530 (-42.880, -37.530), ( 2962.500, 0.000) 112791.906
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.210 (-42.880, 3520.000), ( 2962.500, 3557.210) 111830.188
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+Reading /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_erased.gds ..
+Reading /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 494 (flat) 494 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 494 (flat) 494 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 184 (flat) 184 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 184 (flat) 184 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 6 (flat) 6 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 6 (flat) 6 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+Writing layout file: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.xor.gds ..
+Total elapsed: 0.100s Memory: 521.00M
diff --git a/precheck_results/22_FEB_2022___17_55_09/logs/xor_check.total b/precheck_results/22_FEB_2022___17_55_09/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_beol_check.xml b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..261c933
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>li.1</name>
+ <description>li.1 : min. li width : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.3</name>
+ <description>li.3 : min. li spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.5</name>
+ <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.6</name>
+ <description>li.6 : min. li area : 0.0561um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1</name>
+ <description>ct.1: non-ring mcon should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_a</name>
+ <description>ct.1_a : minimum width of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_b</name>
+ <description>ct.1_b : maximum length of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.2</name>
+ <description>ct.2 : min. mcon spacing : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.4</name>
+ <description>ct.4 : mcon should covered by li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.1</name>
+ <description>m1.1 : min. m1 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.2</name>
+ <description>m1.2 : min. m1 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.3ab</name>
+ <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>791_m1.4</name>
+ <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4</name>
+ <description>m1.4 : mcon periphery must be enclosed by m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a</name>
+ <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a_a</name>
+ <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.6</name>
+ <description>m1.6 : min. m1 area : 0.083um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.7</name>
+ <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.5</name>
+ <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a</name>
+ <description>via.1a : via outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_a</name>
+ <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_b</name>
+ <description>via.1a_b : maximum length of via : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.2</name>
+ <description>via.2 : min. via spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a</name>
+ <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a_a</name>
+ <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.5a</name>
+ <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.1</name>
+ <description>m2.1 : min. m2 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.2</name>
+ <description>m2.2 : min. m2 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.3ab</name>
+ <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.6</name>
+ <description>m2.6 : min. m2 area : 0.0676um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.7</name>
+ <description>m2.7 : min. m2 holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4</name>
+ <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4_a</name>
+ <description>m2.4_a : via in periphery must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.5</name>
+ <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a</name>
+ <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_a</name>
+ <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_b</name>
+ <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.2</name>
+ <description>via2.2 : min. via2 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4</name>
+ <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4_a</name>
+ <description>via2.4_a : via must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.5</name>
+ <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.1</name>
+ <description>m3.1 : min. m3 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.2</name>
+ <description>m3.2 : min. m3 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.3cd</name>
+ <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4</name>
+ <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4_a</name>
+ <description>m3.4_a : via2 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1</name>
+ <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_a</name>
+ <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_b</name>
+ <description>via3.1_b : maximum length of via3 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.2</name>
+ <description>via3.2 : min. via3 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4</name>
+ <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4_a</name>
+ <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.5</name>
+ <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.1</name>
+ <description>m4.1 : min. m4 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.2</name>
+ <description>m4.2 : min. m4 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.4a</name>
+ <description>m4.4a : min. m4 area : 0.240um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.5ab</name>
+ <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3</name>
+ <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3_a</name>
+ <description>m4.3_a : via3 must be enclosed by met4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1</name>
+ <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_a</name>
+ <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_b</name>
+ <description>via4.1_b : maximum length of via4 : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.2</name>
+ <description>via4.2 : min. via4 spacing : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4</name>
+ <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4_a</name>
+ <description>via4.4_a : m4 must enclose all via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.1</name>
+ <description>m5.1 : min. m5 width : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.2</name>
+ <description>m5.2 : min. m5 spacing : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3</name>
+ <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3_a</name>
+ <description>m5.3_a : via must be enclosed by m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.4</name>
+ <description>m5.4 : min. m5 area : 4.0um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad.2</name>
+ <description>pad.2 : min. pad spacing : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_feol_check.xml b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..a352e7c
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,363 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell.2</name>
+ <description>dnwell.2 : min. dnwell width : 3.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.1</name>
+ <description>nwell.1 : min. nwell width : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.2a</name>
+ <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.6</name>
+ <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.1</name>
+ <description>hvtp.1 : min. hvtp width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.2</name>
+ <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.1</name>
+ <description>hvtr.1 : min. hvtr width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2</name>
+ <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2_a</name>
+ <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.1a</name>
+ <description>lvtn.1a : min. lvtn width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.2</name>
+ <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.1</name>
+ <description>ncm.1 : min. ncm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.2a</name>
+ <description>ncm.2a : min. ncm spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1</name>
+ <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_a</name>
+ <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_b</name>
+ <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_c</name>
+ <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.3</name>
+ <description>difftap.3 : min. difftap spacing : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.1</name>
+ <description>tunm.1 : min. tunm width : 0.41um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.2</name>
+ <description>tunm.2 : min. tunm spacing : 0.5um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.1a</name>
+ <description>poly.1a : min. poly width : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.2</name>
+ <description>poly.2 : min. poly spacing : 0.21um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.1a</name>
+ <description>rpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.2</name>
+ <description>rpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.1a</name>
+ <description>urpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.2</name>
+ <description>urpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.1</name>
+ <description>npc.1 : min. npc width : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.2</name>
+ <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsd.1</name>
+ <description>nsd.1 : min. nsdm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsd.2</name>
+ <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psd.1</name>
+ <description>psd.1 : min. psdm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psd.2</name>
+ <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1</name>
+ <description>licon.1 : licon should be rectangle</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1_a/b</name>
+ <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13</name>
+ <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13_a</name>
+ <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.17</name>
+ <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.1</name>
+ <description>capm.1 : min. capm width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2a</name>
+ <description>capm.2a : min. capm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b</name>
+ <description>capm.2b : min. capm spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b_a</name>
+ <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3</name>
+ <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3_a</name>
+ <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.4</name>
+ <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.5</name>
+ <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.1</name>
+ <description>cap2m.1 : min. cap2m width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2a</name>
+ <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b</name>
+ <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b_a</name>
+ <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3</name>
+ <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3_a</name>
+ <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.4</name>
+ <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.5</name>
+ <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.1</name>
+ <description>hvi.1 : min. hvi width : 0.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.2a</name>
+ <description>hvi.2a : min. hvi spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.1</name>
+ <description>hvntm.1 : min. hvntm width : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.2</name>
+ <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_met_min_ca_density_check.xml b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..b91529c
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_offgrid_check.xml b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..fa805b1
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/offgrid.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_angle</name>
+ <description>x.3a : non 45 degree angle dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_angle</name>
+ <description>x.3a : non 45 degree angle nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_angle</name>
+ <description>x.3a : non 45 degree angle pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_angle</name>
+ <description>x.3a : non 45 degree angle pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_angle</name>
+ <description>x.3a : non 45 degree angle hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_angle</name>
+ <description>x.3a : non 45 degree angle hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_angle</name>
+ <description>x.3a : non 45 degree angle lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_angle</name>
+ <description>x.3a : non 45 degree angle ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2 : non 90 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2c : non 45 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2 : non 90 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2c : non 45 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_angle</name>
+ <description>x.3a : non 45 degree angle tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_angle</name>
+ <description>x.2 : non 90 degree angle poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_angle</name>
+ <description>x.3a : non 45 degree angle rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_angle</name>
+ <description>x.3a : non 45 degree angle npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_angle</name>
+ <description>x.3a : non 45 degree angle nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_angle</name>
+ <description>x.3a : non 45 degree angle psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_angle</name>
+ <description>x.2 : non 90 degree angle licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_angle</name>
+ <description>x.3a : non 45 degree angle li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_angle</name>
+ <description>x.2 : non 90 degree angle mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_angle</name>
+ <description>x.3a : non 45 degree angle vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_angle</name>
+ <description>x.3a : non 45 degree angle m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_angle</name>
+ <description>x.2 : non 90 degree angle via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_angle</name>
+ <description>x.3a : non 45 degree angle m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_angle</name>
+ <description>x.2 : non 90 degree angle via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_angle</name>
+ <description>x.3a : non 45 degree angle m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_angle</name>
+ <description>x.2 : non 90 degree angle via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_angle</name>
+ <description>x.3a : non 45 degree angle nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_angle</name>
+ <description>x.3a : non 45 degree angle m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_angle</name>
+ <description>x.2 : non 90 degree angle via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_angle</name>
+ <description>x.3a : non 45 degree angle m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_angle</name>
+ <description>x.3a : non 45 degree angle pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_angle</name>
+ <description>x.2 : non 90 degree angle mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_angle</name>
+ <description>x.3a : non 45 degree angle hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_angle</name>
+ <description>x.3a : non 45 degree angle hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_angle</name>
+ <description>x.3a : non 45 degree angle vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_angle</name>
+ <description>x.3a : non 45 degree angle uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_angle</name>
+ <description>x.3a : non 45 degree angle pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>areaid_re_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on areaid.re</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..3b4d8ce
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_zeroarea_check.xml b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..6d97219
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.drc.report b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..829b9d5
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,5 @@
+user_analog_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.rdb b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..8a882f3
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,2 @@
+$user_analog_project_wrapper
+ 100
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.tcl b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.tcl
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.tr b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.tr
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.xml b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..7161d7c
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+ <categories/>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ </cell>
+ </cells>
+ <items/>
+</report-database>
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.magic.drc.mag b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..15bc2cb
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.magic.drc.mag
@@ -0,0 +1,2926 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645552519
+<< checkpaint >>
+rect -4732 -4732 588732 708732
+<< pwell >>
+rect 345714 628229 371128 629058
+<< mvpsubdiff >>
+rect 345740 629000 371102 629032
+rect 345740 628286 345790 629000
+rect 371052 628286 371102 629000
+rect 345740 628255 371102 628286
+<< mvpsubdiffcont >>
+rect 345790 628286 371052 629000
+<< locali >>
+rect 345748 629000 371094 629032
+rect 345748 628286 345790 629000
+rect 371052 628286 371094 629000
+rect 345748 628255 371094 628286
+<< viali >>
+rect 357600 628309 359290 628991
+<< metal1 >>
+rect 357470 629394 359442 629457
+rect 357470 628062 357541 629394
+rect 359385 628062 359442 629394
+rect 357470 627990 359442 628062
+<< via1 >>
+rect 357541 628991 359385 629394
+rect 357541 628309 357600 628991
+rect 357600 628309 359290 628991
+rect 359290 628309 359385 628991
+rect 357541 628062 359385 628309
+<< metal2 >>
+rect 357470 629396 359442 629457
+rect 357470 629394 357555 629396
+rect 359371 629394 359442 629396
+rect 357470 628062 357541 629394
+rect 359385 628062 359442 629394
+rect 357470 628060 357555 628062
+rect 359371 628060 359442 628062
+rect 357470 627990 359442 628060
+rect 524 -800 636 480
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+rect 17001 462422 17017 462486
+rect 17081 462422 17097 462486
+rect 17161 462422 17177 462486
+rect 17241 462422 17257 462486
+rect 17321 462422 17337 462486
+rect 17401 462422 17417 462486
+rect 17481 462422 17497 462486
+rect 17561 462422 17684 462486
+rect 13814 419264 17684 462422
+rect 13814 419200 13911 419264
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+rect 15015 419200 15031 419264
+rect 15095 419200 15111 419264
+rect 15175 419200 15191 419264
+rect 15255 419200 15271 419264
+rect 15335 419200 15351 419264
+rect 15415 419200 15431 419264
+rect 15495 419200 15511 419264
+rect 15575 419200 15591 419264
+rect 15655 419200 15671 419264
+rect 15735 419200 15751 419264
+rect 15815 419200 15831 419264
+rect 15895 419200 15911 419264
+rect 15975 419200 15991 419264
+rect 16055 419200 16071 419264
+rect 16135 419200 16151 419264
+rect 16215 419200 16231 419264
+rect 16295 419200 16311 419264
+rect 16375 419200 16391 419264
+rect 16455 419200 16471 419264
+rect 16535 419200 16551 419264
+rect 16615 419200 16631 419264
+rect 16695 419200 16711 419264
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+rect 16935 419200 16951 419264
+rect 17015 419200 17031 419264
+rect 17095 419200 17111 419264
+rect 17175 419200 17191 419264
+rect 17255 419200 17271 419264
+rect 17335 419200 17351 419264
+rect 17415 419200 17431 419264
+rect 17495 419200 17511 419264
+rect 17575 419200 17684 419264
+rect 13814 227257 17684 419200
+rect 573464 455716 576816 500074
+rect 573464 455652 573591 455716
+rect 573655 455652 573671 455716
+rect 573735 455652 573751 455716
+rect 573815 455652 573831 455716
+rect 573895 455652 573911 455716
+rect 573975 455652 573991 455716
+rect 574055 455652 574071 455716
+rect 574135 455652 574151 455716
+rect 574215 455652 574231 455716
+rect 574295 455652 574311 455716
+rect 574375 455652 574391 455716
+rect 574455 455652 574471 455716
+rect 574535 455652 574551 455716
+rect 574615 455652 574631 455716
+rect 574695 455652 574711 455716
+rect 574775 455652 574791 455716
+rect 574855 455652 574871 455716
+rect 574935 455652 574951 455716
+rect 575015 455652 575031 455716
+rect 575095 455652 575111 455716
+rect 575175 455652 575191 455716
+rect 575255 455652 575271 455716
+rect 575335 455652 575351 455716
+rect 575415 455652 575431 455716
+rect 575495 455652 575511 455716
+rect 575575 455652 575591 455716
+rect 575655 455652 575671 455716
+rect 575735 455652 575751 455716
+rect 575815 455652 575831 455716
+rect 575895 455652 575911 455716
+rect 575975 455652 575991 455716
+rect 576055 455652 576071 455716
+rect 576135 455652 576151 455716
+rect 576215 455652 576231 455716
+rect 576295 455652 576311 455716
+rect 576375 455652 576391 455716
+rect 576455 455652 576471 455716
+rect 576535 455652 576551 455716
+rect 576615 455652 576631 455716
+rect 576695 455652 576816 455716
+rect 13811 196222 17688 227257
+rect 13811 191438 13997 196222
+rect 17421 191438 17688 196222
+rect 13811 191098 17688 191438
+rect 573464 196222 576816 455652
+rect 573464 191438 573605 196222
+rect 576629 191438 576816 196222
+rect 573464 191191 576816 191438
+<< via4 >>
+rect 357678 643457 359194 649773
+rect 352057 615301 353573 617777
+rect 363441 615307 364957 617783
+rect 363445 597363 364961 601439
+<< metal5 >>
+rect 165594 702300 170594 704800
+rect 175894 702300 180894 704800
+rect 217294 702300 222294 704800
+rect 227594 702300 232594 704800
+rect 318994 702300 323994 704800
+rect 329294 702300 334294 704800
+rect 357521 649773 359350 649991
+rect 357521 643457 357678 649773
+rect 359194 643457 359350 649773
+rect 351918 617777 353747 617929
+rect 351918 615301 352057 617777
+rect 353573 615301 353747 617777
+rect 351918 614900 353747 615301
+rect 357521 614900 359350 643457
+rect 351918 613071 359350 614900
+rect 363318 617783 365147 617929
+rect 363318 615307 363441 617783
+rect 364957 615307 365147 617783
+rect 363318 601439 365147 615307
+rect 363318 597363 363445 601439
+rect 364961 597363 365147 601439
+rect 363318 597052 365147 597363
+use user_analog_proj_example user_analog_proj_example_0
+timestamp 1639823760
+transform 1 0 345668 0 -1 627114
+box -73 -12 25490 8324
+<< labels >>
+flabel metal3 s 572152 640142 580220 644150 0 FreeSans 20000 0 0 0 VCCD1
+port 1 nsew
+flabel metal3 s 567038 550960 577302 554546 0 FreeSans 20000 0 0 0 VDDA1
+port 2 nsew
+flabel metal3 s 511190 664896 514962 676272 0 FreeSans 20000 90 0 0 VSSA1
+port 3 nsew
+flabel metal3 s 561703 191929 571721 195859 0 FreeSans 20000 0 0 0 VSSD1
+port 4 nsew
+flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1400 0 0 0 gpio_analog[0]
+port 5 nsew
+flabel metal3 s -800 381864 480 381976 0 FreeSans 1400 0 0 0 gpio_analog[10]
+port 6 nsew
+flabel metal3 s -800 338642 480 338754 0 FreeSans 1400 0 0 0 gpio_analog[11]
+port 7 nsew
+flabel metal3 s -800 295420 480 295532 0 FreeSans 1400 0 0 0 gpio_analog[12]
+port 8 nsew
+flabel metal3 s -800 252398 480 252510 0 FreeSans 1400 0 0 0 gpio_analog[13]
+port 9 nsew
+flabel metal3 s -800 124776 480 124888 0 FreeSans 1400 0 0 0 gpio_analog[14]
+port 10 nsew
+flabel metal3 s -800 81554 480 81666 0 FreeSans 1400 0 0 0 gpio_analog[15]
+port 11 nsew
+flabel metal3 s -800 38332 480 38444 0 FreeSans 1400 0 0 0 gpio_analog[16]
+port 12 nsew
+flabel metal3 s -800 16910 480 17022 0 FreeSans 1400 0 0 0 gpio_analog[17]
+port 13 nsew
+flabel metal3 s 583520 313652 584800 313764 0 FreeSans 1400 0 0 0 gpio_analog[1]
+port 14 nsew
+flabel metal3 s 583520 358874 584800 358986 0 FreeSans 1400 0 0 0 gpio_analog[2]
+port 15 nsew
+flabel metal3 s 583520 405296 584800 405408 0 FreeSans 1400 0 0 0 gpio_analog[3]
+port 16 nsew
+flabel metal3 s 583520 449718 584800 449830 0 FreeSans 1400 0 0 0 gpio_analog[4]
+port 17 nsew
+flabel metal3 s 583520 494140 584800 494252 0 FreeSans 1400 0 0 0 gpio_analog[5]
+port 18 nsew
+flabel metal3 s 583520 583562 584800 583674 0 FreeSans 1400 0 0 0 gpio_analog[6]
+port 19 nsew
+flabel metal3 s -800 511530 480 511642 0 FreeSans 1400 0 0 0 gpio_analog[7]
+port 20 nsew
+flabel metal3 s -800 468308 480 468420 0 FreeSans 1400 0 0 0 gpio_analog[8]
+port 21 nsew
+flabel metal3 s -800 425086 480 425198 0 FreeSans 1400 0 0 0 gpio_analog[9]
+port 22 nsew
+flabel metal3 s 583520 270412 584800 270524 0 FreeSans 1400 0 0 0 gpio_noesd[0]
+port 23 nsew
+flabel metal3 s -800 380682 480 380794 0 FreeSans 1400 0 0 0 gpio_noesd[10]
+port 24 nsew
+flabel metal3 s -800 337460 480 337572 0 FreeSans 1400 0 0 0 gpio_noesd[11]
+port 25 nsew
+flabel metal3 s -800 294238 480 294350 0 FreeSans 1400 0 0 0 gpio_noesd[12]
+port 26 nsew
+flabel metal3 s -800 251216 480 251328 0 FreeSans 1400 0 0 0 gpio_noesd[13]
+port 27 nsew
+flabel metal3 s -800 123594 480 123706 0 FreeSans 1400 0 0 0 gpio_noesd[14]
+port 28 nsew
+flabel metal3 s -800 80372 480 80484 0 FreeSans 1400 0 0 0 gpio_noesd[15]
+port 29 nsew
+flabel metal3 s -800 37150 480 37262 0 FreeSans 1400 0 0 0 gpio_noesd[16]
+port 30 nsew
+flabel metal3 s -800 15728 480 15840 0 FreeSans 1400 0 0 0 gpio_noesd[17]
+port 31 nsew
+flabel metal3 s 583520 314834 584800 314946 0 FreeSans 1400 0 0 0 gpio_noesd[1]
+port 32 nsew
+flabel metal3 s 583520 360056 584800 360168 0 FreeSans 1400 0 0 0 gpio_noesd[2]
+port 33 nsew
+flabel metal3 s 583520 406478 584800 406590 0 FreeSans 1400 0 0 0 gpio_noesd[3]
+port 34 nsew
+flabel metal3 s 583520 450900 584800 451012 0 FreeSans 1400 0 0 0 gpio_noesd[4]
+port 35 nsew
+flabel metal3 s 583520 495322 584800 495434 0 FreeSans 1400 0 0 0 gpio_noesd[5]
+port 36 nsew
+flabel metal3 s 583520 584744 584800 584856 0 FreeSans 1400 0 0 0 gpio_noesd[6]
+port 37 nsew
+flabel metal3 s -800 510348 480 510460 0 FreeSans 1400 0 0 0 gpio_noesd[7]
+port 38 nsew
+flabel metal3 s -800 467126 480 467238 0 FreeSans 1400 0 0 0 gpio_noesd[8]
+port 39 nsew
+flabel metal3 s -800 423904 480 424016 0 FreeSans 1400 0 0 0 gpio_noesd[9]
+port 40 nsew
+flabel metal3 s 582300 677984 584800 682984 0 FreeSans 1400 0 0 0 io_analog[0]
+port 41 nsew
+flabel metal3 s 0 680242 1700 685242 0 FreeSans 1400 0 0 0 io_analog[10]
+port 42 nsew
+flabel metal3 s 566594 702300 571594 704800 0 FreeSans 2400 180 0 0 io_analog[1]
+port 43 nsew
+flabel metal3 s 465394 702300 470394 704800 0 FreeSans 2400 180 0 0 io_analog[2]
+port 44 nsew
+flabel metal3 s 413394 702300 418394 704800 0 FreeSans 2400 180 0 0 io_analog[3]
+port 45 nsew
+flabel metal3 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal4 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal5 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal3 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal4 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal5 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal3 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal4 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal5 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal3 s 120194 702300 125194 704800 0 FreeSans 2400 180 0 0 io_analog[7]
+port 49 nsew
+flabel metal3 s 68194 702300 73194 704800 0 FreeSans 2400 180 0 0 io_analog[8]
+port 50 nsew
+flabel metal3 s 16194 702300 21194 704800 0 FreeSans 2400 180 0 0 io_analog[9]
+port 51 nsew
+flabel metal3 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal4 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal5 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal3 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal4 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal5 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal3 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal4 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal5 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal3 s 326794 702300 328994 704800 0 FreeSans 2400 180 0 0 io_clamp_high[0]
+port 52 nsew
+flabel metal3 s 225094 702300 227294 704800 0 FreeSans 2400 180 0 0 io_clamp_high[1]
+port 53 nsew
+flabel metal3 s 173394 702300 175594 704800 0 FreeSans 2400 180 0 0 io_clamp_high[2]
+port 54 nsew
+flabel metal3 s 324294 702300 326494 704800 0 FreeSans 2400 180 0 0 io_clamp_low[0]
+port 55 nsew
+flabel metal3 s 222594 702300 224794 704800 0 FreeSans 2400 180 0 0 io_clamp_low[1]
+port 56 nsew
+flabel metal3 s 170894 702300 173094 704800 0 FreeSans 2400 180 0 0 io_clamp_low[2]
+port 57 nsew
+flabel metal3 s 583520 2726 584800 2838 0 FreeSans 1400 0 0 0 io_in[0]
+port 58 nsew
+flabel metal3 s 583520 408842 584800 408954 0 FreeSans 1400 0 0 0 io_in[10]
+port 59 nsew
+flabel metal3 s 583520 453264 584800 453376 0 FreeSans 1400 0 0 0 io_in[11]
+port 60 nsew
+flabel metal3 s 583520 497686 584800 497798 0 FreeSans 1400 0 0 0 io_in[12]
+port 61 nsew
+flabel metal3 s 583520 587108 584800 587220 0 FreeSans 1400 0 0 0 io_in[13]
+port 62 nsew
+flabel metal3 s -800 507984 480 508096 0 FreeSans 1400 0 0 0 io_in[14]
+port 63 nsew
+flabel metal3 s -800 464762 480 464874 0 FreeSans 1400 0 0 0 io_in[15]
+port 64 nsew
+flabel metal3 s -800 421540 480 421652 0 FreeSans 1400 0 0 0 io_in[16]
+port 65 nsew
+flabel metal3 s -800 378318 480 378430 0 FreeSans 1400 0 0 0 io_in[17]
+port 66 nsew
+flabel metal3 s -800 335096 480 335208 0 FreeSans 1400 0 0 0 io_in[18]
+port 67 nsew
+flabel metal3 s -800 291874 480 291986 0 FreeSans 1400 0 0 0 io_in[19]
+port 68 nsew
+flabel metal3 s 583520 7454 584800 7566 0 FreeSans 1400 0 0 0 io_in[1]
+port 69 nsew
+flabel metal3 s -800 248852 480 248964 0 FreeSans 1400 0 0 0 io_in[20]
+port 70 nsew
+flabel metal3 s -800 121230 480 121342 0 FreeSans 1400 0 0 0 io_in[21]
+port 71 nsew
+flabel metal3 s -800 78008 480 78120 0 FreeSans 1400 0 0 0 io_in[22]
+port 72 nsew
+flabel metal3 s -800 34786 480 34898 0 FreeSans 1400 0 0 0 io_in[23]
+port 73 nsew
+flabel metal3 s -800 13364 480 13476 0 FreeSans 1400 0 0 0 io_in[24]
+port 74 nsew
+flabel metal3 s -800 8636 480 8748 0 FreeSans 1400 0 0 0 io_in[25]
+port 75 nsew
+flabel metal3 s -800 3908 480 4020 0 FreeSans 1400 0 0 0 io_in[26]
+port 76 nsew
+flabel metal3 s 583520 12182 584800 12294 0 FreeSans 1400 0 0 0 io_in[2]
+port 77 nsew
+flabel metal3 s 583520 16910 584800 17022 0 FreeSans 1400 0 0 0 io_in[3]
+port 78 nsew
+flabel metal3 s 583520 21638 584800 21750 0 FreeSans 1400 0 0 0 io_in[4]
+port 79 nsew
+flabel metal3 s 583520 48096 584800 48208 0 FreeSans 1400 0 0 0 io_in[5]
+port 80 nsew
+flabel metal3 s 583520 92754 584800 92866 0 FreeSans 1400 0 0 0 io_in[6]
+port 81 nsew
+flabel metal3 s 583520 272776 584800 272888 0 FreeSans 1400 0 0 0 io_in[7]
+port 82 nsew
+flabel metal3 s 583520 317198 584800 317310 0 FreeSans 1400 0 0 0 io_in[8]
+port 83 nsew
+flabel metal3 s 583520 362420 584800 362532 0 FreeSans 1400 0 0 0 io_in[9]
+port 84 nsew
+flabel metal3 s 583520 1544 584800 1656 0 FreeSans 1400 0 0 0 io_in_3v3[0]
+port 85 nsew
+flabel metal3 s 583520 407660 584800 407772 0 FreeSans 1400 0 0 0 io_in_3v3[10]
+port 86 nsew
+flabel metal3 s 583520 452082 584800 452194 0 FreeSans 1400 0 0 0 io_in_3v3[11]
+port 87 nsew
+flabel metal3 s 583520 496504 584800 496616 0 FreeSans 1400 0 0 0 io_in_3v3[12]
+port 88 nsew
+flabel metal3 s 583520 585926 584800 586038 0 FreeSans 1400 0 0 0 io_in_3v3[13]
+port 89 nsew
+flabel metal3 s -800 509166 480 509278 0 FreeSans 1400 0 0 0 io_in_3v3[14]
+port 90 nsew
+flabel metal3 s -800 465944 480 466056 0 FreeSans 1400 0 0 0 io_in_3v3[15]
+port 91 nsew
+flabel metal3 s -800 422722 480 422834 0 FreeSans 1400 0 0 0 io_in_3v3[16]
+port 92 nsew
+flabel metal3 s -800 379500 480 379612 0 FreeSans 1400 0 0 0 io_in_3v3[17]
+port 93 nsew
+flabel metal3 s -800 336278 480 336390 0 FreeSans 1400 0 0 0 io_in_3v3[18]
+port 94 nsew
+flabel metal3 s -800 293056 480 293168 0 FreeSans 1400 0 0 0 io_in_3v3[19]
+port 95 nsew
+flabel metal3 s 583520 6272 584800 6384 0 FreeSans 1400 0 0 0 io_in_3v3[1]
+port 96 nsew
+flabel metal3 s -800 250034 480 250146 0 FreeSans 1400 0 0 0 io_in_3v3[20]
+port 97 nsew
+flabel metal3 s -800 122412 480 122524 0 FreeSans 1400 0 0 0 io_in_3v3[21]
+port 98 nsew
+flabel metal3 s -800 79190 480 79302 0 FreeSans 1400 0 0 0 io_in_3v3[22]
+port 99 nsew
+flabel metal3 s -800 35968 480 36080 0 FreeSans 1400 0 0 0 io_in_3v3[23]
+port 100 nsew
+flabel metal3 s -800 14546 480 14658 0 FreeSans 1400 0 0 0 io_in_3v3[24]
+port 101 nsew
+flabel metal3 s -800 9818 480 9930 0 FreeSans 1400 0 0 0 io_in_3v3[25]
+port 102 nsew
+flabel metal3 s -800 5090 480 5202 0 FreeSans 1400 0 0 0 io_in_3v3[26]
+port 103 nsew
+flabel metal3 s 583520 11000 584800 11112 0 FreeSans 1400 0 0 0 io_in_3v3[2]
+port 104 nsew
+flabel metal3 s 583520 15728 584800 15840 0 FreeSans 1400 0 0 0 io_in_3v3[3]
+port 105 nsew
+flabel metal3 s 583520 20456 584800 20568 0 FreeSans 1400 0 0 0 io_in_3v3[4]
+port 106 nsew
+flabel metal3 s 583520 46914 584800 47026 0 FreeSans 1400 0 0 0 io_in_3v3[5]
+port 107 nsew
+flabel metal3 s 583520 91572 584800 91684 0 FreeSans 1400 0 0 0 io_in_3v3[6]
+port 108 nsew
+flabel metal3 s 583520 271594 584800 271706 0 FreeSans 1400 0 0 0 io_in_3v3[7]
+port 109 nsew
+flabel metal3 s 583520 316016 584800 316128 0 FreeSans 1400 0 0 0 io_in_3v3[8]
+port 110 nsew
+flabel metal3 s 583520 361238 584800 361350 0 FreeSans 1400 0 0 0 io_in_3v3[9]
+port 111 nsew
+flabel metal3 s 583520 5090 584800 5202 0 FreeSans 1400 0 0 0 io_oeb[0]
+port 112 nsew
+flabel metal3 s 583520 411206 584800 411318 0 FreeSans 1400 0 0 0 io_oeb[10]
+port 113 nsew
+flabel metal3 s 583520 455628 584800 455740 0 FreeSans 1400 0 0 0 io_oeb[11]
+port 114 nsew
+flabel metal3 s 583520 500050 584800 500162 0 FreeSans 1400 0 0 0 io_oeb[12]
+port 115 nsew
+flabel metal3 s 583520 589472 584800 589584 0 FreeSans 1400 0 0 0 io_oeb[13]
+port 116 nsew
+flabel metal3 s -800 505620 480 505732 0 FreeSans 1400 0 0 0 io_oeb[14]
+port 117 nsew
+flabel metal3 s -800 462398 480 462510 0 FreeSans 1400 0 0 0 io_oeb[15]
+port 118 nsew
+flabel metal3 s -800 419176 480 419288 0 FreeSans 1400 0 0 0 io_oeb[16]
+port 119 nsew
+flabel metal3 s -800 375954 480 376066 0 FreeSans 1400 0 0 0 io_oeb[17]
+port 120 nsew
+flabel metal3 s -800 332732 480 332844 0 FreeSans 1400 0 0 0 io_oeb[18]
+port 121 nsew
+flabel metal3 s -800 289510 480 289622 0 FreeSans 1400 0 0 0 io_oeb[19]
+port 122 nsew
+flabel metal3 s 583520 9818 584800 9930 0 FreeSans 1400 0 0 0 io_oeb[1]
+port 123 nsew
+flabel metal3 s -800 246488 480 246600 0 FreeSans 1400 0 0 0 io_oeb[20]
+port 124 nsew
+flabel metal3 s -800 118866 480 118978 0 FreeSans 1400 0 0 0 io_oeb[21]
+port 125 nsew
+flabel metal3 s -800 75644 480 75756 0 FreeSans 1400 0 0 0 io_oeb[22]
+port 126 nsew
+flabel metal3 s -800 32422 480 32534 0 FreeSans 1400 0 0 0 io_oeb[23]
+port 127 nsew
+flabel metal3 s -800 11000 480 11112 0 FreeSans 1400 0 0 0 io_oeb[24]
+port 128 nsew
+flabel metal3 s -800 6272 480 6384 0 FreeSans 1400 0 0 0 io_oeb[25]
+port 129 nsew
+flabel metal3 s -800 1544 480 1656 0 FreeSans 1400 0 0 0 io_oeb[26]
+port 130 nsew
+flabel metal3 s 583520 14546 584800 14658 0 FreeSans 1400 0 0 0 io_oeb[2]
+port 131 nsew
+flabel metal3 s 583520 19274 584800 19386 0 FreeSans 1400 0 0 0 io_oeb[3]
+port 132 nsew
+flabel metal3 s 583520 24002 584800 24114 0 FreeSans 1400 0 0 0 io_oeb[4]
+port 133 nsew
+flabel metal3 s 583520 50460 584800 50572 0 FreeSans 1400 0 0 0 io_oeb[5]
+port 134 nsew
+flabel metal3 s 583520 95118 584800 95230 0 FreeSans 1400 0 0 0 io_oeb[6]
+port 135 nsew
+flabel metal3 s 583520 275140 584800 275252 0 FreeSans 1400 0 0 0 io_oeb[7]
+port 136 nsew
+flabel metal3 s 583520 319562 584800 319674 0 FreeSans 1400 0 0 0 io_oeb[8]
+port 137 nsew
+flabel metal3 s 583520 364784 584800 364896 0 FreeSans 1400 0 0 0 io_oeb[9]
+port 138 nsew
+flabel metal3 s 583520 3908 584800 4020 0 FreeSans 1400 0 0 0 io_out[0]
+port 139 nsew
+flabel metal3 s 583520 410024 584800 410136 0 FreeSans 1400 0 0 0 io_out[10]
+port 140 nsew
+flabel metal3 s 583520 454446 584800 454558 0 FreeSans 1400 0 0 0 io_out[11]
+port 141 nsew
+flabel metal3 s 583520 498868 584800 498980 0 FreeSans 1400 0 0 0 io_out[12]
+port 142 nsew
+flabel metal3 s 583520 588290 584800 588402 0 FreeSans 1400 0 0 0 io_out[13]
+port 143 nsew
+flabel metal3 s -800 506802 480 506914 0 FreeSans 1400 0 0 0 io_out[14]
+port 144 nsew
+flabel metal3 s -800 463580 480 463692 0 FreeSans 1400 0 0 0 io_out[15]
+port 145 nsew
+flabel metal3 s -800 420358 480 420470 0 FreeSans 1400 0 0 0 io_out[16]
+port 146 nsew
+flabel metal3 s -800 377136 480 377248 0 FreeSans 1400 0 0 0 io_out[17]
+port 147 nsew
+flabel metal3 s -800 333914 480 334026 0 FreeSans 1400 0 0 0 io_out[18]
+port 148 nsew
+flabel metal3 s -800 290692 480 290804 0 FreeSans 1400 0 0 0 io_out[19]
+port 149 nsew
+flabel metal3 s 583520 8636 584800 8748 0 FreeSans 1400 0 0 0 io_out[1]
+port 150 nsew
+flabel metal3 s -800 247670 480 247782 0 FreeSans 1400 0 0 0 io_out[20]
+port 151 nsew
+flabel metal3 s -800 120048 480 120160 0 FreeSans 1400 0 0 0 io_out[21]
+port 152 nsew
+flabel metal3 s -800 76826 480 76938 0 FreeSans 1400 0 0 0 io_out[22]
+port 153 nsew
+flabel metal3 s -800 33604 480 33716 0 FreeSans 1400 0 0 0 io_out[23]
+port 154 nsew
+flabel metal3 s -800 12182 480 12294 0 FreeSans 1400 0 0 0 io_out[24]
+port 155 nsew
+flabel metal3 s -800 7454 480 7566 0 FreeSans 1400 0 0 0 io_out[25]
+port 156 nsew
+flabel metal3 s -800 2726 480 2838 0 FreeSans 1400 0 0 0 io_out[26]
+port 157 nsew
+flabel metal3 s 583520 13364 584800 13476 0 FreeSans 1400 0 0 0 io_out[2]
+port 158 nsew
+flabel metal3 s 583520 18092 584800 18204 0 FreeSans 1400 0 0 0 io_out[3]
+port 159 nsew
+flabel metal3 s 583520 22820 584800 22932 0 FreeSans 1400 0 0 0 io_out[4]
+port 160 nsew
+flabel metal3 s 583520 49278 584800 49390 0 FreeSans 1400 0 0 0 io_out[5]
+port 161 nsew
+flabel metal3 s 583520 93936 584800 94048 0 FreeSans 1400 0 0 0 io_out[6]
+port 162 nsew
+flabel metal3 s 583520 273958 584800 274070 0 FreeSans 1400 0 0 0 io_out[7]
+port 163 nsew
+flabel metal3 s 583520 318380 584800 318492 0 FreeSans 1400 0 0 0 io_out[8]
+port 164 nsew
+flabel metal3 s 583520 363602 584800 363714 0 FreeSans 1400 0 0 0 io_out[9]
+port 165 nsew
+flabel metal2 s 125816 -800 125928 480 0 FreeSans 1400 90 0 0 la_data_in[0]
+port 166 nsew
+flabel metal2 s 480416 -800 480528 480 0 FreeSans 1400 90 0 0 la_data_in[100]
+port 167 nsew
+flabel metal2 s 483962 -800 484074 480 0 FreeSans 1400 90 0 0 la_data_in[101]
+port 168 nsew
+flabel metal2 s 487508 -800 487620 480 0 FreeSans 1400 90 0 0 la_data_in[102]
+port 169 nsew
+flabel metal2 s 491054 -800 491166 480 0 FreeSans 1400 90 0 0 la_data_in[103]
+port 170 nsew
+flabel metal2 s 494600 -800 494712 480 0 FreeSans 1400 90 0 0 la_data_in[104]
+port 171 nsew
+flabel metal2 s 498146 -800 498258 480 0 FreeSans 1400 90 0 0 la_data_in[105]
+port 172 nsew
+flabel metal2 s 501692 -800 501804 480 0 FreeSans 1400 90 0 0 la_data_in[106]
+port 173 nsew
+flabel metal2 s 505238 -800 505350 480 0 FreeSans 1400 90 0 0 la_data_in[107]
+port 174 nsew
+flabel metal2 s 508784 -800 508896 480 0 FreeSans 1400 90 0 0 la_data_in[108]
+port 175 nsew
+flabel metal2 s 512330 -800 512442 480 0 FreeSans 1400 90 0 0 la_data_in[109]
+port 176 nsew
+flabel metal2 s 161276 -800 161388 480 0 FreeSans 1400 90 0 0 la_data_in[10]
+port 177 nsew
+flabel metal2 s 515876 -800 515988 480 0 FreeSans 1400 90 0 0 la_data_in[110]
+port 178 nsew
+flabel metal2 s 519422 -800 519534 480 0 FreeSans 1400 90 0 0 la_data_in[111]
+port 179 nsew
+flabel metal2 s 522968 -800 523080 480 0 FreeSans 1400 90 0 0 la_data_in[112]
+port 180 nsew
+flabel metal2 s 526514 -800 526626 480 0 FreeSans 1400 90 0 0 la_data_in[113]
+port 181 nsew
+flabel metal2 s 530060 -800 530172 480 0 FreeSans 1400 90 0 0 la_data_in[114]
+port 182 nsew
+flabel metal2 s 533606 -800 533718 480 0 FreeSans 1400 90 0 0 la_data_in[115]
+port 183 nsew
+flabel metal2 s 537152 -800 537264 480 0 FreeSans 1400 90 0 0 la_data_in[116]
+port 184 nsew
+flabel metal2 s 540698 -800 540810 480 0 FreeSans 1400 90 0 0 la_data_in[117]
+port 185 nsew
+flabel metal2 s 544244 -800 544356 480 0 FreeSans 1400 90 0 0 la_data_in[118]
+port 186 nsew
+flabel metal2 s 547790 -800 547902 480 0 FreeSans 1400 90 0 0 la_data_in[119]
+port 187 nsew
+flabel metal2 s 164822 -800 164934 480 0 FreeSans 1400 90 0 0 la_data_in[11]
+port 188 nsew
+flabel metal2 s 551336 -800 551448 480 0 FreeSans 1400 90 0 0 la_data_in[120]
+port 189 nsew
+flabel metal2 s 554882 -800 554994 480 0 FreeSans 1400 90 0 0 la_data_in[121]
+port 190 nsew
+flabel metal2 s 558428 -800 558540 480 0 FreeSans 1400 90 0 0 la_data_in[122]
+port 191 nsew
+flabel metal2 s 561974 -800 562086 480 0 FreeSans 1400 90 0 0 la_data_in[123]
+port 192 nsew
+flabel metal2 s 565520 -800 565632 480 0 FreeSans 1400 90 0 0 la_data_in[124]
+port 193 nsew
+flabel metal2 s 569066 -800 569178 480 0 FreeSans 1400 90 0 0 la_data_in[125]
+port 194 nsew
+flabel metal2 s 572612 -800 572724 480 0 FreeSans 1400 90 0 0 la_data_in[126]
+port 195 nsew
+flabel metal2 s 576158 -800 576270 480 0 FreeSans 1400 90 0 0 la_data_in[127]
+port 196 nsew
+flabel metal2 s 168368 -800 168480 480 0 FreeSans 1400 90 0 0 la_data_in[12]
+port 197 nsew
+flabel metal2 s 171914 -800 172026 480 0 FreeSans 1400 90 0 0 la_data_in[13]
+port 198 nsew
+flabel metal2 s 175460 -800 175572 480 0 FreeSans 1400 90 0 0 la_data_in[14]
+port 199 nsew
+flabel metal2 s 179006 -800 179118 480 0 FreeSans 1400 90 0 0 la_data_in[15]
+port 200 nsew
+flabel metal2 s 182552 -800 182664 480 0 FreeSans 1400 90 0 0 la_data_in[16]
+port 201 nsew
+flabel metal2 s 186098 -800 186210 480 0 FreeSans 1400 90 0 0 la_data_in[17]
+port 202 nsew
+flabel metal2 s 189644 -800 189756 480 0 FreeSans 1400 90 0 0 la_data_in[18]
+port 203 nsew
+flabel metal2 s 193190 -800 193302 480 0 FreeSans 1400 90 0 0 la_data_in[19]
+port 204 nsew
+flabel metal2 s 129362 -800 129474 480 0 FreeSans 1400 90 0 0 la_data_in[1]
+port 205 nsew
+flabel metal2 s 196736 -800 196848 480 0 FreeSans 1400 90 0 0 la_data_in[20]
+port 206 nsew
+flabel metal2 s 200282 -800 200394 480 0 FreeSans 1400 90 0 0 la_data_in[21]
+port 207 nsew
+flabel metal2 s 203828 -800 203940 480 0 FreeSans 1400 90 0 0 la_data_in[22]
+port 208 nsew
+flabel metal2 s 207374 -800 207486 480 0 FreeSans 1400 90 0 0 la_data_in[23]
+port 209 nsew
+flabel metal2 s 210920 -800 211032 480 0 FreeSans 1400 90 0 0 la_data_in[24]
+port 210 nsew
+flabel metal2 s 214466 -800 214578 480 0 FreeSans 1400 90 0 0 la_data_in[25]
+port 211 nsew
+flabel metal2 s 218012 -800 218124 480 0 FreeSans 1400 90 0 0 la_data_in[26]
+port 212 nsew
+flabel metal2 s 221558 -800 221670 480 0 FreeSans 1400 90 0 0 la_data_in[27]
+port 213 nsew
+flabel metal2 s 225104 -800 225216 480 0 FreeSans 1400 90 0 0 la_data_in[28]
+port 214 nsew
+flabel metal2 s 228650 -800 228762 480 0 FreeSans 1400 90 0 0 la_data_in[29]
+port 215 nsew
+flabel metal2 s 132908 -800 133020 480 0 FreeSans 1400 90 0 0 la_data_in[2]
+port 216 nsew
+flabel metal2 s 232196 -800 232308 480 0 FreeSans 1400 90 0 0 la_data_in[30]
+port 217 nsew
+flabel metal2 s 235742 -800 235854 480 0 FreeSans 1400 90 0 0 la_data_in[31]
+port 218 nsew
+flabel metal2 s 239288 -800 239400 480 0 FreeSans 1400 90 0 0 la_data_in[32]
+port 219 nsew
+flabel metal2 s 242834 -800 242946 480 0 FreeSans 1400 90 0 0 la_data_in[33]
+port 220 nsew
+flabel metal2 s 246380 -800 246492 480 0 FreeSans 1400 90 0 0 la_data_in[34]
+port 221 nsew
+flabel metal2 s 249926 -800 250038 480 0 FreeSans 1400 90 0 0 la_data_in[35]
+port 222 nsew
+flabel metal2 s 253472 -800 253584 480 0 FreeSans 1400 90 0 0 la_data_in[36]
+port 223 nsew
+flabel metal2 s 257018 -800 257130 480 0 FreeSans 1400 90 0 0 la_data_in[37]
+port 224 nsew
+flabel metal2 s 260564 -800 260676 480 0 FreeSans 1400 90 0 0 la_data_in[38]
+port 225 nsew
+flabel metal2 s 264110 -800 264222 480 0 FreeSans 1400 90 0 0 la_data_in[39]
+port 226 nsew
+flabel metal2 s 136454 -800 136566 480 0 FreeSans 1400 90 0 0 la_data_in[3]
+port 227 nsew
+flabel metal2 s 267656 -800 267768 480 0 FreeSans 1400 90 0 0 la_data_in[40]
+port 228 nsew
+flabel metal2 s 271202 -800 271314 480 0 FreeSans 1400 90 0 0 la_data_in[41]
+port 229 nsew
+flabel metal2 s 274748 -800 274860 480 0 FreeSans 1400 90 0 0 la_data_in[42]
+port 230 nsew
+flabel metal2 s 278294 -800 278406 480 0 FreeSans 1400 90 0 0 la_data_in[43]
+port 231 nsew
+flabel metal2 s 281840 -800 281952 480 0 FreeSans 1400 90 0 0 la_data_in[44]
+port 232 nsew
+flabel metal2 s 285386 -800 285498 480 0 FreeSans 1400 90 0 0 la_data_in[45]
+port 233 nsew
+flabel metal2 s 288932 -800 289044 480 0 FreeSans 1400 90 0 0 la_data_in[46]
+port 234 nsew
+flabel metal2 s 292478 -800 292590 480 0 FreeSans 1400 90 0 0 la_data_in[47]
+port 235 nsew
+flabel metal2 s 296024 -800 296136 480 0 FreeSans 1400 90 0 0 la_data_in[48]
+port 236 nsew
+flabel metal2 s 299570 -800 299682 480 0 FreeSans 1400 90 0 0 la_data_in[49]
+port 237 nsew
+flabel metal2 s 140000 -800 140112 480 0 FreeSans 1400 90 0 0 la_data_in[4]
+port 238 nsew
+flabel metal2 s 303116 -800 303228 480 0 FreeSans 1400 90 0 0 la_data_in[50]
+port 239 nsew
+flabel metal2 s 306662 -800 306774 480 0 FreeSans 1400 90 0 0 la_data_in[51]
+port 240 nsew
+flabel metal2 s 310208 -800 310320 480 0 FreeSans 1400 90 0 0 la_data_in[52]
+port 241 nsew
+flabel metal2 s 313754 -800 313866 480 0 FreeSans 1400 90 0 0 la_data_in[53]
+port 242 nsew
+flabel metal2 s 317300 -800 317412 480 0 FreeSans 1400 90 0 0 la_data_in[54]
+port 243 nsew
+flabel metal2 s 320846 -800 320958 480 0 FreeSans 1400 90 0 0 la_data_in[55]
+port 244 nsew
+flabel metal2 s 324392 -800 324504 480 0 FreeSans 1400 90 0 0 la_data_in[56]
+port 245 nsew
+flabel metal2 s 327938 -800 328050 480 0 FreeSans 1400 90 0 0 la_data_in[57]
+port 246 nsew
+flabel metal2 s 331484 -800 331596 480 0 FreeSans 1400 90 0 0 la_data_in[58]
+port 247 nsew
+flabel metal2 s 335030 -800 335142 480 0 FreeSans 1400 90 0 0 la_data_in[59]
+port 248 nsew
+flabel metal2 s 143546 -800 143658 480 0 FreeSans 1400 90 0 0 la_data_in[5]
+port 249 nsew
+flabel metal2 s 338576 -800 338688 480 0 FreeSans 1400 90 0 0 la_data_in[60]
+port 250 nsew
+flabel metal2 s 342122 -800 342234 480 0 FreeSans 1400 90 0 0 la_data_in[61]
+port 251 nsew
+flabel metal2 s 345668 -800 345780 480 0 FreeSans 1400 90 0 0 la_data_in[62]
+port 252 nsew
+flabel metal2 s 349214 -800 349326 480 0 FreeSans 1400 90 0 0 la_data_in[63]
+port 253 nsew
+flabel metal2 s 352760 -800 352872 480 0 FreeSans 1400 90 0 0 la_data_in[64]
+port 254 nsew
+flabel metal2 s 356306 -800 356418 480 0 FreeSans 1400 90 0 0 la_data_in[65]
+port 255 nsew
+flabel metal2 s 359852 -800 359964 480 0 FreeSans 1400 90 0 0 la_data_in[66]
+port 256 nsew
+flabel metal2 s 363398 -800 363510 480 0 FreeSans 1400 90 0 0 la_data_in[67]
+port 257 nsew
+flabel metal2 s 366944 -800 367056 480 0 FreeSans 1400 90 0 0 la_data_in[68]
+port 258 nsew
+flabel metal2 s 370490 -800 370602 480 0 FreeSans 1400 90 0 0 la_data_in[69]
+port 259 nsew
+flabel metal2 s 147092 -800 147204 480 0 FreeSans 1400 90 0 0 la_data_in[6]
+port 260 nsew
+flabel metal2 s 374036 -800 374148 480 0 FreeSans 1400 90 0 0 la_data_in[70]
+port 261 nsew
+flabel metal2 s 377582 -800 377694 480 0 FreeSans 1400 90 0 0 la_data_in[71]
+port 262 nsew
+flabel metal2 s 381128 -800 381240 480 0 FreeSans 1400 90 0 0 la_data_in[72]
+port 263 nsew
+flabel metal2 s 384674 -800 384786 480 0 FreeSans 1400 90 0 0 la_data_in[73]
+port 264 nsew
+flabel metal2 s 388220 -800 388332 480 0 FreeSans 1400 90 0 0 la_data_in[74]
+port 265 nsew
+flabel metal2 s 391766 -800 391878 480 0 FreeSans 1400 90 0 0 la_data_in[75]
+port 266 nsew
+flabel metal2 s 395312 -800 395424 480 0 FreeSans 1400 90 0 0 la_data_in[76]
+port 267 nsew
+flabel metal2 s 398858 -800 398970 480 0 FreeSans 1400 90 0 0 la_data_in[77]
+port 268 nsew
+flabel metal2 s 402404 -800 402516 480 0 FreeSans 1400 90 0 0 la_data_in[78]
+port 269 nsew
+flabel metal2 s 405950 -800 406062 480 0 FreeSans 1400 90 0 0 la_data_in[79]
+port 270 nsew
+flabel metal2 s 150638 -800 150750 480 0 FreeSans 1400 90 0 0 la_data_in[7]
+port 271 nsew
+flabel metal2 s 409496 -800 409608 480 0 FreeSans 1400 90 0 0 la_data_in[80]
+port 272 nsew
+flabel metal2 s 413042 -800 413154 480 0 FreeSans 1400 90 0 0 la_data_in[81]
+port 273 nsew
+flabel metal2 s 416588 -800 416700 480 0 FreeSans 1400 90 0 0 la_data_in[82]
+port 274 nsew
+flabel metal2 s 420134 -800 420246 480 0 FreeSans 1400 90 0 0 la_data_in[83]
+port 275 nsew
+flabel metal2 s 423680 -800 423792 480 0 FreeSans 1400 90 0 0 la_data_in[84]
+port 276 nsew
+flabel metal2 s 427226 -800 427338 480 0 FreeSans 1400 90 0 0 la_data_in[85]
+port 277 nsew
+flabel metal2 s 430772 -800 430884 480 0 FreeSans 1400 90 0 0 la_data_in[86]
+port 278 nsew
+flabel metal2 s 434318 -800 434430 480 0 FreeSans 1400 90 0 0 la_data_in[87]
+port 279 nsew
+flabel metal2 s 437864 -800 437976 480 0 FreeSans 1400 90 0 0 la_data_in[88]
+port 280 nsew
+flabel metal2 s 441410 -800 441522 480 0 FreeSans 1400 90 0 0 la_data_in[89]
+port 281 nsew
+flabel metal2 s 154184 -800 154296 480 0 FreeSans 1400 90 0 0 la_data_in[8]
+port 282 nsew
+flabel metal2 s 444956 -800 445068 480 0 FreeSans 1400 90 0 0 la_data_in[90]
+port 283 nsew
+flabel metal2 s 448502 -800 448614 480 0 FreeSans 1400 90 0 0 la_data_in[91]
+port 284 nsew
+flabel metal2 s 452048 -800 452160 480 0 FreeSans 1400 90 0 0 la_data_in[92]
+port 285 nsew
+flabel metal2 s 455594 -800 455706 480 0 FreeSans 1400 90 0 0 la_data_in[93]
+port 286 nsew
+flabel metal2 s 459140 -800 459252 480 0 FreeSans 1400 90 0 0 la_data_in[94]
+port 287 nsew
+flabel metal2 s 462686 -800 462798 480 0 FreeSans 1400 90 0 0 la_data_in[95]
+port 288 nsew
+flabel metal2 s 466232 -800 466344 480 0 FreeSans 1400 90 0 0 la_data_in[96]
+port 289 nsew
+flabel metal2 s 469778 -800 469890 480 0 FreeSans 1400 90 0 0 la_data_in[97]
+port 290 nsew
+flabel metal2 s 473324 -800 473436 480 0 FreeSans 1400 90 0 0 la_data_in[98]
+port 291 nsew
+flabel metal2 s 476870 -800 476982 480 0 FreeSans 1400 90 0 0 la_data_in[99]
+port 292 nsew
+flabel metal2 s 157730 -800 157842 480 0 FreeSans 1400 90 0 0 la_data_in[9]
+port 293 nsew
+flabel metal2 s 126998 -800 127110 480 0 FreeSans 1400 90 0 0 la_data_out[0]
+port 294 nsew
+flabel metal2 s 481598 -800 481710 480 0 FreeSans 1400 90 0 0 la_data_out[100]
+port 295 nsew
+flabel metal2 s 485144 -800 485256 480 0 FreeSans 1400 90 0 0 la_data_out[101]
+port 296 nsew
+flabel metal2 s 488690 -800 488802 480 0 FreeSans 1400 90 0 0 la_data_out[102]
+port 297 nsew
+flabel metal2 s 492236 -800 492348 480 0 FreeSans 1400 90 0 0 la_data_out[103]
+port 298 nsew
+flabel metal2 s 495782 -800 495894 480 0 FreeSans 1400 90 0 0 la_data_out[104]
+port 299 nsew
+flabel metal2 s 499328 -800 499440 480 0 FreeSans 1400 90 0 0 la_data_out[105]
+port 300 nsew
+flabel metal2 s 502874 -800 502986 480 0 FreeSans 1400 90 0 0 la_data_out[106]
+port 301 nsew
+flabel metal2 s 506420 -800 506532 480 0 FreeSans 1400 90 0 0 la_data_out[107]
+port 302 nsew
+flabel metal2 s 509966 -800 510078 480 0 FreeSans 1400 90 0 0 la_data_out[108]
+port 303 nsew
+flabel metal2 s 513512 -800 513624 480 0 FreeSans 1400 90 0 0 la_data_out[109]
+port 304 nsew
+flabel metal2 s 162458 -800 162570 480 0 FreeSans 1400 90 0 0 la_data_out[10]
+port 305 nsew
+flabel metal2 s 517058 -800 517170 480 0 FreeSans 1400 90 0 0 la_data_out[110]
+port 306 nsew
+flabel metal2 s 520604 -800 520716 480 0 FreeSans 1400 90 0 0 la_data_out[111]
+port 307 nsew
+flabel metal2 s 524150 -800 524262 480 0 FreeSans 1400 90 0 0 la_data_out[112]
+port 308 nsew
+flabel metal2 s 527696 -800 527808 480 0 FreeSans 1400 90 0 0 la_data_out[113]
+port 309 nsew
+flabel metal2 s 531242 -800 531354 480 0 FreeSans 1400 90 0 0 la_data_out[114]
+port 310 nsew
+flabel metal2 s 534788 -800 534900 480 0 FreeSans 1400 90 0 0 la_data_out[115]
+port 311 nsew
+flabel metal2 s 538334 -800 538446 480 0 FreeSans 1400 90 0 0 la_data_out[116]
+port 312 nsew
+flabel metal2 s 541880 -800 541992 480 0 FreeSans 1400 90 0 0 la_data_out[117]
+port 313 nsew
+flabel metal2 s 545426 -800 545538 480 0 FreeSans 1400 90 0 0 la_data_out[118]
+port 314 nsew
+flabel metal2 s 548972 -800 549084 480 0 FreeSans 1400 90 0 0 la_data_out[119]
+port 315 nsew
+flabel metal2 s 166004 -800 166116 480 0 FreeSans 1400 90 0 0 la_data_out[11]
+port 316 nsew
+flabel metal2 s 552518 -800 552630 480 0 FreeSans 1400 90 0 0 la_data_out[120]
+port 317 nsew
+flabel metal2 s 556064 -800 556176 480 0 FreeSans 1400 90 0 0 la_data_out[121]
+port 318 nsew
+flabel metal2 s 559610 -800 559722 480 0 FreeSans 1400 90 0 0 la_data_out[122]
+port 319 nsew
+flabel metal2 s 563156 -800 563268 480 0 FreeSans 1400 90 0 0 la_data_out[123]
+port 320 nsew
+flabel metal2 s 566702 -800 566814 480 0 FreeSans 1400 90 0 0 la_data_out[124]
+port 321 nsew
+flabel metal2 s 570248 -800 570360 480 0 FreeSans 1400 90 0 0 la_data_out[125]
+port 322 nsew
+flabel metal2 s 573794 -800 573906 480 0 FreeSans 1400 90 0 0 la_data_out[126]
+port 323 nsew
+flabel metal2 s 577340 -800 577452 480 0 FreeSans 1400 90 0 0 la_data_out[127]
+port 324 nsew
+flabel metal2 s 169550 -800 169662 480 0 FreeSans 1400 90 0 0 la_data_out[12]
+port 325 nsew
+flabel metal2 s 173096 -800 173208 480 0 FreeSans 1400 90 0 0 la_data_out[13]
+port 326 nsew
+flabel metal2 s 176642 -800 176754 480 0 FreeSans 1400 90 0 0 la_data_out[14]
+port 327 nsew
+flabel metal2 s 180188 -800 180300 480 0 FreeSans 1400 90 0 0 la_data_out[15]
+port 328 nsew
+flabel metal2 s 183734 -800 183846 480 0 FreeSans 1400 90 0 0 la_data_out[16]
+port 329 nsew
+flabel metal2 s 187280 -800 187392 480 0 FreeSans 1400 90 0 0 la_data_out[17]
+port 330 nsew
+flabel metal2 s 190826 -800 190938 480 0 FreeSans 1400 90 0 0 la_data_out[18]
+port 331 nsew
+flabel metal2 s 194372 -800 194484 480 0 FreeSans 1400 90 0 0 la_data_out[19]
+port 332 nsew
+flabel metal2 s 130544 -800 130656 480 0 FreeSans 1400 90 0 0 la_data_out[1]
+port 333 nsew
+flabel metal2 s 197918 -800 198030 480 0 FreeSans 1400 90 0 0 la_data_out[20]
+port 334 nsew
+flabel metal2 s 201464 -800 201576 480 0 FreeSans 1400 90 0 0 la_data_out[21]
+port 335 nsew
+flabel metal2 s 205010 -800 205122 480 0 FreeSans 1400 90 0 0 la_data_out[22]
+port 336 nsew
+flabel metal2 s 208556 -800 208668 480 0 FreeSans 1400 90 0 0 la_data_out[23]
+port 337 nsew
+flabel metal2 s 212102 -800 212214 480 0 FreeSans 1400 90 0 0 la_data_out[24]
+port 338 nsew
+flabel metal2 s 215648 -800 215760 480 0 FreeSans 1400 90 0 0 la_data_out[25]
+port 339 nsew
+flabel metal2 s 219194 -800 219306 480 0 FreeSans 1400 90 0 0 la_data_out[26]
+port 340 nsew
+flabel metal2 s 222740 -800 222852 480 0 FreeSans 1400 90 0 0 la_data_out[27]
+port 341 nsew
+flabel metal2 s 226286 -800 226398 480 0 FreeSans 1400 90 0 0 la_data_out[28]
+port 342 nsew
+flabel metal2 s 229832 -800 229944 480 0 FreeSans 1400 90 0 0 la_data_out[29]
+port 343 nsew
+flabel metal2 s 134090 -800 134202 480 0 FreeSans 1400 90 0 0 la_data_out[2]
+port 344 nsew
+flabel metal2 s 233378 -800 233490 480 0 FreeSans 1400 90 0 0 la_data_out[30]
+port 345 nsew
+flabel metal2 s 236924 -800 237036 480 0 FreeSans 1400 90 0 0 la_data_out[31]
+port 346 nsew
+flabel metal2 s 240470 -800 240582 480 0 FreeSans 1400 90 0 0 la_data_out[32]
+port 347 nsew
+flabel metal2 s 244016 -800 244128 480 0 FreeSans 1400 90 0 0 la_data_out[33]
+port 348 nsew
+flabel metal2 s 247562 -800 247674 480 0 FreeSans 1400 90 0 0 la_data_out[34]
+port 349 nsew
+flabel metal2 s 251108 -800 251220 480 0 FreeSans 1400 90 0 0 la_data_out[35]
+port 350 nsew
+flabel metal2 s 254654 -800 254766 480 0 FreeSans 1400 90 0 0 la_data_out[36]
+port 351 nsew
+flabel metal2 s 258200 -800 258312 480 0 FreeSans 1400 90 0 0 la_data_out[37]
+port 352 nsew
+flabel metal2 s 261746 -800 261858 480 0 FreeSans 1400 90 0 0 la_data_out[38]
+port 353 nsew
+flabel metal2 s 265292 -800 265404 480 0 FreeSans 1400 90 0 0 la_data_out[39]
+port 354 nsew
+flabel metal2 s 137636 -800 137748 480 0 FreeSans 1400 90 0 0 la_data_out[3]
+port 355 nsew
+flabel metal2 s 268838 -800 268950 480 0 FreeSans 1400 90 0 0 la_data_out[40]
+port 356 nsew
+flabel metal2 s 272384 -800 272496 480 0 FreeSans 1400 90 0 0 la_data_out[41]
+port 357 nsew
+flabel metal2 s 275930 -800 276042 480 0 FreeSans 1400 90 0 0 la_data_out[42]
+port 358 nsew
+flabel metal2 s 279476 -800 279588 480 0 FreeSans 1400 90 0 0 la_data_out[43]
+port 359 nsew
+flabel metal2 s 283022 -800 283134 480 0 FreeSans 1400 90 0 0 la_data_out[44]
+port 360 nsew
+flabel metal2 s 286568 -800 286680 480 0 FreeSans 1400 90 0 0 la_data_out[45]
+port 361 nsew
+flabel metal2 s 290114 -800 290226 480 0 FreeSans 1400 90 0 0 la_data_out[46]
+port 362 nsew
+flabel metal2 s 293660 -800 293772 480 0 FreeSans 1400 90 0 0 la_data_out[47]
+port 363 nsew
+flabel metal2 s 297206 -800 297318 480 0 FreeSans 1400 90 0 0 la_data_out[48]
+port 364 nsew
+flabel metal2 s 300752 -800 300864 480 0 FreeSans 1400 90 0 0 la_data_out[49]
+port 365 nsew
+flabel metal2 s 141182 -800 141294 480 0 FreeSans 1400 90 0 0 la_data_out[4]
+port 366 nsew
+flabel metal2 s 304298 -800 304410 480 0 FreeSans 1400 90 0 0 la_data_out[50]
+port 367 nsew
+flabel metal2 s 307844 -800 307956 480 0 FreeSans 1400 90 0 0 la_data_out[51]
+port 368 nsew
+flabel metal2 s 311390 -800 311502 480 0 FreeSans 1400 90 0 0 la_data_out[52]
+port 369 nsew
+flabel metal2 s 314936 -800 315048 480 0 FreeSans 1400 90 0 0 la_data_out[53]
+port 370 nsew
+flabel metal2 s 318482 -800 318594 480 0 FreeSans 1400 90 0 0 la_data_out[54]
+port 371 nsew
+flabel metal2 s 322028 -800 322140 480 0 FreeSans 1400 90 0 0 la_data_out[55]
+port 372 nsew
+flabel metal2 s 325574 -800 325686 480 0 FreeSans 1400 90 0 0 la_data_out[56]
+port 373 nsew
+flabel metal2 s 329120 -800 329232 480 0 FreeSans 1400 90 0 0 la_data_out[57]
+port 374 nsew
+flabel metal2 s 332666 -800 332778 480 0 FreeSans 1400 90 0 0 la_data_out[58]
+port 375 nsew
+flabel metal2 s 336212 -800 336324 480 0 FreeSans 1400 90 0 0 la_data_out[59]
+port 376 nsew
+flabel metal2 s 144728 -800 144840 480 0 FreeSans 1400 90 0 0 la_data_out[5]
+port 377 nsew
+flabel metal2 s 339758 -800 339870 480 0 FreeSans 1400 90 0 0 la_data_out[60]
+port 378 nsew
+flabel metal2 s 343304 -800 343416 480 0 FreeSans 1400 90 0 0 la_data_out[61]
+port 379 nsew
+flabel metal2 s 346850 -800 346962 480 0 FreeSans 1400 90 0 0 la_data_out[62]
+port 380 nsew
+flabel metal2 s 350396 -800 350508 480 0 FreeSans 1400 90 0 0 la_data_out[63]
+port 381 nsew
+flabel metal2 s 353942 -800 354054 480 0 FreeSans 1400 90 0 0 la_data_out[64]
+port 382 nsew
+flabel metal2 s 357488 -800 357600 480 0 FreeSans 1400 90 0 0 la_data_out[65]
+port 383 nsew
+flabel metal2 s 361034 -800 361146 480 0 FreeSans 1400 90 0 0 la_data_out[66]
+port 384 nsew
+flabel metal2 s 364580 -800 364692 480 0 FreeSans 1400 90 0 0 la_data_out[67]
+port 385 nsew
+flabel metal2 s 368126 -800 368238 480 0 FreeSans 1400 90 0 0 la_data_out[68]
+port 386 nsew
+flabel metal2 s 371672 -800 371784 480 0 FreeSans 1400 90 0 0 la_data_out[69]
+port 387 nsew
+flabel metal2 s 148274 -800 148386 480 0 FreeSans 1400 90 0 0 la_data_out[6]
+port 388 nsew
+flabel metal2 s 375218 -800 375330 480 0 FreeSans 1400 90 0 0 la_data_out[70]
+port 389 nsew
+flabel metal2 s 378764 -800 378876 480 0 FreeSans 1400 90 0 0 la_data_out[71]
+port 390 nsew
+flabel metal2 s 382310 -800 382422 480 0 FreeSans 1400 90 0 0 la_data_out[72]
+port 391 nsew
+flabel metal2 s 385856 -800 385968 480 0 FreeSans 1400 90 0 0 la_data_out[73]
+port 392 nsew
+flabel metal2 s 389402 -800 389514 480 0 FreeSans 1400 90 0 0 la_data_out[74]
+port 393 nsew
+flabel metal2 s 392948 -800 393060 480 0 FreeSans 1400 90 0 0 la_data_out[75]
+port 394 nsew
+flabel metal2 s 396494 -800 396606 480 0 FreeSans 1400 90 0 0 la_data_out[76]
+port 395 nsew
+flabel metal2 s 400040 -800 400152 480 0 FreeSans 1400 90 0 0 la_data_out[77]
+port 396 nsew
+flabel metal2 s 403586 -800 403698 480 0 FreeSans 1400 90 0 0 la_data_out[78]
+port 397 nsew
+flabel metal2 s 407132 -800 407244 480 0 FreeSans 1400 90 0 0 la_data_out[79]
+port 398 nsew
+flabel metal2 s 151820 -800 151932 480 0 FreeSans 1400 90 0 0 la_data_out[7]
+port 399 nsew
+flabel metal2 s 410678 -800 410790 480 0 FreeSans 1400 90 0 0 la_data_out[80]
+port 400 nsew
+flabel metal2 s 414224 -800 414336 480 0 FreeSans 1400 90 0 0 la_data_out[81]
+port 401 nsew
+flabel metal2 s 417770 -800 417882 480 0 FreeSans 1400 90 0 0 la_data_out[82]
+port 402 nsew
+flabel metal2 s 421316 -800 421428 480 0 FreeSans 1400 90 0 0 la_data_out[83]
+port 403 nsew
+flabel metal2 s 424862 -800 424974 480 0 FreeSans 1400 90 0 0 la_data_out[84]
+port 404 nsew
+flabel metal2 s 428408 -800 428520 480 0 FreeSans 1400 90 0 0 la_data_out[85]
+port 405 nsew
+flabel metal2 s 431954 -800 432066 480 0 FreeSans 1400 90 0 0 la_data_out[86]
+port 406 nsew
+flabel metal2 s 435500 -800 435612 480 0 FreeSans 1400 90 0 0 la_data_out[87]
+port 407 nsew
+flabel metal2 s 439046 -800 439158 480 0 FreeSans 1400 90 0 0 la_data_out[88]
+port 408 nsew
+flabel metal2 s 442592 -800 442704 480 0 FreeSans 1400 90 0 0 la_data_out[89]
+port 409 nsew
+flabel metal2 s 155366 -800 155478 480 0 FreeSans 1400 90 0 0 la_data_out[8]
+port 410 nsew
+flabel metal2 s 446138 -800 446250 480 0 FreeSans 1400 90 0 0 la_data_out[90]
+port 411 nsew
+flabel metal2 s 449684 -800 449796 480 0 FreeSans 1400 90 0 0 la_data_out[91]
+port 412 nsew
+flabel metal2 s 453230 -800 453342 480 0 FreeSans 1400 90 0 0 la_data_out[92]
+port 413 nsew
+flabel metal2 s 456776 -800 456888 480 0 FreeSans 1400 90 0 0 la_data_out[93]
+port 414 nsew
+flabel metal2 s 460322 -800 460434 480 0 FreeSans 1400 90 0 0 la_data_out[94]
+port 415 nsew
+flabel metal2 s 463868 -800 463980 480 0 FreeSans 1400 90 0 0 la_data_out[95]
+port 416 nsew
+flabel metal2 s 467414 -800 467526 480 0 FreeSans 1400 90 0 0 la_data_out[96]
+port 417 nsew
+flabel metal2 s 470960 -800 471072 480 0 FreeSans 1400 90 0 0 la_data_out[97]
+port 418 nsew
+flabel metal2 s 474506 -800 474618 480 0 FreeSans 1400 90 0 0 la_data_out[98]
+port 419 nsew
+flabel metal2 s 478052 -800 478164 480 0 FreeSans 1400 90 0 0 la_data_out[99]
+port 420 nsew
+flabel metal2 s 158912 -800 159024 480 0 FreeSans 1400 90 0 0 la_data_out[9]
+port 421 nsew
+flabel metal2 s 128180 -800 128292 480 0 FreeSans 1400 90 0 0 la_oenb[0]
+port 422 nsew
+flabel metal2 s 482780 -800 482892 480 0 FreeSans 1400 90 0 0 la_oenb[100]
+port 423 nsew
+flabel metal2 s 486326 -800 486438 480 0 FreeSans 1400 90 0 0 la_oenb[101]
+port 424 nsew
+flabel metal2 s 489872 -800 489984 480 0 FreeSans 1400 90 0 0 la_oenb[102]
+port 425 nsew
+flabel metal2 s 493418 -800 493530 480 0 FreeSans 1400 90 0 0 la_oenb[103]
+port 426 nsew
+flabel metal2 s 496964 -800 497076 480 0 FreeSans 1400 90 0 0 la_oenb[104]
+port 427 nsew
+flabel metal2 s 500510 -800 500622 480 0 FreeSans 1400 90 0 0 la_oenb[105]
+port 428 nsew
+flabel metal2 s 504056 -800 504168 480 0 FreeSans 1400 90 0 0 la_oenb[106]
+port 429 nsew
+flabel metal2 s 507602 -800 507714 480 0 FreeSans 1400 90 0 0 la_oenb[107]
+port 430 nsew
+flabel metal2 s 511148 -800 511260 480 0 FreeSans 1400 90 0 0 la_oenb[108]
+port 431 nsew
+flabel metal2 s 514694 -800 514806 480 0 FreeSans 1400 90 0 0 la_oenb[109]
+port 432 nsew
+flabel metal2 s 163640 -800 163752 480 0 FreeSans 1400 90 0 0 la_oenb[10]
+port 433 nsew
+flabel metal2 s 518240 -800 518352 480 0 FreeSans 1400 90 0 0 la_oenb[110]
+port 434 nsew
+flabel metal2 s 521786 -800 521898 480 0 FreeSans 1400 90 0 0 la_oenb[111]
+port 435 nsew
+flabel metal2 s 525332 -800 525444 480 0 FreeSans 1400 90 0 0 la_oenb[112]
+port 436 nsew
+flabel metal2 s 528878 -800 528990 480 0 FreeSans 1400 90 0 0 la_oenb[113]
+port 437 nsew
+flabel metal2 s 532424 -800 532536 480 0 FreeSans 1400 90 0 0 la_oenb[114]
+port 438 nsew
+flabel metal2 s 535970 -800 536082 480 0 FreeSans 1400 90 0 0 la_oenb[115]
+port 439 nsew
+flabel metal2 s 539516 -800 539628 480 0 FreeSans 1400 90 0 0 la_oenb[116]
+port 440 nsew
+flabel metal2 s 543062 -800 543174 480 0 FreeSans 1400 90 0 0 la_oenb[117]
+port 441 nsew
+flabel metal2 s 546608 -800 546720 480 0 FreeSans 1400 90 0 0 la_oenb[118]
+port 442 nsew
+flabel metal2 s 550154 -800 550266 480 0 FreeSans 1400 90 0 0 la_oenb[119]
+port 443 nsew
+flabel metal2 s 167186 -800 167298 480 0 FreeSans 1400 90 0 0 la_oenb[11]
+port 444 nsew
+flabel metal2 s 553700 -800 553812 480 0 FreeSans 1400 90 0 0 la_oenb[120]
+port 445 nsew
+flabel metal2 s 557246 -800 557358 480 0 FreeSans 1400 90 0 0 la_oenb[121]
+port 446 nsew
+flabel metal2 s 560792 -800 560904 480 0 FreeSans 1400 90 0 0 la_oenb[122]
+port 447 nsew
+flabel metal2 s 564338 -800 564450 480 0 FreeSans 1400 90 0 0 la_oenb[123]
+port 448 nsew
+flabel metal2 s 567884 -800 567996 480 0 FreeSans 1400 90 0 0 la_oenb[124]
+port 449 nsew
+flabel metal2 s 571430 -800 571542 480 0 FreeSans 1400 90 0 0 la_oenb[125]
+port 450 nsew
+flabel metal2 s 574976 -800 575088 480 0 FreeSans 1400 90 0 0 la_oenb[126]
+port 451 nsew
+flabel metal2 s 578522 -800 578634 480 0 FreeSans 1400 90 0 0 la_oenb[127]
+port 452 nsew
+flabel metal2 s 170732 -800 170844 480 0 FreeSans 1400 90 0 0 la_oenb[12]
+port 453 nsew
+flabel metal2 s 174278 -800 174390 480 0 FreeSans 1400 90 0 0 la_oenb[13]
+port 454 nsew
+flabel metal2 s 177824 -800 177936 480 0 FreeSans 1400 90 0 0 la_oenb[14]
+port 455 nsew
+flabel metal2 s 181370 -800 181482 480 0 FreeSans 1400 90 0 0 la_oenb[15]
+port 456 nsew
+flabel metal2 s 184916 -800 185028 480 0 FreeSans 1400 90 0 0 la_oenb[16]
+port 457 nsew
+flabel metal2 s 188462 -800 188574 480 0 FreeSans 1400 90 0 0 la_oenb[17]
+port 458 nsew
+flabel metal2 s 192008 -800 192120 480 0 FreeSans 1400 90 0 0 la_oenb[18]
+port 459 nsew
+flabel metal2 s 195554 -800 195666 480 0 FreeSans 1400 90 0 0 la_oenb[19]
+port 460 nsew
+flabel metal2 s 131726 -800 131838 480 0 FreeSans 1400 90 0 0 la_oenb[1]
+port 461 nsew
+flabel metal2 s 199100 -800 199212 480 0 FreeSans 1400 90 0 0 la_oenb[20]
+port 462 nsew
+flabel metal2 s 202646 -800 202758 480 0 FreeSans 1400 90 0 0 la_oenb[21]
+port 463 nsew
+flabel metal2 s 206192 -800 206304 480 0 FreeSans 1400 90 0 0 la_oenb[22]
+port 464 nsew
+flabel metal2 s 209738 -800 209850 480 0 FreeSans 1400 90 0 0 la_oenb[23]
+port 465 nsew
+flabel metal2 s 213284 -800 213396 480 0 FreeSans 1400 90 0 0 la_oenb[24]
+port 466 nsew
+flabel metal2 s 216830 -800 216942 480 0 FreeSans 1400 90 0 0 la_oenb[25]
+port 467 nsew
+flabel metal2 s 220376 -800 220488 480 0 FreeSans 1400 90 0 0 la_oenb[26]
+port 468 nsew
+flabel metal2 s 223922 -800 224034 480 0 FreeSans 1400 90 0 0 la_oenb[27]
+port 469 nsew
+flabel metal2 s 227468 -800 227580 480 0 FreeSans 1400 90 0 0 la_oenb[28]
+port 470 nsew
+flabel metal2 s 231014 -800 231126 480 0 FreeSans 1400 90 0 0 la_oenb[29]
+port 471 nsew
+flabel metal2 s 135272 -800 135384 480 0 FreeSans 1400 90 0 0 la_oenb[2]
+port 472 nsew
+flabel metal2 s 234560 -800 234672 480 0 FreeSans 1400 90 0 0 la_oenb[30]
+port 473 nsew
+flabel metal2 s 238106 -800 238218 480 0 FreeSans 1400 90 0 0 la_oenb[31]
+port 474 nsew
+flabel metal2 s 241652 -800 241764 480 0 FreeSans 1400 90 0 0 la_oenb[32]
+port 475 nsew
+flabel metal2 s 245198 -800 245310 480 0 FreeSans 1400 90 0 0 la_oenb[33]
+port 476 nsew
+flabel metal2 s 248744 -800 248856 480 0 FreeSans 1400 90 0 0 la_oenb[34]
+port 477 nsew
+flabel metal2 s 252290 -800 252402 480 0 FreeSans 1400 90 0 0 la_oenb[35]
+port 478 nsew
+flabel metal2 s 255836 -800 255948 480 0 FreeSans 1400 90 0 0 la_oenb[36]
+port 479 nsew
+flabel metal2 s 259382 -800 259494 480 0 FreeSans 1400 90 0 0 la_oenb[37]
+port 480 nsew
+flabel metal2 s 262928 -800 263040 480 0 FreeSans 1400 90 0 0 la_oenb[38]
+port 481 nsew
+flabel metal2 s 266474 -800 266586 480 0 FreeSans 1400 90 0 0 la_oenb[39]
+port 482 nsew
+flabel metal2 s 138818 -800 138930 480 0 FreeSans 1400 90 0 0 la_oenb[3]
+port 483 nsew
+flabel metal2 s 270020 -800 270132 480 0 FreeSans 1400 90 0 0 la_oenb[40]
+port 484 nsew
+flabel metal2 s 273566 -800 273678 480 0 FreeSans 1400 90 0 0 la_oenb[41]
+port 485 nsew
+flabel metal2 s 277112 -800 277224 480 0 FreeSans 1400 90 0 0 la_oenb[42]
+port 486 nsew
+flabel metal2 s 280658 -800 280770 480 0 FreeSans 1400 90 0 0 la_oenb[43]
+port 487 nsew
+flabel metal2 s 284204 -800 284316 480 0 FreeSans 1400 90 0 0 la_oenb[44]
+port 488 nsew
+flabel metal2 s 287750 -800 287862 480 0 FreeSans 1400 90 0 0 la_oenb[45]
+port 489 nsew
+flabel metal2 s 291296 -800 291408 480 0 FreeSans 1400 90 0 0 la_oenb[46]
+port 490 nsew
+flabel metal2 s 294842 -800 294954 480 0 FreeSans 1400 90 0 0 la_oenb[47]
+port 491 nsew
+flabel metal2 s 298388 -800 298500 480 0 FreeSans 1400 90 0 0 la_oenb[48]
+port 492 nsew
+flabel metal2 s 301934 -800 302046 480 0 FreeSans 1400 90 0 0 la_oenb[49]
+port 493 nsew
+flabel metal2 s 142364 -800 142476 480 0 FreeSans 1400 90 0 0 la_oenb[4]
+port 494 nsew
+flabel metal2 s 305480 -800 305592 480 0 FreeSans 1400 90 0 0 la_oenb[50]
+port 495 nsew
+flabel metal2 s 309026 -800 309138 480 0 FreeSans 1400 90 0 0 la_oenb[51]
+port 496 nsew
+flabel metal2 s 312572 -800 312684 480 0 FreeSans 1400 90 0 0 la_oenb[52]
+port 497 nsew
+flabel metal2 s 316118 -800 316230 480 0 FreeSans 1400 90 0 0 la_oenb[53]
+port 498 nsew
+flabel metal2 s 319664 -800 319776 480 0 FreeSans 1400 90 0 0 la_oenb[54]
+port 499 nsew
+flabel metal2 s 323210 -800 323322 480 0 FreeSans 1400 90 0 0 la_oenb[55]
+port 500 nsew
+flabel metal2 s 326756 -800 326868 480 0 FreeSans 1400 90 0 0 la_oenb[56]
+port 501 nsew
+flabel metal2 s 330302 -800 330414 480 0 FreeSans 1400 90 0 0 la_oenb[57]
+port 502 nsew
+flabel metal2 s 333848 -800 333960 480 0 FreeSans 1400 90 0 0 la_oenb[58]
+port 503 nsew
+flabel metal2 s 337394 -800 337506 480 0 FreeSans 1400 90 0 0 la_oenb[59]
+port 504 nsew
+flabel metal2 s 145910 -800 146022 480 0 FreeSans 1400 90 0 0 la_oenb[5]
+port 505 nsew
+flabel metal2 s 340940 -800 341052 480 0 FreeSans 1400 90 0 0 la_oenb[60]
+port 506 nsew
+flabel metal2 s 344486 -800 344598 480 0 FreeSans 1400 90 0 0 la_oenb[61]
+port 507 nsew
+flabel metal2 s 348032 -800 348144 480 0 FreeSans 1400 90 0 0 la_oenb[62]
+port 508 nsew
+flabel metal2 s 351578 -800 351690 480 0 FreeSans 1400 90 0 0 la_oenb[63]
+port 509 nsew
+flabel metal2 s 355124 -800 355236 480 0 FreeSans 1400 90 0 0 la_oenb[64]
+port 510 nsew
+flabel metal2 s 358670 -800 358782 480 0 FreeSans 1400 90 0 0 la_oenb[65]
+port 511 nsew
+flabel metal2 s 362216 -800 362328 480 0 FreeSans 1400 90 0 0 la_oenb[66]
+port 512 nsew
+flabel metal2 s 365762 -800 365874 480 0 FreeSans 1400 90 0 0 la_oenb[67]
+port 513 nsew
+flabel metal2 s 369308 -800 369420 480 0 FreeSans 1400 90 0 0 la_oenb[68]
+port 514 nsew
+flabel metal2 s 372854 -800 372966 480 0 FreeSans 1400 90 0 0 la_oenb[69]
+port 515 nsew
+flabel metal2 s 149456 -800 149568 480 0 FreeSans 1400 90 0 0 la_oenb[6]
+port 516 nsew
+flabel metal2 s 376400 -800 376512 480 0 FreeSans 1400 90 0 0 la_oenb[70]
+port 517 nsew
+flabel metal2 s 379946 -800 380058 480 0 FreeSans 1400 90 0 0 la_oenb[71]
+port 518 nsew
+flabel metal2 s 383492 -800 383604 480 0 FreeSans 1400 90 0 0 la_oenb[72]
+port 519 nsew
+flabel metal2 s 387038 -800 387150 480 0 FreeSans 1400 90 0 0 la_oenb[73]
+port 520 nsew
+flabel metal2 s 390584 -800 390696 480 0 FreeSans 1400 90 0 0 la_oenb[74]
+port 521 nsew
+flabel metal2 s 394130 -800 394242 480 0 FreeSans 1400 90 0 0 la_oenb[75]
+port 522 nsew
+flabel metal2 s 397676 -800 397788 480 0 FreeSans 1400 90 0 0 la_oenb[76]
+port 523 nsew
+flabel metal2 s 401222 -800 401334 480 0 FreeSans 1400 90 0 0 la_oenb[77]
+port 524 nsew
+flabel metal2 s 404768 -800 404880 480 0 FreeSans 1400 90 0 0 la_oenb[78]
+port 525 nsew
+flabel metal2 s 408314 -800 408426 480 0 FreeSans 1400 90 0 0 la_oenb[79]
+port 526 nsew
+flabel metal2 s 153002 -800 153114 480 0 FreeSans 1400 90 0 0 la_oenb[7]
+port 527 nsew
+flabel metal2 s 411860 -800 411972 480 0 FreeSans 1400 90 0 0 la_oenb[80]
+port 528 nsew
+flabel metal2 s 415406 -800 415518 480 0 FreeSans 1400 90 0 0 la_oenb[81]
+port 529 nsew
+flabel metal2 s 418952 -800 419064 480 0 FreeSans 1400 90 0 0 la_oenb[82]
+port 530 nsew
+flabel metal2 s 422498 -800 422610 480 0 FreeSans 1400 90 0 0 la_oenb[83]
+port 531 nsew
+flabel metal2 s 426044 -800 426156 480 0 FreeSans 1400 90 0 0 la_oenb[84]
+port 532 nsew
+flabel metal2 s 429590 -800 429702 480 0 FreeSans 1400 90 0 0 la_oenb[85]
+port 533 nsew
+flabel metal2 s 433136 -800 433248 480 0 FreeSans 1400 90 0 0 la_oenb[86]
+port 534 nsew
+flabel metal2 s 436682 -800 436794 480 0 FreeSans 1400 90 0 0 la_oenb[87]
+port 535 nsew
+flabel metal2 s 440228 -800 440340 480 0 FreeSans 1400 90 0 0 la_oenb[88]
+port 536 nsew
+flabel metal2 s 443774 -800 443886 480 0 FreeSans 1400 90 0 0 la_oenb[89]
+port 537 nsew
+flabel metal2 s 156548 -800 156660 480 0 FreeSans 1400 90 0 0 la_oenb[8]
+port 538 nsew
+flabel metal2 s 447320 -800 447432 480 0 FreeSans 1400 90 0 0 la_oenb[90]
+port 539 nsew
+flabel metal2 s 450866 -800 450978 480 0 FreeSans 1400 90 0 0 la_oenb[91]
+port 540 nsew
+flabel metal2 s 454412 -800 454524 480 0 FreeSans 1400 90 0 0 la_oenb[92]
+port 541 nsew
+flabel metal2 s 457958 -800 458070 480 0 FreeSans 1400 90 0 0 la_oenb[93]
+port 542 nsew
+flabel metal2 s 461504 -800 461616 480 0 FreeSans 1400 90 0 0 la_oenb[94]
+port 543 nsew
+flabel metal2 s 465050 -800 465162 480 0 FreeSans 1400 90 0 0 la_oenb[95]
+port 544 nsew
+flabel metal2 s 468596 -800 468708 480 0 FreeSans 1400 90 0 0 la_oenb[96]
+port 545 nsew
+flabel metal2 s 472142 -800 472254 480 0 FreeSans 1400 90 0 0 la_oenb[97]
+port 546 nsew
+flabel metal2 s 475688 -800 475800 480 0 FreeSans 1400 90 0 0 la_oenb[98]
+port 547 nsew
+flabel metal2 s 479234 -800 479346 480 0 FreeSans 1400 90 0 0 la_oenb[99]
+port 548 nsew
+flabel metal2 s 160094 -800 160206 480 0 FreeSans 1400 90 0 0 la_oenb[9]
+port 549 nsew
+flabel metal2 s 579704 -800 579816 480 0 FreeSans 1400 90 0 0 user_clock2
+port 550 nsew
+flabel metal2 s 580886 -800 580998 480 0 FreeSans 1400 90 0 0 user_irq[0]
+port 551 nsew
+flabel metal2 s 582068 -800 582180 480 0 FreeSans 1400 90 0 0 user_irq[1]
+port 552 nsew
+flabel metal2 s 583250 -800 583362 480 0 FreeSans 1400 90 0 0 user_irq[2]
+port 553 nsew
+flabel metal3 s 582340 639784 584800 644584 0 FreeSans 1400 0 0 0 vccd1
+port 554 nsew
+flabel metal3 s 582340 629784 584800 634584 0 FreeSans 1400 0 0 0 vccd1
+port 554 nsew
+flabel metal3 s 0 643842 1660 648642 0 FreeSans 1400 0 0 0 vccd2
+port 555 nsew
+flabel metal3 s 0 633842 1660 638642 0 FreeSans 1400 0 0 0 vccd2
+port 555 nsew
+flabel metal3 s 582340 540562 584800 545362 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 550562 584800 555362 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 235230 584800 240030 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 225230 584800 230030 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 0 204888 1660 209688 0 FreeSans 1400 0 0 0 vdda2
+port 557 nsew
+flabel metal3 s 0 214888 1660 219688 0 FreeSans 1400 0 0 0 vdda2
+port 557 nsew
+flabel metal3 s 520594 702340 525394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 558 nsew
+flabel metal3 s 510594 702340 515394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 558 nsew
+flabel metal3 s 582340 146830 584800 151630 0 FreeSans 1400 0 0 0 vssa1
+port 558 nsew
+flabel metal3 s 582340 136830 584800 141630 0 FreeSans 1400 0 0 0 vssa1
+port 558 nsew
+flabel metal3 s 0 559442 1660 564242 0 FreeSans 1400 0 0 0 vssa2
+port 559 nsew
+flabel metal3 s 0 549442 1660 554242 0 FreeSans 1400 0 0 0 vssa2
+port 559 nsew
+flabel metal3 s 582340 191430 584800 196230 0 FreeSans 1400 0 0 0 vssd1
+port 560 nsew
+flabel metal3 s 582340 181430 584800 186230 0 FreeSans 1400 0 0 0 vssd1
+port 560 nsew
+flabel metal3 s 0 172888 1660 177688 0 FreeSans 1400 0 0 0 vssd2
+port 561 nsew
+flabel metal3 s 0 162888 1660 167688 0 FreeSans 1400 0 0 0 vssd2
+port 561 nsew
+flabel metal2 s 524 -800 636 480 0 FreeSans 1400 90 0 0 wb_clk_i
+port 562 nsew
+flabel metal2 s 1706 -800 1818 480 0 FreeSans 1400 90 0 0 wb_rst_i
+port 563 nsew
+flabel metal2 s 2888 -800 3000 480 0 FreeSans 1400 90 0 0 wbs_ack_o
+port 564 nsew
+flabel metal2 s 7616 -800 7728 480 0 FreeSans 1400 90 0 0 wbs_adr_i[0]
+port 565 nsew
+flabel metal2 s 47804 -800 47916 480 0 FreeSans 1400 90 0 0 wbs_adr_i[10]
+port 566 nsew
+flabel metal2 s 51350 -800 51462 480 0 FreeSans 1400 90 0 0 wbs_adr_i[11]
+port 567 nsew
+flabel metal2 s 54896 -800 55008 480 0 FreeSans 1400 90 0 0 wbs_adr_i[12]
+port 568 nsew
+flabel metal2 s 58442 -800 58554 480 0 FreeSans 1400 90 0 0 wbs_adr_i[13]
+port 569 nsew
+flabel metal2 s 61988 -800 62100 480 0 FreeSans 1400 90 0 0 wbs_adr_i[14]
+port 570 nsew
+flabel metal2 s 65534 -800 65646 480 0 FreeSans 1400 90 0 0 wbs_adr_i[15]
+port 571 nsew
+flabel metal2 s 69080 -800 69192 480 0 FreeSans 1400 90 0 0 wbs_adr_i[16]
+port 572 nsew
+flabel metal2 s 72626 -800 72738 480 0 FreeSans 1400 90 0 0 wbs_adr_i[17]
+port 573 nsew
+flabel metal2 s 76172 -800 76284 480 0 FreeSans 1400 90 0 0 wbs_adr_i[18]
+port 574 nsew
+flabel metal2 s 79718 -800 79830 480 0 FreeSans 1400 90 0 0 wbs_adr_i[19]
+port 575 nsew
+flabel metal2 s 12344 -800 12456 480 0 FreeSans 1400 90 0 0 wbs_adr_i[1]
+port 576 nsew
+flabel metal2 s 83264 -800 83376 480 0 FreeSans 1400 90 0 0 wbs_adr_i[20]
+port 577 nsew
+flabel metal2 s 86810 -800 86922 480 0 FreeSans 1400 90 0 0 wbs_adr_i[21]
+port 578 nsew
+flabel metal2 s 90356 -800 90468 480 0 FreeSans 1400 90 0 0 wbs_adr_i[22]
+port 579 nsew
+flabel metal2 s 93902 -800 94014 480 0 FreeSans 1400 90 0 0 wbs_adr_i[23]
+port 580 nsew
+flabel metal2 s 97448 -800 97560 480 0 FreeSans 1400 90 0 0 wbs_adr_i[24]
+port 581 nsew
+flabel metal2 s 100994 -800 101106 480 0 FreeSans 1400 90 0 0 wbs_adr_i[25]
+port 582 nsew
+flabel metal2 s 104540 -800 104652 480 0 FreeSans 1400 90 0 0 wbs_adr_i[26]
+port 583 nsew
+flabel metal2 s 108086 -800 108198 480 0 FreeSans 1400 90 0 0 wbs_adr_i[27]
+port 584 nsew
+flabel metal2 s 111632 -800 111744 480 0 FreeSans 1400 90 0 0 wbs_adr_i[28]
+port 585 nsew
+flabel metal2 s 115178 -800 115290 480 0 FreeSans 1400 90 0 0 wbs_adr_i[29]
+port 586 nsew
+flabel metal2 s 17072 -800 17184 480 0 FreeSans 1400 90 0 0 wbs_adr_i[2]
+port 587 nsew
+flabel metal2 s 118724 -800 118836 480 0 FreeSans 1400 90 0 0 wbs_adr_i[30]
+port 588 nsew
+flabel metal2 s 122270 -800 122382 480 0 FreeSans 1400 90 0 0 wbs_adr_i[31]
+port 589 nsew
+flabel metal2 s 21800 -800 21912 480 0 FreeSans 1400 90 0 0 wbs_adr_i[3]
+port 590 nsew
+flabel metal2 s 26528 -800 26640 480 0 FreeSans 1400 90 0 0 wbs_adr_i[4]
+port 591 nsew
+flabel metal2 s 30074 -800 30186 480 0 FreeSans 1400 90 0 0 wbs_adr_i[5]
+port 592 nsew
+flabel metal2 s 33620 -800 33732 480 0 FreeSans 1400 90 0 0 wbs_adr_i[6]
+port 593 nsew
+flabel metal2 s 37166 -800 37278 480 0 FreeSans 1400 90 0 0 wbs_adr_i[7]
+port 594 nsew
+flabel metal2 s 40712 -800 40824 480 0 FreeSans 1400 90 0 0 wbs_adr_i[8]
+port 595 nsew
+flabel metal2 s 44258 -800 44370 480 0 FreeSans 1400 90 0 0 wbs_adr_i[9]
+port 596 nsew
+flabel metal2 s 4070 -800 4182 480 0 FreeSans 1400 90 0 0 wbs_cyc_i
+port 597 nsew
+flabel metal2 s 8798 -800 8910 480 0 FreeSans 1400 90 0 0 wbs_dat_i[0]
+port 598 nsew
+flabel metal2 s 48986 -800 49098 480 0 FreeSans 1400 90 0 0 wbs_dat_i[10]
+port 599 nsew
+flabel metal2 s 52532 -800 52644 480 0 FreeSans 1400 90 0 0 wbs_dat_i[11]
+port 600 nsew
+flabel metal2 s 56078 -800 56190 480 0 FreeSans 1400 90 0 0 wbs_dat_i[12]
+port 601 nsew
+flabel metal2 s 59624 -800 59736 480 0 FreeSans 1400 90 0 0 wbs_dat_i[13]
+port 602 nsew
+flabel metal2 s 63170 -800 63282 480 0 FreeSans 1400 90 0 0 wbs_dat_i[14]
+port 603 nsew
+flabel metal2 s 66716 -800 66828 480 0 FreeSans 1400 90 0 0 wbs_dat_i[15]
+port 604 nsew
+flabel metal2 s 70262 -800 70374 480 0 FreeSans 1400 90 0 0 wbs_dat_i[16]
+port 605 nsew
+flabel metal2 s 73808 -800 73920 480 0 FreeSans 1400 90 0 0 wbs_dat_i[17]
+port 606 nsew
+flabel metal2 s 77354 -800 77466 480 0 FreeSans 1400 90 0 0 wbs_dat_i[18]
+port 607 nsew
+flabel metal2 s 80900 -800 81012 480 0 FreeSans 1400 90 0 0 wbs_dat_i[19]
+port 608 nsew
+flabel metal2 s 13526 -800 13638 480 0 FreeSans 1400 90 0 0 wbs_dat_i[1]
+port 609 nsew
+flabel metal2 s 84446 -800 84558 480 0 FreeSans 1400 90 0 0 wbs_dat_i[20]
+port 610 nsew
+flabel metal2 s 87992 -800 88104 480 0 FreeSans 1400 90 0 0 wbs_dat_i[21]
+port 611 nsew
+flabel metal2 s 91538 -800 91650 480 0 FreeSans 1400 90 0 0 wbs_dat_i[22]
+port 612 nsew
+flabel metal2 s 95084 -800 95196 480 0 FreeSans 1400 90 0 0 wbs_dat_i[23]
+port 613 nsew
+flabel metal2 s 98630 -800 98742 480 0 FreeSans 1400 90 0 0 wbs_dat_i[24]
+port 614 nsew
+flabel metal2 s 102176 -800 102288 480 0 FreeSans 1400 90 0 0 wbs_dat_i[25]
+port 615 nsew
+flabel metal2 s 105722 -800 105834 480 0 FreeSans 1400 90 0 0 wbs_dat_i[26]
+port 616 nsew
+flabel metal2 s 109268 -800 109380 480 0 FreeSans 1400 90 0 0 wbs_dat_i[27]
+port 617 nsew
+flabel metal2 s 112814 -800 112926 480 0 FreeSans 1400 90 0 0 wbs_dat_i[28]
+port 618 nsew
+flabel metal2 s 116360 -800 116472 480 0 FreeSans 1400 90 0 0 wbs_dat_i[29]
+port 619 nsew
+flabel metal2 s 18254 -800 18366 480 0 FreeSans 1400 90 0 0 wbs_dat_i[2]
+port 620 nsew
+flabel metal2 s 119906 -800 120018 480 0 FreeSans 1400 90 0 0 wbs_dat_i[30]
+port 621 nsew
+flabel metal2 s 123452 -800 123564 480 0 FreeSans 1400 90 0 0 wbs_dat_i[31]
+port 622 nsew
+flabel metal2 s 22982 -800 23094 480 0 FreeSans 1400 90 0 0 wbs_dat_i[3]
+port 623 nsew
+flabel metal2 s 27710 -800 27822 480 0 FreeSans 1400 90 0 0 wbs_dat_i[4]
+port 624 nsew
+flabel metal2 s 31256 -800 31368 480 0 FreeSans 1400 90 0 0 wbs_dat_i[5]
+port 625 nsew
+flabel metal2 s 34802 -800 34914 480 0 FreeSans 1400 90 0 0 wbs_dat_i[6]
+port 626 nsew
+flabel metal2 s 38348 -800 38460 480 0 FreeSans 1400 90 0 0 wbs_dat_i[7]
+port 627 nsew
+flabel metal2 s 41894 -800 42006 480 0 FreeSans 1400 90 0 0 wbs_dat_i[8]
+port 628 nsew
+flabel metal2 s 45440 -800 45552 480 0 FreeSans 1400 90 0 0 wbs_dat_i[9]
+port 629 nsew
+flabel metal2 s 9980 -800 10092 480 0 FreeSans 1400 90 0 0 wbs_dat_o[0]
+port 630 nsew
+flabel metal2 s 50168 -800 50280 480 0 FreeSans 1400 90 0 0 wbs_dat_o[10]
+port 631 nsew
+flabel metal2 s 53714 -800 53826 480 0 FreeSans 1400 90 0 0 wbs_dat_o[11]
+port 632 nsew
+flabel metal2 s 57260 -800 57372 480 0 FreeSans 1400 90 0 0 wbs_dat_o[12]
+port 633 nsew
+flabel metal2 s 60806 -800 60918 480 0 FreeSans 1400 90 0 0 wbs_dat_o[13]
+port 634 nsew
+flabel metal2 s 64352 -800 64464 480 0 FreeSans 1400 90 0 0 wbs_dat_o[14]
+port 635 nsew
+flabel metal2 s 67898 -800 68010 480 0 FreeSans 1400 90 0 0 wbs_dat_o[15]
+port 636 nsew
+flabel metal2 s 71444 -800 71556 480 0 FreeSans 1400 90 0 0 wbs_dat_o[16]
+port 637 nsew
+flabel metal2 s 74990 -800 75102 480 0 FreeSans 1400 90 0 0 wbs_dat_o[17]
+port 638 nsew
+flabel metal2 s 78536 -800 78648 480 0 FreeSans 1400 90 0 0 wbs_dat_o[18]
+port 639 nsew
+flabel metal2 s 82082 -800 82194 480 0 FreeSans 1400 90 0 0 wbs_dat_o[19]
+port 640 nsew
+flabel metal2 s 14708 -800 14820 480 0 FreeSans 1400 90 0 0 wbs_dat_o[1]
+port 641 nsew
+flabel metal2 s 85628 -800 85740 480 0 FreeSans 1400 90 0 0 wbs_dat_o[20]
+port 642 nsew
+flabel metal2 s 89174 -800 89286 480 0 FreeSans 1400 90 0 0 wbs_dat_o[21]
+port 643 nsew
+flabel metal2 s 92720 -800 92832 480 0 FreeSans 1400 90 0 0 wbs_dat_o[22]
+port 644 nsew
+flabel metal2 s 96266 -800 96378 480 0 FreeSans 1400 90 0 0 wbs_dat_o[23]
+port 645 nsew
+flabel metal2 s 99812 -800 99924 480 0 FreeSans 1400 90 0 0 wbs_dat_o[24]
+port 646 nsew
+flabel metal2 s 103358 -800 103470 480 0 FreeSans 1400 90 0 0 wbs_dat_o[25]
+port 647 nsew
+flabel metal2 s 106904 -800 107016 480 0 FreeSans 1400 90 0 0 wbs_dat_o[26]
+port 648 nsew
+flabel metal2 s 110450 -800 110562 480 0 FreeSans 1400 90 0 0 wbs_dat_o[27]
+port 649 nsew
+flabel metal2 s 113996 -800 114108 480 0 FreeSans 1400 90 0 0 wbs_dat_o[28]
+port 650 nsew
+flabel metal2 s 117542 -800 117654 480 0 FreeSans 1400 90 0 0 wbs_dat_o[29]
+port 651 nsew
+flabel metal2 s 19436 -800 19548 480 0 FreeSans 1400 90 0 0 wbs_dat_o[2]
+port 652 nsew
+flabel metal2 s 121088 -800 121200 480 0 FreeSans 1400 90 0 0 wbs_dat_o[30]
+port 653 nsew
+flabel metal2 s 124634 -800 124746 480 0 FreeSans 1400 90 0 0 wbs_dat_o[31]
+port 654 nsew
+flabel metal2 s 24164 -800 24276 480 0 FreeSans 1400 90 0 0 wbs_dat_o[3]
+port 655 nsew
+flabel metal2 s 28892 -800 29004 480 0 FreeSans 1400 90 0 0 wbs_dat_o[4]
+port 656 nsew
+flabel metal2 s 32438 -800 32550 480 0 FreeSans 1400 90 0 0 wbs_dat_o[5]
+port 657 nsew
+flabel metal2 s 35984 -800 36096 480 0 FreeSans 1400 90 0 0 wbs_dat_o[6]
+port 658 nsew
+flabel metal2 s 39530 -800 39642 480 0 FreeSans 1400 90 0 0 wbs_dat_o[7]
+port 659 nsew
+flabel metal2 s 43076 -800 43188 480 0 FreeSans 1400 90 0 0 wbs_dat_o[8]
+port 660 nsew
+flabel metal2 s 46622 -800 46734 480 0 FreeSans 1400 90 0 0 wbs_dat_o[9]
+port 661 nsew
+flabel metal2 s 11162 -800 11274 480 0 FreeSans 1400 90 0 0 wbs_sel_i[0]
+port 662 nsew
+flabel metal2 s 15890 -800 16002 480 0 FreeSans 1400 90 0 0 wbs_sel_i[1]
+port 663 nsew
+flabel metal2 s 20618 -800 20730 480 0 FreeSans 1400 90 0 0 wbs_sel_i[2]
+port 664 nsew
+flabel metal2 s 25346 -800 25458 480 0 FreeSans 1400 90 0 0 wbs_sel_i[3]
+port 665 nsew
+flabel metal2 s 5252 -800 5364 480 0 FreeSans 1400 90 0 0 wbs_stb_i
+port 666 nsew
+flabel metal2 s 6434 -800 6546 480 0 FreeSans 1400 90 0 0 wbs_we_i
+port 667 nsew
+<< properties >>
+string FIXED_BBOX 0 0 584000 704000
+<< end >>
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.xor.gds b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.xor.gds
new file mode 100644
index 0000000..2c9ff32
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper.xor.gds
Binary files differ
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_empty_erased.gds b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..77e3f54
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_erased.gds b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_erased.gds
new file mode 100644
index 0000000..4208934
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_erased.gds
Binary files differ
diff --git a/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_no_zero_areas.gds b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_no_zero_areas.gds
new file mode 100644
index 0000000..06a1df8
--- /dev/null
+++ b/precheck_results/22_FEB_2022___17_55_09/outputs/user_analog_project_wrapper_no_zero_areas.gds
Binary files differ
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/gds.info b/precheck_results/24_FEB_2022___19_05_28/logs/gds.info
new file mode 100644
index 0000000..7722beb
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/gds.info
@@ -0,0 +1 @@
+user_analog_project_wrapper.gds: c3bbd321d8e134e18ebb015ae4cd1d8fad84e162
\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_beol_check.log b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_beol_check.log
new file mode 100644
index 0000000..be9cdfc
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_beol_check.log
@@ -0,0 +1,992 @@
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:38: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:42: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:107
+ Polygons (raw): 42 (flat) 16 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:108
+ Polygons (raw): 121 (flat) 47 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:109
+ Polygons (raw): 30 (flat) 11 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:110
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:111
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:112
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:113
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:114
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:115
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:116
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:117
+ Polygons (raw): 43 (flat) 18 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:118
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:119
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:120
+ Polygons (raw): 182 (flat) 82 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:121
+ Polygons (raw): 20 (flat) 9 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:122
+ Polygons (raw): 104 (flat) 37 (hierarchical)
+ Elapsed: 0.000s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:123
+ Polygons (raw): 125 (flat) 58 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:124
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:125
+ Polygons (raw): 2 (flat) 1 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:126
+ Polygons (raw): 184 (flat) 85 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:127
+ Polygons (raw): 7556 (flat) 5572 (hierarchical)
+ Elapsed: 0.020s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:129
+ Polygons (raw): 655 (flat) 283 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:130
+ Polygons (raw): 3040 (flat) 1469 (hierarchical)
+ Elapsed: 0.010s Memory: 523.00M
+"polygons" in: sky130A_mr.drc:132
+ Polygons (raw): 527 (flat) 245 (hierarchical)
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new file mode 100644
index 0000000..1e9e608
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_feol_check.log
@@ -0,0 +1,780 @@
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:36: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:44: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:107
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+"polygons" in: sky130A_mr.drc:109
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+DRC section
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_feol_check.xml ..
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diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_feol_check.total b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_feol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_feol_check.total
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diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_met_min_ca_density_check.log b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_met_min_ca_density_check.log
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index 0000000..ce2d68e
--- /dev/null
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+"area" in: met_min_ca_density.lydrc:109
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+m5_ca_density is 0.9993486224777203
+Writing report database: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_met_min_ca_density_check.xml ..
+Total elapsed: 0.280s Memory: 523.00M
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_met_min_ca_density_check.total b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
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\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_offgrid_check.log b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_offgrid_check.log
new file mode 100644
index 0000000..4ba10c2
--- /dev/null
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+Writing report database: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 2.730s Memory: 540.00M
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_offgrid_check.total b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..f4aa138
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper, output to /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+ deep:true tiled:false threads:4
+--- #err|description, table for cell: user_analog_project_wrapper
+NO-Check ---- pwell:64/44/EMP 122/16/EMP 64/59/EMP 44/16/EMP 44/5/EMP
+ ---- nwell:64/20/dat 64/16/EMP 64/5/EMP
+ ---- diff:65/20/dat 65/16/EMP 65/6/EMP
+ ---- tap:65/44/dat 65/48/EMP 65/5/EMP
+ ---- poly:66/20/dat 66/16/EMP 66/5/EMP
+ ---- licon1:66/44/dat 66/58/EMP
+ ---- li1:67/20/dat 67/16/dat 67/5/EMP
+ ---- mcon:67/44/dat 67/48/EMP
+ ---- met1:68/20/dat 68/16/dat 68/5/EMP
+ ---- via:68/44/dat 68/58/EMP
+ ---- met2:69/20/dat 69/16/dat 69/5/EMP
+ ---- via2:69/44/dat 69/58/EMP
+ ---- met3:70/20/dat 70/16/dat 70/5/dat
+ ---- via3:70/44/dat 70/48/EMP
+ ---- met4:71/20/dat 71/16/dat 71/5/EMP
+ ---- via4:71/44/dat 71/48/EMP
+ ---- met5:72/20/dat 72/16/dat 72/5/EMP
+ ---- pad:76/20/EMP 76/5/EMP 76/16/EMP
+ ---- pnp:82/44/EMP 82/59/EMP
+ ---- npn:82/20/EMP 82/5/EMP
+ ---- rdl:74/20/EMP 74/16/EMP 74/5/EMP
+ ---- inductor:82/24/EMP 82/25/EMP
+ 0 total error(s) among 0 error type(s), 33 checks, cell: user_analog_project_wrapper
+Writing report...
+VmPeak: 1127304 kB
+VmHWM: 260160 kB
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_zeroarea_check.log b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..f0ff907
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_zeroarea_check.log
@@ -0,0 +1,4 @@
+0 zero-area shapes
+writing to /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_no_zero_areas.gds
+VmPeak: 547040 kB
+VmHWM: 267268 kB
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/klayout_zeroarea_check.total b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/magic_drc_check.log b/precheck_results/24_FEB_2022___19_05_28/logs/magic_drc_check.log
new file mode 100644
index 0000000..557843e
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/magic_drc_check.log
@@ -0,0 +1,46 @@
+
+Magic 8.3 revision 265 - Compiled on Thu Feb 17 20:05:42 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__buf_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "example_por".
+Reading "user_analog_proj_example".
+Reading "user_analog_project_wrapper".
+[INFO]: Loading user_analog_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/magic_drc_check.total b/precheck_results/24_FEB_2022___19_05_28/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/pdks.info b/precheck_results/24_FEB_2022___19_05_28/logs/pdks.info
new file mode 100644
index 0000000..19f87e1
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 27ecf1c16911f7dd4428ffab96f62c1fb876ea70
+Skywater PDK c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/precheck.log b/precheck_results/24_FEB_2022___19_05_28/logs/precheck.log
new file mode 100644
index 0000000..5257bf1
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/precheck.log
@@ -0,0 +1,59 @@
+2022-02-24 19:05:28 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog
+2022-02-24 19:05:28 - [INFO] - {{Project Type Info}} analog
+2022-02-24 19:05:28 - [INFO] - {{Project GDS Info}} user_analog_project_wrapper: c3bbd321d8e134e18ebb015ae4cd1d8fad84e162
+2022-02-24 19:05:28 - [INFO] - {{Tools Info}} KLayout: v0.27.7 | Magic: v8.3.265
+2022-02-24 19:05:28 - [INFO] - {{PDKs Info}} Open PDKs: 27ecf1c16911f7dd4428ffab96f62c1fb876ea70 | Skywater PDK: c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
+2022-02-24 19:05:28 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in '/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/logs'
+2022-02-24 19:05:28 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-02-24 19:05:28 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 13: License
+2022-02-24 19:05:29 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog.
+2022-02-24 19:05:29 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-02-24 19:05:30 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog.
+2022-02-24 19:05:31 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog.
+2022-02-24 19:05:31 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-02-24 19:05:31 - [INFO] - {{SPDX COMPLIANCE CHECK PASSED}} Project is compliant with the SPDX Standard
+2022-02-24 19:05:31 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 13: Makefile
+2022-02-24 19:05:31 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-02-24 19:05:31 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 13: Default
+2022-02-24 19:05:31 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-02-24 19:05:31 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-02-24 19:05:31 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 13: Documentation
+2022-02-24 19:05:31 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-02-24 19:05:31 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 13: Consistency
+2022-02-24 19:05:33 - [INFO] - HIERARCHY CHECK PASSED: Module user_analog_project_wrapper is instantiated in caravan.
+2022-02-24 19:05:33 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravan contains at least 8 instances (68 instances).
+2022-02-24 19:05:33 - [INFO] - MODELING CHECK PASSED: Netlist caravan is structural.
+2022-02-24 19:05:33 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_analog_project_wrapper are correctly connected in the top level netlist caravan.
+2022-02-24 19:05:33 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravan netlist passed all consistency checks.
+2022-02-24 19:05:33 - [INFO] - PORTS CHECK PASSED: Netlist user_analog_project_wrapper ports match the golden wrapper ports
+2022-02-24 19:05:33 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_analog_project_wrapper contains at least 1 instances (11 instances).
+2022-02-24 19:05:33 - [INFO] - MODELING CHECK PASSED: Netlist user_analog_project_wrapper is structural.
+2022-02-24 19:05:33 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_analog_project_wrapper matches the provided structural netlist.
+2022-02-24 19:05:33 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_analog_project_wrapper netlist passed all consistency checks.
+2022-02-24 19:05:33 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2022-02-24 19:05:33 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 13: XOR
+2022-02-24 19:05:37 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.xor.gds
+2022-02-24 19:05:37 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2022-02-24 19:05:37 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 13: Magic DRC
+2022-02-24 19:05:38 - [INFO] - 0 DRC violations
+2022-02-24 19:05:38 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-24 19:05:38 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 13: Klayout FEOL
+2022-02-24 19:05:42 - [INFO] - No DRC Violations found
+2022-02-24 19:05:42 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-24 19:05:42 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 13: Klayout BEOL
+2022-02-24 19:05:52 - [INFO] - No DRC Violations found
+2022-02-24 19:05:52 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-24 19:05:52 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 13: Klayout Offgrid
+2022-02-24 19:05:55 - [INFO] - No DRC Violations found
+2022-02-24 19:05:55 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-24 19:05:55 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 13: Klayout Metal Minimum Clear Area Density
+2022-02-24 19:05:57 - [INFO] - No DRC Violations found
+2022-02-24 19:05:57 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-24 19:05:57 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 13: Klayout Pin Label Purposes Overlapping Drawing
+2022-02-24 19:05:59 - [INFO] - No DRC Violations found
+2022-02-24 19:05:59 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-24 19:05:59 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 13: Klayout ZeroArea
+2022-02-24 19:06:00 - [INFO] - No DRC Violations found
+2022-02-24 19:06:00 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-02-24 19:06:00 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in '/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/logs'
+2022-02-24 19:06:00 - [INFO] - {{SUCCESS}} All Checks Passed !!!
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/tools.info b/precheck_results/24_FEB_2022___19_05_28/logs/tools.info
new file mode 100644
index 0000000..b904646
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.7
+Magic: 8.3.265
\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/xor_check.log b/precheck_results/24_FEB_2022___19_05_28/logs/xor_check.log
new file mode 100644
index 0000000..dd5b21e
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/xor_check.log
@@ -0,0 +1,174 @@
+Reading file /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/gds/user_analog_project_wrapper.gds for cell user_analog_project_wrapper
+dbu=0.001
+cell user_analog_project_wrapper dbu-bbox(ll;ur)=(-4000,-4000;2924000,3524000)
+cell user_analog_project_wrapper dbu-bbox(left,bottom,right,top)=(-4000,-4000,2924000,3524000)
+cell user_analog_project_wrapper dbu-size(width,height)=(2928000,3528000)
+cell user_analog_project_wrapper micron-bbox(left,bottom,right,top)=(-4.0,-4.0,2924.0,3524.0)
+cell user_analog_project_wrapper micron-size(width,height)=(2928.0,3528.0)
+Done.
+
+Magic 8.3 revision 265 - Compiled on Thu Feb 17 20:05:42 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__buf_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "example_por".
+Reading "user_analog_proj_example".
+Reading "user_analog_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.880 x 3520.000 (-42.880, 0.000), ( 0.000, 3520.000) 150937.594
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.500 x 3520.000 ( 2920.000, 0.000), ( 2962.500, 3520.000) 149600.000
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.530 (-42.880, -37.530), ( 2962.500, 0.000) 112791.906
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.210 (-42.880, 3520.000), ( 2962.500, 3557.210) 111830.188
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+
+Magic 8.3 revision 265 - Compiled on Thu Feb 17 20:05:42 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+ mvobsactive ubm
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/hugodg/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable! I hope that's OK.
+Library written using GDS-II Release 6.0
+Library name: user_analog_project_wrapper_empty
+Reading "user_analog_project_wrapper".
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.880 x 3520.000 (-42.880, 0.000), ( 0.000, 3520.000) 150937.594
+lambda: 4288.00 x 352000.00 (-4288.00, 0.00 ), ( 0.00, 352000.00) 1509376000.00
+internal: 8576 x 704000 ( -8576, 0 ), ( 0, 704000) 6037504000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 42.500 x 3520.000 ( 2920.000, 0.000), ( 2962.500, 3520.000) 149600.000
+lambda: 4250.00 x 352000.00 ( 292000.00, 0.00 ), ( 296250.00, 352000.00) 1496000000.00
+internal: 8500 x 704000 ( 584000, 0 ), ( 592500, 704000) 5984000000
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.530 (-42.880, -37.530), ( 2962.500, 0.000) 112791.906
+lambda: 300538.00 x 3753.00 (-4288.00, -3753.00), ( 296250.00, 0.00 ) 1127919104.00
+internal: 601076 x 7506 ( -8576, -7506 ), ( 592500, 0 ) 4511676456
+Root cell box:
+ width x height ( llx, lly ), ( urx, ury ) area (units^2)
+
+microns: 3005.380 x 37.210 (-42.880, 3520.000), ( 2962.500, 3557.210) 111830.188
+lambda: 300538.00 x 3721.00 (-4288.00, 352000.00), ( 296250.00, 355721.00) 1118301952.00
+internal: 601076 x 7442 ( -8576, 704000), ( 592500, 711442) 4473207592
+ Generating output for cell xor_target
+Reading /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_erased.gds ..
+Reading /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 494 (flat) 494 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 494 (flat) 494 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 184 (flat) 184 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 184 (flat) 184 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 6 (flat) 6 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 6 (flat) 6 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.000s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"input" in: xor.rb.drc:39
+ Polygons (raw): 1 (flat) 1 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+"^" in: xor.rb.drc:39
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+ Polygons (raw): 0 (flat) 0 (hierarchical)
+ Elapsed: 0.010s Memory: 521.00M
+Writing layout file: /home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.xor.gds ..
+Total elapsed: 0.160s Memory: 521.00M
diff --git a/precheck_results/24_FEB_2022___19_05_28/logs/xor_check.total b/precheck_results/24_FEB_2022___19_05_28/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_beol_check.xml b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..261c933
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>li.1</name>
+ <description>li.1 : min. li width : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.3</name>
+ <description>li.3 : min. li spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.5</name>
+ <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li.6</name>
+ <description>li.6 : min. li area : 0.0561um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1</name>
+ <description>ct.1: non-ring mcon should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_a</name>
+ <description>ct.1_a : minimum width of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.1_b</name>
+ <description>ct.1_b : maximum length of mcon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.2</name>
+ <description>ct.2 : min. mcon spacing : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct.4</name>
+ <description>ct.4 : mcon should covered by li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.1</name>
+ <description>m1.1 : min. m1 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.2</name>
+ <description>m1.2 : min. m1 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.3ab</name>
+ <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>791_m1.4</name>
+ <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4</name>
+ <description>m1.4 : mcon periphery must be enclosed by m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a</name>
+ <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.4a_a</name>
+ <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.6</name>
+ <description>m1.6 : min. m1 area : 0.083um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.7</name>
+ <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1.5</name>
+ <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a</name>
+ <description>via.1a : via outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_a</name>
+ <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.1a_b</name>
+ <description>via.1a_b : maximum length of via : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.2</name>
+ <description>via.2 : min. via spacing : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a</name>
+ <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.4a_a</name>
+ <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via.5a</name>
+ <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.1</name>
+ <description>m2.1 : min. m2 width : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.2</name>
+ <description>m2.2 : min. m2 spacing : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.3ab</name>
+ <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.6</name>
+ <description>m2.6 : min. m2 area : 0.0676um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.7</name>
+ <description>m2.7 : min. m2 holes area : 0.14um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4</name>
+ <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.4_a</name>
+ <description>m2.4_a : via in periphery must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2.5</name>
+ <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a</name>
+ <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_a</name>
+ <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.1a_b</name>
+ <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.2</name>
+ <description>via2.2 : min. via2 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4</name>
+ <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.4_a</name>
+ <description>via2.4_a : via must be enclosed by met2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2.5</name>
+ <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.1</name>
+ <description>m3.1 : min. m3 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.2</name>
+ <description>m3.2 : min. m3 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.3cd</name>
+ <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4</name>
+ <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3.4_a</name>
+ <description>m3.4_a : via2 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1</name>
+ <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_a</name>
+ <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.1_b</name>
+ <description>via3.1_b : maximum length of via3 : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.2</name>
+ <description>via3.2 : min. via3 spacing : 0.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4</name>
+ <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.4_a</name>
+ <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3.5</name>
+ <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.1</name>
+ <description>m4.1 : min. m4 width : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.2</name>
+ <description>m4.2 : min. m4 spacing : 0.3um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.4a</name>
+ <description>m4.4a : min. m4 area : 0.240um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.5ab</name>
+ <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3</name>
+ <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4.3_a</name>
+ <description>m4.3_a : via3 must be enclosed by met4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1</name>
+ <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_a</name>
+ <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.1_b</name>
+ <description>via4.1_b : maximum length of via4 : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.2</name>
+ <description>via4.2 : min. via4 spacing : 0.8um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4</name>
+ <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4.4_a</name>
+ <description>via4.4_a : m4 must enclose all via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.1</name>
+ <description>m5.1 : min. m5 width : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.2</name>
+ <description>m5.2 : min. m5 spacing : 1.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3</name>
+ <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.3_a</name>
+ <description>m5.3_a : via must be enclosed by m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5.4</name>
+ <description>m5.4 : min. m5 area : 4.0um²</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad.2</name>
+ <description>pad.2 : min. pad spacing : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_feol_check.xml b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..a352e7c
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,363 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell.2</name>
+ <description>dnwell.2 : min. dnwell width : 3.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.1</name>
+ <description>nwell.1 : min. nwell width : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.2a</name>
+ <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell.6</name>
+ <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.1</name>
+ <description>hvtp.1 : min. hvtp width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp.2</name>
+ <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.1</name>
+ <description>hvtr.1 : min. hvtr width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2</name>
+ <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr.2_a</name>
+ <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.1a</name>
+ <description>lvtn.1a : min. lvtn width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn.2</name>
+ <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.1</name>
+ <description>ncm.1 : min. ncm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm.2a</name>
+ <description>ncm.2a : min. ncm spacing : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1</name>
+ <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_a</name>
+ <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_b</name>
+ <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.1_c</name>
+ <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>difftap.3</name>
+ <description>difftap.3 : min. difftap spacing : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.1</name>
+ <description>tunm.1 : min. tunm width : 0.41um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm.2</name>
+ <description>tunm.2 : min. tunm spacing : 0.5um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.1a</name>
+ <description>poly.1a : min. poly width : 0.15um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly.2</name>
+ <description>poly.2 : min. poly spacing : 0.21um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.1a</name>
+ <description>rpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm.2</name>
+ <description>rpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.1a</name>
+ <description>urpm.1a : min. rpm width : 1.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>urpm.2</name>
+ <description>urpm.2 : min. rpm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.1</name>
+ <description>npc.1 : min. npc width : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc.2</name>
+ <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsd.1</name>
+ <description>nsd.1 : min. nsdm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsd.2</name>
+ <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psd.1</name>
+ <description>psd.1 : min. psdm width : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psd.2</name>
+ <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1</name>
+ <description>licon.1 : licon should be rectangle</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.1_a/b</name>
+ <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13</name>
+ <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.13_a</name>
+ <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon.17</name>
+ <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.1</name>
+ <description>capm.1 : min. capm width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2a</name>
+ <description>capm.2a : min. capm spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b</name>
+ <description>capm.2b : min. capm spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.2b_a</name>
+ <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3</name>
+ <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.3_a</name>
+ <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.4</name>
+ <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>capm.5</name>
+ <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.1</name>
+ <description>cap2m.1 : min. cap2m width : 1.0um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2a</name>
+ <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b</name>
+ <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.2b_a</name>
+ <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3</name>
+ <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.3_a</name>
+ <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.4</name>
+ <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>cap2m.5</name>
+ <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.1</name>
+ <description>hvi.1 : min. hvi width : 0.6um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi.2a</name>
+ <description>hvi.2a : min. hvi spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.1</name>
+ <description>hvntm.1 : min. hvntm width : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm.2</name>
+ <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_met_min_ca_density_check.xml b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..b91529c
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_offgrid_check.xml b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..fa805b1
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/offgrid.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ <category>
+ <name>dnwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>dnwell_angle</name>
+ <description>x.3a : non 45 degree angle dnwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nwell_angle</name>
+ <description>x.3a : non 45 degree angle nwell</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwbm_angle</name>
+ <description>x.3a : non 45 degree angle pwbm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwde_angle</name>
+ <description>x.3a : non 45 degree angle pwde</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtp_angle</name>
+ <description>x.3a : non 45 degree angle hvtp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvtr_angle</name>
+ <description>x.3a : non 45 degree angle hvtr</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>lvtn_angle</name>
+ <description>x.3a : non 45 degree angle lvtn</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ncm_angle</name>
+ <description>x.3a : non 45 degree angle ncm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2 : non 90 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>diff_angle</name>
+ <description>x.2c : non 45 degree angle diff</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2 : non 90 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tap_angle</name>
+ <description>x.2c : non 45 degree angle tap</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>tunm_angle</name>
+ <description>x.3a : non 45 degree angle tunm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>poly_angle</name>
+ <description>x.2 : non 90 degree angle poly</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>rpm_angle</name>
+ <description>x.3a : non 45 degree angle rpm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>npc_angle</name>
+ <description>x.3a : non 45 degree angle npc</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsdm_angle</name>
+ <description>x.3a : non 45 degree angle nsdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>psdm_angle</name>
+ <description>x.3a : non 45 degree angle psdm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>licon_angle</name>
+ <description>x.2 : non 90 degree angle licon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>li_angle</name>
+ <description>x.3a : non 45 degree angle li</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>ct_angle</name>
+ <description>x.2 : non 90 degree angle mcon</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vpp_angle</name>
+ <description>x.3a : non 45 degree angle vpp</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m1_angle</name>
+ <description>x.3a : non 45 degree angle m1</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via_angle</name>
+ <description>x.2 : non 90 degree angle via</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m2_angle</name>
+ <description>x.3a : non 45 degree angle m2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via2_angle</name>
+ <description>x.2 : non 90 degree angle via2</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m3_angle</name>
+ <description>x.3a : non 45 degree angle m3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via3_angle</name>
+ <description>x.2 : non 90 degree angle via3</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>nsm_angle</name>
+ <description>x.3a : non 45 degree angle nsm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m4_angle</name>
+ <description>x.3a : non 45 degree angle m4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>via4_angle</name>
+ <description>x.2 : non 90 degree angle via4</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>m5_angle</name>
+ <description>x.3a : non 45 degree angle m5</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pad_angle</name>
+ <description>x.3a : non 45 degree angle pad</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>mf_angle</name>
+ <description>x.2 : non 90 degree angle mf</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvi_angle</name>
+ <description>x.3a : non 45 degree angle hvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>hvntm_angle</name>
+ <description>x.3a : non 45 degree angle hvntm</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>vhvi_angle</name>
+ <description>x.3a : non 45 degree angle vhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>uhvi_angle</name>
+ <description>x.3a : non 45 degree angle uhvi</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>pwell_rs_angle</name>
+ <description>x.3a : non 45 degree angle pwell_rs</description>
+ <categories>
+ </categories>
+ </category>
+ <category>
+ <name>areaid_re_OFFGRID</name>
+ <description>x.1b : OFFGRID vertex on areaid.re</description>
+ <categories>
+ </categories>
+ </category>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..3b4d8ce
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/home/hugodg/projects_sky130/temp_sensor/ask_modulator/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_zeroarea_check.xml b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..6d97219
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/home/hugodg/mpw_precheck/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ <variant/>
+ <references>
+ </references>
+ </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.drc.report b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..829b9d5
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,5 @@
+user_analog_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.rdb b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..8a882f3
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,2 @@
+$user_analog_project_wrapper
+ 100
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.tcl b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.tcl
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.tr b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.tr
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.xml b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..7161d7c
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+ <categories/>
+ <cells>
+ <cell>
+ <name>user_analog_project_wrapper</name>
+ </cell>
+ </cells>
+ <items/>
+</report-database>
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.magic.drc.mag b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..27f77c4
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.magic.drc.mag
@@ -0,0 +1,2926 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1645729538
+<< checkpaint >>
+rect -4732 -4732 588732 708732
+<< pwell >>
+rect 345714 628229 371128 629058
+<< mvpsubdiff >>
+rect 345740 629000 371102 629032
+rect 345740 628286 345790 629000
+rect 371052 628286 371102 629000
+rect 345740 628255 371102 628286
+<< mvpsubdiffcont >>
+rect 345790 628286 371052 629000
+<< locali >>
+rect 345748 629000 371094 629032
+rect 345748 628286 345790 629000
+rect 371052 628286 371094 629000
+rect 345748 628255 371094 628286
+<< viali >>
+rect 357600 628309 359290 628991
+<< metal1 >>
+rect 357470 629394 359442 629457
+rect 357470 628062 357541 629394
+rect 359385 628062 359442 629394
+rect 357470 627990 359442 628062
+<< via1 >>
+rect 357541 628991 359385 629394
+rect 357541 628309 357600 628991
+rect 357600 628309 359290 628991
+rect 359290 628309 359385 628991
+rect 357541 628062 359385 628309
+<< metal2 >>
+rect 357470 629396 359442 629457
+rect 357470 629394 357555 629396
+rect 359371 629394 359442 629396
+rect 357470 628062 357541 629394
+rect 359385 628062 359442 629394
+rect 357470 628060 357555 628062
+rect 359371 628060 359442 628062
+rect 357470 627990 359442 628060
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+rect 16055 419200 16071 419264
+rect 16135 419200 16151 419264
+rect 16215 419200 16231 419264
+rect 16295 419200 16311 419264
+rect 16375 419200 16391 419264
+rect 16455 419200 16471 419264
+rect 16535 419200 16551 419264
+rect 16615 419200 16631 419264
+rect 16695 419200 16711 419264
+rect 16775 419200 16791 419264
+rect 16855 419200 16871 419264
+rect 16935 419200 16951 419264
+rect 17015 419200 17031 419264
+rect 17095 419200 17111 419264
+rect 17175 419200 17191 419264
+rect 17255 419200 17271 419264
+rect 17335 419200 17351 419264
+rect 17415 419200 17431 419264
+rect 17495 419200 17511 419264
+rect 17575 419200 17684 419264
+rect 13814 227257 17684 419200
+rect 573464 455716 576816 500074
+rect 573464 455652 573591 455716
+rect 573655 455652 573671 455716
+rect 573735 455652 573751 455716
+rect 573815 455652 573831 455716
+rect 573895 455652 573911 455716
+rect 573975 455652 573991 455716
+rect 574055 455652 574071 455716
+rect 574135 455652 574151 455716
+rect 574215 455652 574231 455716
+rect 574295 455652 574311 455716
+rect 574375 455652 574391 455716
+rect 574455 455652 574471 455716
+rect 574535 455652 574551 455716
+rect 574615 455652 574631 455716
+rect 574695 455652 574711 455716
+rect 574775 455652 574791 455716
+rect 574855 455652 574871 455716
+rect 574935 455652 574951 455716
+rect 575015 455652 575031 455716
+rect 575095 455652 575111 455716
+rect 575175 455652 575191 455716
+rect 575255 455652 575271 455716
+rect 575335 455652 575351 455716
+rect 575415 455652 575431 455716
+rect 575495 455652 575511 455716
+rect 575575 455652 575591 455716
+rect 575655 455652 575671 455716
+rect 575735 455652 575751 455716
+rect 575815 455652 575831 455716
+rect 575895 455652 575911 455716
+rect 575975 455652 575991 455716
+rect 576055 455652 576071 455716
+rect 576135 455652 576151 455716
+rect 576215 455652 576231 455716
+rect 576295 455652 576311 455716
+rect 576375 455652 576391 455716
+rect 576455 455652 576471 455716
+rect 576535 455652 576551 455716
+rect 576615 455652 576631 455716
+rect 576695 455652 576816 455716
+rect 13811 196222 17688 227257
+rect 13811 191438 13997 196222
+rect 17421 191438 17688 196222
+rect 13811 191098 17688 191438
+rect 573464 196222 576816 455652
+rect 573464 191438 573605 196222
+rect 576629 191438 576816 196222
+rect 573464 191191 576816 191438
+<< via4 >>
+rect 357678 643457 359194 649773
+rect 352057 615301 353573 617777
+rect 363441 615307 364957 617783
+rect 363445 597363 364961 601439
+<< metal5 >>
+rect 165594 702300 170594 704800
+rect 175894 702300 180894 704800
+rect 217294 702300 222294 704800
+rect 227594 702300 232594 704800
+rect 318994 702300 323994 704800
+rect 329294 702300 334294 704800
+rect 357521 649773 359350 649991
+rect 357521 643457 357678 649773
+rect 359194 643457 359350 649773
+rect 351918 617777 353747 617929
+rect 351918 615301 352057 617777
+rect 353573 615301 353747 617777
+rect 351918 614900 353747 615301
+rect 357521 614900 359350 643457
+rect 351918 613071 359350 614900
+rect 363318 617783 365147 617929
+rect 363318 615307 363441 617783
+rect 364957 615307 365147 617783
+rect 363318 601439 365147 615307
+rect 363318 597363 363445 601439
+rect 364961 597363 365147 601439
+rect 363318 597052 365147 597363
+use user_analog_proj_example user_analog_proj_example_0
+timestamp 1639823760
+transform 1 0 345668 0 -1 627114
+box -73 -12 25490 8324
+<< labels >>
+flabel metal3 s 572152 640142 580220 644150 0 FreeSans 20000 0 0 0 VCCD1
+port 1 nsew
+flabel metal3 s 567038 550960 577302 554546 0 FreeSans 20000 0 0 0 VDDA1
+port 2 nsew
+flabel metal3 s 511190 664896 514962 676272 0 FreeSans 20000 90 0 0 VSSA1
+port 3 nsew
+flabel metal3 s 561703 191929 571721 195859 0 FreeSans 20000 0 0 0 VSSD1
+port 4 nsew
+flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1400 0 0 0 gpio_analog[0]
+port 5 nsew
+flabel metal3 s -800 381864 480 381976 0 FreeSans 1400 0 0 0 gpio_analog[10]
+port 6 nsew
+flabel metal3 s -800 338642 480 338754 0 FreeSans 1400 0 0 0 gpio_analog[11]
+port 7 nsew
+flabel metal3 s -800 295420 480 295532 0 FreeSans 1400 0 0 0 gpio_analog[12]
+port 8 nsew
+flabel metal3 s -800 252398 480 252510 0 FreeSans 1400 0 0 0 gpio_analog[13]
+port 9 nsew
+flabel metal3 s -800 124776 480 124888 0 FreeSans 1400 0 0 0 gpio_analog[14]
+port 10 nsew
+flabel metal3 s -800 81554 480 81666 0 FreeSans 1400 0 0 0 gpio_analog[15]
+port 11 nsew
+flabel metal3 s -800 38332 480 38444 0 FreeSans 1400 0 0 0 gpio_analog[16]
+port 12 nsew
+flabel metal3 s -800 16910 480 17022 0 FreeSans 1400 0 0 0 gpio_analog[17]
+port 13 nsew
+flabel metal3 s 583520 313652 584800 313764 0 FreeSans 1400 0 0 0 gpio_analog[1]
+port 14 nsew
+flabel metal3 s 583520 358874 584800 358986 0 FreeSans 1400 0 0 0 gpio_analog[2]
+port 15 nsew
+flabel metal3 s 583520 405296 584800 405408 0 FreeSans 1400 0 0 0 gpio_analog[3]
+port 16 nsew
+flabel metal3 s 583520 449718 584800 449830 0 FreeSans 1400 0 0 0 gpio_analog[4]
+port 17 nsew
+flabel metal3 s 583520 494140 584800 494252 0 FreeSans 1400 0 0 0 gpio_analog[5]
+port 18 nsew
+flabel metal3 s 583520 583562 584800 583674 0 FreeSans 1400 0 0 0 gpio_analog[6]
+port 19 nsew
+flabel metal3 s -800 511530 480 511642 0 FreeSans 1400 0 0 0 gpio_analog[7]
+port 20 nsew
+flabel metal3 s -800 468308 480 468420 0 FreeSans 1400 0 0 0 gpio_analog[8]
+port 21 nsew
+flabel metal3 s -800 425086 480 425198 0 FreeSans 1400 0 0 0 gpio_analog[9]
+port 22 nsew
+flabel metal3 s 583520 270412 584800 270524 0 FreeSans 1400 0 0 0 gpio_noesd[0]
+port 23 nsew
+flabel metal3 s -800 380682 480 380794 0 FreeSans 1400 0 0 0 gpio_noesd[10]
+port 24 nsew
+flabel metal3 s -800 337460 480 337572 0 FreeSans 1400 0 0 0 gpio_noesd[11]
+port 25 nsew
+flabel metal3 s -800 294238 480 294350 0 FreeSans 1400 0 0 0 gpio_noesd[12]
+port 26 nsew
+flabel metal3 s -800 251216 480 251328 0 FreeSans 1400 0 0 0 gpio_noesd[13]
+port 27 nsew
+flabel metal3 s -800 123594 480 123706 0 FreeSans 1400 0 0 0 gpio_noesd[14]
+port 28 nsew
+flabel metal3 s -800 80372 480 80484 0 FreeSans 1400 0 0 0 gpio_noesd[15]
+port 29 nsew
+flabel metal3 s -800 37150 480 37262 0 FreeSans 1400 0 0 0 gpio_noesd[16]
+port 30 nsew
+flabel metal3 s -800 15728 480 15840 0 FreeSans 1400 0 0 0 gpio_noesd[17]
+port 31 nsew
+flabel metal3 s 583520 314834 584800 314946 0 FreeSans 1400 0 0 0 gpio_noesd[1]
+port 32 nsew
+flabel metal3 s 583520 360056 584800 360168 0 FreeSans 1400 0 0 0 gpio_noesd[2]
+port 33 nsew
+flabel metal3 s 583520 406478 584800 406590 0 FreeSans 1400 0 0 0 gpio_noesd[3]
+port 34 nsew
+flabel metal3 s 583520 450900 584800 451012 0 FreeSans 1400 0 0 0 gpio_noesd[4]
+port 35 nsew
+flabel metal3 s 583520 495322 584800 495434 0 FreeSans 1400 0 0 0 gpio_noesd[5]
+port 36 nsew
+flabel metal3 s 583520 584744 584800 584856 0 FreeSans 1400 0 0 0 gpio_noesd[6]
+port 37 nsew
+flabel metal3 s -800 510348 480 510460 0 FreeSans 1400 0 0 0 gpio_noesd[7]
+port 38 nsew
+flabel metal3 s -800 467126 480 467238 0 FreeSans 1400 0 0 0 gpio_noesd[8]
+port 39 nsew
+flabel metal3 s -800 423904 480 424016 0 FreeSans 1400 0 0 0 gpio_noesd[9]
+port 40 nsew
+flabel metal3 s 582300 677984 584800 682984 0 FreeSans 1400 0 0 0 io_analog[0]
+port 41 nsew
+flabel metal3 s 0 680242 1700 685242 0 FreeSans 1400 0 0 0 io_analog[10]
+port 42 nsew
+flabel metal3 s 566594 702300 571594 704800 0 FreeSans 2400 180 0 0 io_analog[1]
+port 43 nsew
+flabel metal3 s 465394 702300 470394 704800 0 FreeSans 2400 180 0 0 io_analog[2]
+port 44 nsew
+flabel metal3 s 413394 702300 418394 704800 0 FreeSans 2400 180 0 0 io_analog[3]
+port 45 nsew
+flabel metal3 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal4 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal5 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal3 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal4 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal5 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal3 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal4 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal5 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal3 s 120194 702300 125194 704800 0 FreeSans 2400 180 0 0 io_analog[7]
+port 49 nsew
+flabel metal3 s 68194 702300 73194 704800 0 FreeSans 2400 180 0 0 io_analog[8]
+port 50 nsew
+flabel metal3 s 16194 702300 21194 704800 0 FreeSans 2400 180 0 0 io_analog[9]
+port 51 nsew
+flabel metal3 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal4 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal5 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 46 nsew
+flabel metal3 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal4 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal5 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 47 nsew
+flabel metal3 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal4 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal5 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 48 nsew
+flabel metal3 s 326794 702300 328994 704800 0 FreeSans 2400 180 0 0 io_clamp_high[0]
+port 52 nsew
+flabel metal3 s 225094 702300 227294 704800 0 FreeSans 2400 180 0 0 io_clamp_high[1]
+port 53 nsew
+flabel metal3 s 173394 702300 175594 704800 0 FreeSans 2400 180 0 0 io_clamp_high[2]
+port 54 nsew
+flabel metal3 s 324294 702300 326494 704800 0 FreeSans 2400 180 0 0 io_clamp_low[0]
+port 55 nsew
+flabel metal3 s 222594 702300 224794 704800 0 FreeSans 2400 180 0 0 io_clamp_low[1]
+port 56 nsew
+flabel metal3 s 170894 702300 173094 704800 0 FreeSans 2400 180 0 0 io_clamp_low[2]
+port 57 nsew
+flabel metal3 s 583520 2726 584800 2838 0 FreeSans 1400 0 0 0 io_in[0]
+port 58 nsew
+flabel metal3 s 583520 408842 584800 408954 0 FreeSans 1400 0 0 0 io_in[10]
+port 59 nsew
+flabel metal3 s 583520 453264 584800 453376 0 FreeSans 1400 0 0 0 io_in[11]
+port 60 nsew
+flabel metal3 s 583520 497686 584800 497798 0 FreeSans 1400 0 0 0 io_in[12]
+port 61 nsew
+flabel metal3 s 583520 587108 584800 587220 0 FreeSans 1400 0 0 0 io_in[13]
+port 62 nsew
+flabel metal3 s -800 507984 480 508096 0 FreeSans 1400 0 0 0 io_in[14]
+port 63 nsew
+flabel metal3 s -800 464762 480 464874 0 FreeSans 1400 0 0 0 io_in[15]
+port 64 nsew
+flabel metal3 s -800 421540 480 421652 0 FreeSans 1400 0 0 0 io_in[16]
+port 65 nsew
+flabel metal3 s -800 378318 480 378430 0 FreeSans 1400 0 0 0 io_in[17]
+port 66 nsew
+flabel metal3 s -800 335096 480 335208 0 FreeSans 1400 0 0 0 io_in[18]
+port 67 nsew
+flabel metal3 s -800 291874 480 291986 0 FreeSans 1400 0 0 0 io_in[19]
+port 68 nsew
+flabel metal3 s 583520 7454 584800 7566 0 FreeSans 1400 0 0 0 io_in[1]
+port 69 nsew
+flabel metal3 s -800 248852 480 248964 0 FreeSans 1400 0 0 0 io_in[20]
+port 70 nsew
+flabel metal3 s -800 121230 480 121342 0 FreeSans 1400 0 0 0 io_in[21]
+port 71 nsew
+flabel metal3 s -800 78008 480 78120 0 FreeSans 1400 0 0 0 io_in[22]
+port 72 nsew
+flabel metal3 s -800 34786 480 34898 0 FreeSans 1400 0 0 0 io_in[23]
+port 73 nsew
+flabel metal3 s -800 13364 480 13476 0 FreeSans 1400 0 0 0 io_in[24]
+port 74 nsew
+flabel metal3 s -800 8636 480 8748 0 FreeSans 1400 0 0 0 io_in[25]
+port 75 nsew
+flabel metal3 s -800 3908 480 4020 0 FreeSans 1400 0 0 0 io_in[26]
+port 76 nsew
+flabel metal3 s 583520 12182 584800 12294 0 FreeSans 1400 0 0 0 io_in[2]
+port 77 nsew
+flabel metal3 s 583520 16910 584800 17022 0 FreeSans 1400 0 0 0 io_in[3]
+port 78 nsew
+flabel metal3 s 583520 21638 584800 21750 0 FreeSans 1400 0 0 0 io_in[4]
+port 79 nsew
+flabel metal3 s 583520 48096 584800 48208 0 FreeSans 1400 0 0 0 io_in[5]
+port 80 nsew
+flabel metal3 s 583520 92754 584800 92866 0 FreeSans 1400 0 0 0 io_in[6]
+port 81 nsew
+flabel metal3 s 583520 272776 584800 272888 0 FreeSans 1400 0 0 0 io_in[7]
+port 82 nsew
+flabel metal3 s 583520 317198 584800 317310 0 FreeSans 1400 0 0 0 io_in[8]
+port 83 nsew
+flabel metal3 s 583520 362420 584800 362532 0 FreeSans 1400 0 0 0 io_in[9]
+port 84 nsew
+flabel metal3 s 583520 1544 584800 1656 0 FreeSans 1400 0 0 0 io_in_3v3[0]
+port 85 nsew
+flabel metal3 s 583520 407660 584800 407772 0 FreeSans 1400 0 0 0 io_in_3v3[10]
+port 86 nsew
+flabel metal3 s 583520 452082 584800 452194 0 FreeSans 1400 0 0 0 io_in_3v3[11]
+port 87 nsew
+flabel metal3 s 583520 496504 584800 496616 0 FreeSans 1400 0 0 0 io_in_3v3[12]
+port 88 nsew
+flabel metal3 s 583520 585926 584800 586038 0 FreeSans 1400 0 0 0 io_in_3v3[13]
+port 89 nsew
+flabel metal3 s -800 509166 480 509278 0 FreeSans 1400 0 0 0 io_in_3v3[14]
+port 90 nsew
+flabel metal3 s -800 465944 480 466056 0 FreeSans 1400 0 0 0 io_in_3v3[15]
+port 91 nsew
+flabel metal3 s -800 422722 480 422834 0 FreeSans 1400 0 0 0 io_in_3v3[16]
+port 92 nsew
+flabel metal3 s -800 379500 480 379612 0 FreeSans 1400 0 0 0 io_in_3v3[17]
+port 93 nsew
+flabel metal3 s -800 336278 480 336390 0 FreeSans 1400 0 0 0 io_in_3v3[18]
+port 94 nsew
+flabel metal3 s -800 293056 480 293168 0 FreeSans 1400 0 0 0 io_in_3v3[19]
+port 95 nsew
+flabel metal3 s 583520 6272 584800 6384 0 FreeSans 1400 0 0 0 io_in_3v3[1]
+port 96 nsew
+flabel metal3 s -800 250034 480 250146 0 FreeSans 1400 0 0 0 io_in_3v3[20]
+port 97 nsew
+flabel metal3 s -800 122412 480 122524 0 FreeSans 1400 0 0 0 io_in_3v3[21]
+port 98 nsew
+flabel metal3 s -800 79190 480 79302 0 FreeSans 1400 0 0 0 io_in_3v3[22]
+port 99 nsew
+flabel metal3 s -800 35968 480 36080 0 FreeSans 1400 0 0 0 io_in_3v3[23]
+port 100 nsew
+flabel metal3 s -800 14546 480 14658 0 FreeSans 1400 0 0 0 io_in_3v3[24]
+port 101 nsew
+flabel metal3 s -800 9818 480 9930 0 FreeSans 1400 0 0 0 io_in_3v3[25]
+port 102 nsew
+flabel metal3 s -800 5090 480 5202 0 FreeSans 1400 0 0 0 io_in_3v3[26]
+port 103 nsew
+flabel metal3 s 583520 11000 584800 11112 0 FreeSans 1400 0 0 0 io_in_3v3[2]
+port 104 nsew
+flabel metal3 s 583520 15728 584800 15840 0 FreeSans 1400 0 0 0 io_in_3v3[3]
+port 105 nsew
+flabel metal3 s 583520 20456 584800 20568 0 FreeSans 1400 0 0 0 io_in_3v3[4]
+port 106 nsew
+flabel metal3 s 583520 46914 584800 47026 0 FreeSans 1400 0 0 0 io_in_3v3[5]
+port 107 nsew
+flabel metal3 s 583520 91572 584800 91684 0 FreeSans 1400 0 0 0 io_in_3v3[6]
+port 108 nsew
+flabel metal3 s 583520 271594 584800 271706 0 FreeSans 1400 0 0 0 io_in_3v3[7]
+port 109 nsew
+flabel metal3 s 583520 316016 584800 316128 0 FreeSans 1400 0 0 0 io_in_3v3[8]
+port 110 nsew
+flabel metal3 s 583520 361238 584800 361350 0 FreeSans 1400 0 0 0 io_in_3v3[9]
+port 111 nsew
+flabel metal3 s 583520 5090 584800 5202 0 FreeSans 1400 0 0 0 io_oeb[0]
+port 112 nsew
+flabel metal3 s 583520 411206 584800 411318 0 FreeSans 1400 0 0 0 io_oeb[10]
+port 113 nsew
+flabel metal3 s 583520 455628 584800 455740 0 FreeSans 1400 0 0 0 io_oeb[11]
+port 114 nsew
+flabel metal3 s 583520 500050 584800 500162 0 FreeSans 1400 0 0 0 io_oeb[12]
+port 115 nsew
+flabel metal3 s 583520 589472 584800 589584 0 FreeSans 1400 0 0 0 io_oeb[13]
+port 116 nsew
+flabel metal3 s -800 505620 480 505732 0 FreeSans 1400 0 0 0 io_oeb[14]
+port 117 nsew
+flabel metal3 s -800 462398 480 462510 0 FreeSans 1400 0 0 0 io_oeb[15]
+port 118 nsew
+flabel metal3 s -800 419176 480 419288 0 FreeSans 1400 0 0 0 io_oeb[16]
+port 119 nsew
+flabel metal3 s -800 375954 480 376066 0 FreeSans 1400 0 0 0 io_oeb[17]
+port 120 nsew
+flabel metal3 s -800 332732 480 332844 0 FreeSans 1400 0 0 0 io_oeb[18]
+port 121 nsew
+flabel metal3 s -800 289510 480 289622 0 FreeSans 1400 0 0 0 io_oeb[19]
+port 122 nsew
+flabel metal3 s 583520 9818 584800 9930 0 FreeSans 1400 0 0 0 io_oeb[1]
+port 123 nsew
+flabel metal3 s -800 246488 480 246600 0 FreeSans 1400 0 0 0 io_oeb[20]
+port 124 nsew
+flabel metal3 s -800 118866 480 118978 0 FreeSans 1400 0 0 0 io_oeb[21]
+port 125 nsew
+flabel metal3 s -800 75644 480 75756 0 FreeSans 1400 0 0 0 io_oeb[22]
+port 126 nsew
+flabel metal3 s -800 32422 480 32534 0 FreeSans 1400 0 0 0 io_oeb[23]
+port 127 nsew
+flabel metal3 s -800 11000 480 11112 0 FreeSans 1400 0 0 0 io_oeb[24]
+port 128 nsew
+flabel metal3 s -800 6272 480 6384 0 FreeSans 1400 0 0 0 io_oeb[25]
+port 129 nsew
+flabel metal3 s -800 1544 480 1656 0 FreeSans 1400 0 0 0 io_oeb[26]
+port 130 nsew
+flabel metal3 s 583520 14546 584800 14658 0 FreeSans 1400 0 0 0 io_oeb[2]
+port 131 nsew
+flabel metal3 s 583520 19274 584800 19386 0 FreeSans 1400 0 0 0 io_oeb[3]
+port 132 nsew
+flabel metal3 s 583520 24002 584800 24114 0 FreeSans 1400 0 0 0 io_oeb[4]
+port 133 nsew
+flabel metal3 s 583520 50460 584800 50572 0 FreeSans 1400 0 0 0 io_oeb[5]
+port 134 nsew
+flabel metal3 s 583520 95118 584800 95230 0 FreeSans 1400 0 0 0 io_oeb[6]
+port 135 nsew
+flabel metal3 s 583520 275140 584800 275252 0 FreeSans 1400 0 0 0 io_oeb[7]
+port 136 nsew
+flabel metal3 s 583520 319562 584800 319674 0 FreeSans 1400 0 0 0 io_oeb[8]
+port 137 nsew
+flabel metal3 s 583520 364784 584800 364896 0 FreeSans 1400 0 0 0 io_oeb[9]
+port 138 nsew
+flabel metal3 s 583520 3908 584800 4020 0 FreeSans 1400 0 0 0 io_out[0]
+port 139 nsew
+flabel metal3 s 583520 410024 584800 410136 0 FreeSans 1400 0 0 0 io_out[10]
+port 140 nsew
+flabel metal3 s 583520 454446 584800 454558 0 FreeSans 1400 0 0 0 io_out[11]
+port 141 nsew
+flabel metal3 s 583520 498868 584800 498980 0 FreeSans 1400 0 0 0 io_out[12]
+port 142 nsew
+flabel metal3 s 583520 588290 584800 588402 0 FreeSans 1400 0 0 0 io_out[13]
+port 143 nsew
+flabel metal3 s -800 506802 480 506914 0 FreeSans 1400 0 0 0 io_out[14]
+port 144 nsew
+flabel metal3 s -800 463580 480 463692 0 FreeSans 1400 0 0 0 io_out[15]
+port 145 nsew
+flabel metal3 s -800 420358 480 420470 0 FreeSans 1400 0 0 0 io_out[16]
+port 146 nsew
+flabel metal3 s -800 377136 480 377248 0 FreeSans 1400 0 0 0 io_out[17]
+port 147 nsew
+flabel metal3 s -800 333914 480 334026 0 FreeSans 1400 0 0 0 io_out[18]
+port 148 nsew
+flabel metal3 s -800 290692 480 290804 0 FreeSans 1400 0 0 0 io_out[19]
+port 149 nsew
+flabel metal3 s 583520 8636 584800 8748 0 FreeSans 1400 0 0 0 io_out[1]
+port 150 nsew
+flabel metal3 s -800 247670 480 247782 0 FreeSans 1400 0 0 0 io_out[20]
+port 151 nsew
+flabel metal3 s -800 120048 480 120160 0 FreeSans 1400 0 0 0 io_out[21]
+port 152 nsew
+flabel metal3 s -800 76826 480 76938 0 FreeSans 1400 0 0 0 io_out[22]
+port 153 nsew
+flabel metal3 s -800 33604 480 33716 0 FreeSans 1400 0 0 0 io_out[23]
+port 154 nsew
+flabel metal3 s -800 12182 480 12294 0 FreeSans 1400 0 0 0 io_out[24]
+port 155 nsew
+flabel metal3 s -800 7454 480 7566 0 FreeSans 1400 0 0 0 io_out[25]
+port 156 nsew
+flabel metal3 s -800 2726 480 2838 0 FreeSans 1400 0 0 0 io_out[26]
+port 157 nsew
+flabel metal3 s 583520 13364 584800 13476 0 FreeSans 1400 0 0 0 io_out[2]
+port 158 nsew
+flabel metal3 s 583520 18092 584800 18204 0 FreeSans 1400 0 0 0 io_out[3]
+port 159 nsew
+flabel metal3 s 583520 22820 584800 22932 0 FreeSans 1400 0 0 0 io_out[4]
+port 160 nsew
+flabel metal3 s 583520 49278 584800 49390 0 FreeSans 1400 0 0 0 io_out[5]
+port 161 nsew
+flabel metal3 s 583520 93936 584800 94048 0 FreeSans 1400 0 0 0 io_out[6]
+port 162 nsew
+flabel metal3 s 583520 273958 584800 274070 0 FreeSans 1400 0 0 0 io_out[7]
+port 163 nsew
+flabel metal3 s 583520 318380 584800 318492 0 FreeSans 1400 0 0 0 io_out[8]
+port 164 nsew
+flabel metal3 s 583520 363602 584800 363714 0 FreeSans 1400 0 0 0 io_out[9]
+port 165 nsew
+flabel metal2 s 125816 -800 125928 480 0 FreeSans 1400 90 0 0 la_data_in[0]
+port 166 nsew
+flabel metal2 s 480416 -800 480528 480 0 FreeSans 1400 90 0 0 la_data_in[100]
+port 167 nsew
+flabel metal2 s 483962 -800 484074 480 0 FreeSans 1400 90 0 0 la_data_in[101]
+port 168 nsew
+flabel metal2 s 487508 -800 487620 480 0 FreeSans 1400 90 0 0 la_data_in[102]
+port 169 nsew
+flabel metal2 s 491054 -800 491166 480 0 FreeSans 1400 90 0 0 la_data_in[103]
+port 170 nsew
+flabel metal2 s 494600 -800 494712 480 0 FreeSans 1400 90 0 0 la_data_in[104]
+port 171 nsew
+flabel metal2 s 498146 -800 498258 480 0 FreeSans 1400 90 0 0 la_data_in[105]
+port 172 nsew
+flabel metal2 s 501692 -800 501804 480 0 FreeSans 1400 90 0 0 la_data_in[106]
+port 173 nsew
+flabel metal2 s 505238 -800 505350 480 0 FreeSans 1400 90 0 0 la_data_in[107]
+port 174 nsew
+flabel metal2 s 508784 -800 508896 480 0 FreeSans 1400 90 0 0 la_data_in[108]
+port 175 nsew
+flabel metal2 s 512330 -800 512442 480 0 FreeSans 1400 90 0 0 la_data_in[109]
+port 176 nsew
+flabel metal2 s 161276 -800 161388 480 0 FreeSans 1400 90 0 0 la_data_in[10]
+port 177 nsew
+flabel metal2 s 515876 -800 515988 480 0 FreeSans 1400 90 0 0 la_data_in[110]
+port 178 nsew
+flabel metal2 s 519422 -800 519534 480 0 FreeSans 1400 90 0 0 la_data_in[111]
+port 179 nsew
+flabel metal2 s 522968 -800 523080 480 0 FreeSans 1400 90 0 0 la_data_in[112]
+port 180 nsew
+flabel metal2 s 526514 -800 526626 480 0 FreeSans 1400 90 0 0 la_data_in[113]
+port 181 nsew
+flabel metal2 s 530060 -800 530172 480 0 FreeSans 1400 90 0 0 la_data_in[114]
+port 182 nsew
+flabel metal2 s 533606 -800 533718 480 0 FreeSans 1400 90 0 0 la_data_in[115]
+port 183 nsew
+flabel metal2 s 537152 -800 537264 480 0 FreeSans 1400 90 0 0 la_data_in[116]
+port 184 nsew
+flabel metal2 s 540698 -800 540810 480 0 FreeSans 1400 90 0 0 la_data_in[117]
+port 185 nsew
+flabel metal2 s 544244 -800 544356 480 0 FreeSans 1400 90 0 0 la_data_in[118]
+port 186 nsew
+flabel metal2 s 547790 -800 547902 480 0 FreeSans 1400 90 0 0 la_data_in[119]
+port 187 nsew
+flabel metal2 s 164822 -800 164934 480 0 FreeSans 1400 90 0 0 la_data_in[11]
+port 188 nsew
+flabel metal2 s 551336 -800 551448 480 0 FreeSans 1400 90 0 0 la_data_in[120]
+port 189 nsew
+flabel metal2 s 554882 -800 554994 480 0 FreeSans 1400 90 0 0 la_data_in[121]
+port 190 nsew
+flabel metal2 s 558428 -800 558540 480 0 FreeSans 1400 90 0 0 la_data_in[122]
+port 191 nsew
+flabel metal2 s 561974 -800 562086 480 0 FreeSans 1400 90 0 0 la_data_in[123]
+port 192 nsew
+flabel metal2 s 565520 -800 565632 480 0 FreeSans 1400 90 0 0 la_data_in[124]
+port 193 nsew
+flabel metal2 s 569066 -800 569178 480 0 FreeSans 1400 90 0 0 la_data_in[125]
+port 194 nsew
+flabel metal2 s 572612 -800 572724 480 0 FreeSans 1400 90 0 0 la_data_in[126]
+port 195 nsew
+flabel metal2 s 576158 -800 576270 480 0 FreeSans 1400 90 0 0 la_data_in[127]
+port 196 nsew
+flabel metal2 s 168368 -800 168480 480 0 FreeSans 1400 90 0 0 la_data_in[12]
+port 197 nsew
+flabel metal2 s 171914 -800 172026 480 0 FreeSans 1400 90 0 0 la_data_in[13]
+port 198 nsew
+flabel metal2 s 175460 -800 175572 480 0 FreeSans 1400 90 0 0 la_data_in[14]
+port 199 nsew
+flabel metal2 s 179006 -800 179118 480 0 FreeSans 1400 90 0 0 la_data_in[15]
+port 200 nsew
+flabel metal2 s 182552 -800 182664 480 0 FreeSans 1400 90 0 0 la_data_in[16]
+port 201 nsew
+flabel metal2 s 186098 -800 186210 480 0 FreeSans 1400 90 0 0 la_data_in[17]
+port 202 nsew
+flabel metal2 s 189644 -800 189756 480 0 FreeSans 1400 90 0 0 la_data_in[18]
+port 203 nsew
+flabel metal2 s 193190 -800 193302 480 0 FreeSans 1400 90 0 0 la_data_in[19]
+port 204 nsew
+flabel metal2 s 129362 -800 129474 480 0 FreeSans 1400 90 0 0 la_data_in[1]
+port 205 nsew
+flabel metal2 s 196736 -800 196848 480 0 FreeSans 1400 90 0 0 la_data_in[20]
+port 206 nsew
+flabel metal2 s 200282 -800 200394 480 0 FreeSans 1400 90 0 0 la_data_in[21]
+port 207 nsew
+flabel metal2 s 203828 -800 203940 480 0 FreeSans 1400 90 0 0 la_data_in[22]
+port 208 nsew
+flabel metal2 s 207374 -800 207486 480 0 FreeSans 1400 90 0 0 la_data_in[23]
+port 209 nsew
+flabel metal2 s 210920 -800 211032 480 0 FreeSans 1400 90 0 0 la_data_in[24]
+port 210 nsew
+flabel metal2 s 214466 -800 214578 480 0 FreeSans 1400 90 0 0 la_data_in[25]
+port 211 nsew
+flabel metal2 s 218012 -800 218124 480 0 FreeSans 1400 90 0 0 la_data_in[26]
+port 212 nsew
+flabel metal2 s 221558 -800 221670 480 0 FreeSans 1400 90 0 0 la_data_in[27]
+port 213 nsew
+flabel metal2 s 225104 -800 225216 480 0 FreeSans 1400 90 0 0 la_data_in[28]
+port 214 nsew
+flabel metal2 s 228650 -800 228762 480 0 FreeSans 1400 90 0 0 la_data_in[29]
+port 215 nsew
+flabel metal2 s 132908 -800 133020 480 0 FreeSans 1400 90 0 0 la_data_in[2]
+port 216 nsew
+flabel metal2 s 232196 -800 232308 480 0 FreeSans 1400 90 0 0 la_data_in[30]
+port 217 nsew
+flabel metal2 s 235742 -800 235854 480 0 FreeSans 1400 90 0 0 la_data_in[31]
+port 218 nsew
+flabel metal2 s 239288 -800 239400 480 0 FreeSans 1400 90 0 0 la_data_in[32]
+port 219 nsew
+flabel metal2 s 242834 -800 242946 480 0 FreeSans 1400 90 0 0 la_data_in[33]
+port 220 nsew
+flabel metal2 s 246380 -800 246492 480 0 FreeSans 1400 90 0 0 la_data_in[34]
+port 221 nsew
+flabel metal2 s 249926 -800 250038 480 0 FreeSans 1400 90 0 0 la_data_in[35]
+port 222 nsew
+flabel metal2 s 253472 -800 253584 480 0 FreeSans 1400 90 0 0 la_data_in[36]
+port 223 nsew
+flabel metal2 s 257018 -800 257130 480 0 FreeSans 1400 90 0 0 la_data_in[37]
+port 224 nsew
+flabel metal2 s 260564 -800 260676 480 0 FreeSans 1400 90 0 0 la_data_in[38]
+port 225 nsew
+flabel metal2 s 264110 -800 264222 480 0 FreeSans 1400 90 0 0 la_data_in[39]
+port 226 nsew
+flabel metal2 s 136454 -800 136566 480 0 FreeSans 1400 90 0 0 la_data_in[3]
+port 227 nsew
+flabel metal2 s 267656 -800 267768 480 0 FreeSans 1400 90 0 0 la_data_in[40]
+port 228 nsew
+flabel metal2 s 271202 -800 271314 480 0 FreeSans 1400 90 0 0 la_data_in[41]
+port 229 nsew
+flabel metal2 s 274748 -800 274860 480 0 FreeSans 1400 90 0 0 la_data_in[42]
+port 230 nsew
+flabel metal2 s 278294 -800 278406 480 0 FreeSans 1400 90 0 0 la_data_in[43]
+port 231 nsew
+flabel metal2 s 281840 -800 281952 480 0 FreeSans 1400 90 0 0 la_data_in[44]
+port 232 nsew
+flabel metal2 s 285386 -800 285498 480 0 FreeSans 1400 90 0 0 la_data_in[45]
+port 233 nsew
+flabel metal2 s 288932 -800 289044 480 0 FreeSans 1400 90 0 0 la_data_in[46]
+port 234 nsew
+flabel metal2 s 292478 -800 292590 480 0 FreeSans 1400 90 0 0 la_data_in[47]
+port 235 nsew
+flabel metal2 s 296024 -800 296136 480 0 FreeSans 1400 90 0 0 la_data_in[48]
+port 236 nsew
+flabel metal2 s 299570 -800 299682 480 0 FreeSans 1400 90 0 0 la_data_in[49]
+port 237 nsew
+flabel metal2 s 140000 -800 140112 480 0 FreeSans 1400 90 0 0 la_data_in[4]
+port 238 nsew
+flabel metal2 s 303116 -800 303228 480 0 FreeSans 1400 90 0 0 la_data_in[50]
+port 239 nsew
+flabel metal2 s 306662 -800 306774 480 0 FreeSans 1400 90 0 0 la_data_in[51]
+port 240 nsew
+flabel metal2 s 310208 -800 310320 480 0 FreeSans 1400 90 0 0 la_data_in[52]
+port 241 nsew
+flabel metal2 s 313754 -800 313866 480 0 FreeSans 1400 90 0 0 la_data_in[53]
+port 242 nsew
+flabel metal2 s 317300 -800 317412 480 0 FreeSans 1400 90 0 0 la_data_in[54]
+port 243 nsew
+flabel metal2 s 320846 -800 320958 480 0 FreeSans 1400 90 0 0 la_data_in[55]
+port 244 nsew
+flabel metal2 s 324392 -800 324504 480 0 FreeSans 1400 90 0 0 la_data_in[56]
+port 245 nsew
+flabel metal2 s 327938 -800 328050 480 0 FreeSans 1400 90 0 0 la_data_in[57]
+port 246 nsew
+flabel metal2 s 331484 -800 331596 480 0 FreeSans 1400 90 0 0 la_data_in[58]
+port 247 nsew
+flabel metal2 s 335030 -800 335142 480 0 FreeSans 1400 90 0 0 la_data_in[59]
+port 248 nsew
+flabel metal2 s 143546 -800 143658 480 0 FreeSans 1400 90 0 0 la_data_in[5]
+port 249 nsew
+flabel metal2 s 338576 -800 338688 480 0 FreeSans 1400 90 0 0 la_data_in[60]
+port 250 nsew
+flabel metal2 s 342122 -800 342234 480 0 FreeSans 1400 90 0 0 la_data_in[61]
+port 251 nsew
+flabel metal2 s 345668 -800 345780 480 0 FreeSans 1400 90 0 0 la_data_in[62]
+port 252 nsew
+flabel metal2 s 349214 -800 349326 480 0 FreeSans 1400 90 0 0 la_data_in[63]
+port 253 nsew
+flabel metal2 s 352760 -800 352872 480 0 FreeSans 1400 90 0 0 la_data_in[64]
+port 254 nsew
+flabel metal2 s 356306 -800 356418 480 0 FreeSans 1400 90 0 0 la_data_in[65]
+port 255 nsew
+flabel metal2 s 359852 -800 359964 480 0 FreeSans 1400 90 0 0 la_data_in[66]
+port 256 nsew
+flabel metal2 s 363398 -800 363510 480 0 FreeSans 1400 90 0 0 la_data_in[67]
+port 257 nsew
+flabel metal2 s 366944 -800 367056 480 0 FreeSans 1400 90 0 0 la_data_in[68]
+port 258 nsew
+flabel metal2 s 370490 -800 370602 480 0 FreeSans 1400 90 0 0 la_data_in[69]
+port 259 nsew
+flabel metal2 s 147092 -800 147204 480 0 FreeSans 1400 90 0 0 la_data_in[6]
+port 260 nsew
+flabel metal2 s 374036 -800 374148 480 0 FreeSans 1400 90 0 0 la_data_in[70]
+port 261 nsew
+flabel metal2 s 377582 -800 377694 480 0 FreeSans 1400 90 0 0 la_data_in[71]
+port 262 nsew
+flabel metal2 s 381128 -800 381240 480 0 FreeSans 1400 90 0 0 la_data_in[72]
+port 263 nsew
+flabel metal2 s 384674 -800 384786 480 0 FreeSans 1400 90 0 0 la_data_in[73]
+port 264 nsew
+flabel metal2 s 388220 -800 388332 480 0 FreeSans 1400 90 0 0 la_data_in[74]
+port 265 nsew
+flabel metal2 s 391766 -800 391878 480 0 FreeSans 1400 90 0 0 la_data_in[75]
+port 266 nsew
+flabel metal2 s 395312 -800 395424 480 0 FreeSans 1400 90 0 0 la_data_in[76]
+port 267 nsew
+flabel metal2 s 398858 -800 398970 480 0 FreeSans 1400 90 0 0 la_data_in[77]
+port 268 nsew
+flabel metal2 s 402404 -800 402516 480 0 FreeSans 1400 90 0 0 la_data_in[78]
+port 269 nsew
+flabel metal2 s 405950 -800 406062 480 0 FreeSans 1400 90 0 0 la_data_in[79]
+port 270 nsew
+flabel metal2 s 150638 -800 150750 480 0 FreeSans 1400 90 0 0 la_data_in[7]
+port 271 nsew
+flabel metal2 s 409496 -800 409608 480 0 FreeSans 1400 90 0 0 la_data_in[80]
+port 272 nsew
+flabel metal2 s 413042 -800 413154 480 0 FreeSans 1400 90 0 0 la_data_in[81]
+port 273 nsew
+flabel metal2 s 416588 -800 416700 480 0 FreeSans 1400 90 0 0 la_data_in[82]
+port 274 nsew
+flabel metal2 s 420134 -800 420246 480 0 FreeSans 1400 90 0 0 la_data_in[83]
+port 275 nsew
+flabel metal2 s 423680 -800 423792 480 0 FreeSans 1400 90 0 0 la_data_in[84]
+port 276 nsew
+flabel metal2 s 427226 -800 427338 480 0 FreeSans 1400 90 0 0 la_data_in[85]
+port 277 nsew
+flabel metal2 s 430772 -800 430884 480 0 FreeSans 1400 90 0 0 la_data_in[86]
+port 278 nsew
+flabel metal2 s 434318 -800 434430 480 0 FreeSans 1400 90 0 0 la_data_in[87]
+port 279 nsew
+flabel metal2 s 437864 -800 437976 480 0 FreeSans 1400 90 0 0 la_data_in[88]
+port 280 nsew
+flabel metal2 s 441410 -800 441522 480 0 FreeSans 1400 90 0 0 la_data_in[89]
+port 281 nsew
+flabel metal2 s 154184 -800 154296 480 0 FreeSans 1400 90 0 0 la_data_in[8]
+port 282 nsew
+flabel metal2 s 444956 -800 445068 480 0 FreeSans 1400 90 0 0 la_data_in[90]
+port 283 nsew
+flabel metal2 s 448502 -800 448614 480 0 FreeSans 1400 90 0 0 la_data_in[91]
+port 284 nsew
+flabel metal2 s 452048 -800 452160 480 0 FreeSans 1400 90 0 0 la_data_in[92]
+port 285 nsew
+flabel metal2 s 455594 -800 455706 480 0 FreeSans 1400 90 0 0 la_data_in[93]
+port 286 nsew
+flabel metal2 s 459140 -800 459252 480 0 FreeSans 1400 90 0 0 la_data_in[94]
+port 287 nsew
+flabel metal2 s 462686 -800 462798 480 0 FreeSans 1400 90 0 0 la_data_in[95]
+port 288 nsew
+flabel metal2 s 466232 -800 466344 480 0 FreeSans 1400 90 0 0 la_data_in[96]
+port 289 nsew
+flabel metal2 s 469778 -800 469890 480 0 FreeSans 1400 90 0 0 la_data_in[97]
+port 290 nsew
+flabel metal2 s 473324 -800 473436 480 0 FreeSans 1400 90 0 0 la_data_in[98]
+port 291 nsew
+flabel metal2 s 476870 -800 476982 480 0 FreeSans 1400 90 0 0 la_data_in[99]
+port 292 nsew
+flabel metal2 s 157730 -800 157842 480 0 FreeSans 1400 90 0 0 la_data_in[9]
+port 293 nsew
+flabel metal2 s 126998 -800 127110 480 0 FreeSans 1400 90 0 0 la_data_out[0]
+port 294 nsew
+flabel metal2 s 481598 -800 481710 480 0 FreeSans 1400 90 0 0 la_data_out[100]
+port 295 nsew
+flabel metal2 s 485144 -800 485256 480 0 FreeSans 1400 90 0 0 la_data_out[101]
+port 296 nsew
+flabel metal2 s 488690 -800 488802 480 0 FreeSans 1400 90 0 0 la_data_out[102]
+port 297 nsew
+flabel metal2 s 492236 -800 492348 480 0 FreeSans 1400 90 0 0 la_data_out[103]
+port 298 nsew
+flabel metal2 s 495782 -800 495894 480 0 FreeSans 1400 90 0 0 la_data_out[104]
+port 299 nsew
+flabel metal2 s 499328 -800 499440 480 0 FreeSans 1400 90 0 0 la_data_out[105]
+port 300 nsew
+flabel metal2 s 502874 -800 502986 480 0 FreeSans 1400 90 0 0 la_data_out[106]
+port 301 nsew
+flabel metal2 s 506420 -800 506532 480 0 FreeSans 1400 90 0 0 la_data_out[107]
+port 302 nsew
+flabel metal2 s 509966 -800 510078 480 0 FreeSans 1400 90 0 0 la_data_out[108]
+port 303 nsew
+flabel metal2 s 513512 -800 513624 480 0 FreeSans 1400 90 0 0 la_data_out[109]
+port 304 nsew
+flabel metal2 s 162458 -800 162570 480 0 FreeSans 1400 90 0 0 la_data_out[10]
+port 305 nsew
+flabel metal2 s 517058 -800 517170 480 0 FreeSans 1400 90 0 0 la_data_out[110]
+port 306 nsew
+flabel metal2 s 520604 -800 520716 480 0 FreeSans 1400 90 0 0 la_data_out[111]
+port 307 nsew
+flabel metal2 s 524150 -800 524262 480 0 FreeSans 1400 90 0 0 la_data_out[112]
+port 308 nsew
+flabel metal2 s 527696 -800 527808 480 0 FreeSans 1400 90 0 0 la_data_out[113]
+port 309 nsew
+flabel metal2 s 531242 -800 531354 480 0 FreeSans 1400 90 0 0 la_data_out[114]
+port 310 nsew
+flabel metal2 s 534788 -800 534900 480 0 FreeSans 1400 90 0 0 la_data_out[115]
+port 311 nsew
+flabel metal2 s 538334 -800 538446 480 0 FreeSans 1400 90 0 0 la_data_out[116]
+port 312 nsew
+flabel metal2 s 541880 -800 541992 480 0 FreeSans 1400 90 0 0 la_data_out[117]
+port 313 nsew
+flabel metal2 s 545426 -800 545538 480 0 FreeSans 1400 90 0 0 la_data_out[118]
+port 314 nsew
+flabel metal2 s 548972 -800 549084 480 0 FreeSans 1400 90 0 0 la_data_out[119]
+port 315 nsew
+flabel metal2 s 166004 -800 166116 480 0 FreeSans 1400 90 0 0 la_data_out[11]
+port 316 nsew
+flabel metal2 s 552518 -800 552630 480 0 FreeSans 1400 90 0 0 la_data_out[120]
+port 317 nsew
+flabel metal2 s 556064 -800 556176 480 0 FreeSans 1400 90 0 0 la_data_out[121]
+port 318 nsew
+flabel metal2 s 559610 -800 559722 480 0 FreeSans 1400 90 0 0 la_data_out[122]
+port 319 nsew
+flabel metal2 s 563156 -800 563268 480 0 FreeSans 1400 90 0 0 la_data_out[123]
+port 320 nsew
+flabel metal2 s 566702 -800 566814 480 0 FreeSans 1400 90 0 0 la_data_out[124]
+port 321 nsew
+flabel metal2 s 570248 -800 570360 480 0 FreeSans 1400 90 0 0 la_data_out[125]
+port 322 nsew
+flabel metal2 s 573794 -800 573906 480 0 FreeSans 1400 90 0 0 la_data_out[126]
+port 323 nsew
+flabel metal2 s 577340 -800 577452 480 0 FreeSans 1400 90 0 0 la_data_out[127]
+port 324 nsew
+flabel metal2 s 169550 -800 169662 480 0 FreeSans 1400 90 0 0 la_data_out[12]
+port 325 nsew
+flabel metal2 s 173096 -800 173208 480 0 FreeSans 1400 90 0 0 la_data_out[13]
+port 326 nsew
+flabel metal2 s 176642 -800 176754 480 0 FreeSans 1400 90 0 0 la_data_out[14]
+port 327 nsew
+flabel metal2 s 180188 -800 180300 480 0 FreeSans 1400 90 0 0 la_data_out[15]
+port 328 nsew
+flabel metal2 s 183734 -800 183846 480 0 FreeSans 1400 90 0 0 la_data_out[16]
+port 329 nsew
+flabel metal2 s 187280 -800 187392 480 0 FreeSans 1400 90 0 0 la_data_out[17]
+port 330 nsew
+flabel metal2 s 190826 -800 190938 480 0 FreeSans 1400 90 0 0 la_data_out[18]
+port 331 nsew
+flabel metal2 s 194372 -800 194484 480 0 FreeSans 1400 90 0 0 la_data_out[19]
+port 332 nsew
+flabel metal2 s 130544 -800 130656 480 0 FreeSans 1400 90 0 0 la_data_out[1]
+port 333 nsew
+flabel metal2 s 197918 -800 198030 480 0 FreeSans 1400 90 0 0 la_data_out[20]
+port 334 nsew
+flabel metal2 s 201464 -800 201576 480 0 FreeSans 1400 90 0 0 la_data_out[21]
+port 335 nsew
+flabel metal2 s 205010 -800 205122 480 0 FreeSans 1400 90 0 0 la_data_out[22]
+port 336 nsew
+flabel metal2 s 208556 -800 208668 480 0 FreeSans 1400 90 0 0 la_data_out[23]
+port 337 nsew
+flabel metal2 s 212102 -800 212214 480 0 FreeSans 1400 90 0 0 la_data_out[24]
+port 338 nsew
+flabel metal2 s 215648 -800 215760 480 0 FreeSans 1400 90 0 0 la_data_out[25]
+port 339 nsew
+flabel metal2 s 219194 -800 219306 480 0 FreeSans 1400 90 0 0 la_data_out[26]
+port 340 nsew
+flabel metal2 s 222740 -800 222852 480 0 FreeSans 1400 90 0 0 la_data_out[27]
+port 341 nsew
+flabel metal2 s 226286 -800 226398 480 0 FreeSans 1400 90 0 0 la_data_out[28]
+port 342 nsew
+flabel metal2 s 229832 -800 229944 480 0 FreeSans 1400 90 0 0 la_data_out[29]
+port 343 nsew
+flabel metal2 s 134090 -800 134202 480 0 FreeSans 1400 90 0 0 la_data_out[2]
+port 344 nsew
+flabel metal2 s 233378 -800 233490 480 0 FreeSans 1400 90 0 0 la_data_out[30]
+port 345 nsew
+flabel metal2 s 236924 -800 237036 480 0 FreeSans 1400 90 0 0 la_data_out[31]
+port 346 nsew
+flabel metal2 s 240470 -800 240582 480 0 FreeSans 1400 90 0 0 la_data_out[32]
+port 347 nsew
+flabel metal2 s 244016 -800 244128 480 0 FreeSans 1400 90 0 0 la_data_out[33]
+port 348 nsew
+flabel metal2 s 247562 -800 247674 480 0 FreeSans 1400 90 0 0 la_data_out[34]
+port 349 nsew
+flabel metal2 s 251108 -800 251220 480 0 FreeSans 1400 90 0 0 la_data_out[35]
+port 350 nsew
+flabel metal2 s 254654 -800 254766 480 0 FreeSans 1400 90 0 0 la_data_out[36]
+port 351 nsew
+flabel metal2 s 258200 -800 258312 480 0 FreeSans 1400 90 0 0 la_data_out[37]
+port 352 nsew
+flabel metal2 s 261746 -800 261858 480 0 FreeSans 1400 90 0 0 la_data_out[38]
+port 353 nsew
+flabel metal2 s 265292 -800 265404 480 0 FreeSans 1400 90 0 0 la_data_out[39]
+port 354 nsew
+flabel metal2 s 137636 -800 137748 480 0 FreeSans 1400 90 0 0 la_data_out[3]
+port 355 nsew
+flabel metal2 s 268838 -800 268950 480 0 FreeSans 1400 90 0 0 la_data_out[40]
+port 356 nsew
+flabel metal2 s 272384 -800 272496 480 0 FreeSans 1400 90 0 0 la_data_out[41]
+port 357 nsew
+flabel metal2 s 275930 -800 276042 480 0 FreeSans 1400 90 0 0 la_data_out[42]
+port 358 nsew
+flabel metal2 s 279476 -800 279588 480 0 FreeSans 1400 90 0 0 la_data_out[43]
+port 359 nsew
+flabel metal2 s 283022 -800 283134 480 0 FreeSans 1400 90 0 0 la_data_out[44]
+port 360 nsew
+flabel metal2 s 286568 -800 286680 480 0 FreeSans 1400 90 0 0 la_data_out[45]
+port 361 nsew
+flabel metal2 s 290114 -800 290226 480 0 FreeSans 1400 90 0 0 la_data_out[46]
+port 362 nsew
+flabel metal2 s 293660 -800 293772 480 0 FreeSans 1400 90 0 0 la_data_out[47]
+port 363 nsew
+flabel metal2 s 297206 -800 297318 480 0 FreeSans 1400 90 0 0 la_data_out[48]
+port 364 nsew
+flabel metal2 s 300752 -800 300864 480 0 FreeSans 1400 90 0 0 la_data_out[49]
+port 365 nsew
+flabel metal2 s 141182 -800 141294 480 0 FreeSans 1400 90 0 0 la_data_out[4]
+port 366 nsew
+flabel metal2 s 304298 -800 304410 480 0 FreeSans 1400 90 0 0 la_data_out[50]
+port 367 nsew
+flabel metal2 s 307844 -800 307956 480 0 FreeSans 1400 90 0 0 la_data_out[51]
+port 368 nsew
+flabel metal2 s 311390 -800 311502 480 0 FreeSans 1400 90 0 0 la_data_out[52]
+port 369 nsew
+flabel metal2 s 314936 -800 315048 480 0 FreeSans 1400 90 0 0 la_data_out[53]
+port 370 nsew
+flabel metal2 s 318482 -800 318594 480 0 FreeSans 1400 90 0 0 la_data_out[54]
+port 371 nsew
+flabel metal2 s 322028 -800 322140 480 0 FreeSans 1400 90 0 0 la_data_out[55]
+port 372 nsew
+flabel metal2 s 325574 -800 325686 480 0 FreeSans 1400 90 0 0 la_data_out[56]
+port 373 nsew
+flabel metal2 s 329120 -800 329232 480 0 FreeSans 1400 90 0 0 la_data_out[57]
+port 374 nsew
+flabel metal2 s 332666 -800 332778 480 0 FreeSans 1400 90 0 0 la_data_out[58]
+port 375 nsew
+flabel metal2 s 336212 -800 336324 480 0 FreeSans 1400 90 0 0 la_data_out[59]
+port 376 nsew
+flabel metal2 s 144728 -800 144840 480 0 FreeSans 1400 90 0 0 la_data_out[5]
+port 377 nsew
+flabel metal2 s 339758 -800 339870 480 0 FreeSans 1400 90 0 0 la_data_out[60]
+port 378 nsew
+flabel metal2 s 343304 -800 343416 480 0 FreeSans 1400 90 0 0 la_data_out[61]
+port 379 nsew
+flabel metal2 s 346850 -800 346962 480 0 FreeSans 1400 90 0 0 la_data_out[62]
+port 380 nsew
+flabel metal2 s 350396 -800 350508 480 0 FreeSans 1400 90 0 0 la_data_out[63]
+port 381 nsew
+flabel metal2 s 353942 -800 354054 480 0 FreeSans 1400 90 0 0 la_data_out[64]
+port 382 nsew
+flabel metal2 s 357488 -800 357600 480 0 FreeSans 1400 90 0 0 la_data_out[65]
+port 383 nsew
+flabel metal2 s 361034 -800 361146 480 0 FreeSans 1400 90 0 0 la_data_out[66]
+port 384 nsew
+flabel metal2 s 364580 -800 364692 480 0 FreeSans 1400 90 0 0 la_data_out[67]
+port 385 nsew
+flabel metal2 s 368126 -800 368238 480 0 FreeSans 1400 90 0 0 la_data_out[68]
+port 386 nsew
+flabel metal2 s 371672 -800 371784 480 0 FreeSans 1400 90 0 0 la_data_out[69]
+port 387 nsew
+flabel metal2 s 148274 -800 148386 480 0 FreeSans 1400 90 0 0 la_data_out[6]
+port 388 nsew
+flabel metal2 s 375218 -800 375330 480 0 FreeSans 1400 90 0 0 la_data_out[70]
+port 389 nsew
+flabel metal2 s 378764 -800 378876 480 0 FreeSans 1400 90 0 0 la_data_out[71]
+port 390 nsew
+flabel metal2 s 382310 -800 382422 480 0 FreeSans 1400 90 0 0 la_data_out[72]
+port 391 nsew
+flabel metal2 s 385856 -800 385968 480 0 FreeSans 1400 90 0 0 la_data_out[73]
+port 392 nsew
+flabel metal2 s 389402 -800 389514 480 0 FreeSans 1400 90 0 0 la_data_out[74]
+port 393 nsew
+flabel metal2 s 392948 -800 393060 480 0 FreeSans 1400 90 0 0 la_data_out[75]
+port 394 nsew
+flabel metal2 s 396494 -800 396606 480 0 FreeSans 1400 90 0 0 la_data_out[76]
+port 395 nsew
+flabel metal2 s 400040 -800 400152 480 0 FreeSans 1400 90 0 0 la_data_out[77]
+port 396 nsew
+flabel metal2 s 403586 -800 403698 480 0 FreeSans 1400 90 0 0 la_data_out[78]
+port 397 nsew
+flabel metal2 s 407132 -800 407244 480 0 FreeSans 1400 90 0 0 la_data_out[79]
+port 398 nsew
+flabel metal2 s 151820 -800 151932 480 0 FreeSans 1400 90 0 0 la_data_out[7]
+port 399 nsew
+flabel metal2 s 410678 -800 410790 480 0 FreeSans 1400 90 0 0 la_data_out[80]
+port 400 nsew
+flabel metal2 s 414224 -800 414336 480 0 FreeSans 1400 90 0 0 la_data_out[81]
+port 401 nsew
+flabel metal2 s 417770 -800 417882 480 0 FreeSans 1400 90 0 0 la_data_out[82]
+port 402 nsew
+flabel metal2 s 421316 -800 421428 480 0 FreeSans 1400 90 0 0 la_data_out[83]
+port 403 nsew
+flabel metal2 s 424862 -800 424974 480 0 FreeSans 1400 90 0 0 la_data_out[84]
+port 404 nsew
+flabel metal2 s 428408 -800 428520 480 0 FreeSans 1400 90 0 0 la_data_out[85]
+port 405 nsew
+flabel metal2 s 431954 -800 432066 480 0 FreeSans 1400 90 0 0 la_data_out[86]
+port 406 nsew
+flabel metal2 s 435500 -800 435612 480 0 FreeSans 1400 90 0 0 la_data_out[87]
+port 407 nsew
+flabel metal2 s 439046 -800 439158 480 0 FreeSans 1400 90 0 0 la_data_out[88]
+port 408 nsew
+flabel metal2 s 442592 -800 442704 480 0 FreeSans 1400 90 0 0 la_data_out[89]
+port 409 nsew
+flabel metal2 s 155366 -800 155478 480 0 FreeSans 1400 90 0 0 la_data_out[8]
+port 410 nsew
+flabel metal2 s 446138 -800 446250 480 0 FreeSans 1400 90 0 0 la_data_out[90]
+port 411 nsew
+flabel metal2 s 449684 -800 449796 480 0 FreeSans 1400 90 0 0 la_data_out[91]
+port 412 nsew
+flabel metal2 s 453230 -800 453342 480 0 FreeSans 1400 90 0 0 la_data_out[92]
+port 413 nsew
+flabel metal2 s 456776 -800 456888 480 0 FreeSans 1400 90 0 0 la_data_out[93]
+port 414 nsew
+flabel metal2 s 460322 -800 460434 480 0 FreeSans 1400 90 0 0 la_data_out[94]
+port 415 nsew
+flabel metal2 s 463868 -800 463980 480 0 FreeSans 1400 90 0 0 la_data_out[95]
+port 416 nsew
+flabel metal2 s 467414 -800 467526 480 0 FreeSans 1400 90 0 0 la_data_out[96]
+port 417 nsew
+flabel metal2 s 470960 -800 471072 480 0 FreeSans 1400 90 0 0 la_data_out[97]
+port 418 nsew
+flabel metal2 s 474506 -800 474618 480 0 FreeSans 1400 90 0 0 la_data_out[98]
+port 419 nsew
+flabel metal2 s 478052 -800 478164 480 0 FreeSans 1400 90 0 0 la_data_out[99]
+port 420 nsew
+flabel metal2 s 158912 -800 159024 480 0 FreeSans 1400 90 0 0 la_data_out[9]
+port 421 nsew
+flabel metal2 s 128180 -800 128292 480 0 FreeSans 1400 90 0 0 la_oenb[0]
+port 422 nsew
+flabel metal2 s 482780 -800 482892 480 0 FreeSans 1400 90 0 0 la_oenb[100]
+port 423 nsew
+flabel metal2 s 486326 -800 486438 480 0 FreeSans 1400 90 0 0 la_oenb[101]
+port 424 nsew
+flabel metal2 s 489872 -800 489984 480 0 FreeSans 1400 90 0 0 la_oenb[102]
+port 425 nsew
+flabel metal2 s 493418 -800 493530 480 0 FreeSans 1400 90 0 0 la_oenb[103]
+port 426 nsew
+flabel metal2 s 496964 -800 497076 480 0 FreeSans 1400 90 0 0 la_oenb[104]
+port 427 nsew
+flabel metal2 s 500510 -800 500622 480 0 FreeSans 1400 90 0 0 la_oenb[105]
+port 428 nsew
+flabel metal2 s 504056 -800 504168 480 0 FreeSans 1400 90 0 0 la_oenb[106]
+port 429 nsew
+flabel metal2 s 507602 -800 507714 480 0 FreeSans 1400 90 0 0 la_oenb[107]
+port 430 nsew
+flabel metal2 s 511148 -800 511260 480 0 FreeSans 1400 90 0 0 la_oenb[108]
+port 431 nsew
+flabel metal2 s 514694 -800 514806 480 0 FreeSans 1400 90 0 0 la_oenb[109]
+port 432 nsew
+flabel metal2 s 163640 -800 163752 480 0 FreeSans 1400 90 0 0 la_oenb[10]
+port 433 nsew
+flabel metal2 s 518240 -800 518352 480 0 FreeSans 1400 90 0 0 la_oenb[110]
+port 434 nsew
+flabel metal2 s 521786 -800 521898 480 0 FreeSans 1400 90 0 0 la_oenb[111]
+port 435 nsew
+flabel metal2 s 525332 -800 525444 480 0 FreeSans 1400 90 0 0 la_oenb[112]
+port 436 nsew
+flabel metal2 s 528878 -800 528990 480 0 FreeSans 1400 90 0 0 la_oenb[113]
+port 437 nsew
+flabel metal2 s 532424 -800 532536 480 0 FreeSans 1400 90 0 0 la_oenb[114]
+port 438 nsew
+flabel metal2 s 535970 -800 536082 480 0 FreeSans 1400 90 0 0 la_oenb[115]
+port 439 nsew
+flabel metal2 s 539516 -800 539628 480 0 FreeSans 1400 90 0 0 la_oenb[116]
+port 440 nsew
+flabel metal2 s 543062 -800 543174 480 0 FreeSans 1400 90 0 0 la_oenb[117]
+port 441 nsew
+flabel metal2 s 546608 -800 546720 480 0 FreeSans 1400 90 0 0 la_oenb[118]
+port 442 nsew
+flabel metal2 s 550154 -800 550266 480 0 FreeSans 1400 90 0 0 la_oenb[119]
+port 443 nsew
+flabel metal2 s 167186 -800 167298 480 0 FreeSans 1400 90 0 0 la_oenb[11]
+port 444 nsew
+flabel metal2 s 553700 -800 553812 480 0 FreeSans 1400 90 0 0 la_oenb[120]
+port 445 nsew
+flabel metal2 s 557246 -800 557358 480 0 FreeSans 1400 90 0 0 la_oenb[121]
+port 446 nsew
+flabel metal2 s 560792 -800 560904 480 0 FreeSans 1400 90 0 0 la_oenb[122]
+port 447 nsew
+flabel metal2 s 564338 -800 564450 480 0 FreeSans 1400 90 0 0 la_oenb[123]
+port 448 nsew
+flabel metal2 s 567884 -800 567996 480 0 FreeSans 1400 90 0 0 la_oenb[124]
+port 449 nsew
+flabel metal2 s 571430 -800 571542 480 0 FreeSans 1400 90 0 0 la_oenb[125]
+port 450 nsew
+flabel metal2 s 574976 -800 575088 480 0 FreeSans 1400 90 0 0 la_oenb[126]
+port 451 nsew
+flabel metal2 s 578522 -800 578634 480 0 FreeSans 1400 90 0 0 la_oenb[127]
+port 452 nsew
+flabel metal2 s 170732 -800 170844 480 0 FreeSans 1400 90 0 0 la_oenb[12]
+port 453 nsew
+flabel metal2 s 174278 -800 174390 480 0 FreeSans 1400 90 0 0 la_oenb[13]
+port 454 nsew
+flabel metal2 s 177824 -800 177936 480 0 FreeSans 1400 90 0 0 la_oenb[14]
+port 455 nsew
+flabel metal2 s 181370 -800 181482 480 0 FreeSans 1400 90 0 0 la_oenb[15]
+port 456 nsew
+flabel metal2 s 184916 -800 185028 480 0 FreeSans 1400 90 0 0 la_oenb[16]
+port 457 nsew
+flabel metal2 s 188462 -800 188574 480 0 FreeSans 1400 90 0 0 la_oenb[17]
+port 458 nsew
+flabel metal2 s 192008 -800 192120 480 0 FreeSans 1400 90 0 0 la_oenb[18]
+port 459 nsew
+flabel metal2 s 195554 -800 195666 480 0 FreeSans 1400 90 0 0 la_oenb[19]
+port 460 nsew
+flabel metal2 s 131726 -800 131838 480 0 FreeSans 1400 90 0 0 la_oenb[1]
+port 461 nsew
+flabel metal2 s 199100 -800 199212 480 0 FreeSans 1400 90 0 0 la_oenb[20]
+port 462 nsew
+flabel metal2 s 202646 -800 202758 480 0 FreeSans 1400 90 0 0 la_oenb[21]
+port 463 nsew
+flabel metal2 s 206192 -800 206304 480 0 FreeSans 1400 90 0 0 la_oenb[22]
+port 464 nsew
+flabel metal2 s 209738 -800 209850 480 0 FreeSans 1400 90 0 0 la_oenb[23]
+port 465 nsew
+flabel metal2 s 213284 -800 213396 480 0 FreeSans 1400 90 0 0 la_oenb[24]
+port 466 nsew
+flabel metal2 s 216830 -800 216942 480 0 FreeSans 1400 90 0 0 la_oenb[25]
+port 467 nsew
+flabel metal2 s 220376 -800 220488 480 0 FreeSans 1400 90 0 0 la_oenb[26]
+port 468 nsew
+flabel metal2 s 223922 -800 224034 480 0 FreeSans 1400 90 0 0 la_oenb[27]
+port 469 nsew
+flabel metal2 s 227468 -800 227580 480 0 FreeSans 1400 90 0 0 la_oenb[28]
+port 470 nsew
+flabel metal2 s 231014 -800 231126 480 0 FreeSans 1400 90 0 0 la_oenb[29]
+port 471 nsew
+flabel metal2 s 135272 -800 135384 480 0 FreeSans 1400 90 0 0 la_oenb[2]
+port 472 nsew
+flabel metal2 s 234560 -800 234672 480 0 FreeSans 1400 90 0 0 la_oenb[30]
+port 473 nsew
+flabel metal2 s 238106 -800 238218 480 0 FreeSans 1400 90 0 0 la_oenb[31]
+port 474 nsew
+flabel metal2 s 241652 -800 241764 480 0 FreeSans 1400 90 0 0 la_oenb[32]
+port 475 nsew
+flabel metal2 s 245198 -800 245310 480 0 FreeSans 1400 90 0 0 la_oenb[33]
+port 476 nsew
+flabel metal2 s 248744 -800 248856 480 0 FreeSans 1400 90 0 0 la_oenb[34]
+port 477 nsew
+flabel metal2 s 252290 -800 252402 480 0 FreeSans 1400 90 0 0 la_oenb[35]
+port 478 nsew
+flabel metal2 s 255836 -800 255948 480 0 FreeSans 1400 90 0 0 la_oenb[36]
+port 479 nsew
+flabel metal2 s 259382 -800 259494 480 0 FreeSans 1400 90 0 0 la_oenb[37]
+port 480 nsew
+flabel metal2 s 262928 -800 263040 480 0 FreeSans 1400 90 0 0 la_oenb[38]
+port 481 nsew
+flabel metal2 s 266474 -800 266586 480 0 FreeSans 1400 90 0 0 la_oenb[39]
+port 482 nsew
+flabel metal2 s 138818 -800 138930 480 0 FreeSans 1400 90 0 0 la_oenb[3]
+port 483 nsew
+flabel metal2 s 270020 -800 270132 480 0 FreeSans 1400 90 0 0 la_oenb[40]
+port 484 nsew
+flabel metal2 s 273566 -800 273678 480 0 FreeSans 1400 90 0 0 la_oenb[41]
+port 485 nsew
+flabel metal2 s 277112 -800 277224 480 0 FreeSans 1400 90 0 0 la_oenb[42]
+port 486 nsew
+flabel metal2 s 280658 -800 280770 480 0 FreeSans 1400 90 0 0 la_oenb[43]
+port 487 nsew
+flabel metal2 s 284204 -800 284316 480 0 FreeSans 1400 90 0 0 la_oenb[44]
+port 488 nsew
+flabel metal2 s 287750 -800 287862 480 0 FreeSans 1400 90 0 0 la_oenb[45]
+port 489 nsew
+flabel metal2 s 291296 -800 291408 480 0 FreeSans 1400 90 0 0 la_oenb[46]
+port 490 nsew
+flabel metal2 s 294842 -800 294954 480 0 FreeSans 1400 90 0 0 la_oenb[47]
+port 491 nsew
+flabel metal2 s 298388 -800 298500 480 0 FreeSans 1400 90 0 0 la_oenb[48]
+port 492 nsew
+flabel metal2 s 301934 -800 302046 480 0 FreeSans 1400 90 0 0 la_oenb[49]
+port 493 nsew
+flabel metal2 s 142364 -800 142476 480 0 FreeSans 1400 90 0 0 la_oenb[4]
+port 494 nsew
+flabel metal2 s 305480 -800 305592 480 0 FreeSans 1400 90 0 0 la_oenb[50]
+port 495 nsew
+flabel metal2 s 309026 -800 309138 480 0 FreeSans 1400 90 0 0 la_oenb[51]
+port 496 nsew
+flabel metal2 s 312572 -800 312684 480 0 FreeSans 1400 90 0 0 la_oenb[52]
+port 497 nsew
+flabel metal2 s 316118 -800 316230 480 0 FreeSans 1400 90 0 0 la_oenb[53]
+port 498 nsew
+flabel metal2 s 319664 -800 319776 480 0 FreeSans 1400 90 0 0 la_oenb[54]
+port 499 nsew
+flabel metal2 s 323210 -800 323322 480 0 FreeSans 1400 90 0 0 la_oenb[55]
+port 500 nsew
+flabel metal2 s 326756 -800 326868 480 0 FreeSans 1400 90 0 0 la_oenb[56]
+port 501 nsew
+flabel metal2 s 330302 -800 330414 480 0 FreeSans 1400 90 0 0 la_oenb[57]
+port 502 nsew
+flabel metal2 s 333848 -800 333960 480 0 FreeSans 1400 90 0 0 la_oenb[58]
+port 503 nsew
+flabel metal2 s 337394 -800 337506 480 0 FreeSans 1400 90 0 0 la_oenb[59]
+port 504 nsew
+flabel metal2 s 145910 -800 146022 480 0 FreeSans 1400 90 0 0 la_oenb[5]
+port 505 nsew
+flabel metal2 s 340940 -800 341052 480 0 FreeSans 1400 90 0 0 la_oenb[60]
+port 506 nsew
+flabel metal2 s 344486 -800 344598 480 0 FreeSans 1400 90 0 0 la_oenb[61]
+port 507 nsew
+flabel metal2 s 348032 -800 348144 480 0 FreeSans 1400 90 0 0 la_oenb[62]
+port 508 nsew
+flabel metal2 s 351578 -800 351690 480 0 FreeSans 1400 90 0 0 la_oenb[63]
+port 509 nsew
+flabel metal2 s 355124 -800 355236 480 0 FreeSans 1400 90 0 0 la_oenb[64]
+port 510 nsew
+flabel metal2 s 358670 -800 358782 480 0 FreeSans 1400 90 0 0 la_oenb[65]
+port 511 nsew
+flabel metal2 s 362216 -800 362328 480 0 FreeSans 1400 90 0 0 la_oenb[66]
+port 512 nsew
+flabel metal2 s 365762 -800 365874 480 0 FreeSans 1400 90 0 0 la_oenb[67]
+port 513 nsew
+flabel metal2 s 369308 -800 369420 480 0 FreeSans 1400 90 0 0 la_oenb[68]
+port 514 nsew
+flabel metal2 s 372854 -800 372966 480 0 FreeSans 1400 90 0 0 la_oenb[69]
+port 515 nsew
+flabel metal2 s 149456 -800 149568 480 0 FreeSans 1400 90 0 0 la_oenb[6]
+port 516 nsew
+flabel metal2 s 376400 -800 376512 480 0 FreeSans 1400 90 0 0 la_oenb[70]
+port 517 nsew
+flabel metal2 s 379946 -800 380058 480 0 FreeSans 1400 90 0 0 la_oenb[71]
+port 518 nsew
+flabel metal2 s 383492 -800 383604 480 0 FreeSans 1400 90 0 0 la_oenb[72]
+port 519 nsew
+flabel metal2 s 387038 -800 387150 480 0 FreeSans 1400 90 0 0 la_oenb[73]
+port 520 nsew
+flabel metal2 s 390584 -800 390696 480 0 FreeSans 1400 90 0 0 la_oenb[74]
+port 521 nsew
+flabel metal2 s 394130 -800 394242 480 0 FreeSans 1400 90 0 0 la_oenb[75]
+port 522 nsew
+flabel metal2 s 397676 -800 397788 480 0 FreeSans 1400 90 0 0 la_oenb[76]
+port 523 nsew
+flabel metal2 s 401222 -800 401334 480 0 FreeSans 1400 90 0 0 la_oenb[77]
+port 524 nsew
+flabel metal2 s 404768 -800 404880 480 0 FreeSans 1400 90 0 0 la_oenb[78]
+port 525 nsew
+flabel metal2 s 408314 -800 408426 480 0 FreeSans 1400 90 0 0 la_oenb[79]
+port 526 nsew
+flabel metal2 s 153002 -800 153114 480 0 FreeSans 1400 90 0 0 la_oenb[7]
+port 527 nsew
+flabel metal2 s 411860 -800 411972 480 0 FreeSans 1400 90 0 0 la_oenb[80]
+port 528 nsew
+flabel metal2 s 415406 -800 415518 480 0 FreeSans 1400 90 0 0 la_oenb[81]
+port 529 nsew
+flabel metal2 s 418952 -800 419064 480 0 FreeSans 1400 90 0 0 la_oenb[82]
+port 530 nsew
+flabel metal2 s 422498 -800 422610 480 0 FreeSans 1400 90 0 0 la_oenb[83]
+port 531 nsew
+flabel metal2 s 426044 -800 426156 480 0 FreeSans 1400 90 0 0 la_oenb[84]
+port 532 nsew
+flabel metal2 s 429590 -800 429702 480 0 FreeSans 1400 90 0 0 la_oenb[85]
+port 533 nsew
+flabel metal2 s 433136 -800 433248 480 0 FreeSans 1400 90 0 0 la_oenb[86]
+port 534 nsew
+flabel metal2 s 436682 -800 436794 480 0 FreeSans 1400 90 0 0 la_oenb[87]
+port 535 nsew
+flabel metal2 s 440228 -800 440340 480 0 FreeSans 1400 90 0 0 la_oenb[88]
+port 536 nsew
+flabel metal2 s 443774 -800 443886 480 0 FreeSans 1400 90 0 0 la_oenb[89]
+port 537 nsew
+flabel metal2 s 156548 -800 156660 480 0 FreeSans 1400 90 0 0 la_oenb[8]
+port 538 nsew
+flabel metal2 s 447320 -800 447432 480 0 FreeSans 1400 90 0 0 la_oenb[90]
+port 539 nsew
+flabel metal2 s 450866 -800 450978 480 0 FreeSans 1400 90 0 0 la_oenb[91]
+port 540 nsew
+flabel metal2 s 454412 -800 454524 480 0 FreeSans 1400 90 0 0 la_oenb[92]
+port 541 nsew
+flabel metal2 s 457958 -800 458070 480 0 FreeSans 1400 90 0 0 la_oenb[93]
+port 542 nsew
+flabel metal2 s 461504 -800 461616 480 0 FreeSans 1400 90 0 0 la_oenb[94]
+port 543 nsew
+flabel metal2 s 465050 -800 465162 480 0 FreeSans 1400 90 0 0 la_oenb[95]
+port 544 nsew
+flabel metal2 s 468596 -800 468708 480 0 FreeSans 1400 90 0 0 la_oenb[96]
+port 545 nsew
+flabel metal2 s 472142 -800 472254 480 0 FreeSans 1400 90 0 0 la_oenb[97]
+port 546 nsew
+flabel metal2 s 475688 -800 475800 480 0 FreeSans 1400 90 0 0 la_oenb[98]
+port 547 nsew
+flabel metal2 s 479234 -800 479346 480 0 FreeSans 1400 90 0 0 la_oenb[99]
+port 548 nsew
+flabel metal2 s 160094 -800 160206 480 0 FreeSans 1400 90 0 0 la_oenb[9]
+port 549 nsew
+flabel metal2 s 579704 -800 579816 480 0 FreeSans 1400 90 0 0 user_clock2
+port 550 nsew
+flabel metal2 s 580886 -800 580998 480 0 FreeSans 1400 90 0 0 user_irq[0]
+port 551 nsew
+flabel metal2 s 582068 -800 582180 480 0 FreeSans 1400 90 0 0 user_irq[1]
+port 552 nsew
+flabel metal2 s 583250 -800 583362 480 0 FreeSans 1400 90 0 0 user_irq[2]
+port 553 nsew
+flabel metal3 s 582340 639784 584800 644584 0 FreeSans 1400 0 0 0 vccd1
+port 554 nsew
+flabel metal3 s 582340 629784 584800 634584 0 FreeSans 1400 0 0 0 vccd1
+port 554 nsew
+flabel metal3 s 0 643842 1660 648642 0 FreeSans 1400 0 0 0 vccd2
+port 555 nsew
+flabel metal3 s 0 633842 1660 638642 0 FreeSans 1400 0 0 0 vccd2
+port 555 nsew
+flabel metal3 s 582340 540562 584800 545362 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 550562 584800 555362 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 235230 584800 240030 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 582340 225230 584800 230030 0 FreeSans 1400 0 0 0 vdda1
+port 556 nsew
+flabel metal3 s 0 204888 1660 209688 0 FreeSans 1400 0 0 0 vdda2
+port 557 nsew
+flabel metal3 s 0 214888 1660 219688 0 FreeSans 1400 0 0 0 vdda2
+port 557 nsew
+flabel metal3 s 520594 702340 525394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 558 nsew
+flabel metal3 s 510594 702340 515394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 558 nsew
+flabel metal3 s 582340 146830 584800 151630 0 FreeSans 1400 0 0 0 vssa1
+port 558 nsew
+flabel metal3 s 582340 136830 584800 141630 0 FreeSans 1400 0 0 0 vssa1
+port 558 nsew
+flabel metal3 s 0 559442 1660 564242 0 FreeSans 1400 0 0 0 vssa2
+port 559 nsew
+flabel metal3 s 0 549442 1660 554242 0 FreeSans 1400 0 0 0 vssa2
+port 559 nsew
+flabel metal3 s 582340 191430 584800 196230 0 FreeSans 1400 0 0 0 vssd1
+port 560 nsew
+flabel metal3 s 582340 181430 584800 186230 0 FreeSans 1400 0 0 0 vssd1
+port 560 nsew
+flabel metal3 s 0 172888 1660 177688 0 FreeSans 1400 0 0 0 vssd2
+port 561 nsew
+flabel metal3 s 0 162888 1660 167688 0 FreeSans 1400 0 0 0 vssd2
+port 561 nsew
+flabel metal2 s 524 -800 636 480 0 FreeSans 1400 90 0 0 wb_clk_i
+port 562 nsew
+flabel metal2 s 1706 -800 1818 480 0 FreeSans 1400 90 0 0 wb_rst_i
+port 563 nsew
+flabel metal2 s 2888 -800 3000 480 0 FreeSans 1400 90 0 0 wbs_ack_o
+port 564 nsew
+flabel metal2 s 7616 -800 7728 480 0 FreeSans 1400 90 0 0 wbs_adr_i[0]
+port 565 nsew
+flabel metal2 s 47804 -800 47916 480 0 FreeSans 1400 90 0 0 wbs_adr_i[10]
+port 566 nsew
+flabel metal2 s 51350 -800 51462 480 0 FreeSans 1400 90 0 0 wbs_adr_i[11]
+port 567 nsew
+flabel metal2 s 54896 -800 55008 480 0 FreeSans 1400 90 0 0 wbs_adr_i[12]
+port 568 nsew
+flabel metal2 s 58442 -800 58554 480 0 FreeSans 1400 90 0 0 wbs_adr_i[13]
+port 569 nsew
+flabel metal2 s 61988 -800 62100 480 0 FreeSans 1400 90 0 0 wbs_adr_i[14]
+port 570 nsew
+flabel metal2 s 65534 -800 65646 480 0 FreeSans 1400 90 0 0 wbs_adr_i[15]
+port 571 nsew
+flabel metal2 s 69080 -800 69192 480 0 FreeSans 1400 90 0 0 wbs_adr_i[16]
+port 572 nsew
+flabel metal2 s 72626 -800 72738 480 0 FreeSans 1400 90 0 0 wbs_adr_i[17]
+port 573 nsew
+flabel metal2 s 76172 -800 76284 480 0 FreeSans 1400 90 0 0 wbs_adr_i[18]
+port 574 nsew
+flabel metal2 s 79718 -800 79830 480 0 FreeSans 1400 90 0 0 wbs_adr_i[19]
+port 575 nsew
+flabel metal2 s 12344 -800 12456 480 0 FreeSans 1400 90 0 0 wbs_adr_i[1]
+port 576 nsew
+flabel metal2 s 83264 -800 83376 480 0 FreeSans 1400 90 0 0 wbs_adr_i[20]
+port 577 nsew
+flabel metal2 s 86810 -800 86922 480 0 FreeSans 1400 90 0 0 wbs_adr_i[21]
+port 578 nsew
+flabel metal2 s 90356 -800 90468 480 0 FreeSans 1400 90 0 0 wbs_adr_i[22]
+port 579 nsew
+flabel metal2 s 93902 -800 94014 480 0 FreeSans 1400 90 0 0 wbs_adr_i[23]
+port 580 nsew
+flabel metal2 s 97448 -800 97560 480 0 FreeSans 1400 90 0 0 wbs_adr_i[24]
+port 581 nsew
+flabel metal2 s 100994 -800 101106 480 0 FreeSans 1400 90 0 0 wbs_adr_i[25]
+port 582 nsew
+flabel metal2 s 104540 -800 104652 480 0 FreeSans 1400 90 0 0 wbs_adr_i[26]
+port 583 nsew
+flabel metal2 s 108086 -800 108198 480 0 FreeSans 1400 90 0 0 wbs_adr_i[27]
+port 584 nsew
+flabel metal2 s 111632 -800 111744 480 0 FreeSans 1400 90 0 0 wbs_adr_i[28]
+port 585 nsew
+flabel metal2 s 115178 -800 115290 480 0 FreeSans 1400 90 0 0 wbs_adr_i[29]
+port 586 nsew
+flabel metal2 s 17072 -800 17184 480 0 FreeSans 1400 90 0 0 wbs_adr_i[2]
+port 587 nsew
+flabel metal2 s 118724 -800 118836 480 0 FreeSans 1400 90 0 0 wbs_adr_i[30]
+port 588 nsew
+flabel metal2 s 122270 -800 122382 480 0 FreeSans 1400 90 0 0 wbs_adr_i[31]
+port 589 nsew
+flabel metal2 s 21800 -800 21912 480 0 FreeSans 1400 90 0 0 wbs_adr_i[3]
+port 590 nsew
+flabel metal2 s 26528 -800 26640 480 0 FreeSans 1400 90 0 0 wbs_adr_i[4]
+port 591 nsew
+flabel metal2 s 30074 -800 30186 480 0 FreeSans 1400 90 0 0 wbs_adr_i[5]
+port 592 nsew
+flabel metal2 s 33620 -800 33732 480 0 FreeSans 1400 90 0 0 wbs_adr_i[6]
+port 593 nsew
+flabel metal2 s 37166 -800 37278 480 0 FreeSans 1400 90 0 0 wbs_adr_i[7]
+port 594 nsew
+flabel metal2 s 40712 -800 40824 480 0 FreeSans 1400 90 0 0 wbs_adr_i[8]
+port 595 nsew
+flabel metal2 s 44258 -800 44370 480 0 FreeSans 1400 90 0 0 wbs_adr_i[9]
+port 596 nsew
+flabel metal2 s 4070 -800 4182 480 0 FreeSans 1400 90 0 0 wbs_cyc_i
+port 597 nsew
+flabel metal2 s 8798 -800 8910 480 0 FreeSans 1400 90 0 0 wbs_dat_i[0]
+port 598 nsew
+flabel metal2 s 48986 -800 49098 480 0 FreeSans 1400 90 0 0 wbs_dat_i[10]
+port 599 nsew
+flabel metal2 s 52532 -800 52644 480 0 FreeSans 1400 90 0 0 wbs_dat_i[11]
+port 600 nsew
+flabel metal2 s 56078 -800 56190 480 0 FreeSans 1400 90 0 0 wbs_dat_i[12]
+port 601 nsew
+flabel metal2 s 59624 -800 59736 480 0 FreeSans 1400 90 0 0 wbs_dat_i[13]
+port 602 nsew
+flabel metal2 s 63170 -800 63282 480 0 FreeSans 1400 90 0 0 wbs_dat_i[14]
+port 603 nsew
+flabel metal2 s 66716 -800 66828 480 0 FreeSans 1400 90 0 0 wbs_dat_i[15]
+port 604 nsew
+flabel metal2 s 70262 -800 70374 480 0 FreeSans 1400 90 0 0 wbs_dat_i[16]
+port 605 nsew
+flabel metal2 s 73808 -800 73920 480 0 FreeSans 1400 90 0 0 wbs_dat_i[17]
+port 606 nsew
+flabel metal2 s 77354 -800 77466 480 0 FreeSans 1400 90 0 0 wbs_dat_i[18]
+port 607 nsew
+flabel metal2 s 80900 -800 81012 480 0 FreeSans 1400 90 0 0 wbs_dat_i[19]
+port 608 nsew
+flabel metal2 s 13526 -800 13638 480 0 FreeSans 1400 90 0 0 wbs_dat_i[1]
+port 609 nsew
+flabel metal2 s 84446 -800 84558 480 0 FreeSans 1400 90 0 0 wbs_dat_i[20]
+port 610 nsew
+flabel metal2 s 87992 -800 88104 480 0 FreeSans 1400 90 0 0 wbs_dat_i[21]
+port 611 nsew
+flabel metal2 s 91538 -800 91650 480 0 FreeSans 1400 90 0 0 wbs_dat_i[22]
+port 612 nsew
+flabel metal2 s 95084 -800 95196 480 0 FreeSans 1400 90 0 0 wbs_dat_i[23]
+port 613 nsew
+flabel metal2 s 98630 -800 98742 480 0 FreeSans 1400 90 0 0 wbs_dat_i[24]
+port 614 nsew
+flabel metal2 s 102176 -800 102288 480 0 FreeSans 1400 90 0 0 wbs_dat_i[25]
+port 615 nsew
+flabel metal2 s 105722 -800 105834 480 0 FreeSans 1400 90 0 0 wbs_dat_i[26]
+port 616 nsew
+flabel metal2 s 109268 -800 109380 480 0 FreeSans 1400 90 0 0 wbs_dat_i[27]
+port 617 nsew
+flabel metal2 s 112814 -800 112926 480 0 FreeSans 1400 90 0 0 wbs_dat_i[28]
+port 618 nsew
+flabel metal2 s 116360 -800 116472 480 0 FreeSans 1400 90 0 0 wbs_dat_i[29]
+port 619 nsew
+flabel metal2 s 18254 -800 18366 480 0 FreeSans 1400 90 0 0 wbs_dat_i[2]
+port 620 nsew
+flabel metal2 s 119906 -800 120018 480 0 FreeSans 1400 90 0 0 wbs_dat_i[30]
+port 621 nsew
+flabel metal2 s 123452 -800 123564 480 0 FreeSans 1400 90 0 0 wbs_dat_i[31]
+port 622 nsew
+flabel metal2 s 22982 -800 23094 480 0 FreeSans 1400 90 0 0 wbs_dat_i[3]
+port 623 nsew
+flabel metal2 s 27710 -800 27822 480 0 FreeSans 1400 90 0 0 wbs_dat_i[4]
+port 624 nsew
+flabel metal2 s 31256 -800 31368 480 0 FreeSans 1400 90 0 0 wbs_dat_i[5]
+port 625 nsew
+flabel metal2 s 34802 -800 34914 480 0 FreeSans 1400 90 0 0 wbs_dat_i[6]
+port 626 nsew
+flabel metal2 s 38348 -800 38460 480 0 FreeSans 1400 90 0 0 wbs_dat_i[7]
+port 627 nsew
+flabel metal2 s 41894 -800 42006 480 0 FreeSans 1400 90 0 0 wbs_dat_i[8]
+port 628 nsew
+flabel metal2 s 45440 -800 45552 480 0 FreeSans 1400 90 0 0 wbs_dat_i[9]
+port 629 nsew
+flabel metal2 s 9980 -800 10092 480 0 FreeSans 1400 90 0 0 wbs_dat_o[0]
+port 630 nsew
+flabel metal2 s 50168 -800 50280 480 0 FreeSans 1400 90 0 0 wbs_dat_o[10]
+port 631 nsew
+flabel metal2 s 53714 -800 53826 480 0 FreeSans 1400 90 0 0 wbs_dat_o[11]
+port 632 nsew
+flabel metal2 s 57260 -800 57372 480 0 FreeSans 1400 90 0 0 wbs_dat_o[12]
+port 633 nsew
+flabel metal2 s 60806 -800 60918 480 0 FreeSans 1400 90 0 0 wbs_dat_o[13]
+port 634 nsew
+flabel metal2 s 64352 -800 64464 480 0 FreeSans 1400 90 0 0 wbs_dat_o[14]
+port 635 nsew
+flabel metal2 s 67898 -800 68010 480 0 FreeSans 1400 90 0 0 wbs_dat_o[15]
+port 636 nsew
+flabel metal2 s 71444 -800 71556 480 0 FreeSans 1400 90 0 0 wbs_dat_o[16]
+port 637 nsew
+flabel metal2 s 74990 -800 75102 480 0 FreeSans 1400 90 0 0 wbs_dat_o[17]
+port 638 nsew
+flabel metal2 s 78536 -800 78648 480 0 FreeSans 1400 90 0 0 wbs_dat_o[18]
+port 639 nsew
+flabel metal2 s 82082 -800 82194 480 0 FreeSans 1400 90 0 0 wbs_dat_o[19]
+port 640 nsew
+flabel metal2 s 14708 -800 14820 480 0 FreeSans 1400 90 0 0 wbs_dat_o[1]
+port 641 nsew
+flabel metal2 s 85628 -800 85740 480 0 FreeSans 1400 90 0 0 wbs_dat_o[20]
+port 642 nsew
+flabel metal2 s 89174 -800 89286 480 0 FreeSans 1400 90 0 0 wbs_dat_o[21]
+port 643 nsew
+flabel metal2 s 92720 -800 92832 480 0 FreeSans 1400 90 0 0 wbs_dat_o[22]
+port 644 nsew
+flabel metal2 s 96266 -800 96378 480 0 FreeSans 1400 90 0 0 wbs_dat_o[23]
+port 645 nsew
+flabel metal2 s 99812 -800 99924 480 0 FreeSans 1400 90 0 0 wbs_dat_o[24]
+port 646 nsew
+flabel metal2 s 103358 -800 103470 480 0 FreeSans 1400 90 0 0 wbs_dat_o[25]
+port 647 nsew
+flabel metal2 s 106904 -800 107016 480 0 FreeSans 1400 90 0 0 wbs_dat_o[26]
+port 648 nsew
+flabel metal2 s 110450 -800 110562 480 0 FreeSans 1400 90 0 0 wbs_dat_o[27]
+port 649 nsew
+flabel metal2 s 113996 -800 114108 480 0 FreeSans 1400 90 0 0 wbs_dat_o[28]
+port 650 nsew
+flabel metal2 s 117542 -800 117654 480 0 FreeSans 1400 90 0 0 wbs_dat_o[29]
+port 651 nsew
+flabel metal2 s 19436 -800 19548 480 0 FreeSans 1400 90 0 0 wbs_dat_o[2]
+port 652 nsew
+flabel metal2 s 121088 -800 121200 480 0 FreeSans 1400 90 0 0 wbs_dat_o[30]
+port 653 nsew
+flabel metal2 s 124634 -800 124746 480 0 FreeSans 1400 90 0 0 wbs_dat_o[31]
+port 654 nsew
+flabel metal2 s 24164 -800 24276 480 0 FreeSans 1400 90 0 0 wbs_dat_o[3]
+port 655 nsew
+flabel metal2 s 28892 -800 29004 480 0 FreeSans 1400 90 0 0 wbs_dat_o[4]
+port 656 nsew
+flabel metal2 s 32438 -800 32550 480 0 FreeSans 1400 90 0 0 wbs_dat_o[5]
+port 657 nsew
+flabel metal2 s 35984 -800 36096 480 0 FreeSans 1400 90 0 0 wbs_dat_o[6]
+port 658 nsew
+flabel metal2 s 39530 -800 39642 480 0 FreeSans 1400 90 0 0 wbs_dat_o[7]
+port 659 nsew
+flabel metal2 s 43076 -800 43188 480 0 FreeSans 1400 90 0 0 wbs_dat_o[8]
+port 660 nsew
+flabel metal2 s 46622 -800 46734 480 0 FreeSans 1400 90 0 0 wbs_dat_o[9]
+port 661 nsew
+flabel metal2 s 11162 -800 11274 480 0 FreeSans 1400 90 0 0 wbs_sel_i[0]
+port 662 nsew
+flabel metal2 s 15890 -800 16002 480 0 FreeSans 1400 90 0 0 wbs_sel_i[1]
+port 663 nsew
+flabel metal2 s 20618 -800 20730 480 0 FreeSans 1400 90 0 0 wbs_sel_i[2]
+port 664 nsew
+flabel metal2 s 25346 -800 25458 480 0 FreeSans 1400 90 0 0 wbs_sel_i[3]
+port 665 nsew
+flabel metal2 s 5252 -800 5364 480 0 FreeSans 1400 90 0 0 wbs_stb_i
+port 666 nsew
+flabel metal2 s 6434 -800 6546 480 0 FreeSans 1400 90 0 0 wbs_we_i
+port 667 nsew
+<< properties >>
+string FIXED_BBOX 0 0 584000 704000
+<< end >>
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.xor.gds b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.xor.gds
new file mode 100644
index 0000000..f6d709d
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper.xor.gds
Binary files differ
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_empty_erased.gds b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..b362245
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_erased.gds b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_erased.gds
new file mode 100644
index 0000000..b362245
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_erased.gds
Binary files differ
diff --git a/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_no_zero_areas.gds b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_no_zero_areas.gds
new file mode 100644
index 0000000..11ade4e
--- /dev/null
+++ b/precheck_results/24_FEB_2022___19_05_28/outputs/user_analog_project_wrapper_no_zero_areas.gds
Binary files differ
diff --git a/verilog/dv/Makefile b/verilog/dv/Makefile
new file mode 100644
index 0000000..a9c2027
--- /dev/null
+++ b/verilog/dv/Makefile
@@ -0,0 +1,39 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+# ---- Test patterns for project striVe ----
+
+.SUFFIXES:
+.SILENT: clean all
+
+PATTERNS = mprj_por
+
+all: ${PATTERNS}
+ for i in ${PATTERNS}; do \
+ ( cd $$i && make -f Makefile $${i}.vcd &> verify.log && grep Monitor verify.log) ; \
+ done
+
+DV_PATTERNS = $(foreach dv, $(PATTERNS), verify-$(dv))
+$(DV_PATTERNS): verify-% :
+ cd $* && make
+
+clean: ${PATTERNS}
+ for i in ${PATTERNS}; do \
+ ( cd $$i && make clean ) ; \
+ done
+ rm -rf *.log
+
+.PHONY: clean all
diff --git a/verilog/dv/README.md b/verilog/dv/README.md
new file mode 100644
index 0000000..6be9cd3
--- /dev/null
+++ b/verilog/dv/README.md
@@ -0,0 +1,131 @@
+<!---
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+-->
+
+# Simulation Environment Setup
+
+There are two options for setting up the simulation environment:
+
+* Pulling a pre-built docker image
+* Installing the dependecies locally
+
+## 1. Docker
+
+There is an available docker setup with the needed tools at [efabless/dockerized-verification-setup](https://github.com/efabless/dockerized-verification-setup)
+
+Run the following to pull the image:
+
+```
+docker pull efabless/dv_setup:latest
+```
+
+## 2. Local Installion (Linux)
+
+You will need to fullfil these dependecies:
+
+* Icarus Verilog (10.2+)
+* RV32I Toolchain
+
+Using apt, you can install Icarus Verilog:
+
+```bash
+sudo apt-get install iverilog
+```
+
+Next, you will need to build the RV32I toolchain. Firstly, export the installation path for the RV32I toolchain,
+
+```bash
+export GCC_PATH=<gcc-installation-path>
+```
+
+Then, run the following:
+
+```bash
+# packages needed:
+sudo apt-get install autoconf automake autotools-dev curl libmpc-dev \
+ libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo \
+ gperf libtool patchutils bc zlib1g-dev git libexpat1-dev
+
+sudo mkdir $GCC_PATH
+sudo chown $USER $GCC_PATH
+
+git clone https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-rv32i
+cd riscv-gnu-toolchain-rv32i
+git checkout 411d134
+git submodule update --init --recursive
+
+mkdir build; cd build
+../configure --with-arch=rv32i --prefix=$GCC_PATH
+make -j$(nproc)
+```
+
+# Running Simulation
+
+## Docker
+
+First, you will need to export a number of environment variables:
+
+```bash
+export PDK_PATH=<pdk-location/sky130A>
+export CARAVEL_ROOT=<caravel_root>
+export UPRJ_ROOT=<user_project_root>
+```
+
+Then, run the following command to start the docker container :
+
+```
+docker run -it -v $CARAVEL_ROOT:$CARAVEL_ROOT -v $PDK_PATH:$PDK_PATH -v $UPRJ_ROOT:$UPRJ_ROOT -e CARAVEL_ROOT=$CARAVEL_ROOT -e PDK_PATH=$PDK_PATH -e UPRJ_ROOT=$UPRJ_ROOT -u $(id -u $USER):$(id -g $USER) efabless/dv_setup:latest
+```
+
+Then, navigate to the directory where the DV tests reside :
+
+```bash
+cd $UPRJ_ROOT/verilog/dv/
+```
+
+Then, follow the instructions at [Both](#both) to run RTL/GL simulation.
+
+## Local
+
+You will need to export these environment variables:
+
+```bash
+export GCC_PATH=<gcc-installation-path>
+export PDK_PATH=<pdk-location/sky130A>
+```
+
+Then, follow the instruction at [Both](#both) to run RTL/GL simulation.
+
+## Both
+
+To run RTL simulation for one of the DV tests,
+
+```bash
+cd <dv-test>
+make
+```
+
+To run gate level simulation for one of the DV tests,
+
+```bash
+cd <dv-test>
+SIM=GL make
+```
+
+# User Analog Project Example DV
+
+> :construction: Under construction :construction:
diff --git a/verilog/dv/mprj_por/Makefile b/verilog/dv/mprj_por/Makefile
new file mode 100644
index 0000000..5d0825f
--- /dev/null
+++ b/verilog/dv/mprj_por/Makefile
@@ -0,0 +1,96 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+## PDK
+PDK_PATH = $(PDK_ROOT)/sky130A
+
+## Caravel Pointers
+CARAVEL_ROOT ?= ../../../caravel
+CARAVEL_PATH ?= $(CARAVEL_ROOT)
+CARAVEL_FIRMWARE_PATH = $(CARAVEL_PATH)/verilog/dv/caravel
+CARAVEL_VERILOG_PATH = $(CARAVEL_PATH)/verilog
+CARAVEL_RTL_PATH = $(CARAVEL_VERILOG_PATH)/rtl
+CARAVEL_BEHAVIOURAL_MODELS = $(CARAVEL_VERILOG_PATH)/dv/caravel
+
+## User Project Pointers
+UPRJ_VERILOG_PATH ?= ../../../verilog
+UPRJ_RTL_PATH = $(UPRJ_VERILOG_PATH)/rtl
+UPRJ_BEHAVIOURAL_MODELS = ../
+
+## RISCV GCC
+GCC_PATH?=/ef/apps/bin
+GCC_PREFIX?=riscv32-unknown-elf
+
+## Simulation mode: RTL/GL
+SIM_DEFINES = -DFUNCTIONAL -DSIM
+SIM?=RTL
+
+.SUFFIXES:
+
+PATTERN = mprj_por
+
+all: ${PATTERN:=.vcd}
+
+hex: ${PATTERN:=.hex}
+
+%.vvp: %_tb.v %.hex
+ifeq ($(SIM),RTL)
+ iverilog $(SIM_DEFINES) -I $(PDK_PATH) \
+ -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) \
+ -I $(UPRJ_BEHAVIOURAL_MODELS) -I $(UPRJ_RTL_PATH) \
+ $< -o $@
+else
+ iverilog $(SIM_DEFINES) -DGL -I $(PDK_PATH) \
+ -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) -I $(CARAVEL_VERILOG_PATH) \
+ -I $(UPRJ_BEHAVIOURAL_MODELS) -I$(UPRJ_RTL_PATH) -I $(UPRJ_VERILOG_PATH) \
+ $< -o $@
+endif
+
+%.vcd: %.vvp
+ vvp $<
+
+%.elf: %.c $(CARAVEL_FIRMWARE_PATH)/sections.lds $(CARAVEL_FIRMWARE_PATH)/start.s check-env
+ ${GCC_PATH}/${GCC_PREFIX}-gcc -I $(CARAVEL_PATH) -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(CARAVEL_FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(CARAVEL_FIRMWARE_PATH)/start.s $<
+
+%.hex: %.elf
+ ${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@
+ # to fix flash base address
+ sed -i 's/@10000000/@00000000/g' $@
+
+%.bin: %.elf
+ ${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
+
+check-env:
+ifndef PDK_ROOT
+ $(error PDK_ROOT is undefined, please export it before running make)
+endif
+ifeq (,$(wildcard $(PDK_ROOT)/sky130A))
+ $(error $(PDK_ROOT)/sky130A not found, please install pdk before running make)
+endif
+ifeq (,$(wildcard $(GCC_PATH)/$(GCC_PREFIX)-gcc ))
+ $(error $(GCC_PATH)/$(GCC_PREFIX)-gcc is not found, please export GCC_PATH and GCC_PREFIX before running make)
+endif
+# check for efabless style installation
+ifeq (,$(wildcard $(PDK_ROOT)/sky130A/libs.ref/*/verilog))
+SIM_DEFINES := ${SIM_DEFINES} -DEF_STYLE
+endif
+
+# ---- Clean ----
+
+clean:
+ rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
+
+.PHONY: clean hex all
diff --git a/verilog/dv/mprj_por/mprj_por.c b/verilog/dv/mprj_por/mprj_por.c
new file mode 100644
index 0000000..9a51fc5
--- /dev/null
+++ b/verilog/dv/mprj_por/mprj_por.c
@@ -0,0 +1,49 @@
+/*
+ * SPDX-FileCopyrightText: 2020 Efabless Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// This include is relative to $CARAVEL_PATH (see Makefile)
+#include "verilog/dv/caravel/defs.h"
+
+// --------------------------------------------------------
+
+void main()
+{
+ reg_spimaster_config = 0xa002; // Enable, prescaler = 2
+
+ reg_mprj_datal = 0x00000000;
+ reg_mprj_datah = 0x00000000;
+
+ // Configure mprj_io 10 and 25 as analog (digital in/out = off)
+ // Configure mprj_io 11, 12, 26, and 27 as digital output
+ // mprj_io 14 to 24 are analog pads and cannot be configured
+
+ reg_mprj_io_27 = GPIO_MODE_USER_STD_OUTPUT;
+ reg_mprj_io_26 = GPIO_MODE_USER_STD_OUTPUT;
+ reg_mprj_io_25 = GPIO_MODE_USER_STD_ANALOG;
+
+ reg_mprj_io_12 = GPIO_MODE_USER_STD_OUTPUT;
+ reg_mprj_io_11 = GPIO_MODE_USER_STD_OUTPUT;
+ reg_mprj_io_10 = GPIO_MODE_USER_STD_ANALOG;
+
+ /* Apply configuration */
+ reg_mprj_xfer = 1;
+ while (reg_mprj_xfer == 1);
+
+ /* Block until end of test */
+ while (1);
+}
+
diff --git a/verilog/dv/mprj_por/mprj_por_tb.v b/verilog/dv/mprj_por/mprj_por_tb.v
new file mode 100644
index 0000000..39e4a36
--- /dev/null
+++ b/verilog/dv/mprj_por/mprj_por_tb.v
@@ -0,0 +1,170 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype wire
+
+`timescale 1 ns / 1 ps
+
+`include "uprj_analog_netlists.v"
+`include "caravan_netlists.v"
+`include "spiflash.v"
+`include "tbuart.v"
+
+module mprj_por_tb;
+ // Signals declaration
+ reg clock;
+ reg RSTB;
+ reg CSB;
+ reg power1, power2;
+ reg power3;
+
+ wire HIGH;
+ wire LOW;
+ wire TRI;
+ assign HIGH = 1'b1;
+ assign LOW = 1'b0;
+ assign TRI = 1'bz;
+
+ wire gpio;
+ wire uart_tx;
+ wire [37:0] mprj_io;
+ wire [3:0] checkbits;
+ wire [1:0] status;
+
+ // Signals Assignment
+ assign uart_tx = mprj_io[6];
+ assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
+
+ // Power supply for POR
+ assign mprj_io[18] = power3;
+
+ // Readback from POR (digital HV through analog pad connection)
+ assign status = {mprj_io[25], mprj_io[10]};
+
+ // Readback from POR (digital LV)
+ assign checkbits = {mprj_io[27:26], mprj_io[12:11]};
+
+ always #12.5 clock <= (clock === 1'b0);
+
+ initial begin
+ clock = 0;
+ end
+
+ initial begin
+ $dumpfile("mprj_por.vcd");
+ $dumpvars(0, mprj_por_tb);
+
+ // Repeat cycles of 1000 clock edges as needed to complete testbench
+ repeat (150) begin
+ repeat (1000) @(posedge clock);
+ end
+ $display("%c[1;31m",27);
+ $display ("Monitor: Timeout, Test Project IO Stimulus (RTL) Failed");
+ $display("%c[0m",27);
+ $finish;
+ end
+
+ initial begin
+ wait(status == 2'h1);
+ $display("Monitor: mprj_por test started");
+ #100;
+ if (checkbits != 4'h9) begin
+ $display("Monitor: mprj_por test failed");
+ $finish;
+ end
+ wait(status == 2'h3);
+ #100;
+ if (checkbits != 4'h5) begin
+ $display("Monitor: mprj_por test failed");
+ $finish;
+ end
+ $display("Monitor: mprj_por test Passed");
+ #10000;
+ $finish;
+ end
+
+ // Reset Operation
+ initial begin
+ RSTB <= 1'b0;
+ CSB <= 1'b1; // Force CSB high
+ #2000;
+ RSTB <= 1'b1; // Release reset
+ end
+
+ initial begin // Power-up sequence
+ power1 <= 1'b0;
+ power2 <= 1'b0;
+ power3 <= 1'b0;
+ #200;
+ power1 <= 1'b1;
+ #200;
+ power2 <= 1'b1;
+ #150000; // Need time to run the managment SoC setup.
+ power3 <= 1'b1; // Power up the 2nd POR.
+ end
+
+ wire flash_csb;
+ wire flash_clk;
+ wire flash_io0;
+ wire flash_io1;
+
+ wire VDD3V3 = power1;
+ wire VDD1V8 = power2;
+ wire VSS = 1'b0;
+
+ caravan uut (
+ .vddio (VDD3V3),
+ .vssio (VSS),
+ .vdda (VDD3V3),
+ .vssa (VSS),
+ .vccd (VDD1V8),
+ .vssd (VSS),
+ .vdda1 (VDD3V3),
+ .vdda2 (VDD3V3),
+ .vssa1 (VSS),
+ .vssa2 (VSS),
+ .vccd1 (VDD1V8),
+ .vccd2 (VDD1V8),
+ .vssd1 (VSS),
+ .vssd2 (VSS),
+ .clock (clock),
+ .gpio (gpio),
+ .mprj_io (mprj_io),
+ .flash_csb(flash_csb),
+ .flash_clk(flash_clk),
+ .flash_io0(flash_io0),
+ .flash_io1(flash_io1),
+ .resetb (RSTB)
+ );
+
+
+ spiflash #(
+ .FILENAME("mprj_por.hex")
+ ) spiflash (
+ .csb(flash_csb),
+ .clk(flash_clk),
+ .io0(flash_io0),
+ .io1(flash_io1),
+ .io2(), // not used
+ .io3() // not used
+ );
+
+ // Testbench UART
+ tbuart tbuart (
+ .ser_rx(uart_tx)
+ );
+
+endmodule
+`default_nettype wire
diff --git a/verilog/rtl/example_por.v b/verilog/rtl/example_por.v
new file mode 100644
index 0000000..d318fba
--- /dev/null
+++ b/verilog/rtl/example_por.v
@@ -0,0 +1,95 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+`timescale 1 ns / 1 ps
+
+// This is just a copy of simple_por.v from the Caravel project, used
+// as an analog user project example.
+
+module example_por(
+`ifdef USE_POWER_PINS
+ inout vdd3v3,
+ inout vdd1v8,
+ inout vss,
+`endif
+ output porb_h,
+ output porb_l,
+ output por_l
+);
+
+ wire mid, porb_h;
+ reg inode;
+
+ // This is a behavioral model! Actual circuit is a resitor dumping
+ // current (slowly) from vdd3v3 onto a capacitor, and this fed into
+ // two schmitt triggers for strong hysteresis/glitch tolerance.
+
+ initial begin
+ inode <= 1'b0;
+ end
+
+ // Emulate current source on capacitor as a 500ns delay either up or
+ // down. Note that this is sped way up for verilog simulation; the
+ // actual circuit is set to a 15ms delay.
+
+ always @(posedge vdd3v3) begin
+ #500 inode <= 1'b1;
+ end
+ always @(negedge vdd3v3) begin
+ #500 inode <= 1'b0;
+ end
+
+ // Instantiate two shmitt trigger buffers in series
+
+ sky130_fd_sc_hvl__schmittbuf_1 hystbuf1 (
+`ifdef USE_POWER_PINS
+ .VPWR(vdd3v3),
+ .VGND(vss),
+ .VPB(vdd3v3),
+ .VNB(vss),
+`endif
+ .A(inode),
+ .X(mid)
+ );
+
+ sky130_fd_sc_hvl__schmittbuf_1 hystbuf2 (
+`ifdef USE_POWER_PINS
+ .VPWR(vdd3v3),
+ .VGND(vss),
+ .VPB(vdd3v3),
+ .VNB(vss),
+`endif
+ .A(mid),
+ .X(porb_h)
+ );
+
+ sky130_fd_sc_hvl__lsbufhv2lv_1 porb_level (
+`ifdef USE_POWER_PINS
+ .VPWR(vdd3v3),
+ .VPB(vdd3v3),
+ .LVPWR(vdd1v8),
+ .VNB(vss),
+ .VGND(vss),
+`endif
+ .A(porb_h),
+ .X(porb_l)
+ );
+
+ // since this is behavioral anyway, but this should be
+ // replaced by a proper inverter
+ assign por_l = ~porb_l;
+endmodule
+`default_nettype wire
diff --git a/verilog/rtl/uprj_analog_netlists.v b/verilog/rtl/uprj_analog_netlists.v
new file mode 100644
index 0000000..062a873
--- /dev/null
+++ b/verilog/rtl/uprj_analog_netlists.v
@@ -0,0 +1,38 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+/*--------------------------------------------------------------*/
+/* caravel, a project harness for the Google/SkyWater sky130 */
+/* fabrication process and open source PDK */
+/* */
+/* Copyright 2020 efabless, Inc. */
+/* Written by Tim Edwards, December 2019 */
+/* and Mohamed Shalan, August 2020 */
+/* This file is open source hardware released under the */
+/* Apache 2.0 license. See file LICENSE. */
+/* */
+/*--------------------------------------------------------------*/
+
+`include "defines.v"
+`define USE_POWER_PINS
+
+`ifdef GL
+ `default_nettype wire
+ // Use behavorial model with gate-level simulation
+ `include "rtl/user_analog_project_wrapper.v"
+ `include "rtl/user_analog_proj_example.v"
+`else
+ `include "user_analog_project_wrapper.v"
+ `include "user_analog_proj_example.v"
+`endif
diff --git a/verilog/rtl/user_analog_proj_example.v b/verilog/rtl/user_analog_proj_example.v
new file mode 100644
index 0000000..94412da
--- /dev/null
+++ b/verilog/rtl/user_analog_proj_example.v
@@ -0,0 +1,221 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+
+`include "example_por.v"
+
+/*
+ * I/O mapping for analog
+ *
+ * mprj_io[37] io_in/out/oeb/in_3v3[26] --- ---
+ * mprj_io[36] io_in/out/oeb/in_3v3[25] --- ---
+ * mprj_io[35] io_in/out/oeb/in_3v3[24] gpio_analog/noesd[17] ---
+ * mprj_io[34] io_in/out/oeb/in_3v3[23] gpio_analog/noesd[16] ---
+ * mprj_io[33] io_in/out/oeb/in_3v3[22] gpio_analog/noesd[15] ---
+ * mprj_io[32] io_in/out/oeb/in_3v3[21] gpio_analog/noesd[14] ---
+ * mprj_io[31] io_in/out/oeb/in_3v3[20] gpio_analog/noesd[13] ---
+ * mprj_io[30] io_in/out/oeb/in_3v3[19] gpio_analog/noesd[12] ---
+ * mprj_io[29] io_in/out/oeb/in_3v3[18] gpio_analog/noesd[11] ---
+ * mprj_io[28] io_in/out/oeb/in_3v3[17] gpio_analog/noesd[10] ---
+ * mprj_io[27] io_in/out/oeb/in_3v3[16] gpio_analog/noesd[9] ---
+ * mprj_io[26] io_in/out/oeb/in_3v3[15] gpio_analog/noesd[8] ---
+ * mprj_io[25] io_in/out/oeb/in_3v3[14] gpio_analog/noesd[7] ---
+ * mprj_io[24] --- --- user_analog[10]
+ * mprj_io[23] --- --- user_analog[9]
+ * mprj_io[22] --- --- user_analog[8]
+ * mprj_io[21] --- --- user_analog[7]
+ * mprj_io[20] --- --- user_analog[6] clamp[2]
+ * mprj_io[19] --- --- user_analog[5] clamp[1]
+ * mprj_io[18] --- --- user_analog[4] clamp[0]
+ * mprj_io[17] --- --- user_analog[3]
+ * mprj_io[16] --- --- user_analog[2]
+ * mprj_io[15] --- --- user_analog[1]
+ * mprj_io[14] --- --- user_analog[0]
+ * mprj_io[13] io_in/out/oeb/in_3v3[13] gpio_analog/noesd[6] ---
+ * mprj_io[12] io_in/out/oeb/in_3v3[12] gpio_analog/noesd[5] ---
+ * mprj_io[11] io_in/out/oeb/in_3v3[11] gpio_analog/noesd[4] ---
+ * mprj_io[10] io_in/out/oeb/in_3v3[10] gpio_analog/noesd[3] ---
+ * mprj_io[9] io_in/out/oeb/in_3v3[9] gpio_analog/noesd[2] ---
+ * mprj_io[8] io_in/out/oeb/in_3v3[8] gpio_analog/noesd[1] ---
+ * mprj_io[7] io_in/out/oeb/in_3v3[7] gpio_analog/noesd[0] ---
+ * mprj_io[6] io_in/out/oeb/in_3v3[6] --- ---
+ * mprj_io[5] io_in/out/oeb/in_3v3[5] --- ---
+ * mprj_io[4] io_in/out/oeb/in_3v3[4] --- ---
+ * mprj_io[3] io_in/out/oeb/in_3v3[3] --- ---
+ * mprj_io[2] io_in/out/oeb/in_3v3[2] --- ---
+ * mprj_io[1] io_in/out/oeb/in_3v3[1] --- ---
+ * mprj_io[0] io_in/out/oeb/in_3v3[0] --- ---
+ *
+ */
+
+/*
+ *----------------------------------------------------------------
+ *
+ * user_analog_proj_example
+ *
+ * This is an example of a (trivially simple) analog user project,
+ * showing how the user project can connect to the I/O pads, both
+ * the digital pads, the analog connection on the digital pads,
+ * and the dedicated analog pins used as an additional power supply
+ * input, with a connected ESD clamp.
+ *
+ * See the testbench in directory "mprj_por" for the example
+ * program that drives this user project.
+ *
+ *----------------------------------------------------------------
+ */
+
+module user_analog_proj_example (
+`ifdef USE_POWER_PINS
+ inout vdda1, // User area 1 3.3V supply
+ inout vdda2, // User area 2 3.3V supply
+ inout vssa1, // User area 1 analog ground
+ inout vssa2, // User area 2 analog ground
+ inout vccd1, // User area 1 1.8V supply
+ inout vccd2, // User area 2 1.8v supply
+ inout vssd1, // User area 1 digital ground
+ inout vssd2, // User area 2 digital ground
+`endif
+
+ // Wishbone Slave ports (WB MI A)
+ input wb_clk_i,
+ input wb_rst_i,
+ input wbs_stb_i,
+ input wbs_cyc_i,
+ input wbs_we_i,
+ input [3:0] wbs_sel_i,
+ input [31:0] wbs_dat_i,
+ input [31:0] wbs_adr_i,
+ output wbs_ack_o,
+ output [31:0] wbs_dat_o,
+
+ // Logic Analyzer Signals
+ input [127:0] la_data_in,
+ output [127:0] la_data_out,
+ input [127:0] la_oenb,
+
+ // IOs
+ input [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in,
+ input [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in_3v3,
+ output [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_out,
+ output [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_oeb,
+
+ // GPIO-analog
+ inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] gpio_analog,
+ inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] gpio_noesd,
+
+ // Dedicated analog
+ inout [`ANALOG_PADS-1:0] io_analog,
+ inout [2:0] io_clamp_high,
+ inout [2:0] io_clamp_low,
+
+ // Clock
+ input user_clock2,
+
+ // IRQ
+ output [2:0] irq
+);
+ wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in;
+ wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in_3v3;
+ wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_out;
+ wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_oeb;
+ wire [`ANALOG_PADS-1:0] io_analog;
+
+ // wire [31:0] rdata;
+ // wire [31:0] wdata;
+
+ // wire valid;
+ // wire [3:0] wstrb;
+
+ wire isupply; // Independent 3.3V supply
+ wire io16, io15, io12, io11;
+
+ // WB MI A
+ // assign valid = wbs_cyc_i && wbs_stb_i;
+ // assign wstrb = wbs_sel_i & {4{wbs_we_i}};
+ // assign wbs_dat_o = rdata;
+ // assign wdata = wbs_dat_i;
+
+ // IO --- unused (no need to connect to anything)
+ // assign io_out[`MPRJ_IO_PADS-`ANALOG_PADS-1:17] = 0;
+ // assign io_out[14:13] = 11'b0;
+ // assign io_out[10:0] = 11'b0;
+
+ // assign io_oeb[`MPRJ_IO_PADS-`ANALOG_PADS-1:17] = -1;
+ // assign io_oeb[14:13] = 11'b1;
+ // assign io_oeb[10:0] = 11'b1;
+
+ // IO --- enable outputs on 11, 12, 15, and 16
+ assign io_out[12:11] = {io12, io11};
+ assign io_oeb[12:11] = {vssd1, vssd1};
+
+ assign io_out[16:15] = {io16, io15};
+ assign io_oeb[16:15] = {vssd1, vssd1};
+
+ // IRQ
+ assign irq = 3'b000; // Unused
+
+ // LA --- unused (no need to connect to anything)
+ // assign la_data_out = {128{1'b0}}; // Unused
+
+ // Instantiate the POR. Connect the digital power to user area 1
+ // VCCD, and connect the analog power to user area 1 VDDA.
+
+ // Monitor the 3.3V output with mprj_io[10] = gpio_analog[3]
+ // Monitor the 1.8V outputs with mprj_io[11,12] = io_out[11,12]
+
+ example_por por1 (
+ `ifdef USE_POWER_PINS
+ .vdd3v3(vdda1),
+ .vdd1v8(vccd1),
+ .vss(vssa1),
+ `endif
+ .porb_h(gpio_analog[3]), // 3.3V domain output
+ .porb_l(io11), // 1.8V domain output
+ .por_l(io12) // 1.8V domain output
+ );
+
+ // Instantiate 2nd POR with the analog power supply on one of the
+ // analog pins. NOTE: io_analog[4] = mproj_io[18] and is the same
+ // pad with io_clamp_high/low[0].
+
+ `ifdef USE_POWER_PINS
+ assign isupply = io_analog[4];
+ assign io_clamp_high[0] = isupply;
+ assign io_clamp_low[0] = vssa1;
+
+ // Tie off remaining clamps
+ assign io_clamp_high[2:1] = vssa1;
+ assign io_clamp_low[2:1] = vssa1;
+ `endif
+
+ // Monitor the 3.3V output with mprj_io[25] = gpio_analog[7]
+ // Monitor the 1.8V outputs with mprj_io[26,27] = io_out[15,16]
+
+ example_por por2 (
+ `ifdef USE_POWER_PINS
+ .vdd3v3(isupply),
+ .vdd1v8(vccd1),
+ .vss(vssa1),
+ `endif
+ .porb_h(gpio_analog[7]), // 3.3V domain output
+ .porb_l(io15), // 1.8V domain output
+ .por_l(io16) // 1.8V domain output
+ );
+
+endmodule
+
+`default_nettype wire
diff --git a/verilog/rtl/user_analog_project_wrapper.v b/verilog/rtl/user_analog_project_wrapper.v
new file mode 100644
index 0000000..7a73f76
--- /dev/null
+++ b/verilog/rtl/user_analog_project_wrapper.v
@@ -0,0 +1,182 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+
+/*
+ *-------------------------------------------------------------
+ *
+ * user_analog_project_wrapper
+ *
+ * This wrapper enumerates all of the pins available to the
+ * user for the user analog project.
+ *
+ *-------------------------------------------------------------
+ */
+
+module user_analog_project_wrapper (
+`ifdef USE_POWER_PINS
+ inout vdda1, // User area 1 3.3V supply
+ inout vdda2, // User area 2 3.3V supply
+ inout vssa1, // User area 1 analog ground
+ inout vssa2, // User area 2 analog ground
+ inout vccd1, // User area 1 1.8V supply
+ inout vccd2, // User area 2 1.8v supply
+ inout vssd1, // User area 1 digital ground
+ inout vssd2, // User area 2 digital ground
+`endif
+
+ // Wishbone Slave ports (WB MI A)
+ input wb_clk_i,
+ input wb_rst_i,
+ input wbs_stb_i,
+ input wbs_cyc_i,
+ input wbs_we_i,
+ input [3:0] wbs_sel_i,
+ input [31:0] wbs_dat_i,
+ input [31:0] wbs_adr_i,
+ output wbs_ack_o,
+ output [31:0] wbs_dat_o,
+
+ // Logic Analyzer Signals
+ input [127:0] la_data_in,
+ output [127:0] la_data_out,
+ input [127:0] la_oenb,
+
+ /* GPIOs. There are 27 GPIOs, on either side of the analog.
+ * These have the following mapping to the GPIO padframe pins
+ * and memory-mapped registers, since the numbering remains the
+ * same as caravel but skips over the analog I/O:
+ *
+ * io_in/out/oeb/in_3v3 [26:14] <---> mprj_io[37:25]
+ * io_in/out/oeb/in_3v3 [13:0] <---> mprj_io[13:0]
+ *
+ * When the GPIOs are configured by the Management SoC for
+ * user use, they have three basic bidirectional controls:
+ * in, out, and oeb (output enable, sense inverted). For
+ * analog projects, a 3.3V copy of the signal input is
+ * available. out and oeb must be 1.8V signals.
+ */
+
+ input [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in,
+ input [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in_3v3,
+ output [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_out,
+ output [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_oeb,
+
+ /* Analog (direct connection to GPIO pad---not for high voltage or
+ * high frequency use). The management SoC must turn off both
+ * input and output buffers on these GPIOs to allow analog access.
+ * These signals may drive a voltage up to the value of VDDIO
+ * (3.3V typical, 5.5V maximum).
+ *
+ * Note that analog I/O is not available on the 7 lowest-numbered
+ * GPIO pads, and so the analog_io indexing is offset from the
+ * GPIO indexing by 7, as follows:
+ *
+ * gpio_analog/noesd [17:7] <---> mprj_io[35:25]
+ * gpio_analog/noesd [6:0] <---> mprj_io[13:7]
+ *
+ */
+
+ inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] gpio_analog,
+ inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] gpio_noesd,
+
+ /* Analog signals, direct through to pad. These have no ESD at all,
+ * so ESD protection is the responsibility of the designer.
+ *
+ * user_analog[10:0] <---> mprj_io[24:14]
+ *
+ */
+ inout [`ANALOG_PADS-1:0] io_analog,
+
+ /* Additional power supply ESD clamps, one per analog pad. The
+ * high side should be connected to a 3.3-5.5V power supply.
+ * The low side should be connected to ground.
+ *
+ * clamp_high[2:0] <---> mprj_io[20:18]
+ * clamp_low[2:0] <---> mprj_io[20:18]
+ *
+ */
+ inout [2:0] io_clamp_high,
+ inout [2:0] io_clamp_low,
+
+ // Independent clock (on independent integer divider)
+ input user_clock2,
+
+ // User maskable interrupt signals
+ output [2:0] user_irq
+);
+
+/*--------------------------------------*/
+/* User project is instantiated here */
+/*--------------------------------------*/
+
+user_analog_proj_example mprj (
+ `ifdef USE_POWER_PINS
+ .vdda1(vdda1), // User area 1 3.3V power
+ .vdda2(vdda2), // User area 2 3.3V power
+ .vssa1(vssa1), // User area 1 analog ground
+ .vssa2(vssa2), // User area 2 analog ground
+ .vccd1(vccd1), // User area 1 1.8V power
+ .vccd2(vccd2), // User area 2 1.8V power
+ .vssd1(vssd1), // User area 1 digital ground
+ .vssd2(vssd2), // User area 2 digital ground
+ `endif
+
+ .wb_clk_i(wb_clk_i),
+ .wb_rst_i(wb_rst_i),
+
+ // MGMT SoC Wishbone Slave
+
+ .wbs_cyc_i(wbs_cyc_i),
+ .wbs_stb_i(wbs_stb_i),
+ .wbs_we_i(wbs_we_i),
+ .wbs_sel_i(wbs_sel_i),
+ .wbs_adr_i(wbs_adr_i),
+ .wbs_dat_i(wbs_dat_i),
+ .wbs_ack_o(wbs_ack_o),
+ .wbs_dat_o(wbs_dat_o),
+
+ // Logic Analyzer
+
+ .la_data_in(la_data_in),
+ .la_data_out(la_data_out),
+ .la_oenb (la_oenb),
+
+ // IO Pads
+ .io_in (io_in),
+ .io_in_3v3 (io_in_3v3),
+ .io_out(io_out),
+ .io_oeb(io_oeb),
+
+ // GPIO-analog
+ .gpio_analog(gpio_analog),
+ .gpio_noesd(gpio_noesd),
+
+ // Dedicated analog
+ .io_analog(io_analog),
+ .io_clamp_high(io_clamp_high),
+ .io_clamp_low(io_clamp_low),
+
+ // Clock
+ .user_clock2(user_clock2),
+
+ // IRQ
+ .irq(user_irq)
+);
+
+endmodule // user_analog_project_wrapper
+
+`default_nettype wire
diff --git a/xschem/.spiceinit b/xschem/.spiceinit
new file mode 100644
index 0000000..e6a73aa
--- /dev/null
+++ b/xschem/.spiceinit
@@ -0,0 +1,5 @@
+* ngspice initialization for sky130
+* assert BSIM compatibility mode with "nf" vs. "W"
+set ngbehavior=hsa
+* "nomodcheck" speeds up loading time
+set ng_nomodcheck
diff --git a/xschem/analog_wrapper_tb.sch b/xschem/analog_wrapper_tb.sch
new file mode 100644
index 0000000..d9b605c
--- /dev/null
+++ b/xschem/analog_wrapper_tb.sch
@@ -0,0 +1,76 @@
+v {xschem version=2.9.9 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 300 -290 510 -290 { lab=#net1}
+N 590 -290 590 -250 { lab=#net1}
+N 300 -250 430 -250 { lab=GND}
+N 510 -250 510 -150 { lab=GND}
+N 510 -150 780 -150 { lab=GND}
+N 780 -190 780 -150 { lab=GND}
+N 690 -190 690 -150 { lab=GND}
+N 590 -190 590 -150 { lab=GND}
+N 300 -210 400 -210 { lab=#net2}
+N 480 -270 480 -210 { lab=#net2}
+N 480 -270 690 -270 { lab=#net2}
+N 690 -270 690 -250 { lab=#net2}
+N 300 10 450 10 { lab=#net3}
+N 850 -270 850 0 { lab=io_analog[4]}
+N 780 -270 850 -270 { lab=io_analog[4]}
+N 780 -270 780 -250 { lab=io_analog[4]}
+N 300 30 470 30 { lab=#net4}
+N 300 50 410 50 { lab=#net5}
+N 530 10 660 10 { lab=io_analog[10:0]}
+N 510 -290 590 -290 { lab=#net1}
+N 430 -250 510 -250 { lab=GND}
+N 400 -210 480 -210 { lab=#net2}
+N 460 10 530 10 { lab=io_analog[10:0]}
+N 670 0 850 -0 { lab=io_analog[4]}
+N 300 -270 400 -270 { lab=#net8}
+N 300 -230 400 -230 { lab=#net9}
+N 300 -190 400 -190 { lab=#net10}
+N 300 -190 400 -190 { lab=#net10}
+N 300 -170 400 -170 { lab=#net11}
+N 290 -150 390 -150 { lab=#net12}
+N 290 -130 390 -130 { lab=#net13}
+N 290 -110 390 -110 { lab=#net14}
+N 300 -90 400 -90 { lab=#net15}
+N 300 -10 400 -10 { lab=#net16}
+N 300 70 400 70 { lab=#net17}
+N -60 -290 -0 -290 { lab=#net18}
+N -60 -270 0 -270 { lab=#net19}
+N -60 -250 0 -250 { lab=#net20}
+N -60 -230 0 -230 { lab=#net21}
+N -60 -210 0 -210 { lab=#net22}
+N -60 -210 0 -210 { lab=#net22}
+N -60 -190 0 -190 { lab=#net23}
+N -60 -190 0 -190 { lab=#net23}
+N -60 -170 0 -170 { lab=#net24}
+N -60 -150 0 -150 { lab=#net25}
+N -60 -130 0 -130 { lab=#net26}
+N -60 -110 0 -110 { lab=#net27}
+N -60 -90 0 -90 { lab=#net28}
+N -60 -70 0 -70 { lab=#net29}
+N -60 -50 0 -50 { lab=#net30}
+N 300 -70 400 -70 {}
+N 300 -50 400 -50 {}
+N 300 -30 400 -30 {}
+C {user_analog_project_wrapper.sym} 150 -110 0 0 {name=x1}
+C {devices/vsource.sym} 590 -220 0 0 {name=V1 value="PWL(0.0 0 400u 0 5.4m 3.3)"}
+C {devices/vsource.sym} 690 -220 0 0 {name=V2 value="PWL(0.0 0 300u 0 5.3 1.8)"}
+C {devices/vsource.sym} 780 -220 0 0 {name=V3 value="PWL(0.0 0 100u 0 5m 3.3)"}
+C {devices/bus_connect.sym} 660 10 1 1 {name=l1 lab=io_analog[4]}
+C {devices/gnd.sym} 730 -150 0 0 {name=l2 lab=GND}
+C {devices/lab_pin.sym} 570 10 0 0 {name=l12 sig_type=std_logic lab=io_analog[10:0]}
+C {devices/code.sym} 920 -130 0 0 {name=TT_MODELS only_toplevel=false
+format="tcleval(@value )" value=".lib \\\\$::SKYWATER_MODELS\\\\/sky130.lib.spice tt
+.include \\\\$::PDKPATH\\\\/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice"}
+C {devices/code_shown.sym} 1100 -130 0 0 {name=s1
+only_toplevel=false
+value=".control
+tran 10u 20m
+plot V(\\"io_out[11]\\") V(\\"io_out[12]\\") V(\\"io_out[15]\\") V(\\"io_out[16]\\")
++ V(\\"gpio_analog[3]\\") V(\\"gpio_analog[7]\\")
+.endc"}
diff --git a/xschem/analog_wrapper_tb.spice b/xschem/analog_wrapper_tb.spice
new file mode 100644
index 0000000..523a509
--- /dev/null
+++ b/xschem/analog_wrapper_tb.spice
@@ -0,0 +1,283 @@
+**.subckt analog_wrapper_tb
+x1 net1 net6 GND net7 net2 net8 net9 net10 net16 net17 net18 net19 net20 net21[3] net21[2] net21[1]
++ net21[0] net22[31] net22[30] net22[29] net22[28] net22[27] net22[26] net22[25] net22[24] net22[23] net22[22]
++ net22[21] net22[20] net22[19] net22[18] net22[17] net22[16] net22[15] net22[14] net22[13] net22[12] net22[11]
++ net22[10] net22[9] net22[8] net22[7] net22[6] net22[5] net22[4] net22[3] net22[2] net22[1] net22[0] net23[31]
++ net23[30] net23[29] net23[28] net23[27] net23[26] net23[25] net23[24] net23[23] net23[22] net23[21] net23[20]
++ net23[19] net23[18] net23[17] net23[16] net23[15] net23[14] net23[13] net23[12] net23[11] net23[10] net23[9]
++ net23[8] net23[7] net23[6] net23[5] net23[4] net23[3] net23[2] net23[1] net23[0] net11 net12[31] net12[30]
++ net12[29] net12[28] net12[27] net12[26] net12[25] net12[24] net12[23] net12[22] net12[21] net12[20] net12[19]
++ net12[18] net12[17] net12[16] net12[15] net12[14] net12[13] net12[12] net12[11] net12[10] net12[9] net12[8]
++ net12[7] net12[6] net12[5] net12[4] net12[3] net12[2] net12[1] net12[0] net24[127] net24[126] net24[125]
++ net24[124] net24[123] net24[122] net24[121] net24[120] net24[119] net24[118] net24[117] net24[116] net24[115]
++ net24[114] net24[113] net24[112] net24[111] net24[110] net24[109] net24[108] net24[107] net24[106] net24[105]
++ net24[104] net24[103] net24[102] net24[101] net24[100] net24[99] net24[98] net24[97] net24[96] net24[95]
++ net24[94] net24[93] net24[92] net24[91] net24[90] net24[89] net24[88] net24[87] net24[86] net24[85] net24[84]
++ net24[83] net24[82] net24[81] net24[80] net24[79] net24[78] net24[77] net24[76] net24[75] net24[74] net24[73]
++ net24[72] net24[71] net24[70] net24[69] net24[68] net24[67] net24[66] net24[65] net24[64] net24[63] net24[62]
++ net24[61] net24[60] net24[59] net24[58] net24[57] net24[56] net24[55] net24[54] net24[53] net24[52] net24[51]
++ net24[50] net24[49] net24[48] net24[47] net24[46] net24[45] net24[44] net24[43] net24[42] net24[41] net24[40]
++ net24[39] net24[38] net24[37] net24[36] net24[35] net24[34] net24[33] net24[32] net24[31] net24[30] net24[29]
++ net24[28] net24[27] net24[26] net24[25] net24[24] net24[23] net24[22] net24[21] net24[20] net24[19] net24[18]
++ net24[17] net24[16] net24[15] net24[14] net24[13] net24[12] net24[11] net24[10] net24[9] net24[8] net24[7]
++ net24[6] net24[5] net24[4] net24[3] net24[2] net24[1] net24[0] net13[127] net13[126] net13[125] net13[124]
++ net13[123] net13[122] net13[121] net13[120] net13[119] net13[118] net13[117] net13[116] net13[115] net13[114]
++ net13[113] net13[112] net13[111] net13[110] net13[109] net13[108] net13[107] net13[106] net13[105] net13[104]
++ net13[103] net13[102] net13[101] net13[100] net13[99] net13[98] net13[97] net13[96] net13[95] net13[94]
++ net13[93] net13[92] net13[91] net13[90] net13[89] net13[88] net13[87] net13[86] net13[85] net13[84] net13[83]
++ net13[82] net13[81] net13[80] net13[79] net13[78] net13[77] net13[76] net13[75] net13[74] net13[73] net13[72]
++ net13[71] net13[70] net13[69] net13[68] net13[67] net13[66] net13[65] net13[64] net13[63] net13[62] net13[61]
++ net13[60] net13[59] net13[58] net13[57] net13[56] net13[55] net13[54] net13[53] net13[52] net13[51] net13[50]
++ net13[49] net13[48] net13[47] net13[46] net13[45] net13[44] net13[43] net13[42] net13[41] net13[40] net13[39]
++ net13[38] net13[37] net13[36] net13[35] net13[34] net13[33] net13[32] net13[31] net13[30] net13[29] net13[28]
++ net13[27] net13[26] net13[25] net13[24] net13[23] net13[22] net13[21] net13[20] net13[19] net13[18] net13[17]
++ net13[16] net13[15] net13[14] net13[13] net13[12] net13[11] net13[10] net13[9] net13[8] net13[7] net13[6]
++ net13[5] net13[4] net13[3] net13[2] net13[1] net13[0] net25[127] net25[126] net25[125] net25[124] net25[123]
++ net25[122] net25[121] net25[120] net25[119] net25[118] net25[117] net25[116] net25[115] net25[114] net25[113]
++ net25[112] net25[111] net25[110] net25[109] net25[108] net25[107] net25[106] net25[105] net25[104] net25[103]
++ net25[102] net25[101] net25[100] net25[99] net25[98] net25[97] net25[96] net25[95] net25[94] net25[93]
++ net25[92] net25[91] net25[90] net25[89] net25[88] net25[87] net25[86] net25[85] net25[84] net25[83] net25[82]
++ net25[81] net25[80] net25[79] net25[78] net25[77] net25[76] net25[75] net25[74] net25[73] net25[72] net25[71]
++ net25[70] net25[69] net25[68] net25[67] net25[66] net25[65] net25[64] net25[63] net25[62] net25[61] net25[60]
++ net25[59] net25[58] net25[57] net25[56] net25[55] net25[54] net25[53] net25[52] net25[51] net25[50] net25[49]
++ net25[48] net25[47] net25[46] net25[45] net25[44] net25[43] net25[42] net25[41] net25[40] net25[39] net25[38]
++ net25[37] net25[36] net25[35] net25[34] net25[33] net25[32] net25[31] net25[30] net25[29] net25[28] net25[27]
++ net25[26] net25[25] net25[24] net25[23] net25[22] net25[21] net25[20] net25[19] net25[18] net25[17] net25[16]
++ net25[15] net25[14] net25[13] net25[12] net25[11] net25[10] net25[9] net25[8] net25[7] net25[6] net25[5]
++ net25[4] net25[3] net25[2] net25[1] net25[0] net26[26] net26[25] net26[24] net26[23] net26[22] net26[21]
++ net26[20] net26[19] net26[18] net26[17] net26[16] net26[15] net26[14] net26[13] net26[12] net26[11] net26[10]
++ net26[9] net26[8] net26[7] net26[6] net26[5] net26[4] net26[3] net26[2] net26[1] net26[0] net27[26]
++ net27[25] net27[24] net27[23] net27[22] net27[21] net27[20] net27[19] net27[18] net27[17] net27[16] net27[15]
++ net27[14] net27[13] net27[12] net27[11] net27[10] net27[9] net27[8] net27[7] net27[6] net27[5] net27[4]
++ net27[3] net27[2] net27[1] net27[0] net29[26] net29[25] net29[24] net29[23] net29[22] net29[21] net29[20]
++ net29[19] net29[18] net29[17] net29[16] net29[15] net29[14] net29[13] net29[12] net29[11] net29[10] net29[9]
++ net29[8] net29[7] net29[6] net29[5] net29[4] net29[3] net29[2] net29[1] net29[0] net30[26] net30[25]
++ net30[24] net30[23] net30[22] net30[21] net30[20] net30[19] net30[18] net30[17] net30[16] net30[15] net30[14]
++ net30[13] net30[12] net30[11] net30[10] net30[9] net30[8] net30[7] net30[6] net30[5] net30[4] net30[3]
++ net30[2] net30[1] net30[0] net31[17] net31[16] net31[15] net31[14] net31[13] net31[12] net31[11] net31[10]
++ net31[9] net31[8] net31[7] net31[6] net31[5] net31[4] net31[3] net31[2] net31[1] net31[0] net14[17]
++ net14[16] net14[15] net14[14] net14[13] net14[12] net14[11] net14[10] net14[9] net14[8] net14[7] net14[6]
++ net14[5] net14[4] net14[3] net14[2] net14[1] net14[0] net3[10] net3[9] net3[8] net3[7] net3[6] net3[5]
++ net3[4] net3[3] net3[2] net3[1] net3[0] net4[2] net4[1] net4[0] net5[2] net5[1] net5[0] net28 net15[2]
++ net15[1] net15[0] user_analog_project_wrapper
+V1 net1 GND PWL(0.0 0 400u 0 5.4m 3.3)
+V2 net2 GND PWL(0.0 0 300u 0 5.3 1.8)
+V3 io_analog[4] GND PWL(0.0 0 100u 0 5m 3.3)
+**** begin user architecture code
+.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
+.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
+
+.control
+tran 10u 20m
+plot V("io_out[11]") V("io_out[12]") V("io_out[15]") V("io_out[16]") V("gpio_analog[3]")
++ V("gpio_analog[7]")
+.endc
+
+**** end user architecture code
+**.ends
+
+* expanding symbol: user_analog_project_wrapper.sym # of pins=32
+* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/user_analog_project_wrapper.sym
+* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/user_analog_project_wrapper.sch
+.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
++ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
++ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
++ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
++ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
++ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
++ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
++ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
++ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
++ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
++ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
++ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
++ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
++ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
++ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
++ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
++ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
++ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
++ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
++ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
++ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
++ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
++ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
++ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
++ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
++ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
++ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
++ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
++ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
++ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
++ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
++ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
++ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
++ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
++ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
++ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
++ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
++ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
++ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
++ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
++ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
++ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
++ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
++ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
++ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
++ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
++ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
++ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
++ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
++ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
++ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0]
++ la_oenb[127] la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120]
++ la_oenb[119] la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112]
++ la_oenb[111] la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104]
++ la_oenb[103] la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95]
++ la_oenb[94] la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86]
++ la_oenb[85] la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77]
++ la_oenb[76] la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68]
++ la_oenb[67] la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59]
++ la_oenb[58] la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50]
++ la_oenb[49] la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41]
++ la_oenb[40] la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32]
++ la_oenb[31] la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23]
++ la_oenb[22] la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14]
++ la_oenb[13] la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5]
++ la_oenb[4] la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0] io_in[26] io_in[25] io_in[24] io_in[23] io_in[22]
++ io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15] io_in[14] io_in[13] io_in[12] io_in[11]
++ io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4] io_in[3] io_in[2] io_in[1] io_in[0]
++ io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22] io_in_3v3[21] io_in_3v3[20] io_in_3v3[19]
++ io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14] io_in_3v3[13] io_in_3v3[12] io_in_3v3[11]
++ io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6] io_in_3v3[5] io_in_3v3[4] io_in_3v3[3]
++ io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] io_out[26] io_out[25] io_out[24] io_out[23] io_out[22] io_out[21]
++ io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15] io_out[14] io_out[13] io_out[12] io_out[11]
++ io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5] io_out[4] io_out[3] io_out[2] io_out[1] io_out[0]
++ io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22] io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17]
++ io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12] io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7]
++ io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2] io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16]
++ gpio_analog[15] gpio_analog[14] gpio_analog[13] gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9]
++ gpio_analog[8] gpio_analog[7] gpio_analog[6] gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2]
++ gpio_analog[1] gpio_analog[0] gpio_noesd[17] gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13]
++ gpio_noesd[12] gpio_noesd[11] gpio_noesd[10] gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5]
++ gpio_noesd[4] gpio_noesd[3] gpio_noesd[2] gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8]
++ io_analog[7] io_analog[6] io_analog[5] io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0]
++ io_clamp_high[2] io_clamp_high[1] io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_clock2
++ user_irq[2] user_irq[1] user_irq[0]
+*.iopin vdda1
+*.iopin vdda2
+*.iopin vssa1
+*.iopin vssa2
+*.iopin vccd1
+*.iopin vccd2
+*.iopin vssd1
+*.iopin vssd2
+*.ipin wb_clk_i
+*.ipin wb_rst_i
+*.ipin wbs_stb_i
+*.ipin wbs_cyc_i
+*.ipin wbs_we_i
+*.ipin wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
+*.ipin
+*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
+*.ipin
+*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0]
+*.opin wbs_ack_o
+*.opin
+*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
+*.ipin
+*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
+*.opin
+*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
+*.ipin
+*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
+*.ipin
+*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0]
+*.ipin user_clock2
+*.opin
+*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
+*.opin
+*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
+*.iopin
+*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
+*.iopin
+*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
+*.iopin
+*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0]
+*.iopin io_clamp_high[2],io_clamp_high[1],io_clamp_high[0]
+*.iopin io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
+*.opin user_irq[2],user_irq[1],user_irq[0]
+*.ipin
+*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
+x1 vdda1 vccd1 gpio_analog[3] io_out[11] io_out[12] vssa1 example_por
+x2 io_analog[4] vccd1 gpio_analog[7] io_out[15] io_out[16] vssa1 example_por
+R1 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R2 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R5 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R7 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R8 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 W=0.56 L=0.49 m=1
+R9 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m3 W=0.56 L=0.31 m=1
+R11 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 W=0.56 L=0.58 m=1
+R12 vssd1 io_oeb[15] sky130_fd_pr__res_generic_m3 W=0.56 L=0.6 m=1
+.ends
+
+
+* expanding symbol: example_por.sym # of pins=6
+* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
+* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
+.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
+*.iopin vdd3v3
+*.iopin vss
+*.opin porb_h
+*.opin porb_l
+*.opin por_l
+*.iopin vdd1v8
+XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
+XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
+XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
+XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
+XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
+x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
+x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
+x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
+x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
+.ends
+
+.GLOBAL GND
+** flattened .save nodes
+.end
diff --git a/xschem/current_test.spice b/xschem/current_test.spice
new file mode 100644
index 0000000..8e4162d
--- /dev/null
+++ b/xschem/current_test.spice
@@ -0,0 +1,86 @@
+*---------------------------------------------------------------------------
+* SPDX-FileCopyrightText: 2020 Efabless Corporation
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* https://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+* SPDX-License-Identifier: Apache-2.0
+*---------------------------------------------------------------------------
+* Simple POR circuit for Caravel current mirror test
+*-------------------------------------------------------------------
+
+.param mc_mm_switch=0
+.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
+
+* Note: 20 resistors of length 25um connected in series
+Xres1 vdda vin vss sky130_fd_pr__res_xhigh_po_0p69 l=500
+Xres2 vin vss vss sky130_fd_pr__res_xhigh_po_0p69 l=149
+
+* voltage sources at 0V for measuring current in each branch
+
+Vm1 vssm1 vss DC=0
+Vm2 vdda vddm2 DC=0
+Vm3 vdda vddm3 DC=0
+Vm4 vssm4 vss DC=0
+Vm5 vssm5 vss DC=0
+Vm6 vdda vddm6 DC=0
+Vm7 vdda vddm7 DC=0
+
+* D G S B
+Xm1 casc1 vin vssm1 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=1
+Xc1 mir1 casc1 casc1 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
+Xm2 mir1 mir1 vddm2 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=8
+Xm3 mir2 mir1 vddm3 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
+Xc2 casc2 casc1 mir2 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
+Xm4 casc2 casc2 vssm4 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=7
+Xm5 casc3 casc2 vssm5 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=1
+Xc3 mir3 casc3 casc3 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
+Xm6 mir3 mir3 vddm6 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=7
+Xm7 mir4 mir3 vddm7 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
+Xc4 vcap casc3 mir4 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1
+
+* Check branch currents in each mirror branch.
+* 1st branch should be 240nA
+* 2nd branch should be 30nA
+* 3rd branch should be 4.3nA
+* 4th branch should be 612pA
+*
+* Result: vin sits at 0.7590 (close to 0.7575 target)
+* I(Vm1/2) = 202.80 nA
+* I(Vm3/4) = 26.10 nA (should be /8) actually /7.77
+* I(Vm5/6) = 4.58 nA (should be /7) actually /5.70
+* I(Vm7) = 0.67 nA (should be /7) actually /6.80
+
+*----------------------------
+* Testbench circuit
+*----------------------------
+Vpwr vdda vss DC=3.3
+Rgnd vss 0 0.01
+Rload vcap vss 1MEG
+*----------------------------
+
+*----------------------------
+* Testbench control
+*----------------------------
+.control
+op
+print V(vin)
+print I(Vm1)
+print I(Vm2)
+print I(Vm3)
+print I(Vm4)
+print I(Vm5)
+print I(Vm6)
+print I(Vm7)
+.endc
+
+.end
+
diff --git a/xschem/example_por.sch b/xschem/example_por.sch
new file mode 100644
index 0000000..cf6e0c3
--- /dev/null
+++ b/xschem/example_por.sch
@@ -0,0 +1,297 @@
+v {xschem version=2.9.9 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+L 4 3370 -60 3390 -60 {}
+L 4 3390 -60 3390 80 {}
+L 4 3370 80 3390 80 {}
+T {Current step-down mirror} 2270 140 0 0 0.4 0.4 {}
+T {Charge accumulator} 2650 140 0 0 0.4 0.4 {}
+T {Voltage divider} 1860 140 0 0 0.4 0.4 {}
+T {Schmitt trigger} 2930 -200 0 0 0.4 0.4 {}
+T {150 / 650 * 3.3V = 0.76V} 1860 180 0 0 0.4 0.4 {}
+T {step down 8x} 2130 -430 0 0 0.4 0.4 {}
+T {step down 7x} 2330 80 0 0 0.4 0.4 {}
+T {step down 7x} 2520 -430 0 0 0.4 0.4 {}
+T {1.8V domain outputs} 3400 0 0 0 0.4 0.4 {}
+T {3.3V domain output} 3410 -140 0 0 0.4 0.4 {}
+T {392 : 1} 2270 180 0 0 0.4 0.4 {}
+T {Simple power-on-reset circuit
+calibrated to 500us nominal delay
+no temperature compensation} 1950 -570 0 0 0.6 0.6 {}
+N 2500 -310 2500 -270 { lab=#net1}
+N 2500 -210 2500 -100 { lab=#net2}
+N 2300 -40 2300 20 { lab=#net3}
+N 2300 80 2300 110 { lab=vss}
+N 2360 110 2500 110 { lab=vss}
+N 2500 80 2500 110 { lab=vss}
+N 2400 50 2460 50 { lab=#net3}
+N 2360 -400 2500 -400 { lab=vdd3v3}
+N 2500 -400 2500 -370 { lab=vdd3v3}
+N 2500 -400 2790 -400 { lab=vdd3v3}
+N 2300 -10 2370 -10 { lab=#net3}
+N 2370 -10 2370 50 { lab=#net3}
+N 2500 -290 2570 -290 { lab=#net1}
+N 2570 -340 2570 -290 { lab=#net1}
+N 2540 -340 2570 -340 { lab=#net1}
+N 2500 -190 2570 -190 { lab=#net2}
+N 2570 -240 2570 -190 { lab=#net2}
+N 2540 -240 2570 -240 { lab=#net2}
+N 2240 110 2360 110 { lab=vss}
+N 2500 110 2630 110 { lab=vss}
+N 2500 50 2630 50 { lab=vss}
+N 2110 110 2240 110 { lab=vss}
+N 1930 60 1930 110 { lab=vss}
+N 1930 -160 1930 0 { lab=#net4}
+N 1930 -400 1930 -220 { lab=vdd3v3}
+N 2110 -400 2360 -400 { lab=vdd3v3}
+N 1880 -190 1910 -190 { lab=vss}
+N 1880 -190 1880 110 { lab=vss}
+N 1880 110 1930 110 { lab=vss}
+N 1880 30 1910 30 { lab=vss}
+N 2300 -310 2300 -270 { lab=#net5}
+N 2300 -400 2300 -370 { lab=vdd3v3}
+N 2300 -140 2300 -100 { lab=#net3}
+N 2340 50 2400 50 { lab=#net3}
+N 2300 -210 2300 -140 { lab=#net3}
+N 2100 80 2100 110 { lab=vss}
+N 2100 110 2110 110 { lab=vss}
+N 2050 50 2060 50 { lab=#net4}
+N 2050 -70 2050 50 { lab=#net4}
+N 1930 -70 2050 -70 { lab=#net4}
+N 1930 -400 2110 -400 { lab=vdd3v3}
+N 2100 -400 2100 -370 { lab=vdd3v3}
+N 2100 -310 2100 -270 { lab=#net6}
+N 2100 -210 2100 20 { lab=#net7}
+N 2100 50 2300 50 { lab=vss}
+N 2200 50 2200 110 { lab=vss}
+N 2140 -240 2260 -240 { lab=#net7}
+N 2140 -340 2260 -340 { lab=#net6}
+N 2100 -290 2180 -290 { lab=#net6}
+N 2180 -340 2180 -290 { lab=#net6}
+N 2100 -180 2180 -180 { lab=#net7}
+N 2180 -240 2180 -180 { lab=#net7}
+N 1930 -240 2100 -240 { lab=vdd3v3}
+N 1930 -340 2100 -340 { lab=vdd3v3}
+N 1930 110 2100 110 { lab=vss}
+N 2300 -240 2500 -240 { lab=vdd3v3}
+N 2300 -340 2500 -340 { lab=vdd3v3}
+N 2400 -340 2400 -240 { lab=vdd3v3}
+N 2400 -400 2400 -340 { lab=vdd3v3}
+N 2570 -240 2650 -240 { lab=#net2}
+N 2570 -340 2650 -340 { lab=#net1}
+N 2690 -400 2690 -370 { lab=vdd3v3}
+N 2790 -400 2790 -340 { lab=vdd3v3}
+N 2690 -340 2790 -340 { lab=vdd3v3}
+N 2690 -240 2790 -240 { lab=vdd3v3}
+N 2790 -340 2790 -240 { lab=vdd3v3}
+N 2690 -310 2690 -270 { lab=#net8}
+N 2690 -210 2690 -150 { lab=#net9}
+N 1830 30 1880 30 { lab=vss}
+N 1810 60 1810 110 { lab=vss}
+N 1810 110 1880 110 { lab=vss}
+N 1810 -70 1810 0 { lab=vss}
+N 1810 -70 1880 -70 { lab=vss}
+N 2690 -150 2690 -70 { lab=#net9}
+N 2820 -130 2820 -70 { lab=#net9}
+N 2690 -130 2820 -130 { lab=#net9}
+N 2630 110 2820 110 { lab=vss}
+N 2820 -10 2820 110 { lab=vss}
+N 2690 -10 2690 110 { lab=vss}
+N 2820 -130 2980 -130 { lab=#net9}
+N 3060 -130 3130 -130 { lab=#net10}
+N 3090 -130 3090 60 { lab=#net10}
+N 3090 60 3130 60 { lab=#net10}
+N 3090 -40 3130 -40 { lab=#net10}
+N 3210 -130 3300 -130 { lab=porb_h}
+N 3210 -40 3300 -40 { lab=porb_l}
+N 3210 60 3300 60 { lab=por_l}
+N 2790 -400 2840 -400 { lab=vdd3v3}
+N 2820 110 2870 110 { lab=vss}
+N 2630 50 2690 50 { lab=vss}
+N 2300 -100 2300 -40 { lab=#net3}
+N 2500 -100 2500 -30 { lab=#net2}
+N 2500 -30 2500 20 { lab=#net2}
+C {sky130_fd_pr/cap_mim_m3_1.sym} 2690 -40 0 0 {name=C1 model=cap_mim_m3_1 W=30 L=30 MF=1 spiceprefix=X}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 2820 -40 2 1 {name=C2 model=cap_mim_m3_2 W=30 L=30 MF=1 spiceprefix=X}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2280 -240 0 0 {name=M1
+L=0.8
+W=2
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2480 50 0 0 {name=M2
+L=0.8
+W=2
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1930 -190 0 0 {name=R1
+L=500
+model=res_xhigh_po_0p69
+spiceprefix=X
+mult=1}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2280 -340 0 0 {name=M4
+L=0.8
+W=2
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2320 50 0 1 {name=M5
+L=0.8
+W=14
+nf=7
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1930 30 0 0 {name=R2
+L=150
+model=res_xhigh_po_0p69
+spiceprefix=X
+mult=1}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2520 -240 0 1 {name=M7
+L=0.8
+W=2
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2520 -340 0 1 {name=M8
+L=0.8
+W=14
+nf=7
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2080 50 0 0 {name=M10
+L=0.8
+W=2
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2120 -240 0 1 {name=M9
+L=0.8
+W=2
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2120 -340 0 1 {name=M11
+L=0.8
+W=16
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2670 -340 0 0 {name=M12
+L=0.8
+W=2
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2670 -240 0 0 {name=M13
+L=0.8
+W=2
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1810 30 0 1 {name=R3
+L=25
+model=res_xhigh_po_0p69
+spiceprefix=X
+mult=2}
+C {sky130_stdcells/buf_8.sym} 3170 -130 0 0 {name=x2 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__ }
+C {sky130_stdcells/buf_8.sym} 3170 -40 0 0 {name=x3 VGND=vss VNB=vss VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ }
+C {sky130_stdcells/inv_8.sym} 3170 60 0 0 {name=x4 VGND=vss VNB=vss VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ }
+C {sky130_stdcells/buf_1.sym} 3020 -130 0 0 {name=x5 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__schmitt }
+C {devices/iopin.sym} 2840 -400 0 0 {name=p1 lab=vdd3v3}
+C {devices/iopin.sym} 2870 110 0 0 {name=p2 lab=vss}
+C {devices/opin.sym} 3300 -130 0 0 {name=p3 lab=porb_h}
+C {devices/opin.sym} 3300 -40 0 0 {name=p4 lab=porb_l}
+C {devices/opin.sym} 3300 60 0 0 {name=p5 lab=por_l}
+C {devices/iopin.sym} 2840 -330 0 0 {name=p6 lab=vdd1v8}
diff --git a/xschem/example_por.sym b/xschem/example_por.sym
new file mode 100644
index 0000000..e3875f5
--- /dev/null
+++ b/xschem/example_por.sym
@@ -0,0 +1,33 @@
+v {xschem version=2.9.9 file_version=1.2 }
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -130 -60 130 -60 {}
+L 4 -130 60 130 60 {}
+L 4 -130 -60 -130 60 {}
+L 4 130 -60 130 60 {}
+L 4 130 -30 150 -30 {}
+L 4 130 0 150 0 {}
+L 4 130 30 150 30 {}
+L 7 -30 -80 -30 -60 {}
+L 7 30 -80 30 -60 {}
+L 7 0 60 0 80 {}
+B 5 -32.5 -82.5 -27.5 -77.5 {name=vdd3v3 dir=inout }
+B 5 27.5 -82.5 32.5 -77.5 {name=vdd1v8 dir=inout }
+B 5 147.5 -32.5 152.5 -27.5 {name=porb_h dir=out }
+B 5 147.5 -2.5 152.5 2.5 {name=porb_l dir=out }
+B 5 147.5 27.5 152.5 32.5 {name=por_l dir=out }
+B 5 -2.5 77.5 2.5 82.5 {name=vss dir=inout }
+T {@symname} -47.5 -6 0 0 0.3 0.3 {}
+T {@name} -25 18 0 0 0.2 0.2 {}
+T {vdd3v3} -15 -54 0 1 0.2 0.2 {}
+T {vdd1v8} 55 -54 0 1 0.2 0.2 {}
+T {porb_h} 125 -34 0 1 0.2 0.2 {}
+T {porb_l} 125 -4 0 1 0.2 0.2 {}
+T {por_l} 125 26 0 1 0.2 0.2 {}
+T {vss} 5 46 0 1 0.2 0.2 {}
diff --git a/xschem/example_por_tb.sch b/xschem/example_por_tb.sch
new file mode 100644
index 0000000..a24d814
--- /dev/null
+++ b/xschem/example_por_tb.sch
@@ -0,0 +1,45 @@
+v {xschem version=2.9.9 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+T {Testbench for simple POR} -350 -240 0 0 0.6 0.6 {}
+N -280 60 -10 60 { lab=GND}
+N -540 0 -540 60 { lab=GND}
+N -330 0 -330 60 { lab=GND}
+N -330 -100 -330 -60 { lab=vdd3v3}
+N -330 -110 -330 -100 { lab=vdd3v3}
+N -210 -110 -40 -110 { lab=vdd3v3}
+N -40 -110 -40 -100 { lab=vdd3v3}
+N -540 -130 -540 -60 { lab=vdd1v8}
+N -280 -130 20 -130 { lab=vdd1v8}
+N 20 -130 20 -100 { lab=vdd1v8}
+N 140 -50 180 -50 { lab=porb_h}
+N 140 -20 180 -20 { lab=porb_l}
+N 140 10 180 10 { lab=por_l}
+N -340 -110 -330 -110 { lab=vdd3v3}
+N -500 -130 -490 -130 { lab=vdd1v8}
+N -540 -130 -500 -130 { lab=vdd1v8}
+N -560 -130 -540 -130 { lab=vdd1v8}
+N -540 60 -490 60 { lab=GND}
+N -490 -130 -280 -130 { lab=vdd1v8}
+N -490 60 -330 60 { lab=GND}
+N -330 60 -280 60 { lab=GND}
+N -330 -110 -210 -110 { lab=vdd3v3}
+C {example_por.sym} -10 -20 0 0 {name=x1}
+C {devices/gnd.sym} -100 60 0 0 {name=l1 lab=GND}
+C {devices/vsource.sym} -330 -30 0 0 {name=V1 value="PWL(0.0 0 100u 0 5m 3.3)"}
+C {devices/vsource.sym} -540 -30 0 0 {name=V2 value="PWL(0.0 0 300u 0 5.3m 1.8)"}
+C {devices/opin.sym} -340 -110 0 1 {name=p1 lab=vdd3v3}
+C {devices/opin.sym} -560 -130 0 1 {name=p2 lab=vdd1v8}
+C {devices/opin.sym} 180 -50 0 0 {name=p3 lab=porb_h}
+C {devices/opin.sym} 180 -20 0 0 {name=p4 lab=porb_l}
+C {devices/opin.sym} 180 10 0 0 {name=p5 lab=por_l}
+C {devices/code.sym} -470 140 0 0 {name=TT_MODELS only_toplevel=false
+format="tcleval(@value )" value=".lib \\\\$::SKYWATER_MODELS\\\\/sky130.lib.spice tt
+.include \\\\$::PDKPATH\\\\/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice"}
+C {devices/code_shown.sym} -320 160 0 0 {name=s2 only_toplevel=false value=".control
+tran 1u 20m
+plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l)
+.endc"}
diff --git a/xschem/example_por_tb.spice b/xschem/example_por_tb.spice
new file mode 100644
index 0000000..fa82f74
--- /dev/null
+++ b/xschem/example_por_tb.spice
@@ -0,0 +1,78 @@
+**.subckt example_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l
+*.opin vdd3v3
+*.opin vdd1v8
+*.opin porb_h
+*.opin porb_l
+*.opin por_l
+x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND example_por
+V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3)
+V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8)
+**** begin user architecture code
+.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
+.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
+
+.control
+tran 1u 20m
+plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l)
+.endc
+
+**** end user architecture code
+**.ends
+
+* expanding symbol: example_por.sym # of pins=6
+* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
+* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
+.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
+*.iopin vdd3v3
+*.iopin vss
+*.opin porb_h
+*.opin porb_l
+*.opin por_l
+*.iopin vdd1v8
+XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
+XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
+XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
+XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
+XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
+x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
+x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
+x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
+x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
+.ends
+
+.GLOBAL GND
+** flattened .save nodes
+.end
diff --git a/xschem/example_por_tb.spice.orig b/xschem/example_por_tb.spice.orig
new file mode 100644
index 0000000..069c74d
--- /dev/null
+++ b/xschem/example_por_tb.spice.orig
@@ -0,0 +1,88 @@
+**.subckt example_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l
+.param mc_switch=0
+*.opin vdd3v3
+*.opin vdd1v8
+*.opin porb_h
+*.opin porb_l
+*.opin por_l
+x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND example_por
+V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3)
+V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8)
+**** begin user architecture code
+
+.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
+
+
+.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
+
+.control
+tran 1u 20m
+plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l)
+.endc
+
+**** end user architecture code
+**.ends
+
+* expanding symbol: example_por.sym # of pins=6
+* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
+* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
+.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
+*.iopin vdd3v3
+*.iopin vss
+*.opin porb_h
+*.opin porb_l
+*.opin por_l
+*.iopin vdd1v8
+XC1 net11 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
+XC2 net11 vss sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
+XM1 net5 net9 net7 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM2 net1 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XR1 net6 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=500 mult=1 m=1
+XM3 net3 net5 net1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM4 net7 net8 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM5 net4 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM6 net5 net5 net4 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XR2 vss net6 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=150 mult=1 m=1
+XM7 net3 net3 net2 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM8 net2 net2 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM10 net9 net6 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM9 net9 net9 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM11 net8 net8 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM12 net10 net2 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM13 net11 net3 net10 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=25 mult=2 m=2
+x2 net12 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
+x3 net12 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
+x4 net12 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
+x5 net11 vss vss vdd3v3 vdd3v3 net12 sky130_fd_sc_hvl__schmittbuf_1
+.ends
+
+.GLOBAL GND
+** flattened .save nodes
+.end
diff --git a/xschem/test.data b/xschem/test.data
new file mode 100644
index 0000000..c9cde37
--- /dev/null
+++ b/xschem/test.data
@@ -0,0 +1,101 @@
+ 7.00000000e-01 -8.93059159e-08 7.00000000e-01 7.00000000e-01
+ 7.01000000e-01 -9.08452852e-08 7.01000000e-01 7.01000000e-01
+ 7.02000000e-01 -9.24385447e-08 7.02000000e-01 7.02000000e-01
+ 7.03000000e-01 -9.40459956e-08 7.03000000e-01 7.03000000e-01
+ 7.04000000e-01 -9.56814959e-08 7.04000000e-01 7.04000000e-01
+ 7.05000000e-01 -9.73455368e-08 7.05000000e-01 7.05000000e-01
+ 7.06000000e-01 -9.90386085e-08 7.06000000e-01 7.06000000e-01
+ 7.07000000e-01 -1.00761227e-07 7.07000000e-01 7.07000000e-01
+ 7.08000000e-01 -1.02513882e-07 7.08000000e-01 7.08000000e-01
+ 7.09000000e-01 -1.04297110e-07 7.09000000e-01 7.09000000e-01
+ 7.10000000e-01 -1.06111443e-07 7.10000000e-01 7.10000000e-01
+ 7.11000000e-01 -1.07957415e-07 7.11000000e-01 7.11000000e-01
+ 7.12000000e-01 -1.09835552e-07 7.12000000e-01 7.12000000e-01
+ 7.13000000e-01 -1.11746436e-07 7.13000000e-01 7.13000000e-01
+ 7.14000000e-01 -1.13690603e-07 7.14000000e-01 7.14000000e-01
+ 7.15000000e-01 -1.15668634e-07 7.15000000e-01 7.15000000e-01
+ 7.16000000e-01 -1.17681129e-07 7.16000000e-01 7.16000000e-01
+ 7.17000000e-01 -1.19728657e-07 7.17000000e-01 7.17000000e-01
+ 7.18000000e-01 -1.21811839e-07 7.18000000e-01 7.18000000e-01
+ 7.19000000e-01 -1.23931259e-07 7.19000000e-01 7.19000000e-01
+ 7.20000000e-01 -1.26087554e-07 7.20000000e-01 7.20000000e-01
+ 7.21000000e-01 -1.28281358e-07 7.21000000e-01 7.21000000e-01
+ 7.22000000e-01 -1.30513286e-07 7.22000000e-01 7.22000000e-01
+ 7.23000000e-01 -1.32784003e-07 7.23000000e-01 7.23000000e-01
+ 7.24000000e-01 -1.35094165e-07 7.24000000e-01 7.24000000e-01
+ 7.25000000e-01 -1.37444453e-07 7.25000000e-01 7.25000000e-01
+ 7.26000000e-01 -1.39835535e-07 7.26000000e-01 7.26000000e-01
+ 7.27000000e-01 -1.42268085e-07 7.27000000e-01 7.27000000e-01
+ 7.28000000e-01 -1.44742842e-07 7.28000000e-01 7.28000000e-01
+ 7.29000000e-01 -1.47260486e-07 7.29000000e-01 7.29000000e-01
+ 7.30000000e-01 -1.49821761e-07 7.30000000e-01 7.30000000e-01
+ 7.31000000e-01 -1.52427364e-07 7.31000000e-01 7.31000000e-01
+ 7.32000000e-01 -1.55078077e-07 7.32000000e-01 7.32000000e-01
+ 7.33000000e-01 -1.57774611e-07 7.33000000e-01 7.33000000e-01
+ 7.34000000e-01 -1.60517775e-07 7.34000000e-01 7.34000000e-01
+ 7.35000000e-01 -1.63308337e-07 7.35000000e-01 7.35000000e-01
+ 7.36000000e-01 -1.66147061e-07 7.36000000e-01 7.36000000e-01
+ 7.37000000e-01 -1.69034765e-07 7.37000000e-01 7.37000000e-01
+ 7.38000000e-01 -1.71972266e-07 7.38000000e-01 7.38000000e-01
+ 7.39000000e-01 -1.74960357e-07 7.39000000e-01 7.39000000e-01
+ 7.40000000e-01 -1.77999888e-07 7.40000000e-01 7.40000000e-01
+ 7.41000000e-01 -1.81091703e-07 7.41000000e-01 7.41000000e-01
+ 7.42000000e-01 -1.84236664e-07 7.42000000e-01 7.42000000e-01
+ 7.43000000e-01 -1.87435634e-07 7.43000000e-01 7.43000000e-01
+ 7.44000000e-01 -1.90689493e-07 7.44000000e-01 7.44000000e-01
+ 7.45000000e-01 -1.93999127e-07 7.45000000e-01 7.45000000e-01
+ 7.46000000e-01 -1.97365464e-07 7.46000000e-01 7.46000000e-01
+ 7.47000000e-01 -2.00789378e-07 7.47000000e-01 7.47000000e-01
+ 7.48000000e-01 -2.04271837e-07 7.48000000e-01 7.48000000e-01
+ 7.49000000e-01 -2.07813739e-07 7.49000000e-01 7.49000000e-01
+ 7.50000000e-01 -2.11416073e-07 7.50000000e-01 7.50000000e-01
+ 7.51000000e-01 -2.15079797e-07 7.51000000e-01 7.51000000e-01
+ 7.52000000e-01 -2.18805863e-07 7.52000000e-01 7.52000000e-01
+ 7.53000000e-01 -2.22595278e-07 7.53000000e-01 7.53000000e-01
+ 7.54000000e-01 -2.26449036e-07 7.54000000e-01 7.54000000e-01
+ 7.55000000e-01 -2.30368144e-07 7.55000000e-01 7.55000000e-01
+ 7.56000000e-01 -2.34353630e-07 7.56000000e-01 7.56000000e-01
+ 7.57000000e-01 -2.38406548e-07 7.57000000e-01 7.57000000e-01
+ 7.58000000e-01 -2.42527913e-07 7.58000000e-01 7.58000000e-01
+ 7.59000000e-01 -2.46718795e-07 7.59000000e-01 7.59000000e-01
+ 7.60000000e-01 -2.50980278e-07 7.60000000e-01 7.60000000e-01
+ 7.61000000e-01 -2.55313430e-07 7.61000000e-01 7.61000000e-01
+ 7.62000000e-01 -2.59719344e-07 7.62000000e-01 7.62000000e-01
+ 7.63000000e-01 -2.64199148e-07 7.63000000e-01 7.63000000e-01
+ 7.64000000e-01 -2.68753946e-07 7.64000000e-01 7.64000000e-01
+ 7.65000000e-01 -2.73384860e-07 7.65000000e-01 7.65000000e-01
+ 7.66000000e-01 -2.78093044e-07 7.66000000e-01 7.66000000e-01
+ 7.67000000e-01 -2.82879650e-07 7.67000000e-01 7.67000000e-01
+ 7.68000000e-01 -2.87745826e-07 7.68000000e-01 7.68000000e-01
+ 7.69000000e-01 -2.92692776e-07 7.69000000e-01 7.69000000e-01
+ 7.70000000e-01 -2.97721660e-07 7.70000000e-01 7.70000000e-01
+ 7.71000000e-01 -3.02833688e-07 7.71000000e-01 7.71000000e-01
+ 7.72000000e-01 -3.08030053e-07 7.72000000e-01 7.72000000e-01
+ 7.73000000e-01 -3.13311974e-07 7.73000000e-01 7.73000000e-01
+ 7.74000000e-01 -3.18680710e-07 7.74000000e-01 7.74000000e-01
+ 7.75000000e-01 -3.24137468e-07 7.75000000e-01 7.75000000e-01
+ 7.76000000e-01 -3.29683509e-07 7.76000000e-01 7.76000000e-01
+ 7.77000000e-01 -3.35320078e-07 7.77000000e-01 7.77000000e-01
+ 7.78000000e-01 -3.41048451e-07 7.78000000e-01 7.78000000e-01
+ 7.79000000e-01 -3.46869908e-07 7.79000000e-01 7.79000000e-01
+ 7.80000000e-01 -3.52785731e-07 7.80000000e-01 7.80000000e-01
+ 7.81000000e-01 -3.58797218e-07 7.81000000e-01 7.81000000e-01
+ 7.82000000e-01 -3.64905663e-07 7.82000000e-01 7.82000000e-01
+ 7.83000000e-01 -3.71112381e-07 7.83000000e-01 7.83000000e-01
+ 7.84000000e-01 -3.77418703e-07 7.84000000e-01 7.84000000e-01
+ 7.85000000e-01 -3.83825919e-07 7.85000000e-01 7.85000000e-01
+ 7.86000000e-01 -3.90335390e-07 7.86000000e-01 7.86000000e-01
+ 7.87000000e-01 -3.96948455e-07 7.87000000e-01 7.87000000e-01
+ 7.88000000e-01 -4.03666461e-07 7.88000000e-01 7.88000000e-01
+ 7.89000000e-01 -4.10490750e-07 7.89000000e-01 7.89000000e-01
+ 7.90000000e-01 -4.17422681e-07 7.90000000e-01 7.90000000e-01
+ 7.91000000e-01 -4.24463629e-07 7.91000000e-01 7.91000000e-01
+ 7.92000000e-01 -4.31614946e-07 7.92000000e-01 7.92000000e-01
+ 7.93000000e-01 -4.38878017e-07 7.93000000e-01 7.93000000e-01
+ 7.94000000e-01 -4.46254218e-07 7.94000000e-01 7.94000000e-01
+ 7.95000000e-01 -4.53744916e-07 7.95000000e-01 7.95000000e-01
+ 7.96000000e-01 -4.61351506e-07 7.96000000e-01 7.96000000e-01
+ 7.97000000e-01 -4.69075369e-07 7.97000000e-01 7.97000000e-01
+ 7.98000000e-01 -4.76917893e-07 7.98000000e-01 7.98000000e-01
+ 7.99000000e-01 -4.84880471e-07 7.99000000e-01 7.99000000e-01
+ 8.00000000e-01 -4.92964482e-07 8.00000000e-01 8.00000000e-01
diff --git a/xschem/threshold_test_tb.spice b/xschem/threshold_test_tb.spice
new file mode 100644
index 0000000..3e9804c
--- /dev/null
+++ b/xschem/threshold_test_tb.spice
@@ -0,0 +1,46 @@
+*---------------------------------------------------------------------------
+* SPDX-FileCopyrightText: 2020 Efabless Corporation
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* https://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*
+* SPDX-License-Identifier: Apache-2.0
+*---------------------------------------------------------------------------
+* Threshold test for POR circuit
+* Determine gate voltage at which the HV NFET draws 240nA nominal
+*
+* Result: 0.7575V
+*-------------------------------------------------------------------
+
+.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
+
+*----------------------------
+* Testbench circuit
+*----------------------------
+Rtest vdda mir1 1MEG
+Xm1 mir1 vin vss vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8
+
+Vgate vin vss DC=0
+Vpwr vdda vss DC=3.3
+Rgnd vss 0 0.1
+
+*----------------------------
+* Testbench control
+*----------------------------
+.control
+* DC sweep from 0.7 to 0.8V
+dc Vgate 0.7 0.8 0.001
+wrdata test.data Vpwr#branch vin
+
+.endc
+
+.end
+
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch
new file mode 100644
index 0000000..e3cbcec
--- /dev/null
+++ b/xschem/user_analog_project_wrapper.sch
@@ -0,0 +1,180 @@
+v {xschem version=2.9.9 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 3830 -460 3830 -390 { lab=vdda1}
+N 3730 -460 3830 -460 { lab=vdda1}
+N 3860 -230 3860 -180 { lab=vssa1}
+N 3770 -180 3860 -180 { lab=vssa1}
+N 3890 -460 3890 -390 { lab=vccd1}
+N 3890 -460 3960 -460 { lab=vccd1}
+N 3890 -130 3890 -60 { lab=vccd1}
+N 3890 -130 3950 -130 { lab=vccd1}
+N 3830 -130 3830 -60 { lab=io_analog[4]}
+N 3790 -130 3830 -130 { lab=io_analog[4]}
+N 3860 100 3860 150 { lab=vssa1}
+N 3800 150 3860 150 { lab=vssa1}
+N 4010 -10 4110 -10 { lab=gpio_analog[7]}
+N 4010 20 4110 20 { lab=io_out[15]}
+N 4010 50 4110 50 { lab=io_out[16]}
+N 4010 -340 4130 -340 { lab=gpio_analog[3]}
+N 4010 -310 4130 -310 { lab=io_out[11]}
+N 4010 -280 4130 -280 { lab=io_out[12]}
+N 3670 300 3670 340 { lab=io_clamp_low[2]}
+N 3670 400 3670 420 { lab=vssa1}
+N 3670 440 3670 460 { lab=io_clamp_high[2]}
+N 3670 520 3670 530 { lab=vssa1}
+N 3670 570 3670 590 { lab=io_clamp_low[1]}
+N 3670 650 3670 670 { lab=vssa1}
+N 4160 300 4160 330 { lab=io_clamp_high[1]}
+N 4160 390 4160 410 { lab=vssa1}
+N 4160 440 4160 460 { lab=io_clamp_low[0]}
+N 4160 520 4160 530 { lab=vssa1}
+N 4160 550 4160 560 { lab=io_clamp_high[0]}
+N 4160 620 4160 640 { lab=io_analog[4]}
+N 3630 300 3670 300 { lab=io_clamp_low[2]}
+N 3630 420 3670 420 { lab=vssa1}
+N 3630 440 3670 440 { lab=io_clamp_high[2]}
+N 3630 530 3670 530 { lab=vssa1}
+N 3630 570 3670 570 { lab=io_clamp_low[1]}
+N 3630 670 3670 670 { lab=vssa1}
+N 4130 300 4160 300 { lab=io_clamp_high[1]}
+N 4130 410 4160 410 { lab=vssa1}
+N 4130 440 4160 440 { lab=io_clamp_low[0]}
+N 4130 530 4160 530 { lab=vssa1}
+N 4130 550 4160 550 { lab=io_clamp_high[0]}
+N 4130 640 4160 640 { lab=io_analog[4]}
+N 3670 710 3670 750 { lab=io_oeb[12]}
+N 3670 810 3670 830 { lab=vssd1}
+N 3670 850 3670 870 { lab=io_oeb[16]}
+N 3670 930 3670 940 { lab=vssd1}
+N 4160 710 4160 740 { lab=io_oeb[11]}
+N 4160 800 4160 820 { lab=vssd1}
+N 4160 850 4160 870 { lab=#net1}
+N 4160 930 4160 940 { lab=vssd1}
+N 3630 710 3670 710 { lab=io_oeb[12]}
+N 3630 830 3670 830 { lab=vssd1}
+N 3630 850 3670 850 { lab=io_oeb[16]}
+N 3630 940 3670 940 { lab=vssd1}
+N 4130 710 4160 710 { lab=io_oeb[11]}
+N 4130 820 4160 820 { lab=vssd1}
+N 4130 850 4160 850 { lab=#net1}
+N 4130 940 4160 940 { lab=vssd1}
+C {example_por.sym} 3860 -310 0 0 {name=x1}
+C {example_por.sym} 3860 20 0 0 {name=x2}
+C {devices/iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1}
+C {devices/iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2}
+C {devices/iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1}
+C {devices/iopin.sym} 3240 -380 0 0 {name=p4 lab=vssa2}
+C {devices/iopin.sym} 3240 -350 0 0 {name=p5 lab=vccd1}
+C {devices/iopin.sym} 3240 -320 0 0 {name=p6 lab=vccd2}
+C {devices/iopin.sym} 3240 -290 0 0 {name=p7 lab=vssd1}
+C {devices/iopin.sym} 3240 -260 0 0 {name=p8 lab=vssd2}
+C {devices/ipin.sym} 3290 -190 0 0 {name=p9 lab=wb_clk_i}
+C {devices/ipin.sym} 3290 -160 0 0 {name=p10 lab=wb_rst_i}
+C {devices/ipin.sym} 3290 -130 0 0 {name=p11 lab=wbs_stb_i}
+C {devices/ipin.sym} 3290 -100 0 0 {name=p12 lab=wbs_cyc_i}
+C {devices/ipin.sym} 3290 -70 0 0 {name=p13 lab=wbs_we_i}
+C {devices/ipin.sym} 3290 -40 0 0 {name=p14 lab=wbs_sel_i[3:0]}
+C {devices/ipin.sym} 3290 -10 0 0 {name=p15 lab=wbs_dat_i[31:0]}
+C {devices/ipin.sym} 3290 20 0 0 {name=p16 lab=wbs_adr_i[31:0]}
+C {devices/opin.sym} 3280 80 0 0 {name=p17 lab=wbs_ack_o}
+C {devices/opin.sym} 3280 110 0 0 {name=p18 lab=wbs_dat_o[31:0]}
+C {devices/ipin.sym} 3290 150 0 0 {name=p19 lab=la_data_in[127:0]}
+C {devices/opin.sym} 3280 180 0 0 {name=p20 lab=la_data_out[127:0]}
+C {devices/ipin.sym} 3290 260 0 0 {name=p21 lab=io_in[26:0]}
+C {devices/ipin.sym} 3290 290 0 0 {name=p22 lab=io_in_3v3[26:0]}
+C {devices/ipin.sym} 3280 570 0 0 {name=p23 lab=user_clock2}
+C {devices/opin.sym} 3280 320 0 0 {name=p24 lab=io_out[26:0]}
+C {devices/opin.sym} 3280 350 0 0 {name=p25 lab=io_oeb[26:0]}
+C {devices/iopin.sym} 3250 410 0 0 {name=p26 lab=gpio_analog[17:0]}
+C {devices/iopin.sym} 3250 440 0 0 {name=p27 lab=gpio_noesd[17:0]}
+C {devices/iopin.sym} 3250 470 0 0 {name=p29 lab=io_analog[10:0]}
+C {devices/iopin.sym} 3250 500 0 0 {name=p30 lab=io_clamp_high[2:0]}
+C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]}
+C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]}
+C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]}
+C {devices/lab_pin.sym} 3730 -460 0 0 {name=l1 sig_type=std_logic lab=vdda1}
+C {devices/lab_pin.sym} 3770 -180 0 0 {name=l2 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 3960 -460 0 1 {name=l3 sig_type=std_logic lab=vccd1}
+C {devices/lab_pin.sym} 3950 -130 0 1 {name=l4 sig_type=std_logic lab=vccd1}
+C {devices/lab_pin.sym} 3790 -130 0 0 {name=l5 sig_type=std_logic lab=io_analog[4]}
+C {devices/lab_pin.sym} 3800 150 0 0 {name=l6 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4130 -340 0 1 {name=l7 sig_type=std_logic lab=gpio_analog[3]}
+C {devices/lab_pin.sym} 4130 -310 0 1 {name=l8 sig_type=std_logic lab=io_out[11]}
+C {devices/lab_pin.sym} 4130 -280 0 1 {name=l9 sig_type=std_logic lab=io_out[12]}
+C {devices/lab_pin.sym} 4110 -10 0 1 {name=l10 sig_type=std_logic lab=gpio_analog[7]}
+C {devices/lab_pin.sym} 4110 20 0 1 {name=l11 sig_type=std_logic lab=io_out[15]}
+C {devices/lab_pin.sym} 4110 50 0 1 {name=l12 sig_type=std_logic lab=io_out[16]}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 370 0 0 {name=R1
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 490 0 0 {name=R2
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 620 0 0 {name=R4
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 360 0 0 {name=R5
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 490 0 0 {name=R6
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 590 0 0 {name=R7
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {devices/lab_pin.sym} 3630 300 0 0 {name=l13 sig_type=std_logic lab=io_clamp_low[2]}
+C {devices/lab_pin.sym} 3630 440 0 0 {name=l14 sig_type=std_logic lab=io_clamp_high[2]}
+C {devices/lab_pin.sym} 3630 570 0 0 {name=l15 sig_type=std_logic lab=io_clamp_low[1]}
+C {devices/lab_pin.sym} 4130 300 0 0 {name=l16 sig_type=std_logic lab=io_clamp_high[1]}
+C {devices/lab_pin.sym} 4130 440 0 0 {name=l17 sig_type=std_logic lab=io_clamp_low[0]}
+C {devices/lab_pin.sym} 3630 420 0 0 {name=l18 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 3630 530 0 0 {name=l19 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4130 410 0 0 {name=l20 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4130 530 0 0 {name=l21 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 3630 670 0 0 {name=l22 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4130 550 0 0 {name=l23 sig_type=std_logic lab=io_clamp_high[0]}
+C {devices/lab_pin.sym} 4130 640 0 0 {name=l24 sig_type=std_logic lab=io_analog[4]}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 780 0 0 {name=R8
+W=0.56
+L=0.49
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 900 0 0 {name=R9
+W=0.56
+L=0.31
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 770 0 0 {name=R11
+W=0.56
+L=0.58
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 900 0 0 {name=R12
+W=0.56
+L=0.6
+model=res_generic_m3
+mult=1}
+C {devices/lab_pin.sym} 4130 850 0 0 {name=l25 sig_type=std_logic lab=io_oeb[15]}
+C {devices/lab_pin.sym} 3630 850 0 0 {name=l26 sig_type=std_logic lab=io_oeb[16]}
+C {devices/lab_pin.sym} 4130 710 0 0 {name=l27 sig_type=std_logic lab=io_oeb[11]}
+C {devices/lab_pin.sym} 3630 710 0 0 {name=l28 sig_type=std_logic lab=io_oeb[12]}
+C {devices/lab_pin.sym} 3630 830 0 0 {name=l29 sig_type=std_logic lab=vssd1}
+C {devices/lab_pin.sym} 3630 940 0 0 {name=l30 sig_type=std_logic lab=vssd1}
+C {devices/lab_pin.sym} 4130 820 0 0 {name=l31 sig_type=std_logic lab=vssd1}
+C {devices/lab_pin.sym} 4130 940 0 0 {name=l32 sig_type=std_logic lab=vssd1}
diff --git a/xschem/user_analog_project_wrapper.spice b/xschem/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..0dc2d20
--- /dev/null
+++ b/xschem/user_analog_project_wrapper.spice
@@ -0,0 +1,202 @@
+.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
++ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
++ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
++ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
++ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
++ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
++ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
++ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
++ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
++ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
++ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
++ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
++ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
++ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
++ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
++ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
++ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
++ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
++ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
++ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
++ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
++ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
++ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
++ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
++ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
++ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
++ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
++ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
++ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
++ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
++ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
++ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
++ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
++ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
++ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
++ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
++ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
++ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
++ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
++ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
++ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
++ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
++ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
++ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
++ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
++ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
++ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
++ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
++ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
++ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
++ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0] io_in[26]
++ io_in[25] io_in[24] io_in[23] io_in[22] io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15]
++ io_in[14] io_in[13] io_in[12] io_in[11] io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4]
++ io_in[3] io_in[2] io_in[1] io_in[0] io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22]
++ io_in_3v3[21] io_in_3v3[20] io_in_3v3[19] io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14]
++ io_in_3v3[13] io_in_3v3[12] io_in_3v3[11] io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6]
++ io_in_3v3[5] io_in_3v3[4] io_in_3v3[3] io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] user_clock2 io_out[26] io_out[25]
++ io_out[24] io_out[23] io_out[22] io_out[21] io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15]
++ io_out[14] io_out[13] io_out[12] io_out[11] io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5]
++ io_out[4] io_out[3] io_out[2] io_out[1] io_out[0] io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22]
++ io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17] io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12]
++ io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7] io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2]
++ io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16] gpio_analog[15] gpio_analog[14] gpio_analog[13]
++ gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9] gpio_analog[8] gpio_analog[7] gpio_analog[6]
++ gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2] gpio_analog[1] gpio_analog[0] gpio_noesd[17]
++ gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13] gpio_noesd[12] gpio_noesd[11] gpio_noesd[10]
++ gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5] gpio_noesd[4] gpio_noesd[3] gpio_noesd[2]
++ gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8] io_analog[7] io_analog[6] io_analog[5]
++ io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0] io_clamp_high[2] io_clamp_high[1]
++ io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_irq[2] user_irq[1] user_irq[0] la_oenb[127]
++ la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120] la_oenb[119]
++ la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112] la_oenb[111]
++ la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104] la_oenb[103]
++ la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95] la_oenb[94]
++ la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86] la_oenb[85]
++ la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77] la_oenb[76]
++ la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68] la_oenb[67]
++ la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59] la_oenb[58]
++ la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50] la_oenb[49]
++ la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41] la_oenb[40]
++ la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32] la_oenb[31]
++ la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23] la_oenb[22]
++ la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14] la_oenb[13]
++ la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5] la_oenb[4]
++ la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0]
+*.iopin vdda1
+*.iopin vdda2
+*.iopin vssa1
+*.iopin vssa2
+*.iopin vccd1
+*.iopin vccd2
+*.iopin vssd1
+*.iopin vssd2
+*.ipin wb_clk_i
+*.ipin wb_rst_i
+*.ipin wbs_stb_i
+*.ipin wbs_cyc_i
+*.ipin wbs_we_i
+*.ipin wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
+*.ipin
+*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
+*.ipin
+*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0]
+*.opin wbs_ack_o
+*.opin
+*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
+*.ipin
+*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
+*.opin
+*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
+*.ipin
+*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
+*.ipin
+*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0]
+*.ipin user_clock2
+*.opin
+*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
+*.opin
+*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
+*.iopin
+*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
+*.iopin
+*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
+*.iopin
+*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0]
+*.iopin io_clamp_high[2],io_clamp_high[1],io_clamp_high[0]
+*.iopin io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
+*.opin user_irq[2],user_irq[1],user_irq[0]
+*.ipin
+*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
+x1 vdda1 vccd1 gpio_analog[3] io_out[11] io_out[12] vssa1 example_por
+x2 io_analog[4] vccd1 gpio_analog[7] io_out[15] io_out[16] vssa1 example_por
+R1 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R2 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R3 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m1 W=1 L=1 m=1
+R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R5 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R7 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R8 vssd1 io_oeb[15] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R9 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R10 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m1 W=1 L=1 m=1
+R11 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R12 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+.ends
+
+* expanding symbol: example_por.sym # of pins=6
+* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
+* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
+.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss
+*.iopin vdd3v3
+*.iopin vss
+*.opin porb_h
+*.opin porb_l
+*.opin por_l
+*.iopin vdd1v8
+XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
+XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
+XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
+XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
+XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
+x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
+x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
+x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
+x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
+.ends
+
+** flattened .save nodes
+.end
diff --git a/xschem/user_analog_project_wrapper.sym b/xschem/user_analog_project_wrapper.sym
new file mode 100644
index 0000000..a561ba9
--- /dev/null
+++ b/xschem/user_analog_project_wrapper.sym
@@ -0,0 +1,111 @@
+v {xschem version=2.9.9 file_version=1.2 }
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -130 -190 130 -190 {}
+L 4 -130 190 130 190 {}
+L 4 -130 -190 -130 190 {}
+L 4 130 -190 130 190 {}
+L 4 -150 -180 -130 -180 {}
+L 4 -150 -160 -130 -160 {}
+L 4 -150 -140 -130 -140 {}
+L 4 -150 -120 -130 -120 {}
+L 4 -150 -100 -130 -100 {}
+L 4 -150 -80 -130 -80 {}
+L 4 -150 -60 -130 -60 {}
+L 4 -150 -40 -130 -40 {}
+L 4 130 -20 150 -20 {}
+L 4 130 0 150 0 {}
+L 4 -150 -20 -130 -20 {}
+L 4 130 20 150 20 {}
+L 4 -150 0 -130 0 {}
+L 4 -150 20 -130 20 {}
+L 4 -150 40 -130 40 {}
+L 4 130 40 150 40 {}
+L 4 130 60 150 60 {}
+L 4 -150 60 -130 60 {}
+L 4 130 180 150 180 {}
+L 7 130 -180 150 -180 {}
+L 7 130 -160 150 -160 {}
+L 7 130 -140 150 -140 {}
+L 7 130 -120 150 -120 {}
+L 7 130 -100 150 -100 {}
+L 7 130 -80 150 -80 {}
+L 7 130 -60 150 -60 {}
+L 7 130 -40 150 -40 {}
+L 7 130 80 150 80 {}
+L 7 130 100 150 100 {}
+L 7 130 120 150 120 {}
+L 7 130 140 150 140 {}
+L 7 130 160 150 160 {}
+B 5 147.5 -182.5 152.5 -177.5 {name=vdda1 dir=inout }
+B 5 147.5 -162.5 152.5 -157.5 {name=vdda2 dir=inout }
+B 5 147.5 -142.5 152.5 -137.5 {name=vssa1 dir=inout }
+B 5 147.5 -122.5 152.5 -117.5 {name=vssa2 dir=inout }
+B 5 147.5 -102.5 152.5 -97.5 {name=vccd1 dir=inout }
+B 5 147.5 -82.5 152.5 -77.5 {name=vccd2 dir=inout }
+B 5 147.5 -62.5 152.5 -57.5 {name=vssd1 dir=inout }
+B 5 147.5 -42.5 152.5 -37.5 {name=vssd2 dir=inout }
+B 5 -152.5 -182.5 -147.5 -177.5 {name=wb_clk_i dir=in }
+B 5 -152.5 -162.5 -147.5 -157.5 {name=wb_rst_i dir=in }
+B 5 -152.5 -142.5 -147.5 -137.5 {name=wbs_stb_i dir=in }
+B 5 -152.5 -122.5 -147.5 -117.5 {name=wbs_cyc_i dir=in }
+B 5 -152.5 -102.5 -147.5 -97.5 {name=wbs_we_i dir=in }
+B 5 -152.5 -82.5 -147.5 -77.5 {name=wbs_sel_i[3:0] dir=in }
+B 5 -152.5 -62.5 -147.5 -57.5 {name=wbs_dat_i[31:0] dir=in }
+B 5 -152.5 -42.5 -147.5 -37.5 {name=wbs_adr_i[31:0] dir=in }
+B 5 147.5 -22.5 152.5 -17.5 {name=wbs_ack_o dir=out }
+B 5 147.5 -2.5 152.5 2.5 {name=wbs_dat_o[31:0] dir=out }
+B 5 -152.5 -22.5 -147.5 -17.5 {name=la_data_in[127:0] dir=in }
+B 5 147.5 17.5 152.5 22.5 {name=la_data_out[127:0] dir=out }
+B 5 -152.5 -2.5 -147.5 2.5 {name=la_oenb[127:0] dir=in }
+B 5 -152.5 17.5 -147.5 22.5 {name=io_in[26:0] dir=in }
+B 5 -152.5 37.5 -147.5 42.5 {name=io_in_3v3[26:0] dir=in }
+B 5 147.5 37.5 152.5 42.5 {name=io_out[26:0] dir=out }
+B 5 147.5 57.5 152.5 62.5 {name=io_oeb[26:0] dir=out }
+B 5 147.5 77.5 152.5 82.5 {name=gpio_analog[17:0] dir=inout }
+B 5 147.5 97.5 152.5 102.5 {name=gpio_noesd[17:0] dir=inout }
+B 5 147.5 117.5 152.5 122.5 {name=io_analog[10:0] dir=inout }
+B 5 147.5 137.5 152.5 142.5 {name=io_clamp_high[2:0] dir=inout }
+B 5 147.5 157.5 152.5 162.5 {name=io_clamp_low[2:0] dir=inout }
+B 5 -152.5 57.5 -147.5 62.5 {name=user_clock2 dir=in }
+B 5 147.5 177.5 152.5 182.5 {name=user_irq[2:0] dir=out }
+T {@symname} -119.5 114 0 0 0.3 0.3 {}
+T {@name} 135 -202 0 0 0.2 0.2 {}
+T {vdda1} 125 -184 0 1 0.2 0.2 {}
+T {vdda2} 125 -164 0 1 0.2 0.2 {}
+T {vssa1} 125 -144 0 1 0.2 0.2 {}
+T {vssa2} 125 -124 0 1 0.2 0.2 {}
+T {vccd1} 125 -104 0 1 0.2 0.2 {}
+T {vccd2} 125 -84 0 1 0.2 0.2 {}
+T {vssd1} 125 -64 0 1 0.2 0.2 {}
+T {vssd2} 125 -44 0 1 0.2 0.2 {}
+T {wb_clk_i} -125 -184 0 0 0.2 0.2 {}
+T {wb_rst_i} -125 -164 0 0 0.2 0.2 {}
+T {wbs_stb_i} -125 -144 0 0 0.2 0.2 {}
+T {wbs_cyc_i} -125 -124 0 0 0.2 0.2 {}
+T {wbs_we_i} -125 -104 0 0 0.2 0.2 {}
+T {wbs_sel_i[3:0]} -125 -84 0 0 0.2 0.2 {}
+T {wbs_dat_i[31:0]} -125 -64 0 0 0.2 0.2 {}
+T {wbs_adr_i[31:0]} -125 -44 0 0 0.2 0.2 {}
+T {wbs_ack_o} 125 -24 0 1 0.2 0.2 {}
+T {wbs_dat_o[31:0]} 125 -4 0 1 0.2 0.2 {}
+T {la_data_in[127:0]} -125 -24 0 0 0.2 0.2 {}
+T {la_data_out[127:0]} 125 16 0 1 0.2 0.2 {}
+T {la_oenb[127:0]} -125 -4 0 0 0.2 0.2 {}
+T {io_in[26:0]} -125 16 0 0 0.2 0.2 {}
+T {io_in_3v3[26:0]} -125 36 0 0 0.2 0.2 {}
+T {io_out[26:0]} 125 36 0 1 0.2 0.2 {}
+T {io_oeb[26:0]} 125 56 0 1 0.2 0.2 {}
+T {gpio_analog[17:0]} 125 76 0 1 0.2 0.2 {}
+T {gpio_noesd[17:0]} 125 96 0 1 0.2 0.2 {}
+T {io_analog[10:0]} 125 116 0 1 0.2 0.2 {}
+T {io_clamp_high[2:0]} 125 136 0 1 0.2 0.2 {}
+T {io_clamp_low[2:0]} 125 156 0 1 0.2 0.2 {}
+T {user_clock2} -125 56 0 0 0.2 0.2 {}
+T {user_irq[2:0]} 125 176 0 1 0.2 0.2 {}
diff --git a/xschem/xschemrc b/xschem/xschemrc
new file mode 100644
index 0000000..ca6e33e
--- /dev/null
+++ b/xschem/xschemrc
@@ -0,0 +1,296 @@
+#### xschemrc system configuration file
+
+#### values may be overridden by user's ~/.xschem/xschemrc configuration file
+#### or by project-local ./xschemrc
+
+###########################################################################
+#### XSCHEM INSTALLATION DIRECTORY: XSCHEM_SHAREDIR
+###########################################################################
+#### Normally there is no reason to set this variable if using standard
+#### installation. Location of files is set at compile time but may be overridden
+#### with following line:
+# set XSCHEM_SHAREDIR $env(HOME)/share/xschem
+
+###########################################################################
+#### XSCHEM SYSTEM-WIDE DESIGN LIBRARY PATHS: XSCHEM_LIBRARY_PATH
+###########################################################################
+#### If unset xschem starts with XSCHEM_LIBRARY_PATH set to the default, typically:
+# /home/schippes/.xschem/xschem_library
+# /home/schippes/share/xschem/xschem_library/devices
+# /home/schippes/share/doc/xschem/examples
+# /home/schippes/share/doc/xschem/ngspice
+# /home/schippes/share/doc/xschem/logic
+# /home/schippes/share/doc/xschem/xschem_simulator
+# /home/schippes/share/doc/xschem/binto7seg
+# /home/schippes/share/doc/xschem/pcb
+# /home/schippes/share/doc/xschem/rom8k
+
+#### Allow user environment to override the path to the PDK
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+ set PDKPATH "/usr/share/pdk/sky130A"
+}
+#### Flush any previous definition
+set XSCHEM_LIBRARY_PATH {}
+#### include devices/*.sym
+append XSCHEM_LIBRARY_PATH ${XSCHEM_SHAREDIR}/xschem_library
+#### include skywater libraries. Here i use [pwd]. This works if i start xschem from here.
+append XSCHEM_LIBRARY_PATH :$env(PWD)
+append XSCHEM_LIBRARY_PATH :$PDKPATH/libs.tech/xschem
+# append XSCHEM_LIBRARY_PATH :/mnt/sda7/home/schippes/pdks/sky130A/libs.tech/xschem
+#### add ~/.xschem/xschem_library (USER_CONF_DIR is normally ~/.xschem)
+append XSCHEM_LIBRARY_PATH :$USER_CONF_DIR/xschem_library
+
+###########################################################################
+#### SET CUSTOM COLORS FOR XSCHEM LIBRARIES MATCHING CERTAIN PATTERNS
+###########################################################################
+#### each line contains a dircolor(pattern) followed by a color
+#### color can be an ordinary name (grey, brown, blue) or a hex code {#77aaff}
+#### hex code must be enclosed in braces
+array unset dircolor
+set dircolor(sky130_fd_pr$) blue
+set dircolor(sky130_tests$) blue
+set dircolor(xschem_sky130$) blue
+set dircolor(xschem_library$) red
+set dircolor(devices$) red
+
+###########################################################################
+#### WINDOW TO OPEN ON STARTUP: XSCHEM_START_WINDOW
+###########################################################################
+#### Start without a design if no filename given on command line:
+#### To avoid absolute paths, use a path that is relative to one of the
+#### XSCHEM_LIBRARY_PATH directories. Default: empty
+set XSCHEM_START_WINDOW {sky130_tests/top.sch}
+
+###########################################################################
+#### DIRECTORY WHERE SIMULATIONS, NETLIST AND SIMULATOR OUTPUTS ARE PLACED
+###########################################################################
+#### If unset $USER_CONF_DIR/simulations is assumed (normally ~/.xschem/simulations)
+# set netlist_dir $env(HOME)/.xschem/simulations
+set netlist_dir .
+
+###########################################################################
+#### CHANGE DEFAULT [] WITH SOME OTHER CHARACTERS FOR BUSSED SIGNALS
+#### IN SPICE NETLISTS (EXAMPLE: DATA[7] --> DATA<7>)
+###########################################################################
+#### default: empty (use xschem default, [ ])
+# set bus_replacement_char {<>}
+#### for XSPICE: replace square brackets as the are used for XSPICE vector nodes.
+# set bus_replacement_char {__}
+
+###########################################################################
+#### SOME DEFAULT BEHAVIOR
+###########################################################################
+#### Allowed values: spice, verilog, vhdl, tedax, default: spice
+# set netlist_type spice
+
+#### Some netlisting options (these are the defaults)
+# set hspice_netlist 1
+# set verilog_2001 1
+
+#### to use a fixed line with set change_lw to 0 and set some value to line_width
+#### these are the defaults
+# set line_width 0
+# set change_lw 1
+
+#### allow color postscript and svg exports. Default: 1, enable color
+# set color_ps 1
+
+#### initial size of xschem window you can specify also position with (wxh+x+y)
+#### this is the default:
+# set initial_geometry {900x600}
+
+#### if set to 0, when zooming out allow the viewport do drift toward the mouse position,
+#### allowing to move away by zooming / unzooming with mouse wheel
+#### default setting: 0
+# set unzoom_nodrift 0
+
+#### if set to 1 allow to place multiple components with same name.
+#### Warning: this is normally not allowed in any simulation netlist.
+#### default: 0, do not allow place multiple elements with same name (refdes)
+# set disable_unique_names 0
+
+#### if set to 1 continue drawing lines / wires after click
+#### default: 0
+# set persistent_command 1
+
+#### if set to 1 automatically join/trim wires while editing
+#### this may slow down on rally big designs. Can be disabled via menu
+#### default: 0
+# set autotrim_wires 0
+
+#### set widget scaling (mainly for font display), this is useful on 4K displays
+#### default: unset (tk uses its default) > 1.0 ==> bigger
+# set tk_scaling 1.7
+
+#### disable some symbol layers. Default: none, all layers are visible.
+# set enable_layer(5) 0 ;# example to disable pin red boxes
+
+#### enable to scale grid point size as done with lines at close zoom, default: 0
+# set big_grid_points 0
+
+###########################################################################
+#### EXPORT FORMAT TRANSLATORS, PNG AND PDF
+###########################################################################
+#### command to translate xpm to png; (assumes command takes source
+#### and dest file as arguments, example: gm convert plot.xpm plot.png)
+#### default: {gm convert}
+# set to_png {gm convert}
+
+#### command to translate ps to pdf; (assumes command takes source
+#### and dest file as arguments, example: ps2pdf plot.ps plot.pdf)
+#### default: ps2pdf
+# set to_pdf ps2pdf
+set to_pdf {ps2pdf -dAutoRotatePages=/None}
+
+
+###########################################################################
+#### CUSTOM GRID / SNAP VALUE SETTINGS
+###########################################################################
+#### Warning: changing these values will likely break compatibility
+#### with existing symbol libraries. Defaults: grid 20, snap 10.
+# set grid 20
+# set snap 10
+
+###########################################################################
+#### CUSTOM COLORS MAY BE DEFINED HERE
+###########################################################################
+# set cadlayers 22
+# set light_colors {
+# "#ffffff" "#0044ee" "#aaaaaa" "#222222" "#229900"
+# "#bb2200" "#00ccee" "#ff0000" "#888800" "#00aaaa"
+# "#880088" "#00ff00" "#0000cc" "#666600" "#557755"
+# "#aa2222" "#7ccc40" "#00ffcc" "#ce0097" "#d2d46b"
+# "#ef6158" "#fdb200" }
+
+# set dark_colors {
+# "#000000" "#00ccee" "#3f3f3f" "#cccccc" "#88dd00"
+# "#bb2200" "#00ccee" "#ff0000" "#ffff00" "#ffffff"
+# "#ff00ff" "#00ff00" "#0000cc" "#aaaa00" "#aaccaa"
+# "#ff7777" "#bfff81" "#00ffcc" "#ce0097" "#d2d46b"
+# "#ef6158" "#fdb200" }
+
+###########################################################################
+#### CAIRO STUFF
+###########################################################################
+#### Scale all fonts by this number
+# set cairo_font_scale 1.0
+
+#### default for following two is 0.85 (xscale) and 0.88 (yscale) to
+#### match cairo font spacing
+# set nocairo_font_xscale 1.0
+#### set nocairo_font_yscale 1.0
+
+#### Scale line spacing by this number
+# set cairo_font_line_spacing 1.0
+
+#### Specify a font
+# set cairo_font_name {Sans-Serif}
+# set svg_font_name {Sans-Serif}
+
+#### Lift up text by some zoom-corrected pixels for
+#### better compatibility wrt no cairo version.
+#### Useful values in the range [-1, 3]
+# set cairo_vert_correct 0
+# set nocairo_vert_correct 0
+
+###########################################################################
+#### KEYBINDINGS
+###########################################################################
+#### General format for specifying a replacement for a keybind
+#### Replace Ctrl-d with Escape (so you wont kill the program)
+# set replace_key(Control-d) Escape
+
+#### swap w and W keybinds; Always specify Shift for capital letters
+# set replace_key(Shift-W) w
+# set replace_key(w) Shift-W
+
+###########################################################################
+#### TERMINAL
+###########################################################################
+#### default for linux: xterm
+# set terminal {xterm -geometry 100x35 -fn 9x15 -bg black -fg white -cr white -ms white }
+#### lxterminal is not OK since it will not inherit env vars:
+#### In order to reduce memory usage and increase the performance, all instances
+#### of the lxterminal are sharing a single process. LXTerminal is part of LXDE
+
+###########################################################################
+#### EDITOR
+###########################################################################
+#### editor must not detach from launching shell (-f mandatory for gvim)
+#### default for linux: gvim -f
+# set editor {gvim -f -geometry 90x28}
+# set editor { xterm -geometry 100x40 -e nano }
+# set editor { xterm -geometry 100x40 -e pico }
+
+#### For Windows
+# set editor {notepad.exe}
+
+###########################################################################
+#### SHOW ERC INFO WINDOW (erc errors, warnings etc)
+###########################################################################
+#### default: 0 (can be enabled by menu)
+# set show_infowindow 0
+
+###########################################################################
+#### CONFIGURE COMPUTER FARM JOB REDIRECTORS FOR SIMULATIONS
+###########################################################################
+#### RTDA NC
+# set computerfarm {nc run -Il}
+#### LSF BSUB
+# set computerfarm {bsub -Is}
+
+###########################################################################
+#### TCP CONNECTION WITH GAW
+###########################################################################
+#### set gaw address for socket connection: {host port}
+#### default: set to localhost, port 2020
+# set gaw_tcp_address {localhost 2020}
+
+###########################################################################
+#### XSCHEM LISTEN TO TCP PORT
+###########################################################################
+#### set xschem listening port; default: not enabled
+# set xschem_listen_port 2021
+
+###########################################################################
+#### BESPICE WAVE SOCKET CONNECTION
+###########################################################################
+#### set bespice wave listening port; default: not enabled
+set bespice_listen_port 2022
+
+
+
+###########################################################################
+#### UTILE SPICE STIMULI DESCRIPTION LANGUAGE AND TRANSLATOR
+###########################################################################
+#### default paths are set as shown here:
+# set utile_gui_path ${XSCHEM_SHAREDIR}/utile/utile3
+# set utile_cmd_path ${XSCHEM_SHAREDIR}/utile/utile
+
+###########################################################################
+#### TCL FILES TO LOAD AT STARTUP
+###########################################################################
+#### list of tcl files to preload.
+# lappend tcl_files ${XSCHEM_SHAREDIR}/change_index.tcl
+lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl
+lappend tcl_files $PDKPATH/libs.tech/xschem/scripts/sky130_models.tcl
+###########################################################################
+#### XSCHEM TOOLBAR
+###########################################################################
+#### default: not enabled.
+# set toolbar_visible 1
+# set toolbar_horiz 1
+
+###########################################################################
+#### SKYWATER PDK SPECIFIC VARIABLES
+###########################################################################
+
+## (spice patched) skywater-pdk install
+# set SKYWATER_MODELS ~/skywater-pdk/libraries/sky130_fd_pr_ngspice/latest
+# set SKYWATER_STDCELLS ~/skywater-pdk/libraries/sky130_fd_sc_hd/latest
+
+## opencircuitdesign pdks install. You need to change these to point to your open_pdks installation
+# set SKYWATER_MODELS /usr/local/share/pdk/sky130A/libs.tech/ngspice
+# set SKYWATER_STDCELLS /usr/local/share/pdk/sky130A/libs.ref/sky130_fd_sc_hd/spice
+set SKYWATER_MODELS $PDKPATH/libs.tech/ngspice
+set SKYWATER_STDCELLS $PDKPATH/libs.ref/sky130_fd_sc_hd/spice
