vco+div+buffers
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
index 52e5275..83c666f 100644
--- a/gds/user_analog_project_wrapper.gds
+++ b/gds/user_analog_project_wrapper.gds
Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 750b706..c6d12af 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@
magic
tech sky130A
-timestamp 1642131724
+timestamp 1642133792
<< metal2 >>
rect 262 -400 318 240
rect 853 -400 909 240
@@ -700,10 +700,46 @@
rect -50 0 0 352000
rect 292000 0 292050 352000
rect -50 -50 292050 0
-use ro_complete ro_complete_0
-timestamp 1640991424
-transform 1 0 254257 0 1 330527
+use divbuf divbuf_6
+timestamp 1641017053
+transform 1 0 245858 0 1 309157
+box -460 -1085 31200 495
+use divbuf divbuf_7
+timestamp 1641017053
+transform 1 0 245779 0 1 306691
+box -460 -1085 31200 495
+use divbuf divbuf_2
+timestamp 1641017053
+transform 1 0 246097 0 1 316394
+box -460 -1085 31200 495
+use divbuf divbuf_4
+timestamp 1641017053
+transform 1 0 246017 0 1 314009
+box -460 -1085 31200 495
+use divbuf divbuf_5
+timestamp 1641017053
+transform 1 0 245938 0 1 311543
+box -460 -1085 31200 495
+use ro_div_new ro_div_new_0
+timestamp 1642133792
+transform 1 0 261828 0 1 321923
+box 0 0 9875 6770
+use divbuf divbuf_1
+timestamp 1641017053
+transform 1 0 246176 0 1 318860
+box -460 -1085 31200 495
+use ro_complete ro_complete_1
+timestamp 1642133792
+transform 1 0 247313 0 1 328719
box -57 -5330 4455 1440
+use divbuf divbuf_0
+timestamp 1641017053
+transform 1 0 244268 0 1 335005
+box -460 -1085 31200 495
+use divbuf divbuf_3
+timestamp 1641017053
+transform 1 0 244347 0 1 337471
+box -460 -1085 31200 495
<< labels >>
flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0]
port 0 nsew signal bidirectional
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index 57f4268..de843bf 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice
@@ -106,481 +106,481 @@
+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
+ wbs_stb_i wbs_we_i
-C0 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF
-C1 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C2 divbuf_5/IN divbuf_5/OUT5 0.00fF
-C3 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z1 0.01fF
-C4 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
-C5 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF
-C6 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.15fF
-C7 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.44fF
-C8 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
-C9 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
-C10 divbuf_2/OUT5 divbuf_2/OUT 43.38fF
-C11 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C12 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
-C13 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Q 0.04fF
-C14 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z2 0.01fF
-C15 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
-C16 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/divider_0/clk 0.10fF
-C17 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
-C18 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C19 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_0/vin 0.19fF
-C20 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF
-C21 divbuf_2/a_492_n240# divbuf_2/OUT2 0.42fF
-C22 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
-C23 io_clamp_high[0] io_analog[4] 0.53fF
-C24 divbuf_0/OUT divbuf_0/OUT4 1.11fF
-C25 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.21fF
-C26 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/A 0.01fF
-C27 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
-C28 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C29 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
-C30 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
-C31 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
-C32 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C33 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/nor_1/B 0.01fF
-C34 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C35 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C36 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
-C37 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C38 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/divider_0/clk 1.27fF
-C39 divbuf_5/OUT2 divbuf_5/OUT 0.06fF
-C40 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
-C41 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/nor_1/A 0.03fF
-C42 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C43 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_0/B 0.47fF
-C44 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.03fF
-C45 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.09fF
-C46 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/Out 0.08fF
-C47 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C48 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C49 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.05fF
-C50 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.20fF
-C51 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
-C52 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C53 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
-C54 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C55 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C56 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z1 0.03fF
-C57 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF
-C58 divbuf_0/OUT divbuf_0/OUT5 43.38fF
-C59 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C60 divbuf_3/OUT5 divbuf_3/IN 0.00fF
-C61 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
-C62 divbuf_1/OUT3 divbuf_1/OUT4 5.16fF
-C63 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/A 0.04fF
-C64 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z2 1.07fF
-C65 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.04fF
-C66 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/A 0.26fF
-C67 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
-C68 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
-C69 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
-C70 divbuf_7/OUT3 divbuf_7/OUT 0.26fF
-C71 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C72 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
-C73 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/divider_0/clk 1.30fF
-C74 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z3 0.05fF
-C75 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z1 0.03fF
-C76 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF
-C77 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Q 0.51fF
-C78 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z3 0.06fF
-C79 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C80 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/B 0.18fF
-C81 divbuf_5/OUT4 divbuf_5/OUT 1.11fF
-C82 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C83 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z2 0.20fF
-C84 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.01fF
-C85 divbuf_3/OUT4 divbuf_3/OUT 1.11fF
-C86 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/clk 0.04fF
-C87 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
-C88 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C89 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
-C90 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z2 1.07fF
-C91 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/clk 0.45fF
-C92 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/and_0/B 0.29fF
-C93 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
-C94 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF
-C95 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_1/B 0.18fF
-C96 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Q 0.05fF
-C97 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
-C98 divbuf_3/OUT divbuf_3/OUT2 0.06fF
-C99 divbuf_3/OUT5 divbuf_3/OUT3 0.01fF
-C100 divbuf_2/a_492_n240# divbuf_2/OUT5 0.01fF
-C101 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
-C102 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/B 0.06fF
-C103 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z1 0.01fF
-C104 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
-C105 divbuf_7/OUT5 divbuf_7/OUT 43.38fF
-C106 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
-C107 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C108 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/divider_0/clk 1.30fF
-C109 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C110 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C111 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z3 0.38fF
-C112 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z4 0.12fF
-C113 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z2 1.07fF
-C114 divbuf_4/IN divbuf_4/OUT5 0.00fF
-C115 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/Z3 0.65fF
-C116 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
-C117 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C118 divbuf_0/a_492_n240# divbuf_0/OUT5 0.01fF
-C119 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z4 0.00fF
-C120 ro_div_new_0/divider_0/and_0/A ro_div_new_0/divider_0/and_0/B 0.18fF
-C121 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
-C122 io_clamp_low[2] io_analog[6] 0.53fF
-C123 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.24fF
-C124 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.19fF
-C125 ro_div_new_0/ro_complete_0/cbank_2/v ro_div_new_0/divider_0/clk 1.36fF
-C126 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/switch_1/vin 0.19fF
-C127 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
-C128 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C129 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/out1 0.31fF
-C130 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/clk 0.26fF
-C131 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin ro_div_new_0/divider_0/clk 1.30fF
-C132 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF
-C133 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
-C134 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
-C135 divbuf_0/a_492_n240# divbuf_0/OUT 0.00fF
-C136 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C137 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a4 0.09fF
-C138 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.05fF
-C139 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a2 0.14fF
-C140 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z3 0.45fF
-C141 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/switch_1/vin 0.20fF
-C142 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/and_0/B 0.78fF
-C143 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C144 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z3 0.16fF
-C145 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z4 0.22fF
-C146 divbuf_4/OUT2 divbuf_4/OUT 0.06fF
-C147 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
-C148 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C149 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C150 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/a0 0.09fF
-C151 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C152 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/B 0.20fF
-C153 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C154 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
-C155 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/Out 0.15fF
-C156 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF
-C157 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/clk 0.45fF
-C158 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C159 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a3 0.13fF
-C160 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.05fF
-C161 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
-C162 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/nor_1/A 0.55fF
-C163 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C164 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF
-C165 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
-C166 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
-C167 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
-C168 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
-C169 divbuf_6/OUT3 divbuf_6/OUT 0.26fF
-C170 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a4 0.12fF
-C171 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C172 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C173 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C174 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z4 0.15fF
-C175 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
-C176 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/clk 0.64fF
-C177 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C178 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C179 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF
-C180 divbuf_0/OUT divbuf_0/OUT2 0.06fF
-C181 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C182 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
-C183 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z4 0.36fF
-C184 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/Out 0.05fF
-C185 divbuf_4/OUT4 divbuf_4/OUT 1.11fF
-C186 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z3 0.06fF
-C187 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
-C188 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/switch_3/vin 0.20fF
-C189 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C190 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C191 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/A 0.80fF
-C192 ro_div_new_0/divider_0/and_0/B ro_div_new_0/divider_0/and_0/Z1 0.07fF
-C193 io_clamp_low[2] io_clamp_high[2] 0.53fF
-C194 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF
-C195 io_clamp_high[1] io_analog[5] 0.53fF
-C196 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/clk 0.12fF
-C197 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
-C198 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF
-C199 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/nor_1/A 0.01fF
-C200 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/OUT 0.05fF
-C201 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_1/B 0.35fF
-C202 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C203 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/clk 0.60fF
-C204 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF
-C205 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C206 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z2 0.23fF
-C207 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/divider_0/clk 1.30fF
-C208 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
-C209 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
-C210 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/nor_1/B 0.22fF
-C211 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C212 divbuf_6/OUT5 divbuf_6/OUT 43.38fF
-C213 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/and_0/OUT 0.05fF
-C214 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/clk 0.12fF
-C215 divbuf_2/OUT4 divbuf_2/OUT 1.11fF
-C216 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C217 divbuf_1/OUT4 divbuf_1/OUT 1.11fF
-C218 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF
-C219 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z3 0.05fF
-C220 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/nor_1/B 1.21fF
-C221 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF
-C222 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.12fF
-C223 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C224 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
-C225 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C226 divbuf_3/OUT5 divbuf_3/a_492_n240# 0.01fF
-C227 divbuf_2/a_492_n240# divbuf_2/IN 0.13fF
-C228 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
-C229 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z3 0.45fF
-C230 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C231 io_clamp_low[0] io_analog[4] 0.53fF
-C232 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
-C233 divbuf_7/IN divbuf_7/OUT5 0.00fF
-C234 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z2 0.01fF
-C235 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF
-C236 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/Z1 0.04fF
-C237 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.35fF
-C238 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/clk 0.05fF
-C239 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/a5 0.09fF
-C240 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C241 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin ro_div_new_0/divider_0/clk 1.45fF
-C242 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
-C243 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
-C244 divbuf_0/OUT divbuf_0/OUT3 0.26fF
-C245 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z2 0.14fF
-C246 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
-C247 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C248 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.03fF
-C249 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C250 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C251 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C252 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.09fF
-C253 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
-C254 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C255 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z2 0.15fF
-C256 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z4 0.12fF
-C257 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C258 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
-C259 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin ro_div_new_0/divider_0/clk 1.30fF
-C260 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C261 io_clamp_low[1] io_clamp_high[1] 0.53fF
-C262 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z4 0.15fF
-C263 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
-C264 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a2 0.09fF
-C265 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/B 0.08fF
-C266 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C267 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.19fF
-C268 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/clk 0.14fF
-C269 divbuf_2/IN divbuf_2/OUT5 0.00fF
-C270 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
-C271 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C272 divbuf_7/OUT2 divbuf_7/OUT 0.06fF
-C273 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
-C274 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/Z1 0.00fF
-C275 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF
-C276 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C277 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/divider_0/clk 0.05fF
-C278 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z2 0.01fF
-C279 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/clk 0.29fF
-C280 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z4 0.02fF
-C281 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z3 0.38fF
-C282 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF
-C283 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C284 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/A 0.01fF
-C285 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
-C286 divbuf_5/OUT3 divbuf_5/OUT 0.26fF
-C287 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
-C288 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
-C289 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.05fF
-C290 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
-C291 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C292 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z2 0.30fF
-C293 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
-C294 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/clk 0.11fF
-C295 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.11fF
-C296 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C297 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.45fF
-C298 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C299 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF
-C300 divbuf_3/OUT5 divbuf_3/OUT2 0.02fF
-C301 divbuf_3/OUT4 divbuf_3/OUT3 5.16fF
-C302 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C303 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
-C304 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF
-C305 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C306 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF
-C307 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/B 0.31fF
-C308 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/nor_0/B 0.22fF
-C309 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.32fF
-C310 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
-C311 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C312 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
-C313 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
-C314 divbuf_7/OUT4 divbuf_7/OUT 1.11fF
-C315 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF
-C316 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C317 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
-C318 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/a3 0.09fF
-C319 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF
-C320 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
-C321 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C322 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/divider_0/clk 0.05fF
-C323 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/Out 0.04fF
-C324 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z2 0.40fF
-C325 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
-C326 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
-C327 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_0/Z3 0.05fF
-C328 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
-C329 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/out1 0.06fF
-C330 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z3 0.16fF
-C331 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z4 0.21fF
-C332 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C333 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C334 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/divider_0/clk 0.05fF
-C335 divbuf_5/OUT5 divbuf_5/OUT 43.38fF
-C336 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.11fF
-C337 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C338 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
-C339 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a5 0.09fF
-C340 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/nor_1/A 0.38fF
-C341 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_0/B 0.06fF
-C342 divbuf_3/OUT5 divbuf_3/OUT 43.38fF
-C343 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
-C344 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
-C345 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C346 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C347 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C348 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/and_0/OUT 0.14fF
-C349 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_0/B 0.15fF
-C350 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/divider_0/clk 0.05fF
-C351 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
-C352 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
-C353 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Z4 0.65fF
-C354 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/clk 0.12fF
-C355 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
-C356 divbuf_3/OUT divbuf_3/OUT3 0.26fF
-C357 divbuf_6/IN divbuf_6/OUT5 0.00fF
-C358 io_clamp_low[0] io_clamp_high[0] 0.53fF
-C359 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
-C360 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF
-C361 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z2 0.14fF
-C362 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.22fF
-C363 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.04fF
-C364 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
-C365 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
-C366 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C367 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
-C368 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z2 0.16fF
-C369 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C370 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/Out 0.22fF
-C371 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z3 0.06fF
-C372 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
-C373 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
-C374 divbuf_0/IN divbuf_0/OUT5 0.00fF
-C375 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
-C376 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C377 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/A 0.16fF
-C378 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z4 0.36fF
-C379 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C380 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C381 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/Z1 0.36fF
-C382 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
-C383 io_clamp_high[2] io_analog[6] 0.53fF
-C384 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z4 0.02fF
-C385 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
-C386 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/clk 0.11fF
-C387 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C388 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
-C389 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/a0 0.13fF
-C390 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.16fF
-C391 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/clk 0.51fF
-C392 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C393 ro_complete_0/a1 ro_complete_0/cbank_0/switch_3/vin 0.14fF
-C394 ro_complete_0/a4 ro_complete_0/cbank_0/switch_0/vin 0.12fF
-C395 divbuf_6/OUT2 divbuf_6/OUT 0.06fF
-C396 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
-C397 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/nor_1/B 0.06fF
-C398 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C399 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
-C400 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.01fF
-C401 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.05fF
-C402 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/clk 0.11fF
-C403 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
-C404 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
-C405 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.12fF
-C406 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C407 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
-C408 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z4 0.00fF
-C409 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
-C410 divbuf_4/OUT3 divbuf_4/OUT 0.26fF
-C411 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C412 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C413 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C414 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
-C415 io_clamp_low[1] io_analog[5] 0.53fF
-C416 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.28fF
-C417 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
-C418 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF
-C419 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
-C420 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C421 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/B 0.01fF
-C422 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/Out 0.91fF
-C423 divbuf_1/IN divbuf_1/a_492_n240# 0.13fF
-C424 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.07fF
-C425 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C426 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/divider_0/clk 0.05fF
-C427 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF
-C428 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/a2 0.09fF
-C429 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/nor_1/A 0.21fF
-C430 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/v 0.08fF
-C431 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C432 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF
-C433 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.01fF
-C434 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C435 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/clk 0.01fF
-C436 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF
-C437 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF
-C438 divbuf_6/OUT4 divbuf_6/OUT 1.11fF
-C439 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C440 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/switch_1/vin 0.20fF
-C441 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
-C442 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
-C443 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C444 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.21fF
-C445 divbuf_2/OUT3 divbuf_2/OUT 0.26fF
-C446 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
-C447 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C448 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF
-C449 divbuf_1/OUT3 divbuf_1/OUT 0.26fF
-C450 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF
-C451 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/clk 0.01fF
-C452 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
-C453 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/tspc_2/Z4 0.65fF
-C454 divbuf_4/OUT5 divbuf_4/OUT 43.38fF
-C455 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.04fF
-C456 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
-C457 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C458 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.00fF
-C459 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/B 0.18fF
-C460 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C461 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
-C462 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
-C463 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
-C464 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
-C465 divbuf_1/OUT5 divbuf_1/IN 0.00fF
-C466 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF
-C467 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/Z2 0.36fF
-C468 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/ro_complete_0/cbank_2/v 0.04fF
-C469 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
-C470 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
-C471 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/nor_1/A 0.35fF
-C472 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C473 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C474 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF
+C0 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C1 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
+C2 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Q 0.05fF
+C3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/clk 0.45fF
+C4 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
+C5 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF
+C6 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
+C7 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
+C8 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C9 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
+C10 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C11 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C12 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/A 0.04fF
+C13 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.35fF
+C14 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z4 0.36fF
+C15 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/Out 0.05fF
+C16 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
+C17 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C18 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF
+C19 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF
+C20 ro_div_new_0/divider_0/and_0/A ro_div_new_0/divider_0/and_0/B 0.18fF
+C21 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
+C22 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.24fF
+C23 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.19fF
+C24 ro_div_new_0/ro_complete_0/cbank_2/v ro_div_new_0/divider_0/clk 1.36fF
+C25 divbuf_2/OUT5 divbuf_2/IN 0.00fF
+C26 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C27 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C28 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C29 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/clk 0.26fF
+C30 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
+C31 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
+C32 divbuf_7/OUT2 divbuf_7/OUT 0.06fF
+C33 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
+C34 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin ro_div_new_0/divider_0/clk 1.30fF
+C35 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C36 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z4 0.65fF
+C37 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
+C38 divbuf_5/OUT3 divbuf_5/OUT 0.26fF
+C39 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a4 0.12fF
+C40 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C41 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/mc2 0.33fF
+C42 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.05fF
+C43 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF
+C44 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.01fF
+C45 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
+C46 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C47 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/and_0/B 0.78fF
+C48 io_clamp_high[0] io_analog[4] 0.53fF
+C49 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/a0 0.09fF
+C50 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C51 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C52 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C53 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/Out 0.15fF
+C54 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF
+C55 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/clk 0.45fF
+C56 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
+C57 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF
+C58 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a3 0.13fF
+C59 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C60 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.05fF
+C61 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_1/A 1.21fF
+C62 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.35fF
+C63 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
+C64 divbuf_7/OUT4 divbuf_7/OUT 1.11fF
+C65 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.01fF
+C66 divbuf_2/a_492_n240# divbuf_2/OUT5 0.01fF
+C67 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
+C68 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C69 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C70 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_0/Q 0.22fF
+C71 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
+C72 divbuf_5/OUT5 divbuf_5/OUT 43.38fF
+C73 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C74 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
+C75 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
+C76 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/clk 0.64fF
+C77 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
+C78 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
+C79 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C80 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF
+C81 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C82 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/divider_0/clk 1.30fF
+C83 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
+C84 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z3 0.06fF
+C85 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
+C86 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z4 0.12fF
+C87 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C88 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C89 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/A 0.80fF
+C90 ro_div_new_0/divider_0/and_0/B ro_div_new_0/divider_0/and_0/Z1 0.07fF
+C91 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
+C92 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C93 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF
+C94 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Q 0.55fF
+C95 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/clk 0.12fF
+C96 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/B 0.20fF
+C97 divbuf_2/OUT3 divbuf_2/OUT 0.26fF
+C98 divbuf_6/IN divbuf_6/OUT5 0.00fF
+C99 divbuf_0/OUT divbuf_0/OUT4 1.11fF
+C100 divbuf_0/a_492_n240# divbuf_0/OUT5 0.01fF
+C101 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/nor_1/A 0.01fF
+C102 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z2 0.30fF
+C103 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C104 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z2 0.01fF
+C105 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/clk 0.60fF
+C106 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
+C107 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
+C108 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF
+C109 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.04fF
+C110 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z2 0.23fF
+C111 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/divider_0/clk 1.30fF
+C112 ro_complete_0/a3 ro_complete_0/cbank_0/switch_2/vin 0.09fF
+C113 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/A 0.01fF
+C114 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
+C115 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
+C116 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C117 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C118 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C119 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C120 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a4 0.09fF
+C121 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a5 0.09fF
+C122 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/and_0/OUT 0.05fF
+C123 divbuf_1/OUT3 divbuf_1/OUT 0.26fF
+C124 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF
+C125 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/clk 0.12fF
+C126 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C127 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C128 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C129 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z2 0.15fF
+C130 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z4 0.21fF
+C131 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
+C132 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C133 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
+C134 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C135 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF
+C136 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C137 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C138 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C139 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_0/Q 0.14fF
+C140 divbuf_2/OUT5 divbuf_2/OUT 43.38fF
+C141 divbuf_6/OUT2 divbuf_6/OUT 0.06fF
+C142 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
+C143 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C144 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
+C145 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z3 0.06fF
+C146 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Q 0.51fF
+C147 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/divider_0/clk 0.05fF
+C148 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/Z1 0.04fF
+C149 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/Out 0.04fF
+C150 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z2 0.40fF
+C151 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/clk 0.05fF
+C152 io_clamp_low[2] io_analog[6] 0.53fF
+C153 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
+C154 divbuf_3/OUT3 divbuf_3/OUT 0.26fF
+C155 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z4 0.02fF
+C156 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/OUT 0.05fF
+C157 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin ro_div_new_0/divider_0/clk 1.45fF
+C158 divbuf_2/a_492_n240# divbuf_2/OUT2 0.42fF
+C159 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
+C160 divbuf_4/OUT3 divbuf_4/OUT 0.26fF
+C161 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/B 0.31fF
+C162 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z4 0.12fF
+C163 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C164 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.03fF
+C165 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
+C166 divbuf_0/OUT divbuf_0/OUT5 43.38fF
+C167 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C168 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.09fF
+C169 ro_div_new_0/divider_0/tspc_1/Z4 ro_div_new_0/divider_0/tspc_0/Q 0.15fF
+C170 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
+C171 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C172 divbuf_0/OUT divbuf_0/OUT2 0.06fF
+C173 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
+C174 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
+C175 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
+C176 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
+C177 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C178 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z4 0.02fF
+C179 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin ro_div_new_0/divider_0/clk 1.30fF
+C180 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF
+C181 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_3/vin 0.20fF
+C182 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
+C183 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/B 0.08fF
+C184 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.19fF
+C185 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/clk 0.14fF
+C186 divbuf_6/OUT4 divbuf_6/OUT 1.11fF
+C187 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C188 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
+C189 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
+C190 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
+C191 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
+C192 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C193 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z3 0.06fF
+C194 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/Out 0.22fF
+C195 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/clk 0.29fF
+C196 divbuf_3/OUT5 divbuf_3/OUT 43.38fF
+C197 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/a4 0.09fF
+C198 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C199 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
+C200 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z4 0.36fF
+C201 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF
+C202 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C203 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/Z1 0.36fF
+C204 divbuf_4/OUT5 divbuf_4/OUT 43.38fF
+C205 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
+C206 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z1 0.01fF
+C207 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/out1 0.06fF
+C208 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.05fF
+C209 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
+C210 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
+C211 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/clk 0.01fF
+C212 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_0/B 0.06fF
+C213 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF
+C214 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
+C215 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C216 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z4 0.00fF
+C217 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
+C218 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/clk 0.11fF
+C219 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.11fF
+C220 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
+C221 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C222 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.45fF
+C223 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C224 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF
+C225 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
+C226 divbuf_5/IN divbuf_5/OUT5 0.00fF
+C227 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.32fF
+C228 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
+C229 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
+C230 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF
+C231 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
+C232 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/a3 0.09fF
+C233 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C234 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C235 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
+C236 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z4 0.00fF
+C237 io_clamp_high[1] io_analog[5] 0.53fF
+C238 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
+C239 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C240 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C241 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/divider_0/clk 0.05fF
+C242 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/nor_1/B 0.06fF
+C243 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z3 0.45fF
+C244 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.11fF
+C245 divbuf_2/OUT3 divbuf_2/OUT2 1.37fF
+C246 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C247 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
+C248 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
+C249 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/nor_1/A 0.38fF
+C250 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
+C251 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
+C252 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C253 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C254 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/and_0/OUT 0.14fF
+C255 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/divider_0/clk 0.05fF
+C256 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF
+C257 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
+C258 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Q 0.05fF
+C259 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/clk 0.12fF
+C260 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_0/B 0.15fF
+C261 divbuf_5/OUT2 divbuf_5/OUT 0.06fF
+C262 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
+C263 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
+C264 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.04fF
+C265 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.22fF
+C266 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF
+C267 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF
+C268 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
+C269 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z2 0.16fF
+C270 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C271 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/tspc_2/Z4 0.65fF
+C272 io_clamp_low[0] io_analog[4] 0.53fF
+C273 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C274 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C275 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C276 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C277 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C278 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.20fF
+C279 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
+C280 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.00fF
+C281 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z4 0.15fF
+C282 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/clk 0.11fF
+C283 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
+C284 divbuf_2/OUT5 divbuf_2/OUT2 0.02fF
+C285 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF
+C286 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
+C287 divbuf_1/a_492_n240# divbuf_1/OUT 0.00fF
+C288 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF
+C289 divbuf_1/IN divbuf_1/OUT5 0.00fF
+C290 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
+C291 divbuf_7/OUT3 divbuf_7/OUT 0.26fF
+C292 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/a0 0.13fF
+C293 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.16fF
+C294 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/clk 0.51fF
+C295 divbuf_5/OUT4 divbuf_5/OUT 1.11fF
+C296 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z1 0.03fF
+C297 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C298 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.01fF
+C299 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.05fF
+C300 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/clk 0.11fF
+C301 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
+C302 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C303 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C304 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
+C305 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C306 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/divider_0/clk 0.05fF
+C307 io_clamp_low[1] io_clamp_high[1] 0.53fF
+C308 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C309 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_0/B 0.47fF
+C310 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C311 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C312 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
+C313 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C314 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF
+C315 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/A 0.16fF
+C316 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.28fF
+C317 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
+C318 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C319 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C320 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/B 0.01fF
+C321 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/Out 0.91fF
+C322 divbuf_3/IN divbuf_3/OUT5 0.00fF
+C323 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
+C324 divbuf_7/OUT5 divbuf_7/OUT 43.38fF
+C325 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C326 ro_complete_0/a4 ro_complete_0/cbank_0/switch_0/vin 0.12fF
+C327 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
+C328 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/a_630_n680# 0.05fF
+C329 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.07fF
+C330 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C331 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/divider_0/clk 0.05fF
+C332 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/tspc_0/Z4 0.12fF
+C333 divbuf_4/IN divbuf_4/OUT5 0.00fF
+C334 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
+C335 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/v 0.08fF
+C336 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C337 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C338 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_0/Q 0.01fF
+C339 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.01fF
+C340 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C341 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/clk 0.01fF
+C342 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C343 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C344 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.01fF
+C345 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
+C346 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.21fF
+C347 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
+C348 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
+C349 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C350 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
+C351 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C352 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z2 0.20fF
+C353 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/B 0.18fF
+C354 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C355 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
+C356 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
+C357 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/ro_complete_0/cbank_2/v 0.04fF
+C358 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C359 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z4 0.21fF
+C360 divbuf_2/OUT4 divbuf_2/OUT 1.11fF
+C361 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
+C362 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
+C363 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C364 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
+C365 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z2 1.07fF
+C366 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z3 0.38fF
+C367 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/nor_1/A 0.35fF
+C368 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C369 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C370 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z3 0.05fF
+C371 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z1 0.03fF
+C372 divbuf_3/OUT2 divbuf_3/OUT 0.06fF
+C373 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
+C374 ro_complete_0/a4 ro_complete_0/cbank_0/switch_1/vin 0.09fF
+C375 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C376 divbuf_2/a_492_n240# divbuf_2/IN 0.13fF
+C377 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/B 0.18fF
+C378 divbuf_4/OUT2 divbuf_4/OUT 0.06fF
+C379 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
+C380 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C381 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C382 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.04fF
+C383 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
+C384 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/A 0.26fF
+C385 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
+C386 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.15fF
+C387 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.44fF
+C388 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
+C389 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/tspc_0/Z4 0.36fF
+C390 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C391 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C392 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
+C393 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C394 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
+C395 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z4 0.00fF
+C396 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z2 0.01fF
+C397 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
+C398 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/divider_0/clk 0.10fF
+C399 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C400 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
+C401 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C402 divbuf_1/OUT4 divbuf_1/OUT 1.11fF
+C403 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
+C404 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
+C405 divbuf_0/OUT3 divbuf_0/OUT 0.26fF
+C406 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_0/Q 0.45fF
+C407 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.21fF
+C408 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/A 0.01fF
+C409 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
+C410 divbuf_6/OUT3 divbuf_6/OUT 0.26fF
+C411 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF
+C412 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C413 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C414 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
+C415 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/divider_0/clk 1.30fF
+C416 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z2 1.07fF
+C417 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z3 0.38fF
+C418 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z4 0.12fF
+C419 divbuf_3/OUT4 divbuf_3/OUT 1.11fF
+C420 io_clamp_high[2] io_analog[6] 0.53fF
+C421 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_1/B 0.18fF
+C422 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C423 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/divider_0/clk 1.27fF
+C424 divbuf_1/a_492_n240# divbuf_1/OUT5 0.01fF
+C425 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C426 divbuf_4/OUT4 divbuf_4/OUT 1.11fF
+C427 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF
+C428 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/nor_1/A 0.03fF
+C429 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/nor_0/B 0.22fF
+C430 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.03fF
+C431 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.09fF
+C432 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/Out 0.08fF
+C433 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
+C434 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C435 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF
+C436 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.05fF
+C437 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF
+C438 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/out1 0.31fF
+C439 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF
+C440 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
+C441 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF
+C442 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C443 divbuf_0/IN divbuf_0/OUT5 0.00fF
+C444 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z3 0.16fF
+C445 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF
+C446 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
+C447 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/and_0/B 0.29fF
+C448 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
+C449 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C450 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
+C451 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
+C452 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z2 1.07fF
+C453 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.04fF
+C454 divbuf_1/OUT divbuf_1/OUT5 43.38fF
+C455 divbuf_6/OUT5 divbuf_6/OUT 43.38fF
+C456 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C457 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
+C458 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z3 0.16fF
+C459 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z4 0.22fF
+C460 io_clamp_low[1] io_analog[5] 0.53fF
+C461 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Z4 0.65fF
+C462 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C463 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
+C464 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/switch_1/vin 0.19fF
+C465 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C466 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C467 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z2 0.14fF
+C468 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.01fF
+C469 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
+C470 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/a5 0.09fF
+C471 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/mc2 0.06fF
+C472 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/clk 0.04fF
+C473 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C474 divbuf_7/IN divbuf_7/OUT5 0.00fF
Xro_div_new_0/ro_complete_0 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/a1
+ ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/a3
+ ro_div_new_0/ro_complete_0/a2 ro_complete
