fix consistence check error

commit: a14034db5ec85b6452b1a7d1650eaa3883f59170 [log] [tgz]
author: adithyasunil26 <adithyasunil26@gmail.com> Tue Jan 25 03:01:32 2022 +0530
committer: adithyasunil26 <adithyasunil26@gmail.com> Tue Jan 25 03:01:32 2022 +0530
tree: 6a41f0288a98d38dbfdb2d191e1dde22797e2665
parent: fac858b72cdf806b199c2643ab07ad9818f2ec37 [diff]
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
index 3dd1a44..451f7ef 100644
--- a/gds/user_analog_project_wrapper.gds
+++ b/gds/user_analog_project_wrapper.gds
Binary files differ

diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 1c789ab..3218621 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag

@@ -1,6 +1,6 @@
 magic
 tech sky130A
-timestamp 1643058676
+timestamp 1643059293
 << nwell >>
 rect 26424 264625 26589 264812
 rect 23497 264291 23832 264611
@@ -1914,7 +1914,7 @@
 rect 28333 331217 29002 331218
 rect 29158 331217 29338 331369
 rect 28333 331175 29338 331217
-rect 157052 291059 159393 337000
+rect 157052 293196 159393 337000
 rect 238022 335302 240372 337655
 rect 238022 335283 243683 335302
 rect 238022 335143 243515 335283
@@ -1957,7 +1957,8 @@
 rect 245165 306904 245191 307058
 rect 238022 306879 245191 306904
 rect 238022 306014 240372 306879
-rect 157052 281993 159393 286339
+rect 157010 286108 159541 293196
+rect 157052 281993 159393 286108
 rect 157010 281056 159393 281993
 rect 157010 277890 159389 281056
 rect 255736 277912 260234 277918

diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index 957366d..e37ceea 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice

@@ -106,1691 +106,1691 @@
 + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
 + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
 + wbs_stb_i wbs_we_i
-C0 divbuf_17/IN divbuf_17/OUT5 0.00fF
-C1 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
-C2 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
-C3 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
-C4 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C5 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C6 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
-C7 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
-C8 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
-C9 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
-C10 divbuf_22/OUT2 divbuf_22/OUT 0.06fF
-C11 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
-C12 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
-C13 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
-C14 divider_2/mc2 divider_2/nor_0/B 0.06fF
-C15 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
-C16 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
-C17 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
-C18 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
-C19 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
-C20 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
-C21 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
-C22 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
-C23 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF
-C24 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C25 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
-C26 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
-C27 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C28 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
-C29 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
-C30 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C31 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
-C32 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C33 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
-C34 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF
-C35 divbuf_18/OUT3 divbuf_18/OUT 0.26fF
-C36 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
-C37 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF
-C38 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
-C39 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
-C40 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
-C41 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
-C42 divider_0/nor_0/B divider_0/tspc_0/Z4 0.02fF
-C43 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C44 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
-C45 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
-C46 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
-C47 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
-C48 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
-C49 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
-C50 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C51 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C52 divbuf_7/OUT3 divbuf_7/OUT 0.26fF
-C53 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
-C54 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
-C55 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
-C56 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
-C57 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF
-C58 divider_2/mc2 divider_2/and_0/A 0.16fF
-C59 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
-C60 divbuf_2/IN divbuf_2/OUT5 0.00fF
-C61 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C62 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
-C63 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF
-C64 divider_0/mc2 divider_0/and_0/A 0.16fF
-C65 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
-C66 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C67 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
-C68 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
-C69 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF
-C70 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
-C71 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
-C72 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C73 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
-C74 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF
-C75 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF
-C76 divider_1/and_0/A divider_1/and_0/B 0.18fF
-C77 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
-C78 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
-C79 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
-C80 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
-C81 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
-C82 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
-C83 divider_2/nor_0/B divider_2/and_0/A 0.26fF
-C84 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C85 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
-C86 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C87 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
-C88 divbuf_1/OUT divbuf_1/OUT4 1.11fF
-C89 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
-C90 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
-C91 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
-C92 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
-C93 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
-C94 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
-C95 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
-C96 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
-C97 divbuf_20/OUT4 divbuf_20/OUT 1.11fF
-C98 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
-C99 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C100 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
-C101 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
-C102 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
-C103 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
-C104 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
-C105 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
-C106 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
-C107 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
-C108 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
-C109 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF
-C110 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF
-C111 divbuf_14/OUT divbuf_14/OUT3 0.26fF
-C112 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
-C113 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF
-C114 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
-C115 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
-C116 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
-C117 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
-C118 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
-C119 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
-C120 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
-C121 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
-C122 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
-C123 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
-C124 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
-C125 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
-C126 divider_2/nor_0/B divider_2/tspc_1/Z3 0.38fF
-C127 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
-C128 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
-C129 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
-C130 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
-C131 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
-C132 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
-C133 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
-C134 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
-C135 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF
-C136 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
-C137 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
-C138 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
-C139 divbuf_3/OUT2 divbuf_3/OUT 0.06fF
-C140 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
-C141 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C142 divbuf_6/OUT5 divbuf_6/OUT 43.38fF
-C143 divider_1/tspc_1/Q divider_1/tspc_1/Z3 0.05fF
-C144 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
-C145 divider_1/Out divider_1/nor_1/B 0.22fF
-C146 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C147 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
-C148 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
-C149 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
-C150 pd_1/R pd_1/REF 0.61fF
-C151 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
-C152 divbuf_18/OUT5 divbuf_18/OUT 43.38fF
-C153 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C154 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
-C155 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
-C156 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
-C157 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
-C158 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C159 divider_2/tspc_0/Z4 divider_2/tspc_1/Q 0.15fF
-C160 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
-C161 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
-C162 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
-C163 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
-C164 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C165 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C166 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
-C167 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
-C168 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
-C169 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
-C170 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
-C171 divider_2/tspc_0/Z3 divider_2/tspc_0/a_630_n680# 0.05fF
-C172 divbuf_22/OUT4 divbuf_22/OUT 1.11fF
-C173 cp_0/upbar cp_0/down 0.02fF
-C174 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
-C175 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
-C176 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
-C177 divider_0/tspc_0/a_630_n680# divider_0/Out 0.04fF
-C178 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
-C179 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
-C180 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
-C181 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
-C182 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
-C183 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
-C184 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C185 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
-C186 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
-C187 io_clamp_low[0] io_clamp_high[0] 0.53fF
-C188 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
-C189 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
-C190 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
-C191 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
-C192 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
-C193 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
-C194 divider_2/nor_0/A divider_2/and_0/B 0.08fF
-C195 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
-C196 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
-C197 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C198 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
-C199 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
-C200 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF
-C201 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
-C202 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
-C203 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C204 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
-C205 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z3 0.45fF
-C206 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/B 0.40fF
-C207 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
-C208 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C209 divider_1/nor_0/B divider_1/tspc_0/Z4 0.02fF
-C210 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
-C211 divbuf_7/OUT5 divbuf_7/OUT 43.38fF
-C212 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
-C213 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
-C214 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
-C215 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
-C216 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
-C217 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
-C218 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
-C219 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF
-C220 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
-C221 divbuf_15/OUT divbuf_15/OUT2 0.06fF
-C222 divbuf_15/OUT5 divbuf_15/OUT3 0.01fF
-C223 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
-C224 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C225 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C226 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C227 divbuf_25/OUT5 divbuf_25/OUT 43.38fF
-C228 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
-C229 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
-C230 divbuf_10/IN divbuf_10/OUT5 0.00fF
-C231 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C232 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C233 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
-C234 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
-C235 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
-C236 cp_0/a_1710_n2840# cp_0/out 0.61fF
-C237 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
-C238 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
-C239 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
-C240 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
-C241 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
-C242 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C243 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF
-C244 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF
-C245 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
-C246 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C247 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
-C248 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C249 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
-C250 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
-C251 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF
-C252 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
-C253 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
-C254 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
-C255 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
-C256 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
-C257 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
-C258 divider_2/tspc_0/Z3 divider_2/tspc_1/Q 0.45fF
-C259 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
-C260 io_clamp_high[2] io_analog[6] 0.53fF
-C261 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
-C262 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
-C263 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
-C264 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
-C265 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
-C266 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
-C267 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
-C268 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C269 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
-C270 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
-C271 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
-C272 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
-C273 pd_0/R pd_0/and_pd_0/Z1 0.02fF
-C274 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
-C275 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
-C276 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
-C277 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
-C278 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
-C279 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
-C280 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF
-C281 divbuf_15/OUT5 divbuf_15/a_492_n240# 0.01fF
-C282 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C283 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
-C284 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
-C285 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
-C286 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
-C287 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
-C288 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
-C289 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
-C290 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
-C291 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C292 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
-C293 divbuf_11/IN divbuf_11/OUT5 0.00fF
-C294 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
-C295 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF
-C296 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
-C297 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
-C298 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF
-C299 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
-C300 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
-C301 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
-C302 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
-C303 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C304 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C305 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
-C306 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
-C307 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
-C308 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
-C309 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C310 pd_0/DIV pd_0/R 0.51fF
-C311 divbuf_17/OUT4 divbuf_17/OUT 1.11fF
-C312 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C313 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
-C314 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C315 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
-C316 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
-C317 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
-C318 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C319 divbuf_2/OUT4 divbuf_2/OUT 1.11fF
-C320 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
-C321 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
-C322 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF
-C323 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
-C324 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C325 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
-C326 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
-C327 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
-C328 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
-C329 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF
-C330 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
-C331 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
-C332 divbuf_17/OUT3 divbuf_17/OUT 0.26fF
-C333 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
-C334 filter_0/a_4216_n2998# filter_0/v 0.31fF
-C335 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
-C336 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
-C337 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
-C338 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
-C339 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
-C340 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
-C341 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
-C342 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
-C343 divbuf_23/IN divbuf_23/OUT5 0.00fF
-C344 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
-C345 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
-C346 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
-C347 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C348 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
-C349 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
-C350 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C351 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
-C352 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
-C353 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C354 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
-C355 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
-C356 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C357 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
-C358 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
-C359 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
-C360 divbuf_19/OUT5 divbuf_19/OUT 43.38fF
-C361 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
-C362 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
-C363 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
-C364 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
-C365 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C366 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C367 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
-C368 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF
-C369 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF
-C370 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C371 divbuf_4/OUT3 divbuf_4/OUT 0.26fF
-C372 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
-C373 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
-C374 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
-C375 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
-C376 divbuf_16/OUT2 divbuf_16/OUT5 0.02fF
-C377 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
-C378 pd_0/DOWN pd_0/UP 0.46fF
-C379 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
-C380 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF
-C381 divider_2/tspc_0/a_630_n680# divider_2/tspc_1/Q 0.01fF
-C382 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
-C383 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
-C384 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
-C385 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
-C386 io_clamp_low[1] io_analog[5] 0.53fF
-C387 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
-C388 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
-C389 divider_0/tspc_0/Z2 divider_0/nor_1/B 0.40fF
-C390 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
-C391 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C392 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C393 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
-C394 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
-C395 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
-C396 divbuf_5/OUT3 divbuf_5/OUT 0.26fF
-C397 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
-C398 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C399 divbuf_16/OUT3 divbuf_16/OUT2 1.37fF
-C400 divbuf_16/IN divbuf_16/OUT5 0.00fF
-C401 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
-C402 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
-C403 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
-C404 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
-C405 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
-C406 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
-C407 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
-C408 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
-C409 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
-C410 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
-C411 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
-C412 divider_1/mc2 divider_1/and_0/out1 0.06fF
-C413 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF
-C414 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
-C415 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
-C416 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
-C417 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C418 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
-C419 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
-C420 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
-C421 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
-C422 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
-C423 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
-C424 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
-C425 divider_1/mc2 divider_1/nor_0/B 0.06fF
-C426 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
-C427 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
-C428 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
-C429 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
-C430 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
-C431 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C432 divbuf_16/OUT3 divbuf_16/OUT5 0.01fF
-C433 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF
-C434 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
-C435 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
-C436 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
-C437 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF
-C438 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
-C439 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
-C440 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
-C441 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C442 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
-C443 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
-C444 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
-C445 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C446 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_1/Q 0.14fF
-C447 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
-C448 divbuf_21/OUT3 divbuf_21/OUT 0.26fF
-C449 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
-C450 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
-C451 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
-C452 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
-C453 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C454 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
-C455 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C456 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
-C457 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
-C458 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
-C459 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
-C460 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF
-C461 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
-C462 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C463 divbuf_17/OUT2 divbuf_17/a_492_n240# 0.42fF
-C464 divbuf_19/OUT2 divbuf_19/a_492_n240# 0.42fF
-C465 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
-C466 divbuf_23/OUT2 divbuf_23/OUT 0.06fF
-C467 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
-C468 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
-C469 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
-C470 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
-C471 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
-C472 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
-C473 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
-C474 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
-C475 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
-C476 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
-C477 divider_2/Out divider_2/nor_1/B 0.22fF
-C478 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
-C479 divbuf_3/OUT3 divbuf_3/OUT 0.26fF
-C480 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
-C481 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C482 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
-C483 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
-C484 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
-C485 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
-C486 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
-C487 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
-C488 cp_0/a_10_n50# cp_0/vbias 0.19fF
-C489 pd_1/R pd_1/and_pd_0/Out1 0.33fF
-C490 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF
-C491 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF
-C492 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
-C493 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C494 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C495 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
-C496 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
-C497 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
-C498 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF
-C499 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
-C500 divbuf_4/OUT5 divbuf_4/OUT 43.38fF
-C501 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C502 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF
-C503 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
-C504 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
-C505 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
-C506 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
-C507 pd_0/R pd_0/REF 0.61fF
-C508 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
-C509 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C510 divider_0/nor_0/B divider_0/tspc_2/Q 0.22fF
-C511 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
-C512 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C513 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C514 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
-C515 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
-C516 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
-C517 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C518 divider_1/tspc_0/Z2 divider_1/nor_1/B 0.40fF
-C519 divider_1/tspc_0/Z3 divider_1/Out 0.05fF
-C520 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
-C521 divbuf_5/OUT5 divbuf_5/OUT 43.38fF
-C522 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z1 0.03fF
-C523 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
-C524 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
-C525 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
-C526 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF
-C527 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
-C528 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
-C529 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
-C530 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C531 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
-C532 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
-C533 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
-C534 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
-C535 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C536 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
-C537 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
-C538 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
-C539 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
-C540 divider_1/mc2 divider_1/and_0/A 0.16fF
-C541 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
-C542 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C543 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
-C544 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
-C545 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
-C546 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z2 0.30fF
-C547 divbuf_18/OUT2 divbuf_18/OUT 0.06fF
-C548 divbuf_17/OUT2 divbuf_17/OUT 0.06fF
-C549 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
-C550 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
-C551 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
-C552 pd_1/R pd_1/tspc_r_1/Z2 0.21fF
-C553 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF
-C554 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
-C555 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
-C556 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
-C557 divider_0/nor_0/B divider_0/and_0/A 0.26fF
-C558 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
-C559 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
-C560 divbuf_16/OUT3 divbuf_16/OUT4 5.16fF
-C561 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
-C562 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
-C563 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
-C564 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
-C565 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
-C566 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
-C567 divider_2/tspc_0/Z2 divider_2/nor_1/B 0.40fF
-C568 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
-C569 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
-C570 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF
-C571 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
-C572 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF
-C573 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
-C574 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C575 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
-C576 divider_0/nor_1/B divider_0/and_0/B 0.29fF
-C577 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
-C578 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_630_n680# 0.05fF
-C579 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
-C580 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
-C581 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C582 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
-C583 divbuf_21/OUT5 divbuf_21/OUT 43.38fF
-C584 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
-C585 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
-C586 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
-C587 divider_0/nor_0/B divider_0/tspc_1/Z3 0.38fF
-C588 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
-C589 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
-C590 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
-C591 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
-C592 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
-C593 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
-C594 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
-C595 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C596 divbuf_6/IN divbuf_6/OUT5 0.00fF
-C597 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
-C598 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
-C599 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
-C600 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_2/Q 0.01fF
-C601 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF
-C602 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
-C603 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
-C604 pd_1/R pd_1/tspc_r_0/Z3 0.27fF
-C605 divbuf_23/OUT4 divbuf_23/OUT 1.11fF
-C606 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
-C607 divbuf_25/OUT4 divbuf_25/OUT 1.11fF
-C608 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
-C609 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
-C610 divbuf_3/OUT5 divbuf_3/OUT 43.38fF
-C611 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
-C612 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C613 divbuf_19/IN divbuf_19/OUT5 0.00fF
-C614 divbuf_17/OUT4 divbuf_17/OUT3 5.16fF
-C615 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
-C616 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
-C617 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
-C618 divider_2/mc2 divider_2/nor_1/B 0.15fF
-C619 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
-C620 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
-C621 divider_0/tspc_0/Z2 divider_0/tspc_1/Q 0.14fF
-C622 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C623 divbuf_16/a_492_n240# divbuf_16/OUT2 0.42fF
-C624 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
-C625 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
-C626 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
-C627 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C628 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C629 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
-C630 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
-C631 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
-C632 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
-C633 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
-C634 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
-C635 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
-C636 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF
-C637 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
-C638 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
-C639 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
-C640 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
-C641 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF
-C642 pd_1/DIV pd_1/R 0.51fF
-C643 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
-C644 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
-C645 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
-C646 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
-C647 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
-C648 io_clamp_high[0] io_analog[4] 0.53fF
-C649 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
-C650 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
-C651 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF
-C652 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C653 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C654 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C655 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C656 divbuf_16/a_492_n240# divbuf_16/IN 0.13fF
-C657 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
-C658 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C659 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Q 0.51fF
-C660 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF
-C661 divider_1/nor_0/B divider_1/tspc_2/Q 0.22fF
-C662 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.35fF
-C663 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
-C664 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
-C665 divbuf_7/IN divbuf_7/OUT5 0.00fF
-C666 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
-C667 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
-C668 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
-C669 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
-C670 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
-C671 divbuf_15/OUT4 divbuf_15/OUT 1.11fF
-C672 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
-C673 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
-C674 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C675 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C676 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
-C677 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
-C678 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
-C679 divider_2/tspc_0/Z4 divider_2/tspc_0/Z2 0.36fF
-C680 divider_2/Out divider_2/tspc_0/Z3 0.05fF
-C681 divbuf_16/a_492_n240# divbuf_16/OUT5 0.01fF
-C682 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
-C683 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
-C684 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
-C685 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C686 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.00fF
-C687 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
-C688 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
-C689 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
-C690 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
-C691 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
-C692 divbuf_18/IN divbuf_18/OUT5 0.00fF
-C693 divider_2/tspc_1/a_630_n680# divider_2/nor_1/B 0.00fF
-C694 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
-C695 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF
-C696 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
-C697 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C698 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
-C699 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF
-C700 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
-C701 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
-C702 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
-C703 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C704 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
-C705 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
-C706 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
-C707 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
-C708 divider_1/nor_0/B divider_1/and_0/A 0.26fF
-C709 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
-C710 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
-C711 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
-C712 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
-C713 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
-C714 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
-C715 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF
-C716 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C717 divider_0/mc2 divider_0/nor_1/B 0.15fF
-C718 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
-C719 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C720 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C721 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_630_n680# 0.12fF
-C722 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C723 divider_1/nor_1/B divider_1/and_0/B 0.29fF
-C724 divbuf_12/IN divbuf_12/OUT5 0.00fF
-C725 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
-C726 filter_0/a_4216_n5230# filter_0/v 0.19fF
-C727 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C728 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
-C729 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
-C730 divider_0/nor_0/A divider_0/and_0/B 0.08fF
-C731 divbuf_1/OUT divbuf_1/OUT3 0.26fF
-C732 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
-C733 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C734 divider_1/nor_0/B divider_1/tspc_1/Z3 0.38fF
-C735 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
-C736 divider_1/tspc_1/Q divider_1/nor_1/B 0.22fF
-C737 divbuf_6/OUT2 divbuf_6/OUT 0.06fF
-C738 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
-C739 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C740 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
-C741 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C742 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF
-C743 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF
-C744 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
-C745 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF
-C746 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
-C747 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
-C748 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
-C749 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
-C750 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
-C751 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
-C752 divider_2/tspc_0/Z4 divider_2/nor_0/B 0.02fF
-C753 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C754 divbuf_19/OUT2 divbuf_19/OUT 0.06fF
-C755 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
-C756 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF
-C757 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
-C758 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
-C759 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
-C760 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
-C761 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
-C762 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
-C763 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF
-C764 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
-C765 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
-C766 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
-C767 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C768 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
-C769 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
-C770 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C771 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
-C772 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C773 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C774 divbuf_25/a_492_n240# divbuf_25/OUT 0.00fF
-C775 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
-C776 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
-C777 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
-C778 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
-C779 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
-C780 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
-C781 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
-C782 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
-C783 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
-C784 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
-C785 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF
-C786 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
-C787 divbuf_24/IN divbuf_24/OUT5 0.00fF
-C788 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
-C789 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
-C790 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
-C791 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF
-C792 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF
-C793 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
-C794 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C795 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C796 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
-C797 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
-C798 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
-C799 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C800 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
-C801 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
-C802 divbuf_7/OUT2 divbuf_7/OUT 0.06fF
-C803 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
-C804 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
-C805 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
-C806 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
-C807 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
-C808 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
-C809 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
-C810 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF
-C811 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
-C812 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
-C813 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
-C814 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C815 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C816 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C817 divider_2/Out divider_2/tspc_0/a_630_n680# 0.04fF
-C818 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
-C819 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
-C820 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
-C821 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
-C822 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
-C823 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
-C824 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
-C825 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/Z3 0.05fF
-C826 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
-C827 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
-C828 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF
-C829 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
-C830 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
-C831 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF
-C832 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C833 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
-C834 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C835 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C836 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
-C837 divbuf_25/a_492_n240# divbuf_25/OUT2 0.42fF
-C838 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
-C839 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
-C840 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF
-C841 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C842 divbuf_20/OUT3 divbuf_20/OUT 0.26fF
-C843 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
-C844 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
-C845 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
-C846 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
-C847 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
-C848 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
-C849 pd_1/UP pd_1/and_pd_0/Z1 0.06fF
-C850 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF
-C851 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C852 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C853 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C854 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
-C855 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
-C856 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
-C857 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C858 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C859 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
-C860 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF
-C861 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
-C862 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
-C863 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
-C864 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
-C865 pd_0/R pd_0/and_pd_0/Out1 0.33fF
-C866 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF
-C867 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
-C868 divider_2/mc2 divider_2/nor_0/A 0.04fF
-C869 divider_2/nor_0/B divider_2/tspc_1/Z2 0.30fF
-C870 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
-C871 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
-C872 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
-C873 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
-C874 divider_0/mc2 divider_0/nor_0/A 0.04fF
-C875 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C876 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C877 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
-C878 divbuf_6/OUT4 divbuf_6/OUT 1.11fF
-C879 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z4 0.02fF
-C880 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C881 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
-C882 divbuf_17/OUT2 divbuf_17/OUT3 1.37fF
-C883 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
-C884 divider_1/tspc_0/Z3 divider_1/nor_1/B 0.38fF
-C885 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
-C886 divider_1/nor_0/A divider_1/and_0/B 0.08fF
-C887 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
-C888 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C889 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
-C890 pd_1/DOWN pd_1/UP 0.46fF
-C891 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF
-C892 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
-C893 divbuf_19/OUT divbuf_19/OUT4 1.11fF
-C894 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
-C895 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
-C896 divbuf_15/OUT5 divbuf_15/IN 0.00fF
-C897 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
-C898 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
-C899 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
-C900 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
-C901 divider_0/prescaler_0/Out divider_0/clk 0.51fF
-C902 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
-C903 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
-C904 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C905 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
-C906 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C907 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
-C908 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
-C909 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
-C910 divbuf_22/OUT3 divbuf_22/OUT 0.26fF
-C911 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
-C912 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
-C913 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
-C914 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
-C915 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
-C916 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
-C917 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
-C918 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
-C919 divider_2/and_0/OUT divider_2/clk 0.04fF
-C920 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C921 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
-C922 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF
-C923 divbuf_14/OUT divbuf_14/OUT5 43.38fF
-C924 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
-C925 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
-C926 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
-C927 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C928 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C929 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
-C930 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
-C931 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
-C932 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
-C933 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
-C934 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF
-C935 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C936 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
-C937 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
-C938 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
-C939 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
-C940 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
-C941 divider_2/nor_0/B divider_2/tspc_1/Z1 0.03fF
-C942 divider_2/nor_0/A divider_2/and_0/A 0.01fF
-C943 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
-C944 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
-C945 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C946 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C947 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
-C948 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
-C949 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C950 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF
-C951 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
-C952 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
-C953 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
-C954 divbuf_7/OUT4 divbuf_7/OUT 1.11fF
-C955 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
-C956 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
-C957 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
-C958 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
-C959 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
-C960 divbuf_19/OUT divbuf_19/a_492_n240# 0.00fF
-C961 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
-C962 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
-C963 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
-C964 divider_2/mc2 divider_2/and_0/B 0.20fF
-C965 divbuf_15/OUT5 divbuf_15/OUT2 0.02fF
-C966 divbuf_15/OUT4 divbuf_15/OUT3 5.16fF
-C967 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
-C968 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
-C969 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C970 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C971 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C972 divider_0/mc2 divider_0/and_0/B 0.20fF
-C973 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C974 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
-C975 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
-C976 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
-C977 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
-C978 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
-C979 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
-C980 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
-C981 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C982 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
-C983 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
-C984 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
-C985 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
-C986 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
-C987 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
-C988 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C989 divider_2/nor_0/B divider_2/and_0/B 0.31fF
-C990 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
-C991 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C992 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
-C993 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
-C994 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
-C995 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C996 divbuf_4/IN divbuf_4/OUT5 0.00fF
-C997 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
-C998 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
-C999 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
-C1000 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
-C1001 divbuf_20/OUT5 divbuf_20/OUT 43.38fF
-C1002 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
-C1003 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
-C1004 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
-C1005 divider_2/tspc_0/Z2 divider_2/tspc_1/Q 0.14fF
-C1006 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
-C1007 io_clamp_low[2] io_analog[6] 0.53fF
-C1008 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
-C1009 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
-C1010 divider_0/tspc_1/Q divider_0/tspc_0/Z3 0.45fF
-C1011 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
-C1012 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C1013 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
-C1014 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
-C1015 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1016 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
-C1017 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF
-C1018 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF
-C1019 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
-C1020 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1021 divbuf_5/IN divbuf_5/OUT5 0.00fF
-C1022 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF
-C1023 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
-C1024 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
-C1025 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
-C1026 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
-C1027 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
-C1028 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
-C1029 divider_2/and_0/A divider_2/and_0/B 0.18fF
-C1030 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
-C1031 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
-C1032 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1033 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
-C1034 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
-C1035 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1036 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C1037 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C1038 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
-C1039 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
-C1040 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
-C1041 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
-C1042 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
-C1043 divbuf_0/OUT divbuf_0/OUT3 0.26fF
-C1044 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
-C1045 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
-C1046 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
-C1047 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
-C1048 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF
-C1049 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1050 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
-C1051 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
-C1052 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1053 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
-C1054 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
-C1055 divider_1/prescaler_0/Out divider_1/clk 0.51fF
-C1056 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
-C1057 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C1058 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C1059 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1060 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
-C1061 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
-C1062 divbuf_22/OUT5 divbuf_22/OUT 43.38fF
-C1063 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
-C1064 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
-C1065 pd_1/UP pd_1/tspc_r_1/z5 0.03fF
-C1066 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF
-C1067 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
-C1068 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
-C1069 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
-C1070 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1071 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1072 divbuf_2/OUT3 divbuf_2/OUT 0.26fF
-C1073 divbuf_14/a_492_n240# divbuf_14/OUT5 0.01fF
-C1074 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
-C1075 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_0/B 0.20fF
-C1076 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
-C1077 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
-C1078 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
-C1079 divbuf_21/IN divbuf_21/OUT5 0.00fF
-C1080 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
-C1081 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
-C1082 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
-C1083 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
-C1084 divider_2/nor_0/B divider_2/tspc_1/Q 0.51fF
-C1085 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
-C1086 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
-C1087 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
-C1088 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF
-C1089 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
-C1090 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
-C1091 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
-C1092 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
-C1093 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
-C1094 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
-C1095 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
-C1096 divbuf_15/OUT divbuf_15/OUT3 0.26fF
-C1097 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C1098 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
-C1099 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
-C1100 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF
-C1101 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
-C1102 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
-C1103 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
-C1104 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
-C1105 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
-C1106 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1107 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
-C1108 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
-C1109 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C1110 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
-C1111 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF
-C1112 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
-C1113 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
-C1114 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
-C1115 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
-C1116 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
-C1117 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
-C1118 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C1119 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF
-C1120 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF
-C1121 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
-C1122 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
-C1123 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF
-C1124 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF
-C1125 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1126 divbuf_4/OUT2 divbuf_4/OUT 0.06fF
-C1127 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
-C1128 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
-C1129 divider_2/mc2 divider_2/and_0/OUT 0.05fF
-C1130 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
-C1131 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
-C1132 divbuf_8/IN divbuf_8/OUT5 0.00fF
-C1133 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
-C1134 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
-C1135 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
-C1136 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
-C1137 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
-C1138 divider_0/mc2 divider_0/and_0/OUT 0.05fF
-C1139 divider_0/tspc_0/Z1 divider_0/nor_1/B 0.03fF
-C1140 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C1141 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
-C1142 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
-C1143 divbuf_5/OUT2 divbuf_5/OUT 0.06fF
-C1144 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
-C1145 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF
-C1146 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
-C1147 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
-C1148 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
-C1149 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
-C1150 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
-C1151 pd_0/UP pd_0/tspc_r_1/z5 0.03fF
-C1152 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
-C1153 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
-C1154 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
-C1155 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
-C1156 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
-C1157 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
-C1158 divbuf_15/OUT divbuf_15/a_492_n240# 0.00fF
-C1159 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
-C1160 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF
-C1161 divbuf_25/OUT2 divbuf_25/OUT 0.06fF
-C1162 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
-C1163 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
-C1164 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
-C1165 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
-C1166 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1167 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
-C1168 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
-C1169 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
-C1170 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
-C1171 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
-C1172 pd_1/R pd_1/UP 0.45fF
-C1173 divbuf_18/OUT4 divbuf_18/OUT 1.11fF
-C1174 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
-C1175 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
-C1176 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
-C1177 divbuf_0/OUT divbuf_0/OUT4 1.11fF
-C1178 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
-C1179 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
-C1180 divbuf_14/IN divbuf_14/OUT5 0.00fF
-C1181 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF
-C1182 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
-C1183 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
-C1184 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C1185 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
-C1186 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
-C1187 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
-C1188 cp_0/a_1710_0# cp_0/out 0.84fF
-C1189 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
-C1190 divbuf_13/IN divbuf_13/OUT5 0.00fF
-C1191 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C1192 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C1193 divbuf_2/OUT5 divbuf_2/OUT 43.38fF
-C1194 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
-C1195 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
-C1196 divider_1/mc2 divider_1/nor_1/B 0.15fF
-C1197 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C1198 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1199 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C1200 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
-C1201 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_1/Q 0.01fF
-C1202 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C1203 divbuf_21/OUT2 divbuf_21/OUT 0.06fF
-C1204 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
-C1205 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
-C1206 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
-C1207 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
-C1208 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
-C1209 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
-C1210 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
-C1211 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
-C1212 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF
-C1213 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
-C1214 divider_1/tspc_1/Q divider_1/tspc_0/Z4 0.15fF
-C1215 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
-C1216 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
-C1217 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C1218 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
-C1219 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
-C1220 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
-C1221 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
-C1222 divbuf_19/IN divbuf_19/a_492_n240# 0.13fF
-C1223 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
-C1224 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
-C1225 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
-C1226 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF
-C1227 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
-C1228 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
-C1229 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
-C1230 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
-C1231 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
-C1232 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
-C1233 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
-C1234 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
-C1235 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
-C1236 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
-C1237 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
-C1238 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
-C1239 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF
-C1240 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
-C1241 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
-C1242 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF
-C1243 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1244 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
-C1245 divider_0/tspc_0/Z2 divider_0/nor_0/B 0.20fF
-C1246 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
-C1247 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
-C1248 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF
-C1249 divbuf_4/OUT4 divbuf_4/OUT 1.11fF
-C1250 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
-C1251 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
-C1252 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1253 io_clamp_low[2] io_clamp_high[2] 0.53fF
-C1254 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF
-C1255 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C1256 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
-C1257 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
-C1258 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
-C1259 divbuf_18/OUT3 divbuf_18/OUT4 5.16fF
-C1260 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
-C1261 io_clamp_high[1] io_analog[5] 0.53fF
-C1262 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
-C1263 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
-C1264 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1265 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1266 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
-C1267 divbuf_5/OUT4 divbuf_5/OUT 1.11fF
-C1268 divider_1/tspc_0/Z1 divider_1/nor_1/B 0.03fF
-C1269 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
-C1270 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
-C1271 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
-C1272 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
-C1273 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
-C1274 divbuf_19/OUT3 divbuf_19/OUT4 5.16fF
-C1275 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
-C1276 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
-C1277 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
-C1278 divbuf_0/OUT5 divbuf_0/IN 0.00fF
-C1279 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1280 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
-C1281 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
-C1282 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
-C1283 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
-C1284 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C1285 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
-C1286 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
-C1287 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF
-C1288 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
-C1289 divbuf_0/OUT divbuf_0/OUT5 43.38fF
-C1290 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C1291 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
-C1292 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
-C1293 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
-C1294 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
-C1295 divbuf_1/OUT5 divbuf_1/IN 0.00fF
-C1296 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF
-C1297 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1298 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
-C1299 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
-C1300 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
-C1301 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF
-C1302 divbuf_16/OUT2 divbuf_16/OUT 0.06fF
-C1303 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
-C1304 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C1305 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF
-C1306 pd_0/DOWN pd_0/R 0.36fF
-C1307 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
-C1308 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
-C1309 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
-C1310 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
-C1311 cp_0/a_1710_0# cp_0/down 0.32fF
-C1312 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
-C1313 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
-C1314 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
-C1315 divider_0/nor_0/B divider_0/tspc_1/Z1 0.03fF
-C1316 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1317 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
-C1318 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1319 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
-C1320 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C1321 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C1322 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
-C1323 divbuf_21/OUT4 divbuf_21/OUT 1.11fF
-C1324 divider_2/prescaler_0/Out divider_2/clk 0.51fF
-C1325 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C1326 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
-C1327 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
-C1328 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
-C1329 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
-C1330 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
-C1331 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
-C1332 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
-C1333 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
-C1334 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
-C1335 divider_0/nor_0/B divider_0/tspc_1/Z2 0.30fF
-C1336 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
-C1337 divider_1/mc2 divider_1/nor_0/A 0.04fF
-C1338 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF
-C1339 divbuf_3/IN divbuf_3/OUT5 0.00fF
-C1340 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1341 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1342 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
-C1343 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Q 0.22fF
-C1344 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
-C1345 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C1346 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C1347 divider_1/nor_0/B divider_1/nor_1/B 0.47fF
-C1348 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
-C1349 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
-C1350 divbuf_16/OUT divbuf_16/OUT5 43.38fF
-C1351 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
-C1352 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
-C1353 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
-C1354 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
-C1355 divbuf_18/OUT5 divbuf_18/OUT4 20.26fF
-C1356 divbuf_23/OUT3 divbuf_23/OUT 0.26fF
-C1357 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
-C1358 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
-C1359 divbuf_25/OUT3 divbuf_25/OUT 0.26fF
-C1360 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
-C1361 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
-C1362 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
-C1363 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
-C1364 divider_2/tspc_0/Z4 divider_2/nor_1/B 0.22fF
-C1365 divbuf_3/OUT4 divbuf_3/OUT 1.11fF
-C1366 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
-C1367 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
-C1368 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
-C1369 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C1370 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C1371 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C1372 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
-C1373 divbuf_16/OUT3 divbuf_16/OUT 0.26fF
-C1374 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
-C1375 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF
-C1376 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
-C1377 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF
-C1378 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
-C1379 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
-C1380 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF
-C1381 divider_0/tspc_0/Z1 divider_0/tspc_1/Q 0.01fF
-C1382 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C1383 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF
-C1384 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1385 divider_1/tspc_0/Z2 divider_1/nor_0/B 0.20fF
-C1386 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF
-C1387 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
-C1388 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C1389 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
-C1390 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
-C1391 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
-C1392 io_clamp_low[0] io_analog[4] 0.53fF
-C1393 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
-C1394 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
-C1395 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
-C1396 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C1397 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
-C1398 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
-C1399 divider_0/tspc_1/Z1 divider_0/tspc_2/Q 0.01fF
-C1400 divider_0/nor_0/B divider_0/tspc_1/a_630_n680# 0.35fF
-C1401 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
-C1402 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C1403 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF
-C1404 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
-C1405 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
-C1406 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
-C1407 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
-C1408 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
-C1409 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF
-C1410 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
-C1411 divbuf_25/OUT3 divbuf_25/OUT2 1.37fF
-C1412 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
-C1413 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
-C1414 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1415 divider_1/mc2 divider_1/and_0/B 0.20fF
-C1416 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
-C1417 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
-C1418 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
-C1419 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
-C1420 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z3 0.38fF
-C1421 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
-C1422 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
-C1423 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
-C1424 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
-C1425 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF
-C1426 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C1427 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
-C1428 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
-C1429 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
-C1430 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF
-C1431 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF
-C1432 divider_0/nor_0/B divider_0/and_0/B 0.31fF
-C1433 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
-C1434 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
-C1435 divider_2/tspc_0/Z4 divider_2/tspc_0/Z1 0.00fF
-C1436 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
-C1437 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
-C1438 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
-C1439 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
-C1440 divbuf_20/IN divbuf_20/OUT5 0.00fF
-C1441 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
-C1442 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
-C1443 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
-C1444 divider_2/tspc_0/Z3 divider_2/nor_1/B 0.38fF
-C1445 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
-C1446 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
-C1447 pd_1/UP pd_1/and_pd_0/Out1 0.33fF
-C1448 divbuf_18/OUT divbuf_18/a_492_n240# 0.00fF
-C1449 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
-C1450 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
-C1451 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
-C1452 divider_0/nor_0/B divider_0/tspc_1/Q 0.51fF
-C1453 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
-C1454 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C1455 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1456 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
-C1457 divider_0/and_0/OUT divider_0/clk 0.04fF
-C1458 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_630_n680# 0.04fF
-C1459 divider_1/nor_0/B divider_1/tspc_1/Z1 0.03fF
-C1460 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF
-C1461 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C1462 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
-C1463 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
-C1464 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
-C1465 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C1466 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
-C1467 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
-C1468 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
-C1469 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
-C1470 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
-C1471 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
-C1472 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C1473 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
-C1474 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
-C1475 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
-C1476 divider_0/nor_0/A divider_0/and_0/A 0.01fF
-C1477 divider_1/nor_0/B divider_1/tspc_1/Z2 0.30fF
-C1478 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
-C1479 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
-C1480 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C1481 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C1482 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
-C1483 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
-C1484 divbuf_16/OUT divbuf_16/OUT4 1.11fF
-C1485 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
-C1486 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
-C1487 divbuf_23/OUT5 divbuf_23/OUT 43.38fF
-C1488 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF
-C1489 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
-C1490 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
-C1491 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
-C1492 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
-C1493 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
-C1494 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
-C1495 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C1496 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
-C1497 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
-C1498 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
-C1499 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
-C1500 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
-C1501 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
-C1502 divbuf_19/OUT2 divbuf_19/OUT5 0.02fF
-C1503 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
-C1504 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
-C1505 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
-C1506 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF
-C1507 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C1508 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C1509 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C1510 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
-C1511 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
-C1512 divbuf_22/IN divbuf_22/OUT5 0.00fF
-C1513 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
-C1514 pd_1/R pd_1/and_pd_0/Z1 0.02fF
-C1515 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF
-C1516 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
-C1517 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C1518 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF
-C1519 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C1520 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C1521 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
-C1522 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
-C1523 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
-C1524 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF
-C1525 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
-C1526 io_clamp_low[1] io_clamp_high[1] 0.53fF
-C1527 pd_0/R pd_0/UP 0.45fF
-C1528 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
-C1529 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF
-C1530 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
-C1531 divider_2/tspc_0/Z3 divider_2/tspc_0/Z1 0.06fF
-C1532 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
-C1533 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/Out 0.21fF
-C1534 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1535 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C1536 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C1537 divbuf_25/IN divbuf_25/OUT5 0.00fF
-C1538 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
-C1539 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
-C1540 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C1541 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
-C1542 divider_1/tspc_1/Z1 divider_1/tspc_2/Q 0.01fF
-C1543 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.35fF
-C1544 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
-C1545 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
-C1546 pd_1/DOWN pd_1/R 0.36fF
-C1547 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
-C1548 divider_2/mc2 divider_2/and_0/out1 0.06fF
-C1549 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
-C1550 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
-C1551 divbuf_15/OUT5 divbuf_15/OUT 43.38fF
-C1552 divider_0/mc2 divider_0/and_0/out1 0.06fF
-C1553 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
-C1554 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
-C1555 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
-C1556 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1557 divider_2/tspc_0/Z4 divider_2/tspc_0/Z3 0.65fF
-C1558 divider_0/and_0/A divider_0/and_0/B 0.18fF
-C1559 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
-C1560 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
-C1561 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
-C1562 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
-C1563 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
-C1564 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
-C1565 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
-C1566 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
-C1567 divbuf_17/OUT5 divbuf_17/OUT 43.38fF
-C1568 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
-C1569 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
-C1570 divider_2/nor_1/B divider_2/and_0/B 0.29fF
-C1571 divbuf_9/IN divbuf_9/OUT5 0.00fF
-C1572 divbuf_0/OUT divbuf_0/OUT2 0.06fF
-C1573 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF
-C1574 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C1575 divider_0/mc2 divider_0/nor_0/B 0.06fF
-C1576 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
-C1577 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
-C1578 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
-C1579 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C1580 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
-C1581 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
-C1582 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
-C1583 divbuf_20/OUT2 divbuf_20/OUT 0.06fF
-C1584 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
-C1585 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
-C1586 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C1587 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
-C1588 divider_1/nor_0/B divider_1/and_0/B 0.31fF
-C1589 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
-C1590 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
-C1591 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
-C1592 divider_2/tspc_0/a_630_n680# divider_2/nor_1/B 0.35fF
-C1593 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
-C1594 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
-C1595 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
-C1596 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
-C1597 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1598 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
-C1599 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1600 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
-C1601 divbuf_17/IN divbuf_17/a_492_n240# 0.13fF
-C1602 divider_1/mc2 divider_1/and_0/OUT 0.05fF
-C1603 divbuf_14/OUT divbuf_14/OUT4 1.11fF
-C1604 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
-C1605 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
-C1606 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
-C1607 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
-C1608 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C1609 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
-C1610 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
-C1611 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF
-C1612 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
-C1613 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
-C1614 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
-C1615 divider_1/and_0/OUT divider_1/clk 0.04fF
-C1616 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
-C1617 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
-C1618 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
-C1619 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
-C1620 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
-C1621 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
-C1622 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
-C1623 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
-C1624 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
-C1625 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
-C1626 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
-C1627 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF
-C1628 divbuf_14/OUT2 divbuf_14/OUT 0.06fF
-C1629 divider_0/tspc_1/Q divider_0/tspc_1/Z3 0.05fF
-C1630 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
-C1631 divider_0/Out divider_0/nor_1/B 0.22fF
-C1632 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
-C1633 divbuf_16/a_492_n240# divbuf_16/OUT 0.00fF
-C1634 divbuf_6/OUT3 divbuf_6/OUT 0.26fF
-C1635 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
-C1636 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
-C1637 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C1638 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
-C1639 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
-C1640 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
-C1641 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
-C1642 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
-C1643 divider_1/nor_0/A divider_1/and_0/A 0.01fF
-C1644 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF
-C1645 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
-C1646 divbuf_19/OUT divbuf_19/OUT3 0.26fF
-C1647 divbuf_19/OUT5 divbuf_19/OUT4 20.26fF
-C1648 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
-C1649 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
-C1650 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
-C1651 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
-C1652 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
-C1653 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
-C1654 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C0 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
+C1 divbuf_14/OUT divbuf_14/OUT3 0.26fF
+C2 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
+C3 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF
+C4 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
+C5 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF
+C6 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
+C7 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
+C8 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
+C9 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF
+C10 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
+C11 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
+C12 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
+C13 pd_1/tspc_r_0/Z1 pd_1/DIV 0.17fF
+C14 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
+C15 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
+C16 divbuf_1/a_492_n240# divbuf_1/OUT 0.00fF
+C17 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
+C18 pd_0/tspc_r_1/z5 pd_0/UP 0.03fF
+C19 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
+C20 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
+C21 divider_2/nor_0/B divider_2/tspc_1/Z3 0.38fF
+C22 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
+C23 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
+C24 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
+C25 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
+C26 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
+C27 pd_1/and_pd_0/Z1 pd_1/tspc_r_1/Qbar 0.02fF
+C28 io_clamp_high[2] io_analog[6] 0.53fF
+C29 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
+C30 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
+C31 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
+C32 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF
+C33 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
+C34 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
+C35 divbuf_3/OUT2 divbuf_3/OUT 0.06fF
+C36 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
+C37 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C38 divbuf_6/OUT5 divbuf_6/OUT 43.38fF
+C39 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C40 divider_1/tspc_1/Q divider_1/tspc_1/Z3 0.05fF
+C41 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
+C42 divider_1/Out divider_1/nor_1/B 0.22fF
+C43 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
+C44 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
+C45 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
+C46 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C47 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
+C48 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
+C49 divbuf_18/OUT5 divbuf_18/OUT 43.38fF
+C50 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
+C51 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
+C52 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
+C53 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
+C54 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C55 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C56 divider_2/tspc_0/Z4 divider_2/tspc_1/Q 0.15fF
+C57 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
+C58 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C59 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C60 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
+C61 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
+C62 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
+C63 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
+C64 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
+C65 divbuf_22/OUT4 divbuf_22/OUT 1.11fF
+C66 pd_1/R pd_1/tspc_r_0/Z2 0.21fF
+C67 pd_0/tspc_r_1/Z4 pd_0/REF 0.02fF
+C68 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
+C69 divider_2/tspc_0/Z3 divider_2/tspc_0/a_630_n680# 0.05fF
+C70 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
+C71 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
+C72 divider_0/tspc_0/a_630_n680# divider_0/Out 0.04fF
+C73 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
+C74 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
+C75 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
+C76 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
+C77 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
+C78 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
+C79 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
+C80 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C81 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
+C82 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
+C83 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
+C84 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
+C85 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
+C86 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
+C87 divider_2/nor_0/A divider_2/and_0/B 0.08fF
+C88 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
+C89 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
+C90 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
+C91 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C92 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
+C93 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
+C94 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF
+C95 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
+C96 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C97 divider_1/nor_0/B divider_1/tspc_0/Z4 0.02fF
+C98 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
+C99 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
+C100 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z3 0.45fF
+C101 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/B 0.40fF
+C102 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
+C103 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C104 pd_1/and_pd_0/Out1 pd_1/tspc_r_1/Qbar 0.05fF
+C105 divbuf_7/OUT5 divbuf_7/OUT 43.38fF
+C106 pd_0/tspc_r_1/Z4 pd_0/tspc_r_0/Z4 0.02fF
+C107 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
+C108 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
+C109 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
+C110 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
+C111 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF
+C112 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
+C113 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
+C114 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
+C115 divbuf_15/OUT divbuf_15/OUT2 0.06fF
+C116 divbuf_15/OUT5 divbuf_15/OUT3 0.01fF
+C117 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
+C118 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C119 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C120 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C121 divbuf_25/OUT5 divbuf_25/OUT 43.38fF
+C122 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
+C123 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
+C124 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
+C125 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
+C126 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
+C127 divbuf_10/IN divbuf_10/OUT5 0.00fF
+C128 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
+C129 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C130 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
+C131 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
+C132 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
+C133 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
+C134 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
+C135 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
+C136 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
+C137 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
+C138 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C139 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
+C140 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C141 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
+C142 divbuf_0/OUT5 divbuf_0/OUT 43.38fF
+C143 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C144 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
+C145 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF
+C146 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
+C147 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
+C148 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
+C149 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
+C150 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
+C151 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
+C152 divider_2/tspc_0/Z3 divider_2/tspc_1/Q 0.45fF
+C153 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
+C154 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C155 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
+C156 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
+C157 pd_1/R pd_1/UP 0.45fF
+C158 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
+C159 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
+C160 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
+C161 pd_1/R pd_1/and_pd_0/Z1 0.02fF
+C162 pd_1/and_pd_0/Z1 pd_1/UP 0.06fF
+C163 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
+C164 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
+C165 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
+C166 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C167 pd_0/REF pd_0/R 0.61fF
+C168 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C169 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
+C170 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
+C171 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
+C172 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
+C173 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
+C174 io_clamp_low[1] io_analog[5] 0.53fF
+C175 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
+C176 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
+C177 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
+C178 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
+C179 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
+C180 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF
+C181 divbuf_15/OUT5 divbuf_15/a_492_n240# 0.01fF
+C182 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C183 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
+C184 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
+C185 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
+C186 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
+C187 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
+C188 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
+C189 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
+C190 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C191 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
+C192 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF
+C193 divbuf_11/IN divbuf_11/OUT5 0.00fF
+C194 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF
+C195 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
+C196 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
+C197 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
+C198 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
+C199 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
+C200 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
+C201 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C202 ro_complete_0/a4 ro_complete_0/cbank_0/switch_1/vin 0.09fF
+C203 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C204 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
+C205 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
+C206 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
+C207 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
+C208 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C209 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z2 0.14fF
+C210 pd_0/tspc_r_1/z5 pd_0/tspc_r_1/Z3 0.11fF
+C211 divbuf_17/OUT4 divbuf_17/OUT 1.11fF
+C212 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C213 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
+C214 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C215 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
+C216 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
+C217 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
+C218 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF
+C219 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
+C220 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C221 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
+C222 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
+C223 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
+C224 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C225 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF
+C226 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
+C227 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
+C228 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
+C229 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
+C230 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
+C231 divbuf_17/OUT3 divbuf_17/OUT 0.26fF
+C232 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
+C233 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
+C234 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
+C235 pd_1/R pd_1/and_pd_0/Out1 0.33fF
+C236 pd_1/UP pd_1/and_pd_0/Out1 0.33fF
+C237 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
+C238 pd_1/and_pd_0/Z1 pd_1/and_pd_0/Out1 0.18fF
+C239 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
+C240 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
+C241 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
+C242 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
+C243 pd_0/tspc_r_1/z5 pd_0/tspc_r_0/z5 0.02fF
+C244 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
+C245 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
+C246 divbuf_23/IN divbuf_23/OUT5 0.00fF
+C247 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
+C248 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
+C249 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
+C250 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C251 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
+C252 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
+C253 divbuf_1/a_492_n240# divbuf_1/OUT5 0.01fF
+C254 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C255 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
+C256 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
+C257 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
+C258 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
+C259 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
+C260 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C261 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
+C262 divbuf_19/OUT5 divbuf_19/OUT 43.38fF
+C263 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
+C264 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
+C265 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
+C266 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
+C267 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C268 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C269 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
+C270 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
+C271 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF
+C272 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF
+C273 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C274 divbuf_4/OUT3 divbuf_4/OUT 0.26fF
+C275 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
+C276 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
+C277 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
+C278 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
+C279 divbuf_16/OUT2 divbuf_16/OUT5 0.02fF
+C280 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
+C281 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF
+C282 divider_2/tspc_0/a_630_n680# divider_2/tspc_1/Q 0.01fF
+C283 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
+C284 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
+C285 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
+C286 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
+C287 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
+C288 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
+C289 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
+C290 divider_0/tspc_0/Z2 divider_0/nor_1/B 0.40fF
+C291 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C292 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
+C293 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
+C294 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF
+C295 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
+C296 divbuf_5/OUT3 divbuf_5/OUT 0.26fF
+C297 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
+C298 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
+C299 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C300 divbuf_16/OUT3 divbuf_16/OUT2 1.37fF
+C301 pd_1/UP pd_1/tspc_r_1/z5 0.03fF
+C302 divbuf_16/IN divbuf_16/OUT5 0.00fF
+C303 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
+C304 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
+C305 pd_0/tspc_r_0/Z3 pd_0/DIV 0.65fF
+C306 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
+C307 pd_0/and_pd_0/Out1 pd_0/R 0.33fF
+C308 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
+C309 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
+C310 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF
+C311 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
+C312 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
+C313 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
+C314 divider_1/mc2 divider_1/and_0/out1 0.06fF
+C315 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF
+C316 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
+C317 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
+C318 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
+C319 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
+C320 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C321 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
+C322 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
+C323 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
+C324 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
+C325 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
+C326 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
+C327 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
+C328 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
+C329 divider_1/mc2 divider_1/nor_0/B 0.06fF
+C330 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
+C331 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
+C332 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
+C333 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
+C334 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C335 divbuf_16/OUT3 divbuf_16/OUT5 0.01fF
+C336 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF
+C337 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
+C338 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
+C339 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
+C340 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
+C341 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C342 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
+C343 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
+C344 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
+C345 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C346 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_1/Q 0.14fF
+C347 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
+C348 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
+C349 divbuf_21/OUT3 divbuf_21/OUT 0.26fF
+C350 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
+C351 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
+C352 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
+C353 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C354 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
+C355 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C356 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
+C357 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
+C358 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
+C359 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
+C360 divbuf_17/OUT2 divbuf_17/a_492_n240# 0.42fF
+C361 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF
+C362 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
+C363 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C364 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF
+C365 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C366 divbuf_19/OUT2 divbuf_19/a_492_n240# 0.42fF
+C367 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
+C368 divbuf_23/OUT2 divbuf_23/OUT 0.06fF
+C369 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
+C370 cp_0/a_1710_0# cp_0/out 0.84fF
+C371 pd_1/tspc_r_0/z5 pd_1/DIV 0.04fF
+C372 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
+C373 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
+C374 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
+C375 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
+C376 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
+C377 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
+C378 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
+C379 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
+C380 divbuf_3/OUT3 divbuf_3/OUT 0.26fF
+C381 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
+C382 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
+C383 divider_2/Out divider_2/nor_1/B 0.22fF
+C384 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
+C385 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C386 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
+C387 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
+C388 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
+C389 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
+C390 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
+C391 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
+C392 divbuf_0/OUT5 divbuf_0/IN 0.00fF
+C393 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
+C394 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
+C395 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C396 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C397 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C398 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
+C399 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
+C400 divbuf_4/OUT5 divbuf_4/OUT 43.38fF
+C401 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
+C402 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF
+C403 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C404 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF
+C405 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
+C406 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
+C407 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
+C408 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
+C409 io_clamp_low[1] io_clamp_high[1] 0.53fF
+C410 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
+C411 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C412 divider_0/nor_0/B divider_0/tspc_2/Q 0.22fF
+C413 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
+C414 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C415 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C416 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
+C417 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C418 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
+C419 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
+C420 divbuf_5/OUT5 divbuf_5/OUT 43.38fF
+C421 cp_0/a_10_n50# cp_0/vbias 0.19fF
+C422 divider_1/tspc_0/Z3 divider_1/Out 0.05fF
+C423 divider_1/tspc_0/Z2 divider_1/nor_1/B 0.40fF
+C424 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
+C425 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C426 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z1 0.03fF
+C427 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
+C428 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
+C429 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
+C430 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF
+C431 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
+C432 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
+C433 io_clamp_high[0] io_analog[4] 0.53fF
+C434 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
+C435 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
+C436 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
+C437 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
+C438 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
+C439 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
+C440 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C441 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
+C442 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
+C443 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
+C444 divbuf_2/OUT5 divbuf_2/IN 0.00fF
+C445 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C446 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
+C447 cp_0/a_1710_0# cp_0/down 0.32fF
+C448 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C449 divider_1/mc2 divider_1/and_0/A 0.16fF
+C450 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
+C451 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
+C452 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
+C453 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
+C454 divbuf_0/OUT4 divbuf_0/OUT3 5.16fF
+C455 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z2 0.30fF
+C456 divbuf_18/OUT2 divbuf_18/OUT 0.06fF
+C457 divbuf_17/OUT2 divbuf_17/OUT 0.06fF
+C458 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
+C459 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
+C460 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
+C461 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
+C462 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
+C463 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF
+C464 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
+C465 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
+C466 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
+C467 divider_0/nor_0/B divider_0/and_0/A 0.26fF
+C468 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
+C469 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
+C470 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
+C471 divbuf_16/OUT3 divbuf_16/OUT4 5.16fF
+C472 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
+C473 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
+C474 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
+C475 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
+C476 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
+C477 divider_2/tspc_0/Z2 divider_2/nor_1/B 0.40fF
+C478 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
+C479 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
+C480 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF
+C481 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
+C482 divider_0/nor_1/B divider_0/and_0/B 0.29fF
+C483 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C484 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
+C485 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
+C486 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C487 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C488 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
+C489 divbuf_21/OUT5 divbuf_21/OUT 43.38fF
+C490 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF
+C491 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
+C492 divbuf_2/OUT3 divbuf_2/OUT 0.26fF
+C493 pd_0/tspc_r_1/Qbar pd_0/tspc_r_1/Qbar1 0.01fF
+C494 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
+C495 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
+C496 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
+C497 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
+C498 divider_0/nor_0/B divider_0/tspc_1/Z3 0.38fF
+C499 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
+C500 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
+C501 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
+C502 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
+C503 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
+C504 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C505 divbuf_6/IN divbuf_6/OUT5 0.00fF
+C506 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
+C507 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_2/Q 0.01fF
+C508 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF
+C509 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
+C510 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
+C511 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
+C512 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
+C513 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
+C514 divbuf_23/OUT4 divbuf_23/OUT 1.11fF
+C515 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
+C516 divbuf_25/OUT4 divbuf_25/OUT 1.11fF
+C517 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
+C518 divbuf_3/OUT5 divbuf_3/OUT 43.38fF
+C519 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
+C520 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C521 divbuf_19/IN divbuf_19/OUT5 0.00fF
+C522 divbuf_17/OUT4 divbuf_17/OUT3 5.16fF
+C523 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
+C524 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
+C525 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
+C526 divider_2/mc2 divider_2/nor_1/B 0.15fF
+C527 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
+C528 divider_0/tspc_0/Z2 divider_0/tspc_1/Q 0.14fF
+C529 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C530 divbuf_16/a_492_n240# divbuf_16/OUT2 0.42fF
+C531 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
+C532 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
+C533 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
+C534 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
+C535 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C536 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C537 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
+C538 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
+C539 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
+C540 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
+C541 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
+C542 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
+C543 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
+C544 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF
+C545 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
+C546 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
+C547 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
+C548 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
+C549 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
+C550 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
+C551 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
+C552 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
+C553 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
+C554 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C555 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF
+C556 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C557 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C558 divbuf_16/a_492_n240# divbuf_16/IN 0.13fF
+C559 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
+C560 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C561 divider_1/nor_0/B divider_1/tspc_2/Q 0.22fF
+C562 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.35fF
+C563 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
+C564 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
+C565 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Q 0.51fF
+C566 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF
+C567 divbuf_7/IN divbuf_7/OUT5 0.00fF
+C568 pd_0/tspc_r_1/Qbar pd_0/R 0.03fF
+C569 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
+C570 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
+C571 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
+C572 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
+C573 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
+C574 divbuf_15/OUT4 divbuf_15/OUT 1.11fF
+C575 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
+C576 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
+C577 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
+C578 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C579 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C580 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
+C581 divider_2/tspc_0/Z4 divider_2/tspc_0/Z2 0.36fF
+C582 divider_2/Out divider_2/tspc_0/Z3 0.05fF
+C583 divbuf_16/a_492_n240# divbuf_16/OUT5 0.01fF
+C584 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
+C585 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
+C586 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.00fF
+C587 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
+C588 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
+C589 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
+C590 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
+C591 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
+C592 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
+C593 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
+C594 divbuf_18/IN divbuf_18/OUT5 0.00fF
+C595 divider_2/tspc_1/a_630_n680# divider_2/nor_1/B 0.00fF
+C596 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
+C597 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
+C598 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C599 divbuf_2/OUT5 divbuf_2/OUT 43.38fF
+C600 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
+C601 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C602 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF
+C603 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
+C604 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
+C605 divider_1/nor_0/B divider_1/and_0/A 0.26fF
+C606 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
+C607 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
+C608 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
+C609 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C610 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
+C611 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
+C612 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
+C613 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
+C614 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
+C615 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
+C616 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF
+C617 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
+C618 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
+C619 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
+C620 pd_0/DIV pd_0/R 0.51fF
+C621 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C622 divider_0/mc2 divider_0/nor_1/B 0.15fF
+C623 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
+C624 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
+C625 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C626 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C627 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_630_n680# 0.12fF
+C628 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C629 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF
+C630 divider_1/nor_1/B divider_1/and_0/B 0.29fF
+C631 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z1 0.71fF
+C632 divbuf_12/IN divbuf_12/OUT5 0.00fF
+C633 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
+C634 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
+C635 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
+C636 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C637 divider_0/nor_0/A divider_0/and_0/B 0.08fF
+C638 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
+C639 divider_1/nor_0/B divider_1/tspc_1/Z3 0.38fF
+C640 divider_1/tspc_1/Q divider_1/nor_1/B 0.22fF
+C641 divbuf_6/OUT2 divbuf_6/OUT 0.06fF
+C642 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
+C643 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C644 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF
+C645 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
+C646 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C647 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
+C648 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
+C649 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF
+C650 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
+C651 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
+C652 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
+C653 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
+C654 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
+C655 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
+C656 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C657 divider_2/tspc_0/Z4 divider_2/nor_0/B 0.02fF
+C658 divbuf_19/OUT2 divbuf_19/OUT 0.06fF
+C659 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
+C660 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF
+C661 pd_1/DOWN pd_1/tspc_r_0/Qbar 0.21fF
+C662 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z3 0.25fF
+C663 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
+C664 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
+C665 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
+C666 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
+C667 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
+C668 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
+C669 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
+C670 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
+C671 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
+C672 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C673 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
+C674 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
+C675 pd_0/DOWN pd_0/UP 0.46fF
+C676 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C677 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C678 divbuf_25/a_492_n240# divbuf_25/OUT 0.00fF
+C679 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
+C680 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
+C681 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
+C682 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
+C683 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
+C684 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
+C685 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
+C686 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
+C687 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
+C688 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
+C689 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
+C690 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
+C691 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
+C692 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/a5 0.09fF
+C693 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C694 divbuf_24/IN divbuf_24/OUT5 0.00fF
+C695 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
+C696 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF
+C697 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
+C698 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C699 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C700 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
+C701 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C702 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
+C703 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
+C704 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
+C705 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
+C706 divbuf_7/OUT2 divbuf_7/OUT 0.06fF
+C707 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
+C708 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
+C709 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
+C710 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
+C711 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF
+C712 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
+C713 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
+C714 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
+C715 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C716 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C717 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
+C718 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C719 divider_2/Out divider_2/tspc_0/a_630_n680# 0.04fF
+C720 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
+C721 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
+C722 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF
+C723 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/Z3 0.05fF
+C724 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
+C725 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
+C726 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
+C727 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
+C728 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
+C729 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
+C730 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
+C731 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF
+C732 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
+C733 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
+C734 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
+C735 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C736 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
+C737 divbuf_25/a_492_n240# divbuf_25/OUT2 0.42fF
+C738 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
+C739 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
+C740 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C741 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C742 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
+C743 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF
+C744 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C745 divbuf_20/OUT3 divbuf_20/OUT 0.26fF
+C746 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
+C747 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
+C748 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
+C749 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
+C750 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
+C751 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
+C752 pd_1/R pd_1/REF 0.61fF
+C753 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
+C754 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF
+C755 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C756 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C757 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
+C758 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
+C759 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
+C760 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
+C761 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
+C762 pd_1/R pd_1/tspc_r_1/Z2 0.21fF
+C763 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C764 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C765 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
+C766 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF
+C767 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
+C768 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF
+C769 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
+C770 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
+C771 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF
+C772 pd_0/tspc_r_1/z5 pd_0/tspc_r_1/Qbar1 0.20fF
+C773 divider_2/mc2 divider_2/nor_0/A 0.04fF
+C774 divider_2/nor_0/B divider_2/tspc_1/Z2 0.30fF
+C775 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
+C776 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
+C777 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
+C778 io_clamp_low[2] io_analog[6] 0.53fF
+C779 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
+C780 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C781 divider_0/mc2 divider_0/nor_0/A 0.04fF
+C782 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C783 pd_0/R pd_0/tspc_r_0/Z2 0.21fF
+C784 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
+C785 divbuf_6/OUT4 divbuf_6/OUT 1.11fF
+C786 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z4 0.02fF
+C787 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C788 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
+C789 divbuf_17/OUT2 divbuf_17/OUT3 1.37fF
+C790 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
+C791 divider_1/tspc_0/Z3 divider_1/nor_1/B 0.38fF
+C792 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
+C793 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
+C794 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF
+C795 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C796 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
+C797 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
+C798 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C799 divider_1/nor_0/A divider_1/and_0/B 0.08fF
+C800 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
+C801 divbuf_19/OUT divbuf_19/OUT4 1.11fF
+C802 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
+C803 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
+C804 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
+C805 divbuf_15/OUT5 divbuf_15/IN 0.00fF
+C806 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
+C807 divbuf_0/OUT2 divbuf_0/OUT3 1.37fF
+C808 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
+C809 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
+C810 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
+C811 divider_0/prescaler_0/Out divider_0/clk 0.51fF
+C812 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
+C813 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
+C814 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C815 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
+C816 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C817 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
+C818 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
+C819 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
+C820 divbuf_22/OUT3 divbuf_22/OUT 0.26fF
+C821 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
+C822 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
+C823 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
+C824 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
+C825 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
+C826 divider_2/and_0/OUT divider_2/clk 0.04fF
+C827 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
+C828 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF
+C829 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
+C830 divbuf_14/OUT divbuf_14/OUT5 43.38fF
+C831 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
+C832 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
+C833 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C834 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C835 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
+C836 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
+C837 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
+C838 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
+C839 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
+C840 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF
+C841 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C842 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
+C843 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
+C844 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
+C845 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
+C846 divider_2/nor_0/B divider_2/tspc_1/Z1 0.03fF
+C847 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
+C848 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
+C849 divider_2/nor_0/A divider_2/and_0/A 0.01fF
+C850 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C851 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
+C852 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
+C853 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C854 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF
+C855 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
+C856 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
+C857 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
+C858 divbuf_7/OUT4 divbuf_7/OUT 1.11fF
+C859 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
+C860 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
+C861 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
+C862 divbuf_19/OUT divbuf_19/a_492_n240# 0.00fF
+C863 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
+C864 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
+C865 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
+C866 divider_2/mc2 divider_2/and_0/B 0.20fF
+C867 divbuf_15/OUT5 divbuf_15/OUT2 0.02fF
+C868 divbuf_15/OUT4 divbuf_15/OUT3 5.16fF
+C869 divbuf_0/OUT4 divbuf_0/OUT 1.11fF
+C870 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_3/vin 0.20fF
+C871 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C872 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C873 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C874 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C875 divider_0/mc2 divider_0/and_0/B 0.20fF
+C876 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
+C877 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
+C878 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
+C879 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
+C880 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
+C881 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
+C882 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
+C883 pd_0/UP pd_0/R 0.45fF
+C884 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C885 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
+C886 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
+C887 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
+C888 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
+C889 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
+C890 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
+C891 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
+C892 divider_2/nor_0/B divider_2/and_0/B 0.31fF
+C893 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
+C894 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
+C895 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
+C896 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C897 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C898 divbuf_4/IN divbuf_4/OUT5 0.00fF
+C899 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
+C900 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
+C901 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
+C902 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
+C903 divbuf_20/OUT5 divbuf_20/OUT 43.38fF
+C904 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
+C905 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
+C906 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
+C907 divider_2/tspc_0/Z2 divider_2/tspc_1/Q 0.14fF
+C908 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
+C909 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
+C910 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
+C911 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
+C912 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
+C913 divider_0/tspc_1/Q divider_0/tspc_0/Z3 0.45fF
+C914 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
+C915 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C916 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
+C917 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
+C918 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
+C919 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
+C920 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C921 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
+C922 divbuf_5/IN divbuf_5/OUT5 0.00fF
+C923 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF
+C924 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF
+C925 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C926 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
+C927 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF
+C928 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
+C929 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
+C930 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
+C931 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
+C932 pd_1/tspc_r_0/Z2 pd_1/DIV 0.19fF
+C933 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
+C934 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
+C935 divider_2/and_0/A divider_2/and_0/B 0.18fF
+C936 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
+C937 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C938 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/Z2 0.14fF
+C939 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
+C940 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
+C941 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C942 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C943 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C944 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
+C945 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF
+C946 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
+C947 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF
+C948 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
+C949 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
+C950 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
+C951 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
+C952 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
+C953 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C954 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
+C955 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF
+C956 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C957 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
+C958 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
+C959 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C960 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
+C961 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
+C962 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
+C963 divider_1/prescaler_0/Out divider_1/clk 0.51fF
+C964 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C965 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C966 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C967 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
+C968 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/Z3 0.20fF
+C969 pd_0/tspc_r_1/z5 pd_0/REF 0.04fF
+C970 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
+C971 divbuf_22/OUT5 divbuf_22/OUT 43.38fF
+C972 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
+C973 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF
+C974 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
+C975 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
+C976 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
+C977 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
+C978 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
+C979 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C980 divbuf_14/a_492_n240# divbuf_14/OUT5 0.01fF
+C981 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
+C982 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_0/B 0.20fF
+C983 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
+C984 divbuf_21/IN divbuf_21/OUT5 0.00fF
+C985 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
+C986 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
+C987 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
+C988 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
+C989 divbuf_1/OUT5 divbuf_1/IN 0.00fF
+C990 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
+C991 divider_2/nor_0/B divider_2/tspc_1/Q 0.51fF
+C992 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
+C993 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
+C994 cp_0/a_1710_n2840# cp_0/out 0.61fF
+C995 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
+C996 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
+C997 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF
+C998 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
+C999 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
+C1000 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
+C1001 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
+C1002 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
+C1003 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
+C1004 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
+C1005 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
+C1006 pd_1/R pd_1/DIV 0.51fF
+C1007 divbuf_15/OUT divbuf_15/OUT3 0.26fF
+C1008 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C1009 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
+C1010 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
+C1011 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF
+C1012 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
+C1013 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
+C1014 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
+C1015 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
+C1016 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
+C1017 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C1018 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
+C1019 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
+C1020 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C1021 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
+C1022 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
+C1023 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C1024 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF
+C1025 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
+C1026 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
+C1027 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF
+C1028 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C1029 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
+C1030 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
+C1031 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C1032 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF
+C1033 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF
+C1034 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1035 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
+C1036 divbuf_4/OUT2 divbuf_4/OUT 0.06fF
+C1037 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
+C1038 divbuf_8/IN divbuf_8/OUT5 0.00fF
+C1039 divider_2/mc2 divider_2/and_0/OUT 0.05fF
+C1040 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
+C1041 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
+C1042 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
+C1043 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
+C1044 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
+C1045 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
+C1046 divider_0/mc2 divider_0/and_0/OUT 0.05fF
+C1047 divider_0/tspc_0/Z1 divider_0/nor_1/B 0.03fF
+C1048 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
+C1049 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF
+C1050 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
+C1051 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
+C1052 divbuf_5/OUT2 divbuf_5/OUT 0.06fF
+C1053 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
+C1054 pd_0/tspc_r_1/Z3 pd_0/R 0.29fF
+C1055 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
+C1056 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
+C1057 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
+C1058 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
+C1059 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF
+C1060 io_clamp_high[1] io_analog[5] 0.53fF
+C1061 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
+C1062 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
+C1063 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
+C1064 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
+C1065 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF
+C1066 divbuf_15/OUT divbuf_15/a_492_n240# 0.00fF
+C1067 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
+C1068 divbuf_25/OUT2 divbuf_25/OUT 0.06fF
+C1069 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
+C1070 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
+C1071 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
+C1072 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1073 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
+C1074 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
+C1075 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
+C1076 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF
+C1077 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
+C1078 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
+C1079 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
+C1080 divbuf_18/OUT4 divbuf_18/OUT 1.11fF
+C1081 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
+C1082 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
+C1083 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
+C1084 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
+C1085 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF
+C1086 divbuf_14/IN divbuf_14/OUT5 0.00fF
+C1087 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
+C1088 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
+C1089 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
+C1090 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C1091 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
+C1092 divbuf_13/IN divbuf_13/OUT5 0.00fF
+C1093 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C1094 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C1095 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
+C1096 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
+C1097 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C1098 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1099 divider_1/mc2 divider_1/nor_1/B 0.15fF
+C1100 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C1101 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
+C1102 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_1/Q 0.01fF
+C1103 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C1104 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
+C1105 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
+C1106 divbuf_21/OUT2 divbuf_21/OUT 0.06fF
+C1107 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
+C1108 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
+C1109 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
+C1110 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
+C1111 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
+C1112 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
+C1113 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
+C1114 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF
+C1115 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
+C1116 divider_1/tspc_1/Q divider_1/tspc_0/Z4 0.15fF
+C1117 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
+C1118 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
+C1119 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
+C1120 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C1121 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
+C1122 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
+C1123 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1124 divbuf_19/IN divbuf_19/a_492_n240# 0.13fF
+C1125 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
+C1126 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
+C1127 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
+C1128 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
+C1129 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
+C1130 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
+C1131 pd_1/tspc_r_0/Z4 pd_1/DIV 0.02fF
+C1132 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
+C1133 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
+C1134 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
+C1135 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
+C1136 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
+C1137 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
+C1138 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
+C1139 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
+C1140 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
+C1141 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
+C1142 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
+C1143 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
+C1144 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
+C1145 divider_0/tspc_0/Z2 divider_0/nor_0/B 0.20fF
+C1146 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
+C1147 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
+C1148 divbuf_1/OUT3 divbuf_1/OUT2 1.37fF
+C1149 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF
+C1150 divbuf_4/OUT4 divbuf_4/OUT 1.11fF
+C1151 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1152 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
+C1153 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
+C1154 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF
+C1155 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
+C1156 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
+C1157 divbuf_18/OUT3 divbuf_18/OUT4 5.16fF
+C1158 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
+C1159 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
+C1160 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
+C1161 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
+C1162 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
+C1163 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1164 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
+C1165 divbuf_5/OUT4 divbuf_5/OUT 1.11fF
+C1166 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
+C1167 divider_1/tspc_0/Z1 divider_1/nor_1/B 0.03fF
+C1168 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
+C1169 pd_0/tspc_r_0/Qbar1 pd_0/DIV 0.12fF
+C1170 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
+C1171 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
+C1172 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
+C1173 io_clamp_low[0] io_analog[4] 0.53fF
+C1174 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
+C1175 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF
+C1176 divbuf_19/OUT3 divbuf_19/OUT4 5.16fF
+C1177 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
+C1178 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
+C1179 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
+C1180 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C1181 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
+C1182 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
+C1183 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
+C1184 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
+C1185 divbuf_0/OUT divbuf_0/OUT2 0.06fF
+C1186 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
+C1187 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
+C1188 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
+C1189 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C1190 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
+C1191 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
+C1192 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
+C1193 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
+C1194 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF
+C1195 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C1196 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
+C1197 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
+C1198 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
+C1199 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
+C1200 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF
+C1201 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
+C1202 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1203 divbuf_16/OUT2 divbuf_16/OUT 0.06fF
+C1204 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
+C1205 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
+C1206 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
+C1207 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
+C1208 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
+C1209 pd_1/R pd_1/tspc_r_0/Z3 0.27fF
+C1210 divider_0/nor_0/B divider_0/tspc_1/Z1 0.03fF
+C1211 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
+C1212 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C1213 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
+C1214 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C1215 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C1216 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
+C1217 divbuf_21/OUT4 divbuf_21/OUT 1.11fF
+C1218 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
+C1219 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
+C1220 divider_2/prescaler_0/Out divider_2/clk 0.51fF
+C1221 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
+C1222 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
+C1223 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
+C1224 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
+C1225 divider_0/nor_0/B divider_0/tspc_1/Z2 0.30fF
+C1226 divider_1/mc2 divider_1/nor_0/A 0.04fF
+C1227 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF
+C1228 divbuf_3/IN divbuf_3/OUT5 0.00fF
+C1229 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1230 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C1231 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
+C1232 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Q 0.22fF
+C1233 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
+C1234 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C1235 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C1236 divider_1/nor_0/B divider_1/nor_1/B 0.47fF
+C1237 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
+C1238 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
+C1239 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
+C1240 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
+C1241 divbuf_16/OUT divbuf_16/OUT5 43.38fF
+C1242 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
+C1243 divbuf_23/OUT3 divbuf_23/OUT 0.26fF
+C1244 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
+C1245 divbuf_18/OUT5 divbuf_18/OUT4 20.26fF
+C1246 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
+C1247 divbuf_25/OUT3 divbuf_25/OUT 0.26fF
+C1248 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
+C1249 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
+C1250 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
+C1251 divider_2/tspc_0/Z4 divider_2/nor_1/B 0.22fF
+C1252 divbuf_3/OUT4 divbuf_3/OUT 1.11fF
+C1253 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
+C1254 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
+C1255 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
+C1256 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C1257 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C1258 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C1259 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
+C1260 divbuf_16/OUT3 divbuf_16/OUT 0.26fF
+C1261 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
+C1262 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF
+C1263 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C1264 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
+C1265 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
+C1266 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
+C1267 divider_0/tspc_0/Z1 divider_0/tspc_1/Q 0.01fF
+C1268 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C1269 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
+C1270 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
+C1271 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF
+C1272 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C1273 divider_1/tspc_0/Z2 divider_1/nor_0/B 0.20fF
+C1274 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF
+C1275 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
+C1276 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1277 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
+C1278 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
+C1279 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
+C1280 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
+C1281 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
+C1282 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
+C1283 divider_0/tspc_1/Z1 divider_0/tspc_2/Q 0.01fF
+C1284 divider_0/nor_0/B divider_0/tspc_1/a_630_n680# 0.35fF
+C1285 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
+C1286 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
+C1287 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C1288 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF
+C1289 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF
+C1290 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
+C1291 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
+C1292 filter_0/a_4216_n5230# filter_0/v 0.19fF
+C1293 pd_0/tspc_r_1/Z2 pd_0/R 0.21fF
+C1294 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
+C1295 pd_0/and_pd_0/Z1 pd_0/R 0.02fF
+C1296 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
+C1297 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF
+C1298 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF
+C1299 divbuf_1/OUT3 divbuf_1/OUT4 5.16fF
+C1300 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
+C1301 divbuf_25/OUT3 divbuf_25/OUT2 1.37fF
+C1302 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
+C1303 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
+C1304 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C1305 divider_1/mc2 divider_1/and_0/B 0.20fF
+C1306 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
+C1307 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
+C1308 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
+C1309 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
+C1310 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z3 0.38fF
+C1311 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
+C1312 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
+C1313 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
+C1314 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
+C1315 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
+C1316 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
+C1317 divbuf_2/OUT4 divbuf_2/OUT 1.11fF
+C1318 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
+C1319 divbuf_0/a_492_n240# divbuf_0/OUT5 0.01fF
+C1320 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF
+C1321 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF
+C1322 divider_0/nor_0/B divider_0/and_0/B 0.31fF
+C1323 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
+C1324 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
+C1325 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
+C1326 divider_2/tspc_0/Z4 divider_2/tspc_0/Z1 0.00fF
+C1327 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
+C1328 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
+C1329 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
+C1330 divbuf_20/IN divbuf_20/OUT5 0.00fF
+C1331 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
+C1332 divider_2/tspc_0/Z3 divider_2/nor_1/B 0.38fF
+C1333 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
+C1334 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
+C1335 divbuf_1/a_492_n240# divbuf_1/OUT2 0.42fF
+C1336 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF
+C1337 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
+C1338 divbuf_18/OUT divbuf_18/a_492_n240# 0.00fF
+C1339 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
+C1340 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
+C1341 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF
+C1342 divider_0/nor_0/B divider_0/tspc_1/Q 0.51fF
+C1343 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
+C1344 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
+C1345 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C1346 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1347 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
+C1348 divider_0/and_0/OUT divider_0/clk 0.04fF
+C1349 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF
+C1350 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
+C1351 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_630_n680# 0.04fF
+C1352 divider_1/nor_0/B divider_1/tspc_1/Z1 0.03fF
+C1353 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C1354 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF
+C1355 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF
+C1356 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
+C1357 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
+C1358 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
+C1359 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1360 pd_0/tspc_r_1/Qbar pd_0/UP 0.21fF
+C1361 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
+C1362 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
+C1363 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
+C1364 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
+C1365 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
+C1366 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1367 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
+C1368 divider_0/nor_0/A divider_0/and_0/A 0.01fF
+C1369 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
+C1370 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
+C1371 divider_1/nor_0/B divider_1/tspc_1/Z2 0.30fF
+C1372 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C1373 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C1374 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
+C1375 ro_complete_1/a5 ro_complete_1/cbank_0/switch_0/vin 0.09fF
+C1376 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1377 cp_0/upbar cp_0/down 0.02fF
+C1378 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
+C1379 divbuf_16/OUT divbuf_16/OUT4 1.11fF
+C1380 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
+C1381 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
+C1382 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
+C1383 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
+C1384 divbuf_23/OUT5 divbuf_23/OUT 43.38fF
+C1385 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
+C1386 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
+C1387 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
+C1388 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
+C1389 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
+C1390 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
+C1391 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
+C1392 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
+C1393 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1394 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
+C1395 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
+C1396 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
+C1397 divbuf_19/OUT2 divbuf_19/OUT5 0.02fF
+C1398 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
+C1399 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
+C1400 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF
+C1401 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
+C1402 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1403 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1404 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C1405 pd_0/tspc_r_1/Z2 pd_0/REF 0.19fF
+C1406 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
+C1407 divbuf_22/IN divbuf_22/OUT5 0.00fF
+C1408 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
+C1409 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
+C1410 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C1411 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF
+C1412 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
+C1413 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
+C1414 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
+C1415 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF
+C1416 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
+C1417 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
+C1418 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF
+C1419 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
+C1420 divider_2/tspc_0/Z3 divider_2/tspc_0/Z1 0.06fF
+C1421 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
+C1422 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/Out 0.21fF
+C1423 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C1424 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C1425 divbuf_25/IN divbuf_25/OUT5 0.00fF
+C1426 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
+C1427 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
+C1428 divbuf_1/OUT3 divbuf_1/OUT 0.26fF
+C1429 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1430 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C1431 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
+C1432 divider_1/tspc_1/Z1 divider_1/tspc_2/Q 0.01fF
+C1433 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.35fF
+C1434 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
+C1435 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
+C1436 divider_2/mc2 divider_2/and_0/out1 0.06fF
+C1437 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
+C1438 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
+C1439 divbuf_15/OUT5 divbuf_15/OUT 43.38fF
+C1440 divider_0/mc2 divider_0/and_0/out1 0.06fF
+C1441 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
+C1442 divider_2/tspc_0/Z4 divider_2/tspc_0/Z3 0.65fF
+C1443 divider_0/and_0/A divider_0/and_0/B 0.18fF
+C1444 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
+C1445 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
+C1446 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1447 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
+C1448 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
+C1449 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
+C1450 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
+C1451 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
+C1452 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C1453 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
+C1454 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
+C1455 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
+C1456 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
+C1457 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
+C1458 divbuf_17/OUT5 divbuf_17/OUT 43.38fF
+C1459 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
+C1460 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
+C1461 divider_2/nor_1/B divider_2/and_0/B 0.29fF
+C1462 divbuf_9/IN divbuf_9/OUT5 0.00fF
+C1463 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
+C1464 divider_0/mc2 divider_0/nor_0/B 0.06fF
+C1465 divbuf_0/a_492_n240# divbuf_0/OUT 0.00fF
+C1466 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
+C1467 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1468 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
+C1469 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
+C1470 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
+C1471 divbuf_20/OUT2 divbuf_20/OUT 0.06fF
+C1472 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
+C1473 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1474 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
+C1475 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
+C1476 divider_1/nor_0/B divider_1/and_0/B 0.31fF
+C1477 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
+C1478 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
+C1479 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
+C1480 divbuf_0/OUT divbuf_0/OUT3 0.26fF
+C1481 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
+C1482 divider_2/tspc_0/a_630_n680# divider_2/nor_1/B 0.35fF
+C1483 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
+C1484 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
+C1485 pd_1/DOWN pd_1/R 0.36fF
+C1486 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
+C1487 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
+C1488 pd_1/DOWN pd_1/UP 0.46fF
+C1489 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF
+C1490 pd_0/DOWN pd_0/R 0.36fF
+C1491 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
+C1492 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
+C1493 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
+C1494 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C1495 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
+C1496 divbuf_17/IN divbuf_17/a_492_n240# 0.13fF
+C1497 divider_1/mc2 divider_1/and_0/OUT 0.05fF
+C1498 divbuf_14/OUT divbuf_14/OUT4 1.11fF
+C1499 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
+C1500 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
+C1501 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
+C1502 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF
+C1503 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
+C1504 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
+C1505 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
+C1506 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C1507 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
+C1508 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
+C1509 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
+C1510 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
+C1511 divider_1/and_0/OUT divider_1/clk 0.04fF
+C1512 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
+C1513 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
+C1514 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
+C1515 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
+C1516 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
+C1517 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
+C1518 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
+C1519 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
+C1520 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
+C1521 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF
+C1522 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
+C1523 divbuf_14/OUT2 divbuf_14/OUT 0.06fF
+C1524 divider_0/tspc_1/Q divider_0/tspc_1/Z3 0.05fF
+C1525 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
+C1526 divider_0/Out divider_0/nor_1/B 0.22fF
+C1527 divbuf_16/a_492_n240# divbuf_16/OUT 0.00fF
+C1528 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
+C1529 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
+C1530 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
+C1531 divbuf_6/OUT3 divbuf_6/OUT 0.26fF
+C1532 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
+C1533 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
+C1534 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C1535 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
+C1536 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_0/vin 0.19fF
+C1537 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
+C1538 divider_1/nor_0/A divider_1/and_0/A 0.01fF
+C1539 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
+C1540 divbuf_19/OUT divbuf_19/OUT3 0.26fF
+C1541 divbuf_19/OUT5 divbuf_19/OUT4 20.26fF
+C1542 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
+C1543 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
+C1544 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
+C1545 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF
+C1546 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
+C1547 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1548 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
+C1549 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
+C1550 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
+C1551 divbuf_17/IN divbuf_17/OUT5 0.00fF
+C1552 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
+C1553 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
+C1554 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
+C1555 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
+C1556 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
+C1557 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
+C1558 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
+C1559 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1560 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1561 divbuf_22/OUT2 divbuf_22/OUT 0.06fF
+C1562 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
+C1563 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
+C1564 divider_2/mc2 divider_2/nor_0/B 0.06fF
+C1565 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
+C1566 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
+C1567 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
+C1568 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
+C1569 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C1570 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF
+C1571 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
+C1572 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1573 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
+C1574 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
+C1575 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
+C1576 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C1577 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
+C1578 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C1579 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
+C1580 divbuf_18/OUT3 divbuf_18/OUT 0.26fF
+C1581 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
+C1582 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF
+C1583 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
+C1584 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
+C1585 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
+C1586 divider_0/nor_0/B divider_0/tspc_0/Z4 0.02fF
+C1587 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C1588 divbuf_1/OUT4 divbuf_1/OUT 1.11fF
+C1589 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
+C1590 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
+C1591 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
+C1592 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
+C1593 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
+C1594 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1595 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C1596 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
+C1597 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
+C1598 divbuf_7/OUT3 divbuf_7/OUT 0.26fF
+C1599 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
+C1600 filter_0/v filter_0/a_4216_n2998# 0.31fF
+C1601 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
+C1602 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF
+C1603 divider_2/mc2 divider_2/and_0/A 0.16fF
+C1604 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
+C1605 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1606 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
+C1607 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF
+C1608 divider_0/mc2 divider_0/and_0/A 0.16fF
+C1609 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
+C1610 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C1611 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
+C1612 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
+C1613 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF
+C1614 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
+C1615 pd_0/tspc_r_1/Qbar1 pd_0/R 0.30fF
+C1616 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
+C1617 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1618 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
+C1619 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF
+C1620 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF
+C1621 divider_1/and_0/A divider_1/and_0/B 0.18fF
+C1622 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
+C1623 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
+C1624 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
+C1625 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
+C1626 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
+C1627 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
+C1628 divider_2/nor_0/B divider_2/and_0/A 0.26fF
+C1629 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
+C1630 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
+C1631 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
+C1632 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
+C1633 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
+C1634 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
+C1635 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1636 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
+C1637 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
+C1638 divbuf_20/OUT4 divbuf_20/OUT 1.11fF
+C1639 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
+C1640 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
+C1641 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1642 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
+C1643 divbuf_1/OUT5 divbuf_1/OUT2 0.02fF
+C1644 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
+C1645 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
+C1646 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
+C1647 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
+C1648 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
+C1649 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
+C1650 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
+C1651 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
+C1652 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
+C1653 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
+C1654 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
 Xpd_0 vssa1 vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd
 Xpd_1 VDD vssa1 pd_1/REF pd_1/DIV pd_1/UP pd_1/DOWN pd_1/R pd
 Xcp_0 cp_0/vbias vdda1 gnd cp_0/out cp_0/down cp_0/upbar cp
 Xfilter_0 vssa1 filter_0/v filter
 Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4
 + ro_complete_0/a3 ro_complete_0/a2 ro_complete
-Xdivbuf_0 vdd divbuf_0/IN divbuf_0/OUT divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4 divbuf_0/OUT5
-+ gnd divbuf
+Xdivbuf_0 vdda1 divbuf_0/IN divbuf_0/OUT divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4
++ divbuf_0/OUT5 gnd divbuf
 Xro_complete_1 ro_complete_1/a0 ro_complete_1/a1 ro_complete_1/a5 ro_complete_1/a4
 + ro_complete_1/a3 ro_complete_1/a2 ro_complete
-Xdivbuf_1 vdd divbuf_1/IN divbuf_1/OUT divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4 divbuf_1/OUT5
-+ gnd divbuf
-Xdivbuf_2 vdd divbuf_2/IN divbuf_2/OUT divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4 divbuf_2/OUT5
-+ gnd divbuf
-Xdivbuf_3 vdd divbuf_3/IN divbuf_3/OUT divbuf_3/OUT2 divbuf_3/OUT3 divbuf_3/OUT4 divbuf_3/OUT5
-+ gnd divbuf
-Xdivbuf_4 vdd divbuf_4/IN divbuf_4/OUT divbuf_4/OUT2 divbuf_4/OUT3 divbuf_4/OUT4 divbuf_4/OUT5
-+ gnd divbuf
-Xdivbuf_5 vdd divbuf_5/IN divbuf_5/OUT divbuf_5/OUT2 divbuf_5/OUT3 divbuf_5/OUT4 divbuf_5/OUT5
-+ gnd divbuf
-Xdivbuf_6 vdd divbuf_6/IN divbuf_6/OUT divbuf_6/OUT2 divbuf_6/OUT3 divbuf_6/OUT4 divbuf_6/OUT5
-+ gnd divbuf
+Xdivbuf_1 vdda1 divbuf_1/IN divbuf_1/OUT divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4
++ divbuf_1/OUT5 gnd divbuf
+Xdivbuf_2 vdda1 divbuf_2/IN divbuf_2/OUT divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4
++ divbuf_2/OUT5 gnd divbuf
+Xdivbuf_3 vdda1 divbuf_3/IN divbuf_3/OUT divbuf_3/OUT2 divbuf_3/OUT3 divbuf_3/OUT4
++ divbuf_3/OUT5 gnd divbuf
+Xdivbuf_4 vdda1 divbuf_4/IN divbuf_4/OUT divbuf_4/OUT2 divbuf_4/OUT3 divbuf_4/OUT4
++ divbuf_4/OUT5 gnd divbuf
+Xdivbuf_5 vdda1 divbuf_5/IN divbuf_5/OUT divbuf_5/OUT2 divbuf_5/OUT3 divbuf_5/OUT4
++ divbuf_5/OUT5 gnd divbuf
+Xdivbuf_6 vdda1 divbuf_6/IN divbuf_6/OUT divbuf_6/OUT2 divbuf_6/OUT3 divbuf_6/OUT4
++ divbuf_6/OUT5 gnd divbuf
 Xdivbuf_10 vdda1 divbuf_10/IN divbuf_10/OUT divbuf_10/OUT2 divbuf_10/OUT3 divbuf_10/OUT4
 + divbuf_10/OUT5 gnd divbuf
 Xdivbuf_20 vssa1 divbuf_20/IN divbuf_20/OUT divbuf_20/OUT2 divbuf_20/OUT3 divbuf_20/OUT4
 + divbuf_20/OUT5 vssa1 divbuf
 Xdivbuf_21 vssa1 divbuf_21/IN divbuf_21/OUT divbuf_21/OUT2 divbuf_21/OUT3 divbuf_21/OUT4
 + divbuf_21/OUT5 vssa1 divbuf
-Xdivbuf_7 vdd divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4 divbuf_7/OUT5
-+ gnd divbuf
+Xdivbuf_7 vdda1 divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4
++ divbuf_7/OUT5 gnd divbuf
 Xdivbuf_11 vdda1 divbuf_11/IN divbuf_11/OUT divbuf_11/OUT2 divbuf_11/OUT3 divbuf_11/OUT4
 + divbuf_11/OUT5 gnd divbuf
 Xdivbuf_22 vssa1 divbuf_22/IN divbuf_22/OUT divbuf_22/OUT2 divbuf_22/OUT3 divbuf_22/OUT4
@@ -1824,1250 +1824,1250 @@
 + divbuf_18/OUT5 vssa1 divbuf
 Xdivbuf_19 vssa1 divbuf_19/IN divbuf_19/OUT divbuf_19/OUT2 divbuf_19/OUT3 divbuf_19/OUT4
 + divbuf_19/OUT5 vssa1 divbuf
-Xpll_full_0 vdd pll_full
-C1655 io_analog[4] vdda1 43.96fF
-C1656 io_analog[5] vdda1 44.13fF
-C1657 io_analog[6] vdda1 43.46fF
-C1658 io_in_3v3[0] vdda1 0.61fF
-C1659 io_oeb[26] vdda1 0.61fF
-C1660 io_in[0] vdda1 0.61fF
-C1661 io_out[26] vdda1 0.61fF
-C1662 io_out[0] vdda1 0.61fF
-C1663 io_in[26] vdda1 0.61fF
-C1664 io_oeb[0] vdda1 0.61fF
-C1665 io_in_3v3[26] vdda1 0.61fF
-C1666 io_in_3v3[1] vdda1 0.61fF
-C1667 io_oeb[25] vdda1 0.61fF
-C1668 io_in[1] vdda1 0.61fF
-C1669 io_out[25] vdda1 0.61fF
-C1670 io_out[1] vdda1 0.61fF
-C1671 io_in[25] vdda1 0.61fF
-C1672 io_oeb[1] vdda1 0.61fF
-C1673 io_in_3v3[25] vdda1 0.61fF
-C1674 io_in_3v3[2] vdda1 0.61fF
-C1675 io_oeb[24] vdda1 0.61fF
-C1676 io_in[2] vdda1 0.61fF
-C1677 io_out[24] vdda1 0.61fF
-C1678 io_out[2] vdda1 0.61fF
-C1679 io_in[24] vdda1 0.61fF
-C1680 io_oeb[2] vdda1 0.61fF
-C1681 io_in_3v3[24] vdda1 0.61fF
-C1682 io_in_3v3[3] vdda1 0.61fF
-C1683 gpio_noesd[17] vdda1 2.32fF
-C1684 io_in[3] vdda1 0.61fF
-C1685 gpio_analog[17] vdda1 2.30fF
-C1686 io_out[3] vdda1 0.61fF
-C1687 io_oeb[3] vdda1 0.61fF
-C1688 io_in_3v3[4] vdda1 0.61fF
-C1689 io_in[4] vdda1 0.61fF
-C1690 io_out[4] vdda1 0.61fF
-C1691 io_oeb[4] vdda1 0.61fF
-C1692 io_oeb[23] vdda1 0.61fF
-C1693 io_out[23] vdda1 0.61fF
-C1694 io_in[23] vdda1 0.61fF
-C1695 io_in_3v3[23] vdda1 0.61fF
-C1696 gpio_noesd[16] vdda1 2.30fF
-C1697 gpio_analog[16] vdda1 2.30fF
-C1698 io_in_3v3[5] vdda1 0.61fF
-C1699 io_in[5] vdda1 0.61fF
-C1700 io_out[5] vdda1 0.61fF
-C1701 io_oeb[5] vdda1 0.61fF
-C1702 io_oeb[22] vdda1 0.61fF
-C1703 io_out[22] vdda1 0.61fF
-C1704 io_in[22] vdda1 0.61fF
-C1705 io_in_3v3[22] vdda1 0.61fF
-C1706 gpio_noesd[15] vdda1 2.31fF
-C1707 gpio_analog[15] vdda1 2.30fF
-C1708 io_in_3v3[6] vdda1 0.61fF
-C1709 io_in[6] vdda1 0.61fF
-C1710 io_out[6] vdda1 0.61fF
-C1711 io_oeb[6] vdda1 0.61fF
-C1712 io_oeb[21] vdda1 0.61fF
-C1713 io_out[21] vdda1 0.61fF
-C1714 io_in[21] vdda1 0.61fF
-C1715 io_in_3v3[21] vdda1 0.61fF
-C1716 gpio_noesd[14] vdda1 2.30fF
-C1717 gpio_analog[14] vdda1 2.29fF
-C1718 vssd2 vdda1 38.54fF
-C1719 vssd1 vdda1 13.04fF
-C1720 vdda2 vdda1 38.30fF
-C1721 io_oeb[20] vdda1 0.61fF
-C1722 io_out[20] vdda1 0.61fF
-C1723 io_in[20] vdda1 0.61fF
-C1724 io_in_3v3[20] vdda1 0.61fF
-C1725 gpio_noesd[13] vdda1 2.31fF
-C1726 gpio_analog[13] vdda1 2.30fF
-C1727 gpio_analog[0] vdda1 0.61fF
-C1728 gpio_noesd[0] vdda1 0.61fF
-C1729 io_in_3v3[7] vdda1 0.61fF
-C1730 io_in[7] vdda1 0.61fF
-C1731 io_out[7] vdda1 0.61fF
-C1732 io_oeb[7] vdda1 0.61fF
-C1733 io_oeb[19] vdda1 0.61fF
-C1734 io_out[19] vdda1 0.61fF
-C1735 io_in[19] vdda1 0.61fF
-C1736 io_in_3v3[19] vdda1 0.61fF
-C1737 gpio_noesd[12] vdda1 2.32fF
-C1738 gpio_analog[12] vdda1 2.30fF
-C1739 gpio_analog[1] vdda1 0.61fF
-C1740 gpio_noesd[1] vdda1 0.61fF
-C1741 io_in_3v3[8] vdda1 0.61fF
-C1742 io_in[8] vdda1 0.61fF
-C1743 io_out[8] vdda1 0.61fF
-C1744 io_oeb[8] vdda1 0.61fF
-C1745 io_oeb[18] vdda1 0.61fF
-C1746 io_out[18] vdda1 0.61fF
-C1747 io_in[18] vdda1 0.61fF
-C1748 io_in_3v3[18] vdda1 0.61fF
-C1749 gpio_noesd[11] vdda1 2.30fF
-C1750 gpio_analog[11] vdda1 2.29fF
-C1751 gpio_analog[2] vdda1 0.61fF
-C1752 gpio_noesd[2] vdda1 0.61fF
-C1753 io_in_3v3[9] vdda1 0.61fF
-C1754 io_in[9] vdda1 0.61fF
-C1755 io_out[9] vdda1 0.61fF
-C1756 io_oeb[9] vdda1 0.61fF
-C1757 io_oeb[17] vdda1 0.61fF
-C1758 io_out[17] vdda1 0.61fF
-C1759 io_in[17] vdda1 0.61fF
-C1760 io_in_3v3[17] vdda1 0.61fF
-C1761 gpio_noesd[10] vdda1 2.31fF
-C1762 gpio_analog[10] vdda1 2.29fF
-C1763 gpio_analog[3] vdda1 0.61fF
-C1764 gpio_noesd[3] vdda1 0.61fF
-C1765 io_in_3v3[10] vdda1 0.61fF
-C1766 io_in[10] vdda1 0.61fF
-C1767 io_out[10] vdda1 0.61fF
-C1768 io_oeb[10] vdda1 0.61fF
-C1769 io_oeb[16] vdda1 0.61fF
-C1770 io_out[16] vdda1 0.61fF
-C1771 io_in[16] vdda1 0.61fF
-C1772 io_in_3v3[16] vdda1 0.61fF
-C1773 gpio_noesd[9] vdda1 2.28fF
-C1774 gpio_analog[9] vdda1 2.28fF
-C1775 gpio_analog[4] vdda1 0.61fF
-C1776 gpio_noesd[4] vdda1 0.61fF
-C1777 io_in_3v3[11] vdda1 0.61fF
-C1778 io_in[11] vdda1 0.61fF
-C1779 io_out[11] vdda1 0.61fF
-C1780 io_oeb[11] vdda1 0.61fF
-C1781 io_oeb[15] vdda1 0.61fF
-C1782 io_out[15] vdda1 0.61fF
-C1783 io_in[15] vdda1 0.61fF
-C1784 io_in_3v3[15] vdda1 0.61fF
-C1785 gpio_noesd[8] vdda1 2.28fF
-C1786 gpio_analog[8] vdda1 2.26fF
-C1787 gpio_analog[5] vdda1 0.61fF
-C1788 gpio_noesd[5] vdda1 0.61fF
-C1789 io_in_3v3[12] vdda1 0.61fF
-C1790 io_in[12] vdda1 0.61fF
-C1791 io_out[12] vdda1 0.61fF
-C1792 io_oeb[12] vdda1 0.61fF
-C1793 io_oeb[14] vdda1 0.61fF
-C1794 io_out[14] vdda1 0.61fF
-C1795 io_in[14] vdda1 0.61fF
-C1796 io_in_3v3[14] vdda1 0.61fF
-C1797 gpio_noesd[7] vdda1 2.30fF
-C1798 gpio_analog[7] vdda1 2.28fF
-C1799 vssa2 vdda1 38.35fF
-C1800 gpio_analog[6] vdda1 5.71fF
-C1801 gpio_noesd[6] vdda1 5.70fF
-C1802 io_in_3v3[13] vdda1 0.61fF
-C1803 io_in[13] vdda1 0.61fF
-C1804 io_out[13] vdda1 0.61fF
-C1805 io_oeb[13] vdda1 0.61fF
-C1806 vccd1 vdda1 39.84fF
-C1807 vccd2 vdda1 38.46fF
-C1808 io_analog[0] vdda1 19.99fF
-C1809 io_analog[10] vdda1 19.36fF
-C1810 io_analog[1] vdda1 13.17fF
-C1811 io_analog[2] vdda1 12.57fF
-C1812 io_analog[3] vdda1 12.83fF
-C1813 io_clamp_high[0] vdda1 3.58fF
-C1814 io_clamp_low[0] vdda1 3.58fF
-C1815 io_clamp_high[1] vdda1 3.58fF
-C1816 io_clamp_low[1] vdda1 3.58fF
-C1817 io_clamp_high[2] vdda1 3.58fF
-C1818 io_clamp_low[2] vdda1 3.58fF
-C1819 io_analog[7] vdda1 12.74fF
-C1820 io_analog[8] vdda1 13.08fF
-C1821 io_analog[9] vdda1 13.08fF
-C1822 user_irq[2] vdda1 0.63fF
-C1823 user_irq[1] vdda1 0.63fF
-C1824 user_irq[0] vdda1 0.63fF
-C1825 user_clock2 vdda1 0.63fF
-C1826 la_oenb[127] vdda1 0.63fF
-C1827 la_data_out[127] vdda1 0.63fF
-C1828 la_data_in[127] vdda1 0.63fF
-C1829 la_oenb[126] vdda1 0.63fF
-C1830 la_data_out[126] vdda1 0.63fF
-C1831 la_data_in[126] vdda1 0.63fF
-C1832 la_oenb[125] vdda1 0.63fF
-C1833 la_data_out[125] vdda1 0.63fF
-C1834 la_data_in[125] vdda1 0.63fF
-C1835 la_oenb[124] vdda1 0.63fF
-C1836 la_data_out[124] vdda1 0.63fF
-C1837 la_data_in[124] vdda1 0.63fF
-C1838 la_oenb[123] vdda1 0.63fF
-C1839 la_data_out[123] vdda1 0.63fF
-C1840 la_data_in[123] vdda1 0.63fF
-C1841 la_oenb[122] vdda1 0.63fF
-C1842 la_data_out[122] vdda1 0.63fF
-C1843 la_data_in[122] vdda1 0.63fF
-C1844 la_oenb[121] vdda1 0.63fF
-C1845 la_data_out[121] vdda1 0.63fF
-C1846 la_data_in[121] vdda1 0.63fF
-C1847 la_oenb[120] vdda1 0.63fF
-C1848 la_data_out[120] vdda1 0.63fF
-C1849 la_data_in[120] vdda1 0.63fF
-C1850 la_oenb[119] vdda1 0.63fF
-C1851 la_data_out[119] vdda1 0.63fF
-C1852 la_data_in[119] vdda1 0.63fF
-C1853 la_oenb[118] vdda1 0.63fF
-C1854 la_data_out[118] vdda1 0.63fF
-C1855 la_data_in[118] vdda1 0.63fF
-C1856 la_oenb[117] vdda1 0.63fF
-C1857 la_data_out[117] vdda1 0.63fF
-C1858 la_data_in[117] vdda1 0.63fF
-C1859 la_oenb[116] vdda1 0.63fF
-C1860 la_data_out[116] vdda1 0.63fF
-C1861 la_data_in[116] vdda1 0.63fF
-C1862 la_oenb[115] vdda1 0.63fF
-C1863 la_data_out[115] vdda1 0.63fF
-C1864 la_data_in[115] vdda1 0.63fF
-C1865 la_oenb[114] vdda1 0.63fF
-C1866 la_data_out[114] vdda1 0.63fF
-C1867 la_data_in[114] vdda1 0.63fF
-C1868 la_oenb[113] vdda1 0.63fF
-C1869 la_data_out[113] vdda1 0.63fF
-C1870 la_data_in[113] vdda1 0.63fF
-C1871 la_oenb[112] vdda1 0.63fF
-C1872 la_data_out[112] vdda1 0.63fF
-C1873 la_data_in[112] vdda1 0.63fF
-C1874 la_oenb[111] vdda1 0.63fF
-C1875 la_data_out[111] vdda1 0.63fF
-C1876 la_data_in[111] vdda1 0.63fF
-C1877 la_oenb[110] vdda1 0.63fF
-C1878 la_data_out[110] vdda1 0.63fF
-C1879 la_data_in[110] vdda1 0.63fF
-C1880 la_oenb[109] vdda1 0.63fF
-C1881 la_data_out[109] vdda1 0.63fF
-C1882 la_data_in[109] vdda1 0.63fF
-C1883 la_oenb[108] vdda1 0.63fF
-C1884 la_data_out[108] vdda1 0.63fF
-C1885 la_data_in[108] vdda1 0.63fF
-C1886 la_oenb[107] vdda1 0.63fF
-C1887 la_data_out[107] vdda1 0.63fF
-C1888 la_data_in[107] vdda1 0.63fF
-C1889 la_oenb[106] vdda1 0.63fF
-C1890 la_data_out[106] vdda1 0.63fF
-C1891 la_data_in[106] vdda1 0.63fF
-C1892 la_oenb[105] vdda1 0.63fF
-C1893 la_data_out[105] vdda1 0.63fF
-C1894 la_data_in[105] vdda1 0.63fF
-C1895 la_oenb[104] vdda1 0.63fF
-C1896 la_data_out[104] vdda1 0.63fF
-C1897 la_data_in[104] vdda1 0.63fF
-C1898 la_oenb[103] vdda1 0.63fF
-C1899 la_data_out[103] vdda1 0.63fF
-C1900 la_data_in[103] vdda1 0.63fF
-C1901 la_oenb[102] vdda1 0.63fF
-C1902 la_data_out[102] vdda1 0.63fF
-C1903 la_data_in[102] vdda1 0.63fF
-C1904 la_oenb[101] vdda1 0.63fF
-C1905 la_data_out[101] vdda1 0.63fF
-C1906 la_data_in[101] vdda1 0.63fF
-C1907 la_oenb[100] vdda1 0.63fF
-C1908 la_data_out[100] vdda1 0.63fF
-C1909 la_data_in[100] vdda1 0.63fF
-C1910 la_oenb[99] vdda1 0.63fF
-C1911 la_data_out[99] vdda1 0.63fF
-C1912 la_data_in[99] vdda1 0.63fF
-C1913 la_oenb[98] vdda1 0.63fF
-C1914 la_data_out[98] vdda1 0.63fF
-C1915 la_data_in[98] vdda1 0.63fF
-C1916 la_oenb[97] vdda1 0.63fF
-C1917 la_data_out[97] vdda1 0.63fF
-C1918 la_data_in[97] vdda1 0.63fF
-C1919 la_oenb[96] vdda1 0.63fF
-C1920 la_data_out[96] vdda1 0.63fF
-C1921 la_data_in[96] vdda1 0.63fF
-C1922 la_oenb[95] vdda1 0.63fF
-C1923 la_data_out[95] vdda1 0.63fF
-C1924 la_data_in[95] vdda1 0.63fF
-C1925 la_oenb[94] vdda1 0.63fF
-C1926 la_data_out[94] vdda1 0.63fF
-C1927 la_data_in[94] vdda1 0.63fF
-C1928 la_oenb[93] vdda1 0.63fF
-C1929 la_data_out[93] vdda1 0.63fF
-C1930 la_data_in[93] vdda1 0.63fF
-C1931 la_oenb[92] vdda1 0.63fF
-C1932 la_data_out[92] vdda1 0.63fF
-C1933 la_data_in[92] vdda1 0.63fF
-C1934 la_oenb[91] vdda1 0.63fF
-C1935 la_data_out[91] vdda1 0.63fF
-C1936 la_data_in[91] vdda1 0.63fF
-C1937 la_oenb[90] vdda1 0.63fF
-C1938 la_data_out[90] vdda1 0.63fF
-C1939 la_data_in[90] vdda1 0.63fF
-C1940 la_oenb[89] vdda1 0.63fF
-C1941 la_data_out[89] vdda1 0.63fF
-C1942 la_data_in[89] vdda1 0.63fF
-C1943 la_oenb[88] vdda1 0.63fF
-C1944 la_data_out[88] vdda1 0.63fF
-C1945 la_data_in[88] vdda1 0.63fF
-C1946 la_oenb[87] vdda1 0.63fF
-C1947 la_data_out[87] vdda1 0.63fF
-C1948 la_data_in[87] vdda1 0.63fF
-C1949 la_oenb[86] vdda1 0.63fF
-C1950 la_data_out[86] vdda1 0.63fF
-C1951 la_data_in[86] vdda1 0.63fF
-C1952 la_oenb[85] vdda1 0.63fF
-C1953 la_data_out[85] vdda1 0.63fF
-C1954 la_data_in[85] vdda1 0.63fF
-C1955 la_oenb[84] vdda1 0.63fF
-C1956 la_data_out[84] vdda1 0.63fF
-C1957 la_data_in[84] vdda1 0.63fF
-C1958 la_oenb[83] vdda1 0.63fF
-C1959 la_data_out[83] vdda1 0.63fF
-C1960 la_data_in[83] vdda1 0.63fF
-C1961 la_oenb[82] vdda1 0.63fF
-C1962 la_data_out[82] vdda1 0.63fF
-C1963 la_data_in[82] vdda1 0.63fF
-C1964 la_oenb[81] vdda1 0.63fF
-C1965 la_data_out[81] vdda1 0.63fF
-C1966 la_data_in[81] vdda1 0.63fF
-C1967 la_oenb[80] vdda1 0.63fF
-C1968 la_data_out[80] vdda1 0.63fF
-C1969 la_data_in[80] vdda1 0.63fF
-C1970 la_oenb[79] vdda1 0.63fF
-C1971 la_data_out[79] vdda1 0.63fF
-C1972 la_data_in[79] vdda1 0.63fF
-C1973 la_oenb[78] vdda1 0.63fF
-C1974 la_data_out[78] vdda1 0.63fF
-C1975 la_data_in[78] vdda1 0.63fF
-C1976 la_oenb[77] vdda1 0.63fF
-C1977 la_data_out[77] vdda1 0.63fF
-C1978 la_data_in[77] vdda1 0.63fF
-C1979 la_oenb[76] vdda1 0.63fF
-C1980 la_data_out[76] vdda1 0.63fF
-C1981 la_data_in[76] vdda1 0.63fF
-C1982 la_oenb[75] vdda1 0.63fF
-C1983 la_data_out[75] vdda1 0.63fF
-C1984 la_data_in[75] vdda1 0.63fF
-C1985 la_oenb[74] vdda1 0.63fF
-C1986 la_data_out[74] vdda1 0.63fF
-C1987 la_data_in[74] vdda1 0.63fF
-C1988 la_oenb[73] vdda1 0.63fF
-C1989 la_data_out[73] vdda1 0.63fF
-C1990 la_data_in[73] vdda1 0.63fF
-C1991 la_oenb[72] vdda1 0.63fF
-C1992 la_data_out[72] vdda1 0.63fF
-C1993 la_data_in[72] vdda1 0.63fF
-C1994 la_oenb[71] vdda1 0.63fF
-C1995 la_data_out[71] vdda1 0.63fF
-C1996 la_data_in[71] vdda1 0.63fF
-C1997 la_oenb[70] vdda1 0.63fF
-C1998 la_data_out[70] vdda1 0.63fF
-C1999 la_data_in[70] vdda1 0.63fF
-C2000 la_oenb[69] vdda1 0.63fF
-C2001 la_data_out[69] vdda1 0.63fF
-C2002 la_data_in[69] vdda1 0.63fF
-C2003 la_oenb[68] vdda1 0.63fF
-C2004 la_data_out[68] vdda1 0.63fF
-C2005 la_data_in[68] vdda1 0.63fF
-C2006 la_oenb[67] vdda1 0.63fF
-C2007 la_data_out[67] vdda1 0.63fF
-C2008 la_data_in[67] vdda1 0.63fF
-C2009 la_oenb[66] vdda1 0.63fF
-C2010 la_data_out[66] vdda1 0.63fF
-C2011 la_data_in[66] vdda1 0.63fF
-C2012 la_oenb[65] vdda1 0.63fF
-C2013 la_data_out[65] vdda1 0.63fF
-C2014 la_data_in[65] vdda1 0.63fF
-C2015 la_oenb[64] vdda1 0.63fF
-C2016 la_data_out[64] vdda1 0.63fF
-C2017 la_data_in[64] vdda1 0.63fF
-C2018 la_oenb[63] vdda1 0.63fF
-C2019 la_data_out[63] vdda1 0.63fF
-C2020 la_data_in[63] vdda1 0.63fF
-C2021 la_oenb[62] vdda1 0.63fF
-C2022 la_data_out[62] vdda1 0.63fF
-C2023 la_data_in[62] vdda1 0.63fF
-C2024 la_oenb[61] vdda1 0.63fF
-C2025 la_data_out[61] vdda1 0.63fF
-C2026 la_data_in[61] vdda1 0.63fF
-C2027 la_oenb[60] vdda1 0.63fF
-C2028 la_data_out[60] vdda1 0.63fF
-C2029 la_data_in[60] vdda1 0.63fF
-C2030 la_oenb[59] vdda1 0.63fF
-C2031 la_data_out[59] vdda1 0.63fF
-C2032 la_data_in[59] vdda1 0.63fF
-C2033 la_oenb[58] vdda1 0.63fF
-C2034 la_data_out[58] vdda1 0.63fF
-C2035 la_data_in[58] vdda1 0.63fF
-C2036 la_oenb[57] vdda1 0.63fF
-C2037 la_data_out[57] vdda1 0.63fF
-C2038 la_data_in[57] vdda1 0.63fF
-C2039 la_oenb[56] vdda1 0.63fF
-C2040 la_data_out[56] vdda1 0.63fF
-C2041 la_data_in[56] vdda1 0.63fF
-C2042 la_oenb[55] vdda1 0.63fF
-C2043 la_data_out[55] vdda1 0.63fF
-C2044 la_data_in[55] vdda1 0.63fF
-C2045 la_oenb[54] vdda1 0.63fF
-C2046 la_data_out[54] vdda1 0.63fF
-C2047 la_data_in[54] vdda1 0.63fF
-C2048 la_oenb[53] vdda1 0.63fF
-C2049 la_data_out[53] vdda1 0.63fF
-C2050 la_data_in[53] vdda1 0.63fF
-C2051 la_oenb[52] vdda1 0.63fF
-C2052 la_data_out[52] vdda1 0.63fF
-C2053 la_data_in[52] vdda1 0.63fF
-C2054 la_oenb[51] vdda1 0.63fF
-C2055 la_data_out[51] vdda1 0.63fF
-C2056 la_data_in[51] vdda1 0.63fF
-C2057 la_oenb[50] vdda1 0.63fF
-C2058 la_data_out[50] vdda1 0.63fF
-C2059 la_data_in[50] vdda1 0.63fF
-C2060 la_oenb[49] vdda1 0.63fF
-C2061 la_data_out[49] vdda1 0.63fF
-C2062 la_data_in[49] vdda1 0.63fF
-C2063 la_oenb[48] vdda1 0.63fF
-C2064 la_data_out[48] vdda1 0.63fF
-C2065 la_data_in[48] vdda1 0.63fF
-C2066 la_oenb[47] vdda1 0.63fF
-C2067 la_data_out[47] vdda1 0.63fF
-C2068 la_data_in[47] vdda1 0.63fF
-C2069 la_oenb[46] vdda1 0.63fF
-C2070 la_data_out[46] vdda1 0.63fF
-C2071 la_data_in[46] vdda1 0.63fF
-C2072 la_oenb[45] vdda1 0.63fF
-C2073 la_data_out[45] vdda1 0.63fF
-C2074 la_data_in[45] vdda1 0.63fF
-C2075 la_oenb[44] vdda1 0.63fF
-C2076 la_data_out[44] vdda1 0.63fF
-C2077 la_data_in[44] vdda1 0.63fF
-C2078 la_oenb[43] vdda1 0.63fF
-C2079 la_data_out[43] vdda1 0.63fF
-C2080 la_data_in[43] vdda1 0.63fF
-C2081 la_oenb[42] vdda1 0.63fF
-C2082 la_data_out[42] vdda1 0.63fF
-C2083 la_data_in[42] vdda1 0.63fF
-C2084 la_oenb[41] vdda1 0.63fF
-C2085 la_data_out[41] vdda1 0.63fF
-C2086 la_data_in[41] vdda1 0.63fF
-C2087 la_oenb[40] vdda1 0.63fF
-C2088 la_data_out[40] vdda1 0.63fF
-C2089 la_data_in[40] vdda1 0.63fF
-C2090 la_oenb[39] vdda1 0.63fF
-C2091 la_data_out[39] vdda1 0.63fF
-C2092 la_data_in[39] vdda1 0.63fF
-C2093 la_oenb[38] vdda1 0.63fF
-C2094 la_data_out[38] vdda1 0.63fF
-C2095 la_data_in[38] vdda1 0.63fF
-C2096 la_oenb[37] vdda1 0.63fF
-C2097 la_data_out[37] vdda1 0.63fF
-C2098 la_data_in[37] vdda1 0.63fF
-C2099 la_oenb[36] vdda1 0.63fF
-C2100 la_data_out[36] vdda1 0.63fF
-C2101 la_data_in[36] vdda1 0.63fF
-C2102 la_oenb[35] vdda1 0.63fF
-C2103 la_data_out[35] vdda1 0.63fF
-C2104 la_data_in[35] vdda1 0.63fF
-C2105 la_oenb[34] vdda1 0.63fF
-C2106 la_data_out[34] vdda1 0.63fF
-C2107 la_data_in[34] vdda1 0.63fF
-C2108 la_oenb[33] vdda1 0.63fF
-C2109 la_data_out[33] vdda1 0.63fF
-C2110 la_data_in[33] vdda1 0.63fF
-C2111 la_oenb[32] vdda1 0.63fF
-C2112 la_data_out[32] vdda1 0.63fF
-C2113 la_data_in[32] vdda1 0.63fF
-C2114 la_oenb[31] vdda1 0.63fF
-C2115 la_data_out[31] vdda1 0.63fF
-C2116 la_data_in[31] vdda1 0.63fF
-C2117 la_oenb[30] vdda1 0.63fF
-C2118 la_data_out[30] vdda1 0.63fF
-C2119 la_data_in[30] vdda1 0.63fF
-C2120 la_oenb[29] vdda1 0.63fF
-C2121 la_data_out[29] vdda1 0.63fF
-C2122 la_data_in[29] vdda1 0.63fF
-C2123 la_oenb[28] vdda1 0.63fF
-C2124 la_data_out[28] vdda1 0.63fF
-C2125 la_data_in[28] vdda1 0.63fF
-C2126 la_oenb[27] vdda1 0.63fF
-C2127 la_data_out[27] vdda1 0.63fF
-C2128 la_data_in[27] vdda1 0.63fF
-C2129 la_oenb[26] vdda1 0.63fF
-C2130 la_data_out[26] vdda1 0.63fF
-C2131 la_data_in[26] vdda1 0.63fF
-C2132 la_oenb[25] vdda1 0.63fF
-C2133 la_data_out[25] vdda1 0.63fF
-C2134 la_data_in[25] vdda1 0.63fF
-C2135 la_oenb[24] vdda1 0.63fF
-C2136 la_data_out[24] vdda1 0.63fF
-C2137 la_data_in[24] vdda1 0.63fF
-C2138 la_oenb[23] vdda1 0.63fF
-C2139 la_data_out[23] vdda1 0.63fF
-C2140 la_data_in[23] vdda1 0.63fF
-C2141 la_oenb[22] vdda1 0.63fF
-C2142 la_data_out[22] vdda1 0.63fF
-C2143 la_data_in[22] vdda1 0.63fF
-C2144 la_oenb[21] vdda1 0.63fF
-C2145 la_data_out[21] vdda1 0.63fF
-C2146 la_data_in[21] vdda1 0.63fF
-C2147 la_oenb[20] vdda1 0.63fF
-C2148 la_data_out[20] vdda1 0.63fF
-C2149 la_data_in[20] vdda1 0.63fF
-C2150 la_oenb[19] vdda1 0.63fF
-C2151 la_data_out[19] vdda1 0.63fF
-C2152 la_data_in[19] vdda1 0.63fF
-C2153 la_oenb[18] vdda1 0.63fF
-C2154 la_data_out[18] vdda1 0.63fF
-C2155 la_data_in[18] vdda1 0.63fF
-C2156 la_oenb[17] vdda1 0.63fF
-C2157 la_data_out[17] vdda1 0.63fF
-C2158 la_data_in[17] vdda1 0.63fF
-C2159 la_oenb[16] vdda1 0.63fF
-C2160 la_data_out[16] vdda1 0.63fF
-C2161 la_data_in[16] vdda1 0.63fF
-C2162 la_oenb[15] vdda1 0.63fF
-C2163 la_data_out[15] vdda1 0.63fF
-C2164 la_data_in[15] vdda1 0.63fF
-C2165 la_oenb[14] vdda1 0.63fF
-C2166 la_data_out[14] vdda1 0.63fF
-C2167 la_data_in[14] vdda1 0.63fF
-C2168 la_oenb[13] vdda1 0.63fF
-C2169 la_data_out[13] vdda1 0.63fF
-C2170 la_data_in[13] vdda1 0.63fF
-C2171 la_oenb[12] vdda1 0.63fF
-C2172 la_data_out[12] vdda1 0.63fF
-C2173 la_data_in[12] vdda1 0.63fF
-C2174 la_oenb[11] vdda1 0.63fF
-C2175 la_data_out[11] vdda1 0.63fF
-C2176 la_data_in[11] vdda1 0.63fF
-C2177 la_oenb[10] vdda1 0.63fF
-C2178 la_data_out[10] vdda1 0.63fF
-C2179 la_data_in[10] vdda1 0.63fF
-C2180 la_oenb[9] vdda1 0.63fF
-C2181 la_data_out[9] vdda1 0.63fF
-C2182 la_data_in[9] vdda1 0.63fF
-C2183 la_oenb[8] vdda1 0.63fF
-C2184 la_data_out[8] vdda1 0.63fF
-C2185 la_data_in[8] vdda1 0.63fF
-C2186 la_oenb[7] vdda1 0.63fF
-C2187 la_data_out[7] vdda1 0.63fF
-C2188 la_data_in[7] vdda1 0.63fF
-C2189 la_oenb[6] vdda1 0.63fF
-C2190 la_data_out[6] vdda1 0.63fF
-C2191 la_data_in[6] vdda1 0.63fF
-C2192 la_oenb[5] vdda1 0.63fF
-C2193 la_data_out[5] vdda1 0.63fF
-C2194 la_data_in[5] vdda1 0.63fF
-C2195 la_oenb[4] vdda1 0.63fF
-C2196 la_data_out[4] vdda1 0.63fF
-C2197 la_data_in[4] vdda1 0.63fF
-C2198 la_oenb[3] vdda1 0.63fF
-C2199 la_data_out[3] vdda1 0.63fF
-C2200 la_data_in[3] vdda1 0.63fF
-C2201 la_oenb[2] vdda1 0.63fF
-C2202 la_data_out[2] vdda1 0.63fF
-C2203 la_data_in[2] vdda1 0.63fF
-C2204 la_oenb[1] vdda1 0.63fF
-C2205 la_data_out[1] vdda1 0.63fF
-C2206 la_data_in[1] vdda1 0.63fF
-C2207 la_oenb[0] vdda1 0.63fF
-C2208 la_data_out[0] vdda1 0.63fF
-C2209 la_data_in[0] vdda1 0.63fF
-C2210 wbs_dat_o[31] vdda1 0.63fF
-C2211 wbs_dat_i[31] vdda1 0.63fF
-C2212 wbs_adr_i[31] vdda1 0.63fF
-C2213 wbs_dat_o[30] vdda1 0.63fF
-C2214 wbs_dat_i[30] vdda1 0.63fF
-C2215 wbs_adr_i[30] vdda1 0.63fF
-C2216 wbs_dat_o[29] vdda1 0.63fF
-C2217 wbs_dat_i[29] vdda1 0.63fF
-C2218 wbs_adr_i[29] vdda1 0.63fF
-C2219 wbs_dat_o[28] vdda1 0.63fF
-C2220 wbs_dat_i[28] vdda1 0.63fF
-C2221 wbs_adr_i[28] vdda1 0.63fF
-C2222 wbs_dat_o[27] vdda1 0.63fF
-C2223 wbs_dat_i[27] vdda1 0.63fF
-C2224 wbs_adr_i[27] vdda1 0.63fF
-C2225 wbs_dat_o[26] vdda1 0.63fF
-C2226 wbs_dat_i[26] vdda1 0.63fF
-C2227 wbs_adr_i[26] vdda1 0.63fF
-C2228 wbs_dat_o[25] vdda1 0.63fF
-C2229 wbs_dat_i[25] vdda1 0.63fF
-C2230 wbs_adr_i[25] vdda1 0.63fF
-C2231 wbs_dat_o[24] vdda1 0.63fF
-C2232 wbs_dat_i[24] vdda1 0.63fF
-C2233 wbs_adr_i[24] vdda1 0.63fF
-C2234 wbs_dat_o[23] vdda1 0.63fF
-C2235 wbs_dat_i[23] vdda1 0.63fF
-C2236 wbs_adr_i[23] vdda1 0.63fF
-C2237 wbs_dat_o[22] vdda1 0.63fF
-C2238 wbs_dat_i[22] vdda1 0.63fF
-C2239 wbs_adr_i[22] vdda1 0.63fF
-C2240 wbs_dat_o[21] vdda1 0.63fF
-C2241 wbs_dat_i[21] vdda1 0.63fF
-C2242 wbs_adr_i[21] vdda1 0.63fF
-C2243 wbs_dat_o[20] vdda1 0.63fF
-C2244 wbs_dat_i[20] vdda1 0.63fF
-C2245 wbs_adr_i[20] vdda1 0.63fF
-C2246 wbs_dat_o[19] vdda1 0.63fF
-C2247 wbs_dat_i[19] vdda1 0.63fF
-C2248 wbs_adr_i[19] vdda1 0.63fF
-C2249 wbs_dat_o[18] vdda1 0.63fF
-C2250 wbs_dat_i[18] vdda1 0.63fF
-C2251 wbs_adr_i[18] vdda1 0.63fF
-C2252 wbs_dat_o[17] vdda1 0.63fF
-C2253 wbs_dat_i[17] vdda1 0.63fF
-C2254 wbs_adr_i[17] vdda1 0.63fF
-C2255 wbs_dat_o[16] vdda1 0.63fF
-C2256 wbs_dat_i[16] vdda1 0.63fF
-C2257 wbs_adr_i[16] vdda1 0.63fF
-C2258 wbs_dat_o[15] vdda1 0.63fF
-C2259 wbs_dat_i[15] vdda1 0.63fF
-C2260 wbs_adr_i[15] vdda1 0.63fF
-C2261 wbs_dat_o[14] vdda1 0.63fF
-C2262 wbs_dat_i[14] vdda1 0.63fF
-C2263 wbs_adr_i[14] vdda1 0.63fF
-C2264 wbs_dat_o[13] vdda1 0.63fF
-C2265 wbs_dat_i[13] vdda1 0.63fF
-C2266 wbs_adr_i[13] vdda1 0.63fF
-C2267 wbs_dat_o[12] vdda1 0.63fF
-C2268 wbs_dat_i[12] vdda1 0.63fF
-C2269 wbs_adr_i[12] vdda1 0.63fF
-C2270 wbs_dat_o[11] vdda1 0.63fF
-C2271 wbs_dat_i[11] vdda1 0.63fF
-C2272 wbs_adr_i[11] vdda1 0.63fF
-C2273 wbs_dat_o[10] vdda1 0.63fF
-C2274 wbs_dat_i[10] vdda1 0.63fF
-C2275 wbs_adr_i[10] vdda1 0.63fF
-C2276 wbs_dat_o[9] vdda1 0.63fF
-C2277 wbs_dat_i[9] vdda1 0.63fF
-C2278 wbs_adr_i[9] vdda1 0.63fF
-C2279 wbs_dat_o[8] vdda1 0.63fF
-C2280 wbs_dat_i[8] vdda1 0.63fF
-C2281 wbs_adr_i[8] vdda1 0.63fF
-C2282 wbs_dat_o[7] vdda1 0.63fF
-C2283 wbs_dat_i[7] vdda1 0.63fF
-C2284 wbs_adr_i[7] vdda1 0.63fF
-C2285 wbs_dat_o[6] vdda1 0.63fF
-C2286 wbs_dat_i[6] vdda1 0.63fF
-C2287 wbs_adr_i[6] vdda1 0.63fF
-C2288 wbs_dat_o[5] vdda1 0.63fF
-C2289 wbs_dat_i[5] vdda1 0.63fF
-C2290 wbs_adr_i[5] vdda1 0.63fF
-C2291 wbs_dat_o[4] vdda1 0.63fF
-C2292 wbs_dat_i[4] vdda1 0.63fF
-C2293 wbs_adr_i[4] vdda1 0.63fF
-C2294 wbs_sel_i[3] vdda1 0.63fF
-C2295 wbs_dat_o[3] vdda1 0.63fF
-C2296 wbs_dat_i[3] vdda1 0.63fF
-C2297 wbs_adr_i[3] vdda1 0.63fF
-C2298 wbs_sel_i[2] vdda1 0.63fF
-C2299 wbs_dat_o[2] vdda1 0.63fF
-C2300 wbs_dat_i[2] vdda1 0.63fF
-C2301 wbs_adr_i[2] vdda1 0.63fF
-C2302 wbs_sel_i[1] vdda1 0.63fF
-C2303 wbs_dat_o[1] vdda1 0.63fF
-C2304 wbs_dat_i[1] vdda1 0.63fF
-C2305 wbs_adr_i[1] vdda1 0.63fF
-C2306 wbs_sel_i[0] vdda1 0.63fF
-C2307 wbs_dat_o[0] vdda1 0.63fF
-C2308 wbs_dat_i[0] vdda1 0.63fF
-C2309 wbs_adr_i[0] vdda1 0.63fF
-C2310 wbs_we_i vdda1 0.63fF
-C2311 wbs_stb_i vdda1 0.63fF
-C2312 wbs_cyc_i vdda1 0.63fF
-C2313 wbs_ack_o vdda1 0.63fF
-C2314 wb_rst_i vdda1 0.63fF
-C2315 wb_clk_i vdda1 0.63fF
-C2316 m2_494098_659718# vdda1 0.80fF **FLOATING
-C2317 pll_full_0/divider_0/and_0/Z1 vdda1 0.65fF
-C2318 pll_full_0/divider_0/and_0/B vdda1 2.45fF
-C2319 pll_full_0/divider_0/and_0/A vdda1 2.35fF
-C2320 pll_full_0/divider_0/and_0/out1 vdda1 2.99fF
-C2321 pll_full_0/divider_0/tspc_2/Z4 vdda1 0.86fF
-C2322 pll_full_0/divider_0/tspc_2/Z3 vdda1 2.26fF
-C2323 pll_full_0/divider_0/tspc_2/Z2 vdda1 1.46fF
-C2324 pll_full_0/divider_0/tspc_2/Z1 vdda1 0.99fF
-C2325 pll_full_0/divider_0/nor_0/A vdda1 7.08fF
-C2326 pll_full_0/divider_0/tspc_2/a_630_n680# vdda1 1.15fF **FLOATING
-C2327 pll_full_0/divider_0/tspc_1/Z4 vdda1 0.86fF
-C2328 pll_full_0/divider_0/tspc_1/Z3 vdda1 2.26fF
-C2329 pll_full_0/divider_0/tspc_1/Z2 vdda1 1.46fF
-C2330 pll_full_0/divider_0/tspc_1/Z1 vdda1 0.99fF
-C2331 pll_full_0/divider_0/nor_0/B vdda1 7.12fF
-C2332 pll_full_0/divider_0/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING
-C2333 pll_full_0/divider_0/tspc_2/Q vdda1 3.14fF
-C2334 pll_full_0/divider_0/tspc_0/Z4 vdda1 0.86fF
-C2335 pll_full_0/divbuf_0/IN vdda1 9.89fF
-C2336 pll_full_0/divider_0/tspc_0/Z3 vdda1 2.26fF
-C2337 pll_full_0/divider_0/tspc_0/Z2 vdda1 1.46fF
-C2338 pll_full_0/divider_0/tspc_0/Z1 vdda1 0.99fF
-C2339 pll_full_0/divider_0/nor_1/B vdda1 6.48fF
-C2340 pll_full_0/divider_0/tspc_0/a_630_n680# vdda1 1.14fF **FLOATING
-C2341 pll_full_0/divider_0/tspc_1/Q vdda1 3.12fF
-C2342 pll_full_0/divider_0/clk vdda1 33.42fF
-C2343 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdda1 0.36fF
-C2344 pll_full_0/divider_0/prescaler_0/tspc_0/D vdda1 2.64fF
-C2345 pll_full_0/divider_0/prescaler_0/tspc_2/Q vdda1 3.72fF
-C2346 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdda1 3.61fF
-C2347 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdda1 0.36fF
-C2348 pll_full_0/divider_0/prescaler_0/tspc_2/D vdda1 3.12fF
-C2349 pll_full_0/divider_0/and_0/OUT vdda1 5.67fF
-C2350 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdda1 0.86fF
-C2351 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdda1 2.26fF
-C2352 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdda1 1.19fF
-C2353 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF
-C2354 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 1.47fF **FLOATING
-C2355 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING
-C2356 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdda1 0.86fF
-C2357 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdda1 2.26fF
-C2358 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdda1 1.48fF
-C2359 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF
-C2360 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING
-C2361 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING
-C2362 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdda1 0.86fF
-C2363 pll_full_0/divider_0/prescaler_0/Out vdda1 4.59fF
-C2364 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdda1 2.26fF
-C2365 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdda1 1.46fF
-C2366 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF
-C2367 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING
-C2368 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING
-C2369 pll_full_0/divider_0/nor_1/Z1 vdda1 1.34fF
-C2370 pll_full_0/divider_0/nor_0/Z1 vdda1 1.34fF
-C2371 pll_full_0/divbuf_1/OUT vdda1 363.82fF
-C2372 pll_full_0/divbuf_1/OUT5 vdda1 350.37fF
-C2373 pll_full_0/divbuf_1/OUT4 vdda1 133.72fF
-C2374 pll_full_0/divbuf_1/OUT3 vdda1 34.03fF
-C2375 pll_full_0/divbuf_1/OUT2 vdda1 8.71fF
-C2376 pll_full_0/divbuf_1/a_492_n240# vdda1 2.46fF **FLOATING
-C2377 pll_full_0/divbuf_0/OUT5 vdda1 350.37fF
-C2378 pll_full_0/divbuf_0/OUT4 vdda1 133.72fF
-C2379 pll_full_0/divbuf_0/OUT3 vdda1 34.03fF
-C2380 pll_full_0/divbuf_0/OUT2 vdda1 8.71fF
-C2381 pll_full_0/divbuf_0/a_492_n240# vdda1 2.46fF **FLOATING
-C2382 pll_full_0/ro_complete_0/cbank_2/v vdda1 16.43fF
-C2383 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF
-C2384 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF
-C2385 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF
-C2386 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF
-C2387 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF
-C2388 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF
-C2389 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF
-C2390 pll_full_0/ro_complete_0/a0 vdda1 5.35fF
-C2391 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF
-C2392 pll_full_0/ro_complete_0/a1 vdda1 6.54fF
-C2393 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF
-C2394 pll_full_0/ro_complete_0/a3 vdda1 5.96fF
-C2395 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF
-C2396 pll_full_0/ro_complete_0/a2 vdda1 5.21fF
-C2397 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF
-C2398 pll_full_0/ro_complete_0/a4 vdda1 5.81fF
-C2399 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF
-C2400 pll_full_0/ro_complete_0/a5 vdda1 6.74fF
-C2401 pll_full_0/ro_complete_0/cbank_0/v vdda1 15.12fF
-C2402 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF
-C2403 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF
-C2404 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF
-C2405 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF
-C2406 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF
-C2407 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF
-C2408 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vdda1 0.27fF
-C2409 pll_full_0/filter_0/a_4216_n5230# vdda1 418.90fF **FLOATING
-C2410 pll_full_0/filter_0/a_4216_n2998# vdda1 1.39fF **FLOATING
-C2411 pll_full_0/cp_0/down vdda1 1.54fF
-C2412 pll_full_0/cp_0/upbar vdda1 1.79fF
-C2413 pll_full_0/cp_0/a_7110_n2840# vdda1 0.17fF **FLOATING
-C2414 pll_full_0/cp_0/a_3060_n2840# vdda1 1.71fF **FLOATING
-C2415 pll_full_0/cp_0/a_7110_0# vdda1 0.17fF **FLOATING
-C2416 pll_full_0/cp_0/a_6370_0# vdda1 0.40fF **FLOATING
-C2417 pll_full_0/cp_0/a_3060_0# vdda1 2.49fF **FLOATING
-C2418 pll_full_0/cp_0/a_1710_0# vdda1 7.47fF **FLOATING
-C2419 pll_full_0/pd_0/and_pd_0/Z1 vdda1 0.39fF
-C2420 pll_full_0/pd_0/and_pd_0/Out1 vdda1 2.22fF
-C2421 pll_full_0/pd_0/tspc_r_1/z5 vdda1 1.10fF
-C2422 pll_full_0/pd_0/tspc_r_1/Z4 vdda1 1.07fF
-C2423 pll_full_0/pd_0/tspc_r_1/Qbar vdda1 0.88fF
-C2424 pll_full_0/pd_0/tspc_r_1/Z2 vdda1 1.22fF
-C2425 pll_full_0/pd_0/tspc_r_1/Z1 vdda1 0.67fF
-C2426 pll_full_0/pd_0/UP vdda1 6.41fF
-C2427 pll_full_0/pd_0/tspc_r_1/Qbar1 vdda1 1.34fF
-C2428 pll_full_0/pd_0/tspc_r_1/Z3 vdda1 2.12fF
-C2429 pll_full_0/pd_0/REF vdda1 6.48fF
-C2430 pll_full_0/pd_0/tspc_r_0/z5 vdda1 1.10fF
-C2431 pll_full_0/pd_0/tspc_r_0/Z4 vdda1 1.07fF
-C2432 pll_full_0/pd_0/R vdda1 3.05fF
-C2433 pll_full_0/pd_0/tspc_r_0/Qbar vdda1 0.79fF
-C2434 pll_full_0/pd_0/tspc_r_0/Z2 vdda1 1.22fF
-C2435 pll_full_0/pd_0/tspc_r_0/Z1 vdda1 0.67fF
-C2436 pll_full_0/pd_0/DOWN vdda1 7.34fF
-C2437 pll_full_0/pd_0/tspc_r_0/Qbar1 vdda1 1.34fF
-C2438 pll_full_0/pd_0/tspc_r_0/Z3 vdda1 2.12fF
-C2439 pll_full_0/pd_0/DIV vdda1 372.69fF
-C2440 divbuf_19/OUT vdda1 363.82fF
-C2441 divbuf_19/OUT5 vdda1 350.37fF
-C2442 divbuf_19/OUT4 vdda1 133.72fF
-C2443 divbuf_19/OUT3 vdda1 34.03fF
-C2444 divbuf_19/OUT2 vdda1 8.71fF
-C2445 divbuf_19/IN vdda1 0.89fF
-C2446 divbuf_19/a_492_n240# vdda1 2.46fF **FLOATING
-C2447 divbuf_18/OUT vdda1 363.82fF
-C2448 divbuf_18/OUT5 vdda1 350.37fF
-C2449 divbuf_18/OUT4 vdda1 133.72fF
-C2450 divbuf_18/OUT3 vdda1 34.03fF
-C2451 divbuf_18/OUT2 vdda1 8.71fF
-C2452 divbuf_18/IN vdda1 0.89fF
-C2453 divbuf_18/a_492_n240# vdda1 2.46fF **FLOATING
-C2454 divbuf_17/OUT vdda1 363.82fF
-C2455 divbuf_17/OUT5 vdda1 350.37fF
-C2456 divbuf_17/OUT4 vdda1 133.72fF
-C2457 divbuf_17/OUT3 vdda1 34.03fF
-C2458 divbuf_17/OUT2 vdda1 8.71fF
-C2459 divbuf_17/IN vdda1 0.89fF
-C2460 divbuf_17/a_492_n240# vdda1 2.46fF **FLOATING
-C2461 divider_2/and_0/Z1 vdda1 0.74fF
-C2462 divider_2/and_0/B vdda1 2.25fF
-C2463 divider_2/and_0/A vdda1 2.19fF
-C2464 divider_2/and_0/out1 vdda1 2.93fF
-C2465 divider_2/tspc_2/Z4 vdda1 0.86fF
-C2466 divider_2/tspc_2/Z3 vdda1 2.26fF
-C2467 divider_2/tspc_2/Z2 vdda1 1.46fF
-C2468 divider_2/tspc_2/Z1 vdda1 0.99fF
-C2469 divider_2/nor_0/A vdda1 7.04fF
-C2470 divider_2/tspc_2/a_630_n680# vdda1 1.15fF **FLOATING
-C2471 divider_2/tspc_1/Z4 vdda1 0.86fF
-C2472 divider_2/tspc_1/Z3 vdda1 2.26fF
-C2473 divider_2/tspc_1/Z2 vdda1 1.46fF
-C2474 divider_2/tspc_1/Z1 vdda1 0.99fF
-C2475 divider_2/nor_0/B vdda1 7.05fF
-C2476 divider_2/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING
-C2477 divider_2/tspc_2/Q vdda1 3.14fF
-C2478 divider_2/tspc_0/Z4 vdda1 0.86fF
-C2479 divider_2/Out vdda1 1.60fF
-C2480 divider_2/tspc_0/Z3 vdda1 2.26fF
-C2481 divider_2/tspc_0/Z2 vdda1 1.46fF
-C2482 divider_2/tspc_0/Z1 vdda1 0.99fF
-C2483 divider_2/nor_1/B vdda1 6.33fF
-C2484 divider_2/tspc_0/a_630_n680# vdda1 1.14fF **FLOATING
-C2485 divider_2/tspc_1/Q vdda1 3.12fF
-C2486 divider_2/clk vdda1 5.63fF
-C2487 divider_2/prescaler_0/nand_1/z1 vdda1 0.36fF
-C2488 divider_2/prescaler_0/tspc_0/D vdda1 2.64fF
-C2489 divider_2/prescaler_0/tspc_2/Q vdda1 3.74fF
-C2490 divider_2/prescaler_0/tspc_1/Q vdda1 3.61fF
-C2491 divider_2/prescaler_0/nand_0/z1 vdda1 0.36fF
-C2492 divider_2/prescaler_0/tspc_2/D vdda1 3.12fF
-C2493 divider_2/and_0/OUT vdda1 5.62fF
-C2494 divider_2/prescaler_0/tspc_2/Z4 vdda1 0.86fF
-C2495 divider_2/prescaler_0/tspc_2/Z3 vdda1 2.26fF
-C2496 divider_2/prescaler_0/tspc_2/Z2 vdda1 1.46fF
-C2497 divider_2/prescaler_0/tspc_2/Z1 vdda1 0.99fF
-C2498 divider_2/prescaler_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING
-C2499 divider_2/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING
-C2500 divider_2/prescaler_0/tspc_1/Z4 vdda1 0.86fF
-C2501 divider_2/prescaler_0/tspc_1/Z3 vdda1 2.26fF
-C2502 divider_2/prescaler_0/tspc_1/Z2 vdda1 1.48fF
-C2503 divider_2/prescaler_0/tspc_1/Z1 vdda1 0.99fF
-C2504 divider_2/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING
-C2505 divider_2/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING
-C2506 divider_2/prescaler_0/tspc_0/Z4 vdda1 0.86fF
-C2507 divider_2/prescaler_0/Out vdda1 4.59fF
-C2508 divider_2/prescaler_0/tspc_0/Z3 vdda1 2.26fF
-C2509 divider_2/prescaler_0/tspc_0/Z2 vdda1 1.46fF
-C2510 divider_2/prescaler_0/tspc_0/Z1 vdda1 0.99fF
-C2511 divider_2/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING
-C2512 divider_2/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING
-C2513 divider_2/nor_1/Z1 vdda1 1.34fF
-C2514 divider_2/mc2 vdda1 5.29fF
-C2515 divider_2/nor_0/Z1 vdda1 1.34fF
-C2516 divbuf_16/OUT vdda1 363.82fF
-C2517 divbuf_16/OUT5 vdda1 350.37fF
-C2518 divbuf_16/OUT4 vdda1 133.72fF
-C2519 divbuf_16/OUT3 vdda1 34.03fF
-C2520 divbuf_16/OUT2 vdda1 8.71fF
-C2521 divbuf_16/IN vdda1 0.89fF
-C2522 divbuf_16/a_492_n240# vdda1 2.46fF **FLOATING
-C2523 divider_1/and_0/Z1 vdda1 0.74fF
-C2524 divider_1/and_0/B vdda1 2.25fF
-C2525 divider_1/and_0/A vdda1 2.19fF
-C2526 divider_1/and_0/out1 vdda1 2.93fF
-C2527 divider_1/tspc_2/Z4 vdda1 0.86fF
-C2528 divider_1/tspc_2/Z3 vdda1 2.26fF
-C2529 divider_1/tspc_2/Z2 vdda1 1.46fF
-C2530 divider_1/tspc_2/Z1 vdda1 0.99fF
-C2531 divider_1/nor_0/A vdda1 7.04fF
-C2532 divider_1/tspc_2/a_630_n680# vdda1 1.15fF **FLOATING
-C2533 divider_1/tspc_1/Z4 vdda1 0.86fF
-C2534 divider_1/tspc_1/Z3 vdda1 2.26fF
-C2535 divider_1/tspc_1/Z2 vdda1 1.46fF
-C2536 divider_1/tspc_1/Z1 vdda1 0.99fF
-C2537 divider_1/nor_0/B vdda1 7.05fF
-C2538 divider_1/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING
-C2539 divider_1/tspc_2/Q vdda1 3.14fF
-C2540 divider_1/tspc_0/Z4 vdda1 0.86fF
-C2541 divider_1/Out vdda1 1.60fF
-C2542 divider_1/tspc_0/Z3 vdda1 2.26fF
-C2543 divider_1/tspc_0/Z2 vdda1 1.46fF
-C2544 divider_1/tspc_0/Z1 vdda1 0.99fF
-C2545 divider_1/nor_1/B vdda1 6.33fF
-C2546 divider_1/tspc_0/a_630_n680# vdda1 1.14fF **FLOATING
-C2547 divider_1/tspc_1/Q vdda1 3.12fF
-C2548 divider_1/clk vdda1 5.63fF
-C2549 divider_1/prescaler_0/nand_1/z1 vdda1 0.36fF
-C2550 divider_1/prescaler_0/tspc_0/D vdda1 2.64fF
-C2551 divider_1/prescaler_0/tspc_2/Q vdda1 3.74fF
-C2552 divider_1/prescaler_0/tspc_1/Q vdda1 3.61fF
-C2553 divider_1/prescaler_0/nand_0/z1 vdda1 0.36fF
-C2554 divider_1/prescaler_0/tspc_2/D vdda1 3.12fF
-C2555 divider_1/and_0/OUT vdda1 5.62fF
-C2556 divider_1/prescaler_0/tspc_2/Z4 vdda1 0.86fF
-C2557 divider_1/prescaler_0/tspc_2/Z3 vdda1 2.26fF
-C2558 divider_1/prescaler_0/tspc_2/Z2 vdda1 1.46fF
-C2559 divider_1/prescaler_0/tspc_2/Z1 vdda1 0.99fF
-C2560 divider_1/prescaler_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING
-C2561 divider_1/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING
-C2562 divider_1/prescaler_0/tspc_1/Z4 vdda1 0.86fF
-C2563 divider_1/prescaler_0/tspc_1/Z3 vdda1 2.26fF
-C2564 divider_1/prescaler_0/tspc_1/Z2 vdda1 1.48fF
-C2565 divider_1/prescaler_0/tspc_1/Z1 vdda1 0.99fF
-C2566 divider_1/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING
-C2567 divider_1/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING
-C2568 divider_1/prescaler_0/tspc_0/Z4 vdda1 0.86fF
-C2569 divider_1/prescaler_0/Out vdda1 4.59fF
-C2570 divider_1/prescaler_0/tspc_0/Z3 vdda1 2.26fF
-C2571 divider_1/prescaler_0/tspc_0/Z2 vdda1 1.46fF
-C2572 divider_1/prescaler_0/tspc_0/Z1 vdda1 0.99fF
-C2573 divider_1/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING
-C2574 divider_1/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING
-C2575 divider_1/nor_1/Z1 vdda1 1.34fF
-C2576 divider_1/mc2 vdda1 5.29fF
-C2577 divider_1/nor_0/Z1 vdda1 1.34fF
-C2578 divbuf_15/OUT vdda1 363.82fF
-C2579 divbuf_15/OUT5 vdda1 350.37fF
-C2580 divbuf_15/OUT4 vdda1 133.72fF
-C2581 divbuf_15/OUT3 vdda1 34.03fF
-C2582 divbuf_15/OUT2 vdda1 8.71fF
-C2583 divbuf_15/IN vdda1 0.89fF
-C2584 divbuf_15/a_492_n240# vdda1 2.46fF **FLOATING
-C2585 divbuf_25/OUT vdda1 363.82fF
-C2586 divbuf_25/OUT5 vdda1 350.37fF
-C2587 divbuf_25/OUT4 vdda1 133.72fF
-C2588 divbuf_25/OUT3 vdda1 34.03fF
-C2589 divbuf_25/OUT2 vdda1 8.71fF
-C2590 divbuf_25/IN vdda1 0.89fF
-C2591 divbuf_25/a_492_n240# vdda1 2.46fF **FLOATING
-C2592 divbuf_14/OUT vdda1 363.82fF
-C2593 divbuf_14/OUT5 vdda1 350.37fF
-C2594 divbuf_14/OUT4 vdda1 133.72fF
-C2595 divbuf_14/OUT3 vdda1 34.03fF
-C2596 divbuf_14/OUT2 vdda1 8.71fF
-C2597 divbuf_14/IN vdda1 0.89fF
-C2598 divbuf_14/a_492_n240# vdda1 2.46fF **FLOATING
-C2599 divider_0/and_0/Z1 vdda1 0.74fF
-C2600 divider_0/and_0/B vdda1 2.25fF
-C2601 divider_0/and_0/A vdda1 2.19fF
-C2602 divider_0/and_0/out1 vdda1 2.93fF
-C2603 divider_0/tspc_2/Z4 vdda1 0.86fF
-C2604 divider_0/tspc_2/Z3 vdda1 2.26fF
-C2605 divider_0/tspc_2/Z2 vdda1 1.46fF
-C2606 divider_0/tspc_2/Z1 vdda1 0.99fF
-C2607 divider_0/nor_0/A vdda1 7.04fF
-C2608 divider_0/tspc_2/a_630_n680# vdda1 1.15fF **FLOATING
-C2609 divider_0/tspc_1/Z4 vdda1 0.86fF
-C2610 divider_0/tspc_1/Z3 vdda1 2.26fF
-C2611 divider_0/tspc_1/Z2 vdda1 1.46fF
-C2612 divider_0/tspc_1/Z1 vdda1 0.99fF
-C2613 divider_0/nor_0/B vdda1 7.05fF
-C2614 divider_0/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING
-C2615 divider_0/tspc_2/Q vdda1 3.14fF
-C2616 divider_0/tspc_0/Z4 vdda1 0.86fF
-C2617 divider_0/Out vdda1 1.60fF
-C2618 divider_0/tspc_0/Z3 vdda1 2.26fF
-C2619 divider_0/tspc_0/Z2 vdda1 1.46fF
-C2620 divider_0/tspc_0/Z1 vdda1 0.99fF
-C2621 divider_0/nor_1/B vdda1 6.33fF
-C2622 divider_0/tspc_0/a_630_n680# vdda1 1.14fF **FLOATING
-C2623 divider_0/tspc_1/Q vdda1 3.12fF
-C2624 divider_0/clk vdda1 5.63fF
-C2625 divider_0/prescaler_0/nand_1/z1 vdda1 0.36fF
-C2626 divider_0/prescaler_0/tspc_0/D vdda1 2.64fF
-C2627 divider_0/prescaler_0/tspc_2/Q vdda1 3.64fF
-C2628 divider_0/prescaler_0/tspc_1/Q vdda1 3.61fF
-C2629 divider_0/prescaler_0/nand_0/z1 vdda1 0.36fF
-C2630 divider_0/prescaler_0/tspc_2/D vdda1 3.12fF
-C2631 divider_0/and_0/OUT vdda1 5.62fF
-C2632 divider_0/prescaler_0/tspc_2/Z4 vdda1 0.86fF
-C2633 divider_0/prescaler_0/tspc_2/Z3 vdda1 2.26fF
-C2634 divider_0/prescaler_0/tspc_2/Z2 vdda1 1.46fF
-C2635 divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF
-C2636 divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING
-C2637 divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING
-C2638 divider_0/prescaler_0/tspc_1/Z4 vdda1 0.86fF
-C2639 divider_0/prescaler_0/tspc_1/Z3 vdda1 2.26fF
-C2640 divider_0/prescaler_0/tspc_1/Z2 vdda1 1.48fF
-C2641 divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF
-C2642 divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING
-C2643 divider_0/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING
-C2644 divider_0/prescaler_0/tspc_0/Z4 vdda1 0.86fF
-C2645 divider_0/prescaler_0/Out vdda1 4.59fF
-C2646 divider_0/prescaler_0/tspc_0/Z3 vdda1 2.26fF
-C2647 divider_0/prescaler_0/tspc_0/Z2 vdda1 1.46fF
-C2648 divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF
-C2649 divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING
-C2650 divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING
-C2651 divider_0/nor_1/Z1 vdda1 1.34fF
-C2652 divider_0/mc2 vdda1 5.29fF
-C2653 divider_0/nor_0/Z1 vdda1 1.34fF
-C2654 divbuf_24/OUT vdda1 363.82fF
-C2655 divbuf_24/OUT5 vdda1 350.37fF
-C2656 divbuf_24/OUT4 vdda1 133.72fF
-C2657 divbuf_24/OUT3 vdda1 34.03fF
-C2658 divbuf_24/OUT2 vdda1 8.71fF
-C2659 divbuf_24/IN vdda1 0.89fF
-C2660 divbuf_24/a_492_n240# vdda1 2.46fF **FLOATING
-C2661 divbuf_13/OUT vdda1 363.82fF
-C2662 divbuf_13/OUT5 vdda1 350.37fF
-C2663 divbuf_13/OUT4 vdda1 133.72fF
-C2664 divbuf_13/OUT3 vdda1 34.03fF
-C2665 divbuf_13/OUT2 vdda1 8.71fF
-C2666 divbuf_13/IN vdda1 0.89fF
-C2667 divbuf_13/a_492_n240# vdda1 2.46fF **FLOATING
-C2668 divbuf_9/OUT vdda1 363.82fF
-C2669 divbuf_9/OUT5 vdda1 350.37fF
-C2670 divbuf_9/OUT4 vdda1 133.72fF
-C2671 divbuf_9/OUT3 vdda1 34.03fF
-C2672 divbuf_9/OUT2 vdda1 8.71fF
-C2673 divbuf_9/IN vdda1 0.89fF
-C2674 divbuf_9/a_492_n240# vdda1 2.46fF **FLOATING
-C2675 divbuf_23/OUT vdda1 363.82fF
-C2676 divbuf_23/OUT5 vdda1 350.37fF
-C2677 divbuf_23/OUT4 vdda1 133.72fF
-C2678 divbuf_23/OUT3 vdda1 34.03fF
-C2679 divbuf_23/OUT2 vdda1 8.71fF
-C2680 divbuf_23/IN vdda1 0.89fF
-C2681 divbuf_23/a_492_n240# vdda1 2.46fF **FLOATING
-C2682 divbuf_12/OUT vdda1 363.82fF
-C2683 divbuf_12/OUT5 vdda1 350.37fF
-C2684 divbuf_12/OUT4 vdda1 133.72fF
-C2685 divbuf_12/OUT3 vdda1 34.03fF
-C2686 divbuf_12/OUT2 vdda1 8.71fF
-C2687 divbuf_12/IN vdda1 0.89fF
-C2688 divbuf_12/a_492_n240# vdda1 2.46fF **FLOATING
-C2689 divbuf_8/OUT vdda1 363.82fF
-C2690 divbuf_8/OUT5 vdda1 350.37fF
-C2691 divbuf_8/OUT4 vdda1 133.72fF
-C2692 divbuf_8/OUT3 vdda1 34.03fF
-C2693 divbuf_8/OUT2 vdda1 8.71fF
-C2694 divbuf_8/IN vdda1 0.89fF
-C2695 divbuf_8/a_492_n240# vdda1 2.46fF **FLOATING
-C2696 divbuf_22/OUT vdda1 363.82fF
-C2697 divbuf_22/OUT5 vdda1 350.37fF
-C2698 divbuf_22/OUT4 vdda1 133.72fF
-C2699 divbuf_22/OUT3 vdda1 34.03fF
-C2700 divbuf_22/OUT2 vdda1 8.71fF
-C2701 divbuf_22/IN vdda1 0.89fF
-C2702 divbuf_22/a_492_n240# vdda1 2.46fF **FLOATING
-C2703 divbuf_11/OUT vdda1 363.82fF
-C2704 divbuf_11/OUT5 vdda1 350.37fF
-C2705 divbuf_11/OUT4 vdda1 133.72fF
-C2706 divbuf_11/OUT3 vdda1 34.03fF
-C2707 divbuf_11/OUT2 vdda1 8.71fF
-C2708 divbuf_11/IN vdda1 0.89fF
-C2709 divbuf_11/a_492_n240# vdda1 2.46fF **FLOATING
-C2710 divbuf_7/OUT vdda1 363.82fF
-C2711 divbuf_7/OUT5 vdda1 350.37fF
-C2712 divbuf_7/OUT4 vdda1 133.72fF
-C2713 divbuf_7/OUT3 vdda1 34.03fF
-C2714 divbuf_7/OUT2 vdda1 8.71fF
-C2715 divbuf_7/IN vdda1 0.89fF
-C2716 divbuf_7/a_492_n240# vdda1 2.46fF **FLOATING
-C2717 divbuf_21/OUT vdda1 363.82fF
-C2718 divbuf_21/OUT5 vdda1 350.37fF
-C2719 divbuf_21/OUT4 vdda1 133.72fF
-C2720 divbuf_21/OUT3 vdda1 34.03fF
-C2721 divbuf_21/OUT2 vdda1 8.71fF
-C2722 divbuf_21/IN vdda1 0.89fF
-C2723 divbuf_21/a_492_n240# vdda1 2.46fF **FLOATING
-C2724 divbuf_20/OUT vdda1 363.82fF
-C2725 divbuf_20/OUT5 vdda1 350.37fF
-C2726 divbuf_20/OUT4 vdda1 133.72fF
-C2727 divbuf_20/OUT3 vdda1 34.03fF
-C2728 divbuf_20/OUT2 vdda1 8.71fF
-C2729 divbuf_20/IN vdda1 0.89fF
-C2730 divbuf_20/a_492_n240# vdda1 2.46fF **FLOATING
-C2731 divbuf_10/OUT vdda1 363.82fF
-C2732 divbuf_10/OUT5 vdda1 350.37fF
-C2733 divbuf_10/OUT4 vdda1 133.72fF
-C2734 divbuf_10/OUT3 vdda1 34.03fF
-C2735 divbuf_10/OUT2 vdda1 8.71fF
-C2736 divbuf_10/IN vdda1 0.89fF
-C2737 divbuf_10/a_492_n240# vdda1 2.46fF **FLOATING
-C2738 divbuf_6/OUT vdda1 363.82fF
-C2739 divbuf_6/OUT5 vdda1 350.37fF
-C2740 divbuf_6/OUT4 vdda1 133.72fF
-C2741 divbuf_6/OUT3 vdda1 34.03fF
-C2742 divbuf_6/OUT2 vdda1 8.71fF
-C2743 divbuf_6/IN vdda1 0.89fF
-C2744 divbuf_6/a_492_n240# vdda1 2.46fF **FLOATING
-C2745 divbuf_5/OUT vdda1 363.82fF
-C2746 divbuf_5/OUT5 vdda1 350.37fF
-C2747 divbuf_5/OUT4 vdda1 133.72fF
-C2748 divbuf_5/OUT3 vdda1 34.03fF
-C2749 divbuf_5/OUT2 vdda1 8.71fF
-C2750 divbuf_5/IN vdda1 0.89fF
-C2751 divbuf_5/a_492_n240# vdda1 2.46fF **FLOATING
-C2752 divbuf_4/OUT vdda1 363.82fF
-C2753 divbuf_4/OUT5 vdda1 350.37fF
-C2754 divbuf_4/OUT4 vdda1 133.72fF
-C2755 divbuf_4/OUT3 vdda1 34.03fF
-C2756 divbuf_4/OUT2 vdda1 8.71fF
-C2757 divbuf_4/IN vdda1 0.89fF
-C2758 divbuf_4/a_492_n240# vdda1 2.46fF **FLOATING
-C2759 divbuf_3/OUT vdda1 363.82fF
-C2760 divbuf_3/OUT5 vdda1 350.37fF
-C2761 divbuf_3/OUT4 vdda1 133.72fF
-C2762 divbuf_3/OUT3 vdda1 34.03fF
-C2763 divbuf_3/OUT2 vdda1 8.71fF
-C2764 divbuf_3/IN vdda1 0.89fF
-C2765 divbuf_3/a_492_n240# vdda1 2.46fF **FLOATING
-C2766 divbuf_2/OUT vdda1 363.82fF
-C2767 divbuf_2/OUT5 vdda1 350.37fF
-C2768 divbuf_2/OUT4 vdda1 133.72fF
-C2769 divbuf_2/OUT3 vdda1 34.03fF
-C2770 divbuf_2/OUT2 vdda1 8.71fF
-C2771 divbuf_2/IN vdda1 0.89fF
-C2772 divbuf_2/a_492_n240# vdda1 2.46fF **FLOATING
-C2773 divbuf_1/OUT vdda1 363.82fF
-C2774 divbuf_1/OUT5 vdda1 350.37fF
-C2775 divbuf_1/OUT4 vdda1 133.72fF
-C2776 divbuf_1/OUT3 vdda1 34.03fF
-C2777 divbuf_1/OUT2 vdda1 8.71fF
-C2778 divbuf_1/IN vdda1 0.89fF
-C2779 divbuf_1/a_492_n240# vdda1 2.46fF **FLOATING
-C2780 ro_complete_1/cbank_2/v vdda1 16.43fF
-C2781 ro_complete_1/cbank_2/switch_5/vin vdda1 0.78fF
-C2782 ro_complete_1/cbank_2/switch_4/vin vdda1 1.50fF
-C2783 ro_complete_1/cbank_2/switch_2/vin vdda1 1.30fF
-C2784 ro_complete_1/cbank_2/switch_3/vin vdda1 0.56fF
-C2785 ro_complete_1/cbank_2/switch_1/vin vdda1 1.14fF
-C2786 ro_complete_1/cbank_2/switch_0/vin vdda1 1.02fF
-C2787 ro_complete_1/cbank_1/v vdda1 16.43fF
-C2788 ro_complete_1/cbank_1/switch_5/vin vdda1 0.78fF
-C2789 ro_complete_1/a0 vdda1 5.35fF
-C2790 ro_complete_1/cbank_1/switch_4/vin vdda1 1.50fF
-C2791 ro_complete_1/a1 vdda1 6.54fF
-C2792 ro_complete_1/cbank_1/switch_2/vin vdda1 1.30fF
-C2793 ro_complete_1/a3 vdda1 5.96fF
-C2794 ro_complete_1/cbank_1/switch_3/vin vdda1 0.56fF
-C2795 ro_complete_1/a2 vdda1 5.21fF
-C2796 ro_complete_1/cbank_1/switch_1/vin vdda1 1.14fF
-C2797 ro_complete_1/a4 vdda1 5.81fF
-C2798 ro_complete_1/cbank_1/switch_0/vin vdda1 1.02fF
-C2799 ro_complete_1/a5 vdda1 6.74fF
-C2800 ro_complete_1/cbank_0/v vdda1 15.12fF
-C2801 ro_complete_1/cbank_0/switch_5/vin vdda1 0.78fF
-C2802 ro_complete_1/cbank_0/switch_4/vin vdda1 1.50fF
-C2803 ro_complete_1/cbank_0/switch_2/vin vdda1 1.30fF
-C2804 ro_complete_1/cbank_0/switch_3/vin vdda1 0.56fF
-C2805 ro_complete_1/cbank_0/switch_1/vin vdda1 1.14fF
-C2806 ro_complete_1/cbank_0/switch_0/vin vdda1 1.02fF
-C2807 ro_complete_1/ro_var_extend_0/vcont vdda1 0.27fF
-C2808 divbuf_0/OUT vdda1 363.82fF
-C2809 divbuf_0/OUT5 vdda1 350.37fF
-C2810 divbuf_0/OUT4 vdda1 133.72fF
-C2811 divbuf_0/OUT3 vdda1 34.03fF
-C2812 divbuf_0/OUT2 vdda1 8.71fF
-C2813 divbuf_0/IN vdda1 0.89fF
-C2814 divbuf_0/a_492_n240# vdda1 2.46fF **FLOATING
-C2815 ro_complete_0/cbank_2/v vdda1 16.43fF
-C2816 ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF
-C2817 ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF
-C2818 ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF
-C2819 ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF
-C2820 ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF
-C2821 ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF
-C2822 ro_complete_0/cbank_1/v vdda1 16.46fF
-C2823 ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF
-C2824 ro_complete_0/a0 vdda1 5.35fF
-C2825 ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF
-C2826 ro_complete_0/a1 vdda1 6.54fF
-C2827 ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF
-C2828 ro_complete_0/a3 vdda1 5.96fF
-C2829 ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF
-C2830 ro_complete_0/a2 vdda1 5.21fF
-C2831 ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF
-C2832 ro_complete_0/a4 vdda1 5.81fF
-C2833 ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF
-C2834 ro_complete_0/a5 vdda1 6.74fF
-C2835 ro_complete_0/cbank_0/v vdda1 15.12fF
-C2836 ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF
-C2837 ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF
-C2838 ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF
-C2839 ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF
-C2840 ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF
-C2841 ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF
-C2842 ro_complete_0/ro_var_extend_0/vcont vdda1 0.27fF
-C2843 filter_0/v vdda1 85.69fF
-C2844 filter_0/a_4216_n5230# vdda1 418.47fF **FLOATING
-C2845 filter_0/a_4216_n2998# vdda1 1.03fF **FLOATING
-C2846 cp_0/down vdda1 1.54fF
-C2847 cp_0/vbias vdda1 2.41fF
-C2848 cp_0/out vdda1 5.34fF
-C2849 cp_0/upbar vdda1 1.50fF
-C2850 cp_0/a_7110_n2840# vdda1 0.17fF **FLOATING
-C2851 cp_0/a_3060_n2840# vdda1 1.71fF **FLOATING
-C2852 cp_0/a_7110_0# vdda1 0.17fF **FLOATING
-C2853 cp_0/a_6370_0# vdda1 0.40fF **FLOATING
-C2854 cp_0/a_3060_0# vdda1 1.66fF **FLOATING
-C2855 cp_0/a_1710_0# vdda1 5.89fF **FLOATING
-C2856 cp_0/a_1710_n2840# vdda1 4.91fF **FLOATING
-C2857 cp_0/a_10_n50# vdda1 2.96fF **FLOATING
-C2858 pd_1/and_pd_0/Z1 vdda1 0.39fF
-C2859 pd_1/and_pd_0/Out1 vdda1 2.22fF
-C2860 pd_1/tspc_r_1/z5 vdda1 1.10fF
-C2861 pd_1/tspc_r_1/Z4 vdda1 1.07fF
-C2862 pd_1/tspc_r_1/Qbar vdda1 0.88fF
-C2863 pd_1/tspc_r_1/Z2 vdda1 1.22fF
-C2864 pd_1/tspc_r_1/Z1 vdda1 0.67fF
-C2865 pd_1/UP vdda1 2.21fF
-C2866 pd_1/tspc_r_1/Qbar1 vdda1 1.34fF
-C2867 pd_1/tspc_r_1/Z3 vdda1 2.12fF
-C2868 pd_1/REF vdda1 1.80fF
-C2869 pd_1/tspc_r_0/z5 vdda1 1.10fF
-C2870 pd_1/tspc_r_0/Z4 vdda1 1.07fF
-C2871 pd_1/R vdda1 3.05fF
-C2872 pd_1/tspc_r_0/Qbar vdda1 0.79fF
-C2873 pd_1/tspc_r_0/Z2 vdda1 1.22fF
-C2874 pd_1/tspc_r_0/Z1 vdda1 0.67fF
-C2875 pd_1/DOWN vdda1 3.08fF
-C2876 pd_1/tspc_r_0/Qbar1 vdda1 1.34fF
-C2877 pd_1/tspc_r_0/Z3 vdda1 2.12fF
-C2878 pd_1/DIV vdda1 1.82fF
-C2879 pd_0/and_pd_0/Z1 vdda1 0.39fF
-C2880 pd_0/and_pd_0/Out1 vdda1 2.22fF
-C2881 pd_0/tspc_r_1/z5 vdda1 1.10fF
-C2882 pd_0/tspc_r_1/Z4 vdda1 1.07fF
-C2883 pd_0/tspc_r_1/Qbar vdda1 0.88fF
-C2884 pd_0/tspc_r_1/Z2 vdda1 1.22fF
-C2885 pd_0/tspc_r_1/Z1 vdda1 0.67fF
-C2886 pd_0/UP vdda1 2.21fF
-C2887 pd_0/tspc_r_1/Qbar1 vdda1 1.34fF
-C2888 pd_0/tspc_r_1/Z3 vdda1 2.12fF
-C2889 pd_0/REF vdda1 1.80fF
-C2890 pd_0/tspc_r_0/z5 vdda1 1.10fF
-C2891 pd_0/tspc_r_0/Z4 vdda1 1.07fF
-C2892 pd_0/R vdda1 3.05fF
-C2893 pd_0/tspc_r_0/Qbar vdda1 0.79fF
-C2894 pd_0/tspc_r_0/Z2 vdda1 1.22fF
-C2895 pd_0/tspc_r_0/Z1 vdda1 0.67fF
-C2896 pd_0/DOWN vdda1 3.08fF
-C2897 pd_0/tspc_r_0/Qbar1 vdda1 1.34fF
-C2898 pd_0/tspc_r_0/Z3 vdda1 2.12fF
-C2899 pd_0/DIV vdda1 1.82fF
+Xpll_full_0 vdda1 pll_full
+C1655 io_analog[4] gnd 43.96fF
+C1656 io_analog[5] gnd 44.13fF
+C1657 io_analog[6] gnd 43.46fF
+C1658 io_in_3v3[0] gnd 0.61fF
+C1659 io_oeb[26] gnd 0.61fF
+C1660 io_in[0] gnd 0.61fF
+C1661 io_out[26] gnd 0.61fF
+C1662 io_out[0] gnd 0.61fF
+C1663 io_in[26] gnd 0.61fF
+C1664 io_oeb[0] gnd 0.61fF
+C1665 io_in_3v3[26] gnd 0.61fF
+C1666 io_in_3v3[1] gnd 0.61fF
+C1667 io_oeb[25] gnd 0.61fF
+C1668 io_in[1] gnd 0.61fF
+C1669 io_out[25] gnd 0.61fF
+C1670 io_out[1] gnd 0.61fF
+C1671 io_in[25] gnd 0.61fF
+C1672 io_oeb[1] gnd 0.61fF
+C1673 io_in_3v3[25] gnd 0.61fF
+C1674 io_in_3v3[2] gnd 0.61fF
+C1675 io_oeb[24] gnd 0.61fF
+C1676 io_in[2] gnd 0.61fF
+C1677 io_out[24] gnd 0.61fF
+C1678 io_out[2] gnd 0.61fF
+C1679 io_in[24] gnd 0.61fF
+C1680 io_oeb[2] gnd 0.61fF
+C1681 io_in_3v3[24] gnd 0.61fF
+C1682 io_in_3v3[3] gnd 0.61fF
+C1683 gpio_noesd[17] gnd 2.32fF
+C1684 io_in[3] gnd 0.61fF
+C1685 gpio_analog[17] gnd 2.30fF
+C1686 io_out[3] gnd 0.61fF
+C1687 io_oeb[3] gnd 0.61fF
+C1688 io_in_3v3[4] gnd 0.61fF
+C1689 io_in[4] gnd 0.61fF
+C1690 io_out[4] gnd 0.61fF
+C1691 io_oeb[4] gnd 0.61fF
+C1692 io_oeb[23] gnd 0.61fF
+C1693 io_out[23] gnd 0.61fF
+C1694 io_in[23] gnd 0.61fF
+C1695 io_in_3v3[23] gnd 0.61fF
+C1696 gpio_noesd[16] gnd 2.30fF
+C1697 gpio_analog[16] gnd 2.30fF
+C1698 io_in_3v3[5] gnd 0.61fF
+C1699 io_in[5] gnd 0.61fF
+C1700 io_out[5] gnd 0.61fF
+C1701 io_oeb[5] gnd 0.61fF
+C1702 io_oeb[22] gnd 0.61fF
+C1703 io_out[22] gnd 0.61fF
+C1704 io_in[22] gnd 0.61fF
+C1705 io_in_3v3[22] gnd 0.61fF
+C1706 gpio_noesd[15] gnd 2.31fF
+C1707 gpio_analog[15] gnd 2.30fF
+C1708 io_in_3v3[6] gnd 0.61fF
+C1709 io_in[6] gnd 0.61fF
+C1710 io_out[6] gnd 0.61fF
+C1711 io_oeb[6] gnd 0.61fF
+C1712 io_oeb[21] gnd 0.61fF
+C1713 io_out[21] gnd 0.61fF
+C1714 io_in[21] gnd 0.61fF
+C1715 io_in_3v3[21] gnd 0.61fF
+C1716 gpio_noesd[14] gnd 2.30fF
+C1717 gpio_analog[14] gnd 2.29fF
+C1718 vssd2 gnd 38.54fF
+C1719 vssd1 gnd 13.04fF
+C1720 vdda2 gnd 38.30fF
+C1721 io_oeb[20] gnd 0.61fF
+C1722 io_out[20] gnd 0.61fF
+C1723 io_in[20] gnd 0.61fF
+C1724 io_in_3v3[20] gnd 0.61fF
+C1725 gpio_noesd[13] gnd 2.31fF
+C1726 gpio_analog[13] gnd 2.30fF
+C1727 gpio_analog[0] gnd 0.61fF
+C1728 gpio_noesd[0] gnd 0.61fF
+C1729 io_in_3v3[7] gnd 0.61fF
+C1730 io_in[7] gnd 0.61fF
+C1731 io_out[7] gnd 0.61fF
+C1732 io_oeb[7] gnd 0.61fF
+C1733 io_oeb[19] gnd 0.61fF
+C1734 io_out[19] gnd 0.61fF
+C1735 io_in[19] gnd 0.61fF
+C1736 io_in_3v3[19] gnd 0.61fF
+C1737 gpio_noesd[12] gnd 2.32fF
+C1738 gpio_analog[12] gnd 2.30fF
+C1739 gpio_analog[1] gnd 0.61fF
+C1740 gpio_noesd[1] gnd 0.61fF
+C1741 io_in_3v3[8] gnd 0.61fF
+C1742 io_in[8] gnd 0.61fF
+C1743 io_out[8] gnd 0.61fF
+C1744 io_oeb[8] gnd 0.61fF
+C1745 io_oeb[18] gnd 0.61fF
+C1746 io_out[18] gnd 0.61fF
+C1747 io_in[18] gnd 0.61fF
+C1748 io_in_3v3[18] gnd 0.61fF
+C1749 gpio_noesd[11] gnd 2.30fF
+C1750 gpio_analog[11] gnd 2.29fF
+C1751 gpio_analog[2] gnd 0.61fF
+C1752 gpio_noesd[2] gnd 0.61fF
+C1753 io_in_3v3[9] gnd 0.61fF
+C1754 io_in[9] gnd 0.61fF
+C1755 io_out[9] gnd 0.61fF
+C1756 io_oeb[9] gnd 0.61fF
+C1757 io_oeb[17] gnd 0.61fF
+C1758 io_out[17] gnd 0.61fF
+C1759 io_in[17] gnd 0.61fF
+C1760 io_in_3v3[17] gnd 0.61fF
+C1761 gpio_noesd[10] gnd 2.31fF
+C1762 gpio_analog[10] gnd 2.29fF
+C1763 gpio_analog[3] gnd 0.61fF
+C1764 gpio_noesd[3] gnd 0.61fF
+C1765 io_in_3v3[10] gnd 0.61fF
+C1766 io_in[10] gnd 0.61fF
+C1767 io_out[10] gnd 0.61fF
+C1768 io_oeb[10] gnd 0.61fF
+C1769 io_oeb[16] gnd 0.61fF
+C1770 io_out[16] gnd 0.61fF
+C1771 io_in[16] gnd 0.61fF
+C1772 io_in_3v3[16] gnd 0.61fF
+C1773 gpio_noesd[9] gnd 2.28fF
+C1774 gpio_analog[9] gnd 2.28fF
+C1775 gpio_analog[4] gnd 0.61fF
+C1776 gpio_noesd[4] gnd 0.61fF
+C1777 io_in_3v3[11] gnd 0.61fF
+C1778 io_in[11] gnd 0.61fF
+C1779 io_out[11] gnd 0.61fF
+C1780 io_oeb[11] gnd 0.61fF
+C1781 io_oeb[15] gnd 0.61fF
+C1782 io_out[15] gnd 0.61fF
+C1783 io_in[15] gnd 0.61fF
+C1784 io_in_3v3[15] gnd 0.61fF
+C1785 gpio_noesd[8] gnd 2.28fF
+C1786 gpio_analog[8] gnd 2.26fF
+C1787 gpio_analog[5] gnd 0.61fF
+C1788 gpio_noesd[5] gnd 0.61fF
+C1789 io_in_3v3[12] gnd 0.61fF
+C1790 io_in[12] gnd 0.61fF
+C1791 io_out[12] gnd 0.61fF
+C1792 io_oeb[12] gnd 0.61fF
+C1793 io_oeb[14] gnd 0.61fF
+C1794 io_out[14] gnd 0.61fF
+C1795 io_in[14] gnd 0.61fF
+C1796 io_in_3v3[14] gnd 0.61fF
+C1797 gpio_noesd[7] gnd 2.30fF
+C1798 gpio_analog[7] gnd 2.28fF
+C1799 vssa2 gnd 38.35fF
+C1800 gpio_analog[6] gnd 5.71fF
+C1801 gpio_noesd[6] gnd 5.70fF
+C1802 io_in_3v3[13] gnd 0.61fF
+C1803 io_in[13] gnd 0.61fF
+C1804 io_out[13] gnd 0.61fF
+C1805 io_oeb[13] gnd 0.61fF
+C1806 vccd1 gnd 39.84fF
+C1807 vccd2 gnd 38.46fF
+C1808 io_analog[0] gnd 19.99fF
+C1809 io_analog[10] gnd 19.36fF
+C1810 io_analog[1] gnd 13.17fF
+C1811 io_analog[2] gnd 12.57fF
+C1812 io_analog[3] gnd 12.83fF
+C1813 io_clamp_high[0] gnd 3.58fF
+C1814 io_clamp_low[0] gnd 3.58fF
+C1815 io_clamp_high[1] gnd 3.58fF
+C1816 io_clamp_low[1] gnd 3.58fF
+C1817 io_clamp_high[2] gnd 3.58fF
+C1818 io_clamp_low[2] gnd 3.58fF
+C1819 io_analog[7] gnd 12.74fF
+C1820 io_analog[8] gnd 13.08fF
+C1821 io_analog[9] gnd 13.08fF
+C1822 user_irq[2] gnd 0.63fF
+C1823 user_irq[1] gnd 0.63fF
+C1824 user_irq[0] gnd 0.63fF
+C1825 user_clock2 gnd 0.63fF
+C1826 la_oenb[127] gnd 0.63fF
+C1827 la_data_out[127] gnd 0.63fF
+C1828 la_data_in[127] gnd 0.63fF
+C1829 la_oenb[126] gnd 0.63fF
+C1830 la_data_out[126] gnd 0.63fF
+C1831 la_data_in[126] gnd 0.63fF
+C1832 la_oenb[125] gnd 0.63fF
+C1833 la_data_out[125] gnd 0.63fF
+C1834 la_data_in[125] gnd 0.63fF
+C1835 la_oenb[124] gnd 0.63fF
+C1836 la_data_out[124] gnd 0.63fF
+C1837 la_data_in[124] gnd 0.63fF
+C1838 la_oenb[123] gnd 0.63fF
+C1839 la_data_out[123] gnd 0.63fF
+C1840 la_data_in[123] gnd 0.63fF
+C1841 la_oenb[122] gnd 0.63fF
+C1842 la_data_out[122] gnd 0.63fF
+C1843 la_data_in[122] gnd 0.63fF
+C1844 la_oenb[121] gnd 0.63fF
+C1845 la_data_out[121] gnd 0.63fF
+C1846 la_data_in[121] gnd 0.63fF
+C1847 la_oenb[120] gnd 0.63fF
+C1848 la_data_out[120] gnd 0.63fF
+C1849 la_data_in[120] gnd 0.63fF
+C1850 la_oenb[119] gnd 0.63fF
+C1851 la_data_out[119] gnd 0.63fF
+C1852 la_data_in[119] gnd 0.63fF
+C1853 la_oenb[118] gnd 0.63fF
+C1854 la_data_out[118] gnd 0.63fF
+C1855 la_data_in[118] gnd 0.63fF
+C1856 la_oenb[117] gnd 0.63fF
+C1857 la_data_out[117] gnd 0.63fF
+C1858 la_data_in[117] gnd 0.63fF
+C1859 la_oenb[116] gnd 0.63fF
+C1860 la_data_out[116] gnd 0.63fF
+C1861 la_data_in[116] gnd 0.63fF
+C1862 la_oenb[115] gnd 0.63fF
+C1863 la_data_out[115] gnd 0.63fF
+C1864 la_data_in[115] gnd 0.63fF
+C1865 la_oenb[114] gnd 0.63fF
+C1866 la_data_out[114] gnd 0.63fF
+C1867 la_data_in[114] gnd 0.63fF
+C1868 la_oenb[113] gnd 0.63fF
+C1869 la_data_out[113] gnd 0.63fF
+C1870 la_data_in[113] gnd 0.63fF
+C1871 la_oenb[112] gnd 0.63fF
+C1872 la_data_out[112] gnd 0.63fF
+C1873 la_data_in[112] gnd 0.63fF
+C1874 la_oenb[111] gnd 0.63fF
+C1875 la_data_out[111] gnd 0.63fF
+C1876 la_data_in[111] gnd 0.63fF
+C1877 la_oenb[110] gnd 0.63fF
+C1878 la_data_out[110] gnd 0.63fF
+C1879 la_data_in[110] gnd 0.63fF
+C1880 la_oenb[109] gnd 0.63fF
+C1881 la_data_out[109] gnd 0.63fF
+C1882 la_data_in[109] gnd 0.63fF
+C1883 la_oenb[108] gnd 0.63fF
+C1884 la_data_out[108] gnd 0.63fF
+C1885 la_data_in[108] gnd 0.63fF
+C1886 la_oenb[107] gnd 0.63fF
+C1887 la_data_out[107] gnd 0.63fF
+C1888 la_data_in[107] gnd 0.63fF
+C1889 la_oenb[106] gnd 0.63fF
+C1890 la_data_out[106] gnd 0.63fF
+C1891 la_data_in[106] gnd 0.63fF
+C1892 la_oenb[105] gnd 0.63fF
+C1893 la_data_out[105] gnd 0.63fF
+C1894 la_data_in[105] gnd 0.63fF
+C1895 la_oenb[104] gnd 0.63fF
+C1896 la_data_out[104] gnd 0.63fF
+C1897 la_data_in[104] gnd 0.63fF
+C1898 la_oenb[103] gnd 0.63fF
+C1899 la_data_out[103] gnd 0.63fF
+C1900 la_data_in[103] gnd 0.63fF
+C1901 la_oenb[102] gnd 0.63fF
+C1902 la_data_out[102] gnd 0.63fF
+C1903 la_data_in[102] gnd 0.63fF
+C1904 la_oenb[101] gnd 0.63fF
+C1905 la_data_out[101] gnd 0.63fF
+C1906 la_data_in[101] gnd 0.63fF
+C1907 la_oenb[100] gnd 0.63fF
+C1908 la_data_out[100] gnd 0.63fF
+C1909 la_data_in[100] gnd 0.63fF
+C1910 la_oenb[99] gnd 0.63fF
+C1911 la_data_out[99] gnd 0.63fF
+C1912 la_data_in[99] gnd 0.63fF
+C1913 la_oenb[98] gnd 0.63fF
+C1914 la_data_out[98] gnd 0.63fF
+C1915 la_data_in[98] gnd 0.63fF
+C1916 la_oenb[97] gnd 0.63fF
+C1917 la_data_out[97] gnd 0.63fF
+C1918 la_data_in[97] gnd 0.63fF
+C1919 la_oenb[96] gnd 0.63fF
+C1920 la_data_out[96] gnd 0.63fF
+C1921 la_data_in[96] gnd 0.63fF
+C1922 la_oenb[95] gnd 0.63fF
+C1923 la_data_out[95] gnd 0.63fF
+C1924 la_data_in[95] gnd 0.63fF
+C1925 la_oenb[94] gnd 0.63fF
+C1926 la_data_out[94] gnd 0.63fF
+C1927 la_data_in[94] gnd 0.63fF
+C1928 la_oenb[93] gnd 0.63fF
+C1929 la_data_out[93] gnd 0.63fF
+C1930 la_data_in[93] gnd 0.63fF
+C1931 la_oenb[92] gnd 0.63fF
+C1932 la_data_out[92] gnd 0.63fF
+C1933 la_data_in[92] gnd 0.63fF
+C1934 la_oenb[91] gnd 0.63fF
+C1935 la_data_out[91] gnd 0.63fF
+C1936 la_data_in[91] gnd 0.63fF
+C1937 la_oenb[90] gnd 0.63fF
+C1938 la_data_out[90] gnd 0.63fF
+C1939 la_data_in[90] gnd 0.63fF
+C1940 la_oenb[89] gnd 0.63fF
+C1941 la_data_out[89] gnd 0.63fF
+C1942 la_data_in[89] gnd 0.63fF
+C1943 la_oenb[88] gnd 0.63fF
+C1944 la_data_out[88] gnd 0.63fF
+C1945 la_data_in[88] gnd 0.63fF
+C1946 la_oenb[87] gnd 0.63fF
+C1947 la_data_out[87] gnd 0.63fF
+C1948 la_data_in[87] gnd 0.63fF
+C1949 la_oenb[86] gnd 0.63fF
+C1950 la_data_out[86] gnd 0.63fF
+C1951 la_data_in[86] gnd 0.63fF
+C1952 la_oenb[85] gnd 0.63fF
+C1953 la_data_out[85] gnd 0.63fF
+C1954 la_data_in[85] gnd 0.63fF
+C1955 la_oenb[84] gnd 0.63fF
+C1956 la_data_out[84] gnd 0.63fF
+C1957 la_data_in[84] gnd 0.63fF
+C1958 la_oenb[83] gnd 0.63fF
+C1959 la_data_out[83] gnd 0.63fF
+C1960 la_data_in[83] gnd 0.63fF
+C1961 la_oenb[82] gnd 0.63fF
+C1962 la_data_out[82] gnd 0.63fF
+C1963 la_data_in[82] gnd 0.63fF
+C1964 la_oenb[81] gnd 0.63fF
+C1965 la_data_out[81] gnd 0.63fF
+C1966 la_data_in[81] gnd 0.63fF
+C1967 la_oenb[80] gnd 0.63fF
+C1968 la_data_out[80] gnd 0.63fF
+C1969 la_data_in[80] gnd 0.63fF
+C1970 la_oenb[79] gnd 0.63fF
+C1971 la_data_out[79] gnd 0.63fF
+C1972 la_data_in[79] gnd 0.63fF
+C1973 la_oenb[78] gnd 0.63fF
+C1974 la_data_out[78] gnd 0.63fF
+C1975 la_data_in[78] gnd 0.63fF
+C1976 la_oenb[77] gnd 0.63fF
+C1977 la_data_out[77] gnd 0.63fF
+C1978 la_data_in[77] gnd 0.63fF
+C1979 la_oenb[76] gnd 0.63fF
+C1980 la_data_out[76] gnd 0.63fF
+C1981 la_data_in[76] gnd 0.63fF
+C1982 la_oenb[75] gnd 0.63fF
+C1983 la_data_out[75] gnd 0.63fF
+C1984 la_data_in[75] gnd 0.63fF
+C1985 la_oenb[74] gnd 0.63fF
+C1986 la_data_out[74] gnd 0.63fF
+C1987 la_data_in[74] gnd 0.63fF
+C1988 la_oenb[73] gnd 0.63fF
+C1989 la_data_out[73] gnd 0.63fF
+C1990 la_data_in[73] gnd 0.63fF
+C1991 la_oenb[72] gnd 0.63fF
+C1992 la_data_out[72] gnd 0.63fF
+C1993 la_data_in[72] gnd 0.63fF
+C1994 la_oenb[71] gnd 0.63fF
+C1995 la_data_out[71] gnd 0.63fF
+C1996 la_data_in[71] gnd 0.63fF
+C1997 la_oenb[70] gnd 0.63fF
+C1998 la_data_out[70] gnd 0.63fF
+C1999 la_data_in[70] gnd 0.63fF
+C2000 la_oenb[69] gnd 0.63fF
+C2001 la_data_out[69] gnd 0.63fF
+C2002 la_data_in[69] gnd 0.63fF
+C2003 la_oenb[68] gnd 0.63fF
+C2004 la_data_out[68] gnd 0.63fF
+C2005 la_data_in[68] gnd 0.63fF
+C2006 la_oenb[67] gnd 0.63fF
+C2007 la_data_out[67] gnd 0.63fF
+C2008 la_data_in[67] gnd 0.63fF
+C2009 la_oenb[66] gnd 0.63fF
+C2010 la_data_out[66] gnd 0.63fF
+C2011 la_data_in[66] gnd 0.63fF
+C2012 la_oenb[65] gnd 0.63fF
+C2013 la_data_out[65] gnd 0.63fF
+C2014 la_data_in[65] gnd 0.63fF
+C2015 la_oenb[64] gnd 0.63fF
+C2016 la_data_out[64] gnd 0.63fF
+C2017 la_data_in[64] gnd 0.63fF
+C2018 la_oenb[63] gnd 0.63fF
+C2019 la_data_out[63] gnd 0.63fF
+C2020 la_data_in[63] gnd 0.63fF
+C2021 la_oenb[62] gnd 0.63fF
+C2022 la_data_out[62] gnd 0.63fF
+C2023 la_data_in[62] gnd 0.63fF
+C2024 la_oenb[61] gnd 0.63fF
+C2025 la_data_out[61] gnd 0.63fF
+C2026 la_data_in[61] gnd 0.63fF
+C2027 la_oenb[60] gnd 0.63fF
+C2028 la_data_out[60] gnd 0.63fF
+C2029 la_data_in[60] gnd 0.63fF
+C2030 la_oenb[59] gnd 0.63fF
+C2031 la_data_out[59] gnd 0.63fF
+C2032 la_data_in[59] gnd 0.63fF
+C2033 la_oenb[58] gnd 0.63fF
+C2034 la_data_out[58] gnd 0.63fF
+C2035 la_data_in[58] gnd 0.63fF
+C2036 la_oenb[57] gnd 0.63fF
+C2037 la_data_out[57] gnd 0.63fF
+C2038 la_data_in[57] gnd 0.63fF
+C2039 la_oenb[56] gnd 0.63fF
+C2040 la_data_out[56] gnd 0.63fF
+C2041 la_data_in[56] gnd 0.63fF
+C2042 la_oenb[55] gnd 0.63fF
+C2043 la_data_out[55] gnd 0.63fF
+C2044 la_data_in[55] gnd 0.63fF
+C2045 la_oenb[54] gnd 0.63fF
+C2046 la_data_out[54] gnd 0.63fF
+C2047 la_data_in[54] gnd 0.63fF
+C2048 la_oenb[53] gnd 0.63fF
+C2049 la_data_out[53] gnd 0.63fF
+C2050 la_data_in[53] gnd 0.63fF
+C2051 la_oenb[52] gnd 0.63fF
+C2052 la_data_out[52] gnd 0.63fF
+C2053 la_data_in[52] gnd 0.63fF
+C2054 la_oenb[51] gnd 0.63fF
+C2055 la_data_out[51] gnd 0.63fF
+C2056 la_data_in[51] gnd 0.63fF
+C2057 la_oenb[50] gnd 0.63fF
+C2058 la_data_out[50] gnd 0.63fF
+C2059 la_data_in[50] gnd 0.63fF
+C2060 la_oenb[49] gnd 0.63fF
+C2061 la_data_out[49] gnd 0.63fF
+C2062 la_data_in[49] gnd 0.63fF
+C2063 la_oenb[48] gnd 0.63fF
+C2064 la_data_out[48] gnd 0.63fF
+C2065 la_data_in[48] gnd 0.63fF
+C2066 la_oenb[47] gnd 0.63fF
+C2067 la_data_out[47] gnd 0.63fF
+C2068 la_data_in[47] gnd 0.63fF
+C2069 la_oenb[46] gnd 0.63fF
+C2070 la_data_out[46] gnd 0.63fF
+C2071 la_data_in[46] gnd 0.63fF
+C2072 la_oenb[45] gnd 0.63fF
+C2073 la_data_out[45] gnd 0.63fF
+C2074 la_data_in[45] gnd 0.63fF
+C2075 la_oenb[44] gnd 0.63fF
+C2076 la_data_out[44] gnd 0.63fF
+C2077 la_data_in[44] gnd 0.63fF
+C2078 la_oenb[43] gnd 0.63fF
+C2079 la_data_out[43] gnd 0.63fF
+C2080 la_data_in[43] gnd 0.63fF
+C2081 la_oenb[42] gnd 0.63fF
+C2082 la_data_out[42] gnd 0.63fF
+C2083 la_data_in[42] gnd 0.63fF
+C2084 la_oenb[41] gnd 0.63fF
+C2085 la_data_out[41] gnd 0.63fF
+C2086 la_data_in[41] gnd 0.63fF
+C2087 la_oenb[40] gnd 0.63fF
+C2088 la_data_out[40] gnd 0.63fF
+C2089 la_data_in[40] gnd 0.63fF
+C2090 la_oenb[39] gnd 0.63fF
+C2091 la_data_out[39] gnd 0.63fF
+C2092 la_data_in[39] gnd 0.63fF
+C2093 la_oenb[38] gnd 0.63fF
+C2094 la_data_out[38] gnd 0.63fF
+C2095 la_data_in[38] gnd 0.63fF
+C2096 la_oenb[37] gnd 0.63fF
+C2097 la_data_out[37] gnd 0.63fF
+C2098 la_data_in[37] gnd 0.63fF
+C2099 la_oenb[36] gnd 0.63fF
+C2100 la_data_out[36] gnd 0.63fF
+C2101 la_data_in[36] gnd 0.63fF
+C2102 la_oenb[35] gnd 0.63fF
+C2103 la_data_out[35] gnd 0.63fF
+C2104 la_data_in[35] gnd 0.63fF
+C2105 la_oenb[34] gnd 0.63fF
+C2106 la_data_out[34] gnd 0.63fF
+C2107 la_data_in[34] gnd 0.63fF
+C2108 la_oenb[33] gnd 0.63fF
+C2109 la_data_out[33] gnd 0.63fF
+C2110 la_data_in[33] gnd 0.63fF
+C2111 la_oenb[32] gnd 0.63fF
+C2112 la_data_out[32] gnd 0.63fF
+C2113 la_data_in[32] gnd 0.63fF
+C2114 la_oenb[31] gnd 0.63fF
+C2115 la_data_out[31] gnd 0.63fF
+C2116 la_data_in[31] gnd 0.63fF
+C2117 la_oenb[30] gnd 0.63fF
+C2118 la_data_out[30] gnd 0.63fF
+C2119 la_data_in[30] gnd 0.63fF
+C2120 la_oenb[29] gnd 0.63fF
+C2121 la_data_out[29] gnd 0.63fF
+C2122 la_data_in[29] gnd 0.63fF
+C2123 la_oenb[28] gnd 0.63fF
+C2124 la_data_out[28] gnd 0.63fF
+C2125 la_data_in[28] gnd 0.63fF
+C2126 la_oenb[27] gnd 0.63fF
+C2127 la_data_out[27] gnd 0.63fF
+C2128 la_data_in[27] gnd 0.63fF
+C2129 la_oenb[26] gnd 0.63fF
+C2130 la_data_out[26] gnd 0.63fF
+C2131 la_data_in[26] gnd 0.63fF
+C2132 la_oenb[25] gnd 0.63fF
+C2133 la_data_out[25] gnd 0.63fF
+C2134 la_data_in[25] gnd 0.63fF
+C2135 la_oenb[24] gnd 0.63fF
+C2136 la_data_out[24] gnd 0.63fF
+C2137 la_data_in[24] gnd 0.63fF
+C2138 la_oenb[23] gnd 0.63fF
+C2139 la_data_out[23] gnd 0.63fF
+C2140 la_data_in[23] gnd 0.63fF
+C2141 la_oenb[22] gnd 0.63fF
+C2142 la_data_out[22] gnd 0.63fF
+C2143 la_data_in[22] gnd 0.63fF
+C2144 la_oenb[21] gnd 0.63fF
+C2145 la_data_out[21] gnd 0.63fF
+C2146 la_data_in[21] gnd 0.63fF
+C2147 la_oenb[20] gnd 0.63fF
+C2148 la_data_out[20] gnd 0.63fF
+C2149 la_data_in[20] gnd 0.63fF
+C2150 la_oenb[19] gnd 0.63fF
+C2151 la_data_out[19] gnd 0.63fF
+C2152 la_data_in[19] gnd 0.63fF
+C2153 la_oenb[18] gnd 0.63fF
+C2154 la_data_out[18] gnd 0.63fF
+C2155 la_data_in[18] gnd 0.63fF
+C2156 la_oenb[17] gnd 0.63fF
+C2157 la_data_out[17] gnd 0.63fF
+C2158 la_data_in[17] gnd 0.63fF
+C2159 la_oenb[16] gnd 0.63fF
+C2160 la_data_out[16] gnd 0.63fF
+C2161 la_data_in[16] gnd 0.63fF
+C2162 la_oenb[15] gnd 0.63fF
+C2163 la_data_out[15] gnd 0.63fF
+C2164 la_data_in[15] gnd 0.63fF
+C2165 la_oenb[14] gnd 0.63fF
+C2166 la_data_out[14] gnd 0.63fF
+C2167 la_data_in[14] gnd 0.63fF
+C2168 la_oenb[13] gnd 0.63fF
+C2169 la_data_out[13] gnd 0.63fF
+C2170 la_data_in[13] gnd 0.63fF
+C2171 la_oenb[12] gnd 0.63fF
+C2172 la_data_out[12] gnd 0.63fF
+C2173 la_data_in[12] gnd 0.63fF
+C2174 la_oenb[11] gnd 0.63fF
+C2175 la_data_out[11] gnd 0.63fF
+C2176 la_data_in[11] gnd 0.63fF
+C2177 la_oenb[10] gnd 0.63fF
+C2178 la_data_out[10] gnd 0.63fF
+C2179 la_data_in[10] gnd 0.63fF
+C2180 la_oenb[9] gnd 0.63fF
+C2181 la_data_out[9] gnd 0.63fF
+C2182 la_data_in[9] gnd 0.63fF
+C2183 la_oenb[8] gnd 0.63fF
+C2184 la_data_out[8] gnd 0.63fF
+C2185 la_data_in[8] gnd 0.63fF
+C2186 la_oenb[7] gnd 0.63fF
+C2187 la_data_out[7] gnd 0.63fF
+C2188 la_data_in[7] gnd 0.63fF
+C2189 la_oenb[6] gnd 0.63fF
+C2190 la_data_out[6] gnd 0.63fF
+C2191 la_data_in[6] gnd 0.63fF
+C2192 la_oenb[5] gnd 0.63fF
+C2193 la_data_out[5] gnd 0.63fF
+C2194 la_data_in[5] gnd 0.63fF
+C2195 la_oenb[4] gnd 0.63fF
+C2196 la_data_out[4] gnd 0.63fF
+C2197 la_data_in[4] gnd 0.63fF
+C2198 la_oenb[3] gnd 0.63fF
+C2199 la_data_out[3] gnd 0.63fF
+C2200 la_data_in[3] gnd 0.63fF
+C2201 la_oenb[2] gnd 0.63fF
+C2202 la_data_out[2] gnd 0.63fF
+C2203 la_data_in[2] gnd 0.63fF
+C2204 la_oenb[1] gnd 0.63fF
+C2205 la_data_out[1] gnd 0.63fF
+C2206 la_data_in[1] gnd 0.63fF
+C2207 la_oenb[0] gnd 0.63fF
+C2208 la_data_out[0] gnd 0.63fF
+C2209 la_data_in[0] gnd 0.63fF
+C2210 wbs_dat_o[31] gnd 0.63fF
+C2211 wbs_dat_i[31] gnd 0.63fF
+C2212 wbs_adr_i[31] gnd 0.63fF
+C2213 wbs_dat_o[30] gnd 0.63fF
+C2214 wbs_dat_i[30] gnd 0.63fF
+C2215 wbs_adr_i[30] gnd 0.63fF
+C2216 wbs_dat_o[29] gnd 0.63fF
+C2217 wbs_dat_i[29] gnd 0.63fF
+C2218 wbs_adr_i[29] gnd 0.63fF
+C2219 wbs_dat_o[28] gnd 0.63fF
+C2220 wbs_dat_i[28] gnd 0.63fF
+C2221 wbs_adr_i[28] gnd 0.63fF
+C2222 wbs_dat_o[27] gnd 0.63fF
+C2223 wbs_dat_i[27] gnd 0.63fF
+C2224 wbs_adr_i[27] gnd 0.63fF
+C2225 wbs_dat_o[26] gnd 0.63fF
+C2226 wbs_dat_i[26] gnd 0.63fF
+C2227 wbs_adr_i[26] gnd 0.63fF
+C2228 wbs_dat_o[25] gnd 0.63fF
+C2229 wbs_dat_i[25] gnd 0.63fF
+C2230 wbs_adr_i[25] gnd 0.63fF
+C2231 wbs_dat_o[24] gnd 0.63fF
+C2232 wbs_dat_i[24] gnd 0.63fF
+C2233 wbs_adr_i[24] gnd 0.63fF
+C2234 wbs_dat_o[23] gnd 0.63fF
+C2235 wbs_dat_i[23] gnd 0.63fF
+C2236 wbs_adr_i[23] gnd 0.63fF
+C2237 wbs_dat_o[22] gnd 0.63fF
+C2238 wbs_dat_i[22] gnd 0.63fF
+C2239 wbs_adr_i[22] gnd 0.63fF
+C2240 wbs_dat_o[21] gnd 0.63fF
+C2241 wbs_dat_i[21] gnd 0.63fF
+C2242 wbs_adr_i[21] gnd 0.63fF
+C2243 wbs_dat_o[20] gnd 0.63fF
+C2244 wbs_dat_i[20] gnd 0.63fF
+C2245 wbs_adr_i[20] gnd 0.63fF
+C2246 wbs_dat_o[19] gnd 0.63fF
+C2247 wbs_dat_i[19] gnd 0.63fF
+C2248 wbs_adr_i[19] gnd 0.63fF
+C2249 wbs_dat_o[18] gnd 0.63fF
+C2250 wbs_dat_i[18] gnd 0.63fF
+C2251 wbs_adr_i[18] gnd 0.63fF
+C2252 wbs_dat_o[17] gnd 0.63fF
+C2253 wbs_dat_i[17] gnd 0.63fF
+C2254 wbs_adr_i[17] gnd 0.63fF
+C2255 wbs_dat_o[16] gnd 0.63fF
+C2256 wbs_dat_i[16] gnd 0.63fF
+C2257 wbs_adr_i[16] gnd 0.63fF
+C2258 wbs_dat_o[15] gnd 0.63fF
+C2259 wbs_dat_i[15] gnd 0.63fF
+C2260 wbs_adr_i[15] gnd 0.63fF
+C2261 wbs_dat_o[14] gnd 0.63fF
+C2262 wbs_dat_i[14] gnd 0.63fF
+C2263 wbs_adr_i[14] gnd 0.63fF
+C2264 wbs_dat_o[13] gnd 0.63fF
+C2265 wbs_dat_i[13] gnd 0.63fF
+C2266 wbs_adr_i[13] gnd 0.63fF
+C2267 wbs_dat_o[12] gnd 0.63fF
+C2268 wbs_dat_i[12] gnd 0.63fF
+C2269 wbs_adr_i[12] gnd 0.63fF
+C2270 wbs_dat_o[11] gnd 0.63fF
+C2271 wbs_dat_i[11] gnd 0.63fF
+C2272 wbs_adr_i[11] gnd 0.63fF
+C2273 wbs_dat_o[10] gnd 0.63fF
+C2274 wbs_dat_i[10] gnd 0.63fF
+C2275 wbs_adr_i[10] gnd 0.63fF
+C2276 wbs_dat_o[9] gnd 0.63fF
+C2277 wbs_dat_i[9] gnd 0.63fF
+C2278 wbs_adr_i[9] gnd 0.63fF
+C2279 wbs_dat_o[8] gnd 0.63fF
+C2280 wbs_dat_i[8] gnd 0.63fF
+C2281 wbs_adr_i[8] gnd 0.63fF
+C2282 wbs_dat_o[7] gnd 0.63fF
+C2283 wbs_dat_i[7] gnd 0.63fF
+C2284 wbs_adr_i[7] gnd 0.63fF
+C2285 wbs_dat_o[6] gnd 0.63fF
+C2286 wbs_dat_i[6] gnd 0.63fF
+C2287 wbs_adr_i[6] gnd 0.63fF
+C2288 wbs_dat_o[5] gnd 0.63fF
+C2289 wbs_dat_i[5] gnd 0.63fF
+C2290 wbs_adr_i[5] gnd 0.63fF
+C2291 wbs_dat_o[4] gnd 0.63fF
+C2292 wbs_dat_i[4] gnd 0.63fF
+C2293 wbs_adr_i[4] gnd 0.63fF
+C2294 wbs_sel_i[3] gnd 0.63fF
+C2295 wbs_dat_o[3] gnd 0.63fF
+C2296 wbs_dat_i[3] gnd 0.63fF
+C2297 wbs_adr_i[3] gnd 0.63fF
+C2298 wbs_sel_i[2] gnd 0.63fF
+C2299 wbs_dat_o[2] gnd 0.63fF
+C2300 wbs_dat_i[2] gnd 0.63fF
+C2301 wbs_adr_i[2] gnd 0.63fF
+C2302 wbs_sel_i[1] gnd 0.63fF
+C2303 wbs_dat_o[1] gnd 0.63fF
+C2304 wbs_dat_i[1] gnd 0.63fF
+C2305 wbs_adr_i[1] gnd 0.63fF
+C2306 wbs_sel_i[0] gnd 0.63fF
+C2307 wbs_dat_o[0] gnd 0.63fF
+C2308 wbs_dat_i[0] gnd 0.63fF
+C2309 wbs_adr_i[0] gnd 0.63fF
+C2310 wbs_we_i gnd 0.63fF
+C2311 wbs_stb_i gnd 0.63fF
+C2312 wbs_cyc_i gnd 0.63fF
+C2313 wbs_ack_o gnd 0.63fF
+C2314 wb_rst_i gnd 0.63fF
+C2315 wb_clk_i gnd 0.63fF
+C2316 m2_494098_659718# gnd 0.80fF **FLOATING
+C2317 pll_full_0/divider_0/and_0/Z1 gnd 0.65fF
+C2318 pll_full_0/divider_0/and_0/B gnd 2.45fF
+C2319 pll_full_0/divider_0/and_0/A gnd 2.35fF
+C2320 pll_full_0/divider_0/and_0/out1 gnd 2.99fF
+C2321 pll_full_0/divider_0/tspc_2/Z4 gnd 0.86fF
+C2322 pll_full_0/divider_0/tspc_2/Z3 gnd 2.26fF
+C2323 pll_full_0/divider_0/tspc_2/Z2 gnd 1.46fF
+C2324 pll_full_0/divider_0/tspc_2/Z1 gnd 0.99fF
+C2325 pll_full_0/divider_0/nor_0/A gnd 7.08fF
+C2326 pll_full_0/divider_0/tspc_2/a_630_n680# gnd 1.15fF **FLOATING
+C2327 pll_full_0/divider_0/tspc_1/Z4 gnd 0.86fF
+C2328 pll_full_0/divider_0/tspc_1/Z3 gnd 2.26fF
+C2329 pll_full_0/divider_0/tspc_1/Z2 gnd 1.46fF
+C2330 pll_full_0/divider_0/tspc_1/Z1 gnd 0.99fF
+C2331 pll_full_0/divider_0/nor_0/B gnd 7.12fF
+C2332 pll_full_0/divider_0/tspc_1/a_630_n680# gnd 1.15fF **FLOATING
+C2333 pll_full_0/divider_0/tspc_2/Q gnd 3.14fF
+C2334 pll_full_0/divider_0/tspc_0/Z4 gnd 0.86fF
+C2335 pll_full_0/divbuf_0/IN gnd 9.89fF
+C2336 pll_full_0/divider_0/tspc_0/Z3 gnd 2.26fF
+C2337 pll_full_0/divider_0/tspc_0/Z2 gnd 1.46fF
+C2338 pll_full_0/divider_0/tspc_0/Z1 gnd 0.99fF
+C2339 pll_full_0/divider_0/nor_1/B gnd 6.48fF
+C2340 pll_full_0/divider_0/tspc_0/a_630_n680# gnd 1.14fF **FLOATING
+C2341 pll_full_0/divider_0/tspc_1/Q gnd 3.12fF
+C2342 pll_full_0/divider_0/clk gnd 33.42fF
+C2343 pll_full_0/divider_0/prescaler_0/nand_1/z1 gnd 0.36fF
+C2344 pll_full_0/divider_0/prescaler_0/tspc_0/D gnd 2.64fF
+C2345 pll_full_0/divider_0/prescaler_0/tspc_2/Q gnd 3.72fF
+C2346 pll_full_0/divider_0/prescaler_0/tspc_1/Q gnd 3.61fF
+C2347 pll_full_0/divider_0/prescaler_0/nand_0/z1 gnd 0.36fF
+C2348 pll_full_0/divider_0/prescaler_0/tspc_2/D gnd 3.12fF
+C2349 pll_full_0/divider_0/and_0/OUT gnd 5.67fF
+C2350 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 gnd 0.86fF
+C2351 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 gnd 2.26fF
+C2352 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 gnd 1.19fF
+C2353 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 gnd 0.99fF
+C2354 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# gnd 1.47fF **FLOATING
+C2355 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING
+C2356 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 gnd 0.86fF
+C2357 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 gnd 2.26fF
+C2358 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 gnd 1.48fF
+C2359 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 gnd 0.99fF
+C2360 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING
+C2361 pll_full_0/divider_0/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING
+C2362 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 gnd 0.86fF
+C2363 pll_full_0/divider_0/prescaler_0/Out gnd 4.59fF
+C2364 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 gnd 2.26fF
+C2365 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 gnd 1.46fF
+C2366 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 gnd 0.99fF
+C2367 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING
+C2368 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING
+C2369 pll_full_0/divider_0/nor_1/Z1 gnd 1.34fF
+C2370 pll_full_0/divider_0/nor_0/Z1 gnd 1.34fF
+C2371 pll_full_0/divbuf_1/OUT gnd 363.82fF
+C2372 pll_full_0/divbuf_1/OUT5 gnd 350.37fF
+C2373 pll_full_0/divbuf_1/OUT4 gnd 133.72fF
+C2374 pll_full_0/divbuf_1/OUT3 gnd 34.03fF
+C2375 pll_full_0/divbuf_1/OUT2 gnd 8.71fF
+C2376 pll_full_0/divbuf_1/a_492_n240# gnd 2.46fF **FLOATING
+C2377 pll_full_0/divbuf_0/OUT5 gnd 350.37fF
+C2378 pll_full_0/divbuf_0/OUT4 gnd 133.72fF
+C2379 pll_full_0/divbuf_0/OUT3 gnd 34.03fF
+C2380 pll_full_0/divbuf_0/OUT2 gnd 8.71fF
+C2381 pll_full_0/divbuf_0/a_492_n240# gnd 2.46fF **FLOATING
+C2382 pll_full_0/ro_complete_0/cbank_2/v gnd 16.43fF
+C2383 pll_full_0/ro_complete_0/cbank_2/switch_5/vin gnd 0.78fF
+C2384 pll_full_0/ro_complete_0/cbank_2/switch_4/vin gnd 1.50fF
+C2385 pll_full_0/ro_complete_0/cbank_2/switch_2/vin gnd 1.30fF
+C2386 pll_full_0/ro_complete_0/cbank_2/switch_3/vin gnd 0.56fF
+C2387 pll_full_0/ro_complete_0/cbank_2/switch_1/vin gnd 1.14fF
+C2388 pll_full_0/ro_complete_0/cbank_2/switch_0/vin gnd 1.02fF
+C2389 pll_full_0/ro_complete_0/cbank_1/switch_5/vin gnd 0.78fF
+C2390 pll_full_0/ro_complete_0/a0 gnd 5.35fF
+C2391 pll_full_0/ro_complete_0/cbank_1/switch_4/vin gnd 1.50fF
+C2392 pll_full_0/ro_complete_0/a1 gnd 6.54fF
+C2393 pll_full_0/ro_complete_0/cbank_1/switch_2/vin gnd 1.30fF
+C2394 pll_full_0/ro_complete_0/a3 gnd 5.96fF
+C2395 pll_full_0/ro_complete_0/cbank_1/switch_3/vin gnd 0.56fF
+C2396 pll_full_0/ro_complete_0/a2 gnd 5.21fF
+C2397 pll_full_0/ro_complete_0/cbank_1/switch_1/vin gnd 1.14fF
+C2398 pll_full_0/ro_complete_0/a4 gnd 5.81fF
+C2399 pll_full_0/ro_complete_0/cbank_1/switch_0/vin gnd 1.02fF
+C2400 pll_full_0/ro_complete_0/a5 gnd 6.74fF
+C2401 pll_full_0/ro_complete_0/cbank_0/v gnd 15.12fF
+C2402 pll_full_0/ro_complete_0/cbank_0/switch_5/vin gnd 0.78fF
+C2403 pll_full_0/ro_complete_0/cbank_0/switch_4/vin gnd 1.50fF
+C2404 pll_full_0/ro_complete_0/cbank_0/switch_2/vin gnd 1.30fF
+C2405 pll_full_0/ro_complete_0/cbank_0/switch_3/vin gnd 0.56fF
+C2406 pll_full_0/ro_complete_0/cbank_0/switch_1/vin gnd 1.14fF
+C2407 pll_full_0/ro_complete_0/cbank_0/switch_0/vin gnd 1.02fF
+C2408 pll_full_0/ro_complete_0/ro_var_extend_0/vcont gnd 0.27fF
+C2409 pll_full_0/filter_0/a_4216_n5230# gnd 418.90fF **FLOATING
+C2410 pll_full_0/filter_0/a_4216_n2998# gnd 1.39fF **FLOATING
+C2411 pll_full_0/cp_0/down gnd 1.54fF
+C2412 pll_full_0/cp_0/upbar gnd 1.79fF
+C2413 pll_full_0/cp_0/a_7110_n2840# gnd 0.17fF **FLOATING
+C2414 pll_full_0/cp_0/a_3060_n2840# gnd 1.71fF **FLOATING
+C2415 pll_full_0/cp_0/a_7110_0# gnd 0.17fF **FLOATING
+C2416 pll_full_0/cp_0/a_6370_0# gnd 0.40fF **FLOATING
+C2417 pll_full_0/cp_0/a_3060_0# gnd 2.49fF **FLOATING
+C2418 pll_full_0/cp_0/a_1710_0# gnd 7.47fF **FLOATING
+C2419 pll_full_0/pd_0/and_pd_0/Z1 gnd 0.39fF
+C2420 pll_full_0/pd_0/and_pd_0/Out1 gnd 2.22fF
+C2421 pll_full_0/pd_0/tspc_r_1/z5 gnd 1.10fF
+C2422 pll_full_0/pd_0/tspc_r_1/Z4 gnd 1.07fF
+C2423 pll_full_0/pd_0/tspc_r_1/Qbar gnd 0.88fF
+C2424 pll_full_0/pd_0/tspc_r_1/Z2 gnd 1.22fF
+C2425 pll_full_0/pd_0/tspc_r_1/Z1 gnd 0.67fF
+C2426 pll_full_0/pd_0/UP gnd 6.41fF
+C2427 pll_full_0/pd_0/tspc_r_1/Qbar1 gnd 1.34fF
+C2428 pll_full_0/pd_0/tspc_r_1/Z3 gnd 2.12fF
+C2429 pll_full_0/pd_0/REF gnd 6.48fF
+C2430 pll_full_0/pd_0/tspc_r_0/z5 gnd 1.10fF
+C2431 pll_full_0/pd_0/tspc_r_0/Z4 gnd 1.07fF
+C2432 pll_full_0/pd_0/R gnd 3.05fF
+C2433 pll_full_0/pd_0/tspc_r_0/Qbar gnd 0.79fF
+C2434 pll_full_0/pd_0/tspc_r_0/Z2 gnd 1.22fF
+C2435 pll_full_0/pd_0/tspc_r_0/Z1 gnd 0.67fF
+C2436 pll_full_0/pd_0/DOWN gnd 7.34fF
+C2437 pll_full_0/pd_0/tspc_r_0/Qbar1 gnd 1.34fF
+C2438 pll_full_0/pd_0/tspc_r_0/Z3 gnd 2.12fF
+C2439 pll_full_0/pd_0/DIV gnd 372.69fF
+C2440 divbuf_19/OUT gnd 363.82fF
+C2441 divbuf_19/OUT5 gnd 350.37fF
+C2442 divbuf_19/OUT4 gnd 133.72fF
+C2443 divbuf_19/OUT3 gnd 34.03fF
+C2444 divbuf_19/OUT2 gnd 8.71fF
+C2445 divbuf_19/IN gnd 0.89fF
+C2446 divbuf_19/a_492_n240# gnd 2.46fF **FLOATING
+C2447 divbuf_18/OUT gnd 363.82fF
+C2448 divbuf_18/OUT5 gnd 350.37fF
+C2449 divbuf_18/OUT4 gnd 133.72fF
+C2450 divbuf_18/OUT3 gnd 34.03fF
+C2451 divbuf_18/OUT2 gnd 8.71fF
+C2452 divbuf_18/IN gnd 0.89fF
+C2453 divbuf_18/a_492_n240# gnd 2.46fF **FLOATING
+C2454 divbuf_17/OUT gnd 363.82fF
+C2455 divbuf_17/OUT5 gnd 350.37fF
+C2456 divbuf_17/OUT4 gnd 133.72fF
+C2457 divbuf_17/OUT3 gnd 34.03fF
+C2458 divbuf_17/OUT2 gnd 8.71fF
+C2459 divbuf_17/IN gnd 0.89fF
+C2460 divbuf_17/a_492_n240# gnd 2.46fF **FLOATING
+C2461 divider_2/and_0/Z1 gnd 0.74fF
+C2462 divider_2/and_0/B gnd 2.25fF
+C2463 divider_2/and_0/A gnd 2.19fF
+C2464 divider_2/and_0/out1 gnd 2.93fF
+C2465 divider_2/tspc_2/Z4 gnd 0.86fF
+C2466 divider_2/tspc_2/Z3 gnd 2.26fF
+C2467 divider_2/tspc_2/Z2 gnd 1.46fF
+C2468 divider_2/tspc_2/Z1 gnd 0.99fF
+C2469 divider_2/nor_0/A gnd 7.04fF
+C2470 divider_2/tspc_2/a_630_n680# gnd 1.15fF **FLOATING
+C2471 divider_2/tspc_1/Z4 gnd 0.86fF
+C2472 divider_2/tspc_1/Z3 gnd 2.26fF
+C2473 divider_2/tspc_1/Z2 gnd 1.46fF
+C2474 divider_2/tspc_1/Z1 gnd 0.99fF
+C2475 divider_2/nor_0/B gnd 7.05fF
+C2476 divider_2/tspc_1/a_630_n680# gnd 1.15fF **FLOATING
+C2477 divider_2/tspc_2/Q gnd 3.14fF
+C2478 divider_2/tspc_0/Z4 gnd 0.86fF
+C2479 divider_2/Out gnd 1.60fF
+C2480 divider_2/tspc_0/Z3 gnd 2.26fF
+C2481 divider_2/tspc_0/Z2 gnd 1.46fF
+C2482 divider_2/tspc_0/Z1 gnd 0.99fF
+C2483 divider_2/nor_1/B gnd 6.33fF
+C2484 divider_2/tspc_0/a_630_n680# gnd 1.14fF **FLOATING
+C2485 divider_2/tspc_1/Q gnd 3.12fF
+C2486 divider_2/clk gnd 5.63fF
+C2487 divider_2/prescaler_0/nand_1/z1 gnd 0.36fF
+C2488 divider_2/prescaler_0/tspc_0/D gnd 2.64fF
+C2489 divider_2/prescaler_0/tspc_2/Q gnd 3.74fF
+C2490 divider_2/prescaler_0/tspc_1/Q gnd 3.61fF
+C2491 divider_2/prescaler_0/nand_0/z1 gnd 0.36fF
+C2492 divider_2/prescaler_0/tspc_2/D gnd 3.12fF
+C2493 divider_2/and_0/OUT gnd 5.62fF
+C2494 divider_2/prescaler_0/tspc_2/Z4 gnd 0.86fF
+C2495 divider_2/prescaler_0/tspc_2/Z3 gnd 2.26fF
+C2496 divider_2/prescaler_0/tspc_2/Z2 gnd 1.46fF
+C2497 divider_2/prescaler_0/tspc_2/Z1 gnd 0.99fF
+C2498 divider_2/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING
+C2499 divider_2/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING
+C2500 divider_2/prescaler_0/tspc_1/Z4 gnd 0.86fF
+C2501 divider_2/prescaler_0/tspc_1/Z3 gnd 2.26fF
+C2502 divider_2/prescaler_0/tspc_1/Z2 gnd 1.48fF
+C2503 divider_2/prescaler_0/tspc_1/Z1 gnd 0.99fF
+C2504 divider_2/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING
+C2505 divider_2/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING
+C2506 divider_2/prescaler_0/tspc_0/Z4 gnd 0.86fF
+C2507 divider_2/prescaler_0/Out gnd 4.59fF
+C2508 divider_2/prescaler_0/tspc_0/Z3 gnd 2.26fF
+C2509 divider_2/prescaler_0/tspc_0/Z2 gnd 1.46fF
+C2510 divider_2/prescaler_0/tspc_0/Z1 gnd 0.99fF
+C2511 divider_2/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING
+C2512 divider_2/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING
+C2513 divider_2/nor_1/Z1 gnd 1.34fF
+C2514 divider_2/mc2 gnd 5.29fF
+C2515 divider_2/nor_0/Z1 gnd 1.34fF
+C2516 divbuf_16/OUT gnd 363.82fF
+C2517 divbuf_16/OUT5 gnd 350.37fF
+C2518 divbuf_16/OUT4 gnd 133.72fF
+C2519 divbuf_16/OUT3 gnd 34.03fF
+C2520 divbuf_16/OUT2 gnd 8.71fF
+C2521 divbuf_16/IN gnd 0.89fF
+C2522 divbuf_16/a_492_n240# gnd 2.46fF **FLOATING
+C2523 divider_1/and_0/Z1 gnd 0.74fF
+C2524 divider_1/and_0/B gnd 2.25fF
+C2525 divider_1/and_0/A gnd 2.19fF
+C2526 divider_1/and_0/out1 gnd 2.93fF
+C2527 divider_1/tspc_2/Z4 gnd 0.86fF
+C2528 divider_1/tspc_2/Z3 gnd 2.26fF
+C2529 divider_1/tspc_2/Z2 gnd 1.46fF
+C2530 divider_1/tspc_2/Z1 gnd 0.99fF
+C2531 divider_1/nor_0/A gnd 7.04fF
+C2532 divider_1/tspc_2/a_630_n680# gnd 1.15fF **FLOATING
+C2533 divider_1/tspc_1/Z4 gnd 0.86fF
+C2534 divider_1/tspc_1/Z3 gnd 2.26fF
+C2535 divider_1/tspc_1/Z2 gnd 1.46fF
+C2536 divider_1/tspc_1/Z1 gnd 0.99fF
+C2537 divider_1/nor_0/B gnd 7.05fF
+C2538 divider_1/tspc_1/a_630_n680# gnd 1.15fF **FLOATING
+C2539 divider_1/tspc_2/Q gnd 3.14fF
+C2540 divider_1/tspc_0/Z4 gnd 0.86fF
+C2541 divider_1/Out gnd 1.60fF
+C2542 divider_1/tspc_0/Z3 gnd 2.26fF
+C2543 divider_1/tspc_0/Z2 gnd 1.46fF
+C2544 divider_1/tspc_0/Z1 gnd 0.99fF
+C2545 divider_1/nor_1/B gnd 6.33fF
+C2546 divider_1/tspc_0/a_630_n680# gnd 1.14fF **FLOATING
+C2547 divider_1/tspc_1/Q gnd 3.12fF
+C2548 divider_1/clk gnd 5.63fF
+C2549 divider_1/prescaler_0/nand_1/z1 gnd 0.36fF
+C2550 divider_1/prescaler_0/tspc_0/D gnd 2.64fF
+C2551 divider_1/prescaler_0/tspc_2/Q gnd 3.74fF
+C2552 divider_1/prescaler_0/tspc_1/Q gnd 3.61fF
+C2553 divider_1/prescaler_0/nand_0/z1 gnd 0.36fF
+C2554 divider_1/prescaler_0/tspc_2/D gnd 3.12fF
+C2555 divider_1/and_0/OUT gnd 5.62fF
+C2556 divider_1/prescaler_0/tspc_2/Z4 gnd 0.86fF
+C2557 divider_1/prescaler_0/tspc_2/Z3 gnd 2.26fF
+C2558 divider_1/prescaler_0/tspc_2/Z2 gnd 1.46fF
+C2559 divider_1/prescaler_0/tspc_2/Z1 gnd 0.99fF
+C2560 divider_1/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING
+C2561 divider_1/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING
+C2562 divider_1/prescaler_0/tspc_1/Z4 gnd 0.86fF
+C2563 divider_1/prescaler_0/tspc_1/Z3 gnd 2.26fF
+C2564 divider_1/prescaler_0/tspc_1/Z2 gnd 1.48fF
+C2565 divider_1/prescaler_0/tspc_1/Z1 gnd 0.99fF
+C2566 divider_1/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING
+C2567 divider_1/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING
+C2568 divider_1/prescaler_0/tspc_0/Z4 gnd 0.86fF
+C2569 divider_1/prescaler_0/Out gnd 4.59fF
+C2570 divider_1/prescaler_0/tspc_0/Z3 gnd 2.26fF
+C2571 divider_1/prescaler_0/tspc_0/Z2 gnd 1.46fF
+C2572 divider_1/prescaler_0/tspc_0/Z1 gnd 0.99fF
+C2573 divider_1/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING
+C2574 divider_1/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING
+C2575 divider_1/nor_1/Z1 gnd 1.34fF
+C2576 divider_1/mc2 gnd 5.29fF
+C2577 divider_1/nor_0/Z1 gnd 1.34fF
+C2578 divbuf_15/OUT gnd 363.82fF
+C2579 divbuf_15/OUT5 gnd 350.37fF
+C2580 divbuf_15/OUT4 gnd 133.72fF
+C2581 divbuf_15/OUT3 gnd 34.03fF
+C2582 divbuf_15/OUT2 gnd 8.71fF
+C2583 divbuf_15/IN gnd 0.89fF
+C2584 divbuf_15/a_492_n240# gnd 2.46fF **FLOATING
+C2585 divbuf_25/OUT gnd 363.82fF
+C2586 divbuf_25/OUT5 gnd 350.37fF
+C2587 divbuf_25/OUT4 gnd 133.72fF
+C2588 divbuf_25/OUT3 gnd 34.03fF
+C2589 divbuf_25/OUT2 gnd 8.71fF
+C2590 divbuf_25/IN gnd 0.89fF
+C2591 divbuf_25/a_492_n240# gnd 2.46fF **FLOATING
+C2592 divbuf_14/OUT gnd 363.82fF
+C2593 divbuf_14/OUT5 gnd 350.37fF
+C2594 divbuf_14/OUT4 gnd 133.72fF
+C2595 divbuf_14/OUT3 gnd 34.03fF
+C2596 divbuf_14/OUT2 gnd 8.71fF
+C2597 divbuf_14/IN gnd 0.89fF
+C2598 divbuf_14/a_492_n240# gnd 2.46fF **FLOATING
+C2599 divider_0/and_0/Z1 gnd 0.74fF
+C2600 divider_0/and_0/B gnd 2.25fF
+C2601 divider_0/and_0/A gnd 2.19fF
+C2602 divider_0/and_0/out1 gnd 2.93fF
+C2603 divider_0/tspc_2/Z4 gnd 0.86fF
+C2604 divider_0/tspc_2/Z3 gnd 2.26fF
+C2605 divider_0/tspc_2/Z2 gnd 1.46fF
+C2606 divider_0/tspc_2/Z1 gnd 0.99fF
+C2607 divider_0/nor_0/A gnd 7.04fF
+C2608 divider_0/tspc_2/a_630_n680# gnd 1.15fF **FLOATING
+C2609 divider_0/tspc_1/Z4 gnd 0.86fF
+C2610 divider_0/tspc_1/Z3 gnd 2.26fF
+C2611 divider_0/tspc_1/Z2 gnd 1.46fF
+C2612 divider_0/tspc_1/Z1 gnd 0.99fF
+C2613 divider_0/nor_0/B gnd 7.05fF
+C2614 divider_0/tspc_1/a_630_n680# gnd 1.15fF **FLOATING
+C2615 divider_0/tspc_2/Q gnd 3.14fF
+C2616 divider_0/tspc_0/Z4 gnd 0.86fF
+C2617 divider_0/Out gnd 1.60fF
+C2618 divider_0/tspc_0/Z3 gnd 2.26fF
+C2619 divider_0/tspc_0/Z2 gnd 1.46fF
+C2620 divider_0/tspc_0/Z1 gnd 0.99fF
+C2621 divider_0/nor_1/B gnd 6.33fF
+C2622 divider_0/tspc_0/a_630_n680# gnd 1.14fF **FLOATING
+C2623 divider_0/tspc_1/Q gnd 3.12fF
+C2624 divider_0/clk gnd 5.63fF
+C2625 divider_0/prescaler_0/nand_1/z1 gnd 0.36fF
+C2626 divider_0/prescaler_0/tspc_0/D gnd 2.64fF
+C2627 divider_0/prescaler_0/tspc_2/Q gnd 3.64fF
+C2628 divider_0/prescaler_0/tspc_1/Q gnd 3.61fF
+C2629 divider_0/prescaler_0/nand_0/z1 gnd 0.36fF
+C2630 divider_0/prescaler_0/tspc_2/D gnd 3.12fF
+C2631 divider_0/and_0/OUT gnd 5.62fF
+C2632 divider_0/prescaler_0/tspc_2/Z4 gnd 0.86fF
+C2633 divider_0/prescaler_0/tspc_2/Z3 gnd 2.26fF
+C2634 divider_0/prescaler_0/tspc_2/Z2 gnd 1.46fF
+C2635 divider_0/prescaler_0/tspc_2/Z1 gnd 0.99fF
+C2636 divider_0/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING
+C2637 divider_0/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING
+C2638 divider_0/prescaler_0/tspc_1/Z4 gnd 0.86fF
+C2639 divider_0/prescaler_0/tspc_1/Z3 gnd 2.26fF
+C2640 divider_0/prescaler_0/tspc_1/Z2 gnd 1.48fF
+C2641 divider_0/prescaler_0/tspc_1/Z1 gnd 0.99fF
+C2642 divider_0/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING
+C2643 divider_0/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING
+C2644 divider_0/prescaler_0/tspc_0/Z4 gnd 0.86fF
+C2645 divider_0/prescaler_0/Out gnd 4.59fF
+C2646 divider_0/prescaler_0/tspc_0/Z3 gnd 2.26fF
+C2647 divider_0/prescaler_0/tspc_0/Z2 gnd 1.46fF
+C2648 divider_0/prescaler_0/tspc_0/Z1 gnd 0.99fF
+C2649 divider_0/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING
+C2650 divider_0/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING
+C2651 divider_0/nor_1/Z1 gnd 1.34fF
+C2652 divider_0/mc2 gnd 5.29fF
+C2653 divider_0/nor_0/Z1 gnd 1.34fF
+C2654 divbuf_24/OUT gnd 363.82fF
+C2655 divbuf_24/OUT5 gnd 350.37fF
+C2656 divbuf_24/OUT4 gnd 133.72fF
+C2657 divbuf_24/OUT3 gnd 34.03fF
+C2658 divbuf_24/OUT2 gnd 8.71fF
+C2659 divbuf_24/IN gnd 0.89fF
+C2660 divbuf_24/a_492_n240# gnd 2.46fF **FLOATING
+C2661 divbuf_13/OUT gnd 363.82fF
+C2662 divbuf_13/OUT5 gnd 350.37fF
+C2663 divbuf_13/OUT4 gnd 133.72fF
+C2664 divbuf_13/OUT3 gnd 34.03fF
+C2665 divbuf_13/OUT2 gnd 8.71fF
+C2666 divbuf_13/IN gnd 0.89fF
+C2667 divbuf_13/a_492_n240# gnd 2.46fF **FLOATING
+C2668 divbuf_9/OUT gnd 363.82fF
+C2669 divbuf_9/OUT5 gnd 350.37fF
+C2670 divbuf_9/OUT4 gnd 133.72fF
+C2671 divbuf_9/OUT3 gnd 34.03fF
+C2672 divbuf_9/OUT2 gnd 8.71fF
+C2673 divbuf_9/IN gnd 0.89fF
+C2674 divbuf_9/a_492_n240# gnd 2.46fF **FLOATING
+C2675 divbuf_23/OUT gnd 363.82fF
+C2676 divbuf_23/OUT5 gnd 350.37fF
+C2677 divbuf_23/OUT4 gnd 133.72fF
+C2678 divbuf_23/OUT3 gnd 34.03fF
+C2679 divbuf_23/OUT2 gnd 8.71fF
+C2680 divbuf_23/IN gnd 0.89fF
+C2681 divbuf_23/a_492_n240# gnd 2.46fF **FLOATING
+C2682 divbuf_12/OUT gnd 363.82fF
+C2683 divbuf_12/OUT5 gnd 350.37fF
+C2684 divbuf_12/OUT4 gnd 133.72fF
+C2685 divbuf_12/OUT3 gnd 34.03fF
+C2686 divbuf_12/OUT2 gnd 8.71fF
+C2687 divbuf_12/IN gnd 0.89fF
+C2688 divbuf_12/a_492_n240# gnd 2.46fF **FLOATING
+C2689 divbuf_8/OUT gnd 363.82fF
+C2690 divbuf_8/OUT5 gnd 350.37fF
+C2691 divbuf_8/OUT4 gnd 133.72fF
+C2692 divbuf_8/OUT3 gnd 34.03fF
+C2693 divbuf_8/OUT2 gnd 8.71fF
+C2694 divbuf_8/IN gnd 0.89fF
+C2695 divbuf_8/a_492_n240# gnd 2.46fF **FLOATING
+C2696 divbuf_22/OUT gnd 363.82fF
+C2697 divbuf_22/OUT5 gnd 350.37fF
+C2698 divbuf_22/OUT4 gnd 133.72fF
+C2699 divbuf_22/OUT3 gnd 34.03fF
+C2700 divbuf_22/OUT2 gnd 8.71fF
+C2701 divbuf_22/IN gnd 0.89fF
+C2702 divbuf_22/a_492_n240# gnd 2.46fF **FLOATING
+C2703 divbuf_11/OUT gnd 363.82fF
+C2704 divbuf_11/OUT5 gnd 350.37fF
+C2705 divbuf_11/OUT4 gnd 133.72fF
+C2706 divbuf_11/OUT3 gnd 34.03fF
+C2707 divbuf_11/OUT2 gnd 8.71fF
+C2708 divbuf_11/IN gnd 0.89fF
+C2709 divbuf_11/a_492_n240# gnd 2.46fF **FLOATING
+C2710 divbuf_7/OUT gnd 363.82fF
+C2711 divbuf_7/OUT5 gnd 350.37fF
+C2712 divbuf_7/OUT4 gnd 133.72fF
+C2713 divbuf_7/OUT3 gnd 34.03fF
+C2714 divbuf_7/OUT2 gnd 8.71fF
+C2715 divbuf_7/IN gnd 0.89fF
+C2716 divbuf_7/a_492_n240# gnd 2.46fF **FLOATING
+C2717 divbuf_21/OUT gnd 363.82fF
+C2718 divbuf_21/OUT5 gnd 350.37fF
+C2719 divbuf_21/OUT4 gnd 133.72fF
+C2720 divbuf_21/OUT3 gnd 34.03fF
+C2721 divbuf_21/OUT2 gnd 8.71fF
+C2722 divbuf_21/IN gnd 0.89fF
+C2723 divbuf_21/a_492_n240# gnd 2.46fF **FLOATING
+C2724 divbuf_20/OUT gnd 363.82fF
+C2725 divbuf_20/OUT5 gnd 350.37fF
+C2726 divbuf_20/OUT4 gnd 133.72fF
+C2727 divbuf_20/OUT3 gnd 34.03fF
+C2728 divbuf_20/OUT2 gnd 8.71fF
+C2729 divbuf_20/IN gnd 0.89fF
+C2730 divbuf_20/a_492_n240# gnd 2.46fF **FLOATING
+C2731 divbuf_10/OUT gnd 363.82fF
+C2732 divbuf_10/OUT5 gnd 350.37fF
+C2733 divbuf_10/OUT4 gnd 133.72fF
+C2734 divbuf_10/OUT3 gnd 34.03fF
+C2735 divbuf_10/OUT2 gnd 8.71fF
+C2736 divbuf_10/IN gnd 0.89fF
+C2737 divbuf_10/a_492_n240# gnd 2.46fF **FLOATING
+C2738 divbuf_6/OUT gnd 363.82fF
+C2739 divbuf_6/OUT5 gnd 350.37fF
+C2740 divbuf_6/OUT4 gnd 133.72fF
+C2741 divbuf_6/OUT3 gnd 34.03fF
+C2742 divbuf_6/OUT2 gnd 8.71fF
+C2743 divbuf_6/IN gnd 0.89fF
+C2744 divbuf_6/a_492_n240# gnd 2.46fF **FLOATING
+C2745 divbuf_5/OUT gnd 363.82fF
+C2746 divbuf_5/OUT5 gnd 350.37fF
+C2747 divbuf_5/OUT4 gnd 133.72fF
+C2748 divbuf_5/OUT3 gnd 34.03fF
+C2749 divbuf_5/OUT2 gnd 8.71fF
+C2750 divbuf_5/IN gnd 0.89fF
+C2751 divbuf_5/a_492_n240# gnd 2.46fF **FLOATING
+C2752 divbuf_4/OUT gnd 363.82fF
+C2753 divbuf_4/OUT5 gnd 350.37fF
+C2754 divbuf_4/OUT4 gnd 133.72fF
+C2755 divbuf_4/OUT3 gnd 34.03fF
+C2756 divbuf_4/OUT2 gnd 8.71fF
+C2757 divbuf_4/IN gnd 0.89fF
+C2758 divbuf_4/a_492_n240# gnd 2.46fF **FLOATING
+C2759 divbuf_3/OUT gnd 363.82fF
+C2760 divbuf_3/OUT5 gnd 350.37fF
+C2761 divbuf_3/OUT4 gnd 133.72fF
+C2762 divbuf_3/OUT3 gnd 34.03fF
+C2763 divbuf_3/OUT2 gnd 8.71fF
+C2764 divbuf_3/IN gnd 0.89fF
+C2765 divbuf_3/a_492_n240# gnd 2.46fF **FLOATING
+C2766 divbuf_2/OUT gnd 363.82fF
+C2767 divbuf_2/OUT5 gnd 350.37fF
+C2768 divbuf_2/OUT4 gnd 133.72fF
+C2769 divbuf_2/OUT3 gnd 34.03fF
+C2770 divbuf_2/OUT2 gnd 8.71fF
+C2771 divbuf_2/IN gnd 0.89fF
+C2772 divbuf_2/a_492_n240# gnd 2.46fF **FLOATING
+C2773 divbuf_1/OUT gnd 363.82fF
+C2774 divbuf_1/OUT5 gnd 350.37fF
+C2775 divbuf_1/OUT4 gnd 133.72fF
+C2776 divbuf_1/OUT3 gnd 34.03fF
+C2777 divbuf_1/OUT2 gnd 8.71fF
+C2778 divbuf_1/IN gnd 0.89fF
+C2779 divbuf_1/a_492_n240# gnd 2.46fF **FLOATING
+C2780 ro_complete_1/cbank_2/v gnd 16.43fF
+C2781 ro_complete_1/cbank_2/switch_5/vin gnd 0.78fF
+C2782 ro_complete_1/cbank_2/switch_4/vin gnd 1.50fF
+C2783 ro_complete_1/cbank_2/switch_2/vin gnd 1.30fF
+C2784 ro_complete_1/cbank_2/switch_3/vin gnd 0.56fF
+C2785 ro_complete_1/cbank_2/switch_1/vin gnd 1.14fF
+C2786 ro_complete_1/cbank_2/switch_0/vin gnd 1.02fF
+C2787 ro_complete_1/cbank_1/v gnd 16.43fF
+C2788 ro_complete_1/cbank_1/switch_5/vin gnd 0.78fF
+C2789 ro_complete_1/a0 gnd 5.35fF
+C2790 ro_complete_1/cbank_1/switch_4/vin gnd 1.50fF
+C2791 ro_complete_1/a1 gnd 6.54fF
+C2792 ro_complete_1/cbank_1/switch_2/vin gnd 1.30fF
+C2793 ro_complete_1/a3 gnd 5.96fF
+C2794 ro_complete_1/cbank_1/switch_3/vin gnd 0.56fF
+C2795 ro_complete_1/a2 gnd 5.21fF
+C2796 ro_complete_1/cbank_1/switch_1/vin gnd 1.14fF
+C2797 ro_complete_1/a4 gnd 5.81fF
+C2798 ro_complete_1/cbank_1/switch_0/vin gnd 1.02fF
+C2799 ro_complete_1/a5 gnd 6.74fF
+C2800 ro_complete_1/cbank_0/v gnd 15.12fF
+C2801 ro_complete_1/cbank_0/switch_5/vin gnd 0.78fF
+C2802 ro_complete_1/cbank_0/switch_4/vin gnd 1.50fF
+C2803 ro_complete_1/cbank_0/switch_2/vin gnd 1.30fF
+C2804 ro_complete_1/cbank_0/switch_3/vin gnd 0.56fF
+C2805 ro_complete_1/cbank_0/switch_1/vin gnd 1.14fF
+C2806 ro_complete_1/cbank_0/switch_0/vin gnd 1.02fF
+C2807 ro_complete_1/ro_var_extend_0/vcont gnd 0.27fF
+C2808 divbuf_0/OUT gnd 363.82fF
+C2809 divbuf_0/OUT5 gnd 350.37fF
+C2810 divbuf_0/OUT4 gnd 133.72fF
+C2811 divbuf_0/OUT3 gnd 34.03fF
+C2812 divbuf_0/OUT2 gnd 8.71fF
+C2813 divbuf_0/IN gnd 0.89fF
+C2814 divbuf_0/a_492_n240# gnd 2.46fF **FLOATING
+C2815 ro_complete_0/cbank_2/v gnd 16.43fF
+C2816 ro_complete_0/cbank_2/switch_5/vin gnd 0.78fF
+C2817 ro_complete_0/cbank_2/switch_4/vin gnd 1.50fF
+C2818 ro_complete_0/cbank_2/switch_2/vin gnd 1.30fF
+C2819 ro_complete_0/cbank_2/switch_3/vin gnd 0.56fF
+C2820 ro_complete_0/cbank_2/switch_1/vin gnd 1.14fF
+C2821 ro_complete_0/cbank_2/switch_0/vin gnd 1.02fF
+C2822 ro_complete_0/cbank_1/v gnd 16.46fF
+C2823 ro_complete_0/cbank_1/switch_5/vin gnd 0.78fF
+C2824 ro_complete_0/a0 gnd 5.35fF
+C2825 ro_complete_0/cbank_1/switch_4/vin gnd 1.50fF
+C2826 ro_complete_0/a1 gnd 6.54fF
+C2827 ro_complete_0/cbank_1/switch_2/vin gnd 1.30fF
+C2828 ro_complete_0/a3 gnd 5.96fF
+C2829 ro_complete_0/cbank_1/switch_3/vin gnd 0.56fF
+C2830 ro_complete_0/a2 gnd 5.21fF
+C2831 ro_complete_0/cbank_1/switch_1/vin gnd 1.14fF
+C2832 ro_complete_0/a4 gnd 5.81fF
+C2833 ro_complete_0/cbank_1/switch_0/vin gnd 1.02fF
+C2834 ro_complete_0/a5 gnd 6.74fF
+C2835 ro_complete_0/cbank_0/v gnd 15.12fF
+C2836 ro_complete_0/cbank_0/switch_5/vin gnd 0.78fF
+C2837 ro_complete_0/cbank_0/switch_4/vin gnd 1.50fF
+C2838 ro_complete_0/cbank_0/switch_2/vin gnd 1.30fF
+C2839 ro_complete_0/cbank_0/switch_3/vin gnd 0.56fF
+C2840 ro_complete_0/cbank_0/switch_1/vin gnd 1.14fF
+C2841 ro_complete_0/cbank_0/switch_0/vin gnd 1.02fF
+C2842 ro_complete_0/ro_var_extend_0/vcont gnd 0.27fF
+C2843 filter_0/v gnd 85.69fF
+C2844 filter_0/a_4216_n5230# gnd 418.47fF **FLOATING
+C2845 filter_0/a_4216_n2998# gnd 1.03fF **FLOATING
+C2846 cp_0/down gnd 1.54fF
+C2847 cp_0/vbias gnd 2.41fF
+C2848 cp_0/out gnd 5.34fF
+C2849 cp_0/upbar gnd 1.50fF
+C2850 cp_0/a_7110_n2840# gnd 0.17fF **FLOATING
+C2851 cp_0/a_3060_n2840# gnd 1.71fF **FLOATING
+C2852 cp_0/a_7110_0# gnd 0.17fF **FLOATING
+C2853 cp_0/a_6370_0# gnd 0.40fF **FLOATING
+C2854 cp_0/a_3060_0# gnd 1.66fF **FLOATING
+C2855 cp_0/a_1710_0# gnd 5.89fF **FLOATING
+C2856 cp_0/a_1710_n2840# gnd 4.91fF **FLOATING
+C2857 cp_0/a_10_n50# gnd 2.96fF **FLOATING
+C2858 pd_1/and_pd_0/Z1 gnd 0.39fF
+C2859 pd_1/and_pd_0/Out1 gnd 2.22fF
+C2860 pd_1/tspc_r_1/z5 gnd 1.10fF
+C2861 pd_1/tspc_r_1/Z4 gnd 1.07fF
+C2862 pd_1/tspc_r_1/Qbar gnd 0.88fF
+C2863 pd_1/tspc_r_1/Z2 gnd 1.22fF
+C2864 pd_1/tspc_r_1/Z1 gnd 0.67fF
+C2865 pd_1/UP gnd 2.21fF
+C2866 pd_1/tspc_r_1/Qbar1 gnd 1.34fF
+C2867 pd_1/tspc_r_1/Z3 gnd 2.12fF
+C2868 pd_1/REF gnd 1.80fF
+C2869 pd_1/tspc_r_0/z5 gnd 1.10fF
+C2870 pd_1/tspc_r_0/Z4 gnd 1.07fF
+C2871 pd_1/R gnd 3.05fF
+C2872 pd_1/tspc_r_0/Qbar gnd 0.79fF
+C2873 pd_1/tspc_r_0/Z2 gnd 1.22fF
+C2874 pd_1/tspc_r_0/Z1 gnd 0.67fF
+C2875 pd_1/DOWN gnd 3.08fF
+C2876 pd_1/tspc_r_0/Qbar1 gnd 1.34fF
+C2877 pd_1/tspc_r_0/Z3 gnd 2.12fF
+C2878 pd_1/DIV gnd 1.82fF
+C2879 pd_0/and_pd_0/Z1 gnd 0.39fF
+C2880 pd_0/and_pd_0/Out1 gnd 2.22fF
+C2881 pd_0/tspc_r_1/z5 gnd 1.10fF
+C2882 pd_0/tspc_r_1/Z4 gnd 1.07fF
+C2883 pd_0/tspc_r_1/Qbar gnd 0.88fF
+C2884 pd_0/tspc_r_1/Z2 gnd 1.22fF
+C2885 pd_0/tspc_r_1/Z1 gnd 0.67fF
+C2886 pd_0/UP gnd 2.21fF
+C2887 pd_0/tspc_r_1/Qbar1 gnd 1.34fF
+C2888 pd_0/tspc_r_1/Z3 gnd 2.12fF
+C2889 pd_0/REF gnd 1.80fF
+C2890 pd_0/tspc_r_0/z5 gnd 1.10fF
+C2891 pd_0/tspc_r_0/Z4 gnd 1.07fF
+C2892 pd_0/R gnd 3.05fF
+C2893 pd_0/tspc_r_0/Qbar gnd 0.79fF
+C2894 pd_0/tspc_r_0/Z2 gnd 1.22fF
+C2895 pd_0/tspc_r_0/Z1 gnd 0.67fF
+C2896 pd_0/DOWN gnd 3.08fF
+C2897 pd_0/tspc_r_0/Qbar1 gnd 1.34fF
+C2898 pd_0/tspc_r_0/Z3 gnd 2.12fF
+C2899 pd_0/DIV gnd 1.82fF
 .ends
commit	a14034db5ec85b6452b1a7d1650eaa3883f59170	[log] [tgz]
author	adithyasunil26 <adithyasunil26@gmail.com>	Tue Jan 25 03:01:32 2022 +0530
committer	adithyasunil26 <adithyasunil26@gmail.com>	Tue Jan 25 03:01:32 2022 +0530
tree	6a41f0288a98d38dbfdb2d191e1dde22797e2665
parent	fac858b72cdf806b199c2643ab07ad9818f2ec37 [diff]