drc-complete-fix

commit: 54e3f87ae6fdcad71c81cafd3443b9d3549b8144 [log] [tgz]
author: adithyasunil26 <adithyasunil26@gmail.com> Mon Mar 21 04:21:44 2022 +0530
committer: adithyasunil26 <adithyasunil26@gmail.com> Mon Mar 21 04:21:44 2022 +0530
tree: 589eea87da2500a606743ae7a38df2cda6dd16d4
parent: 82abb99dd157bc10329de2562e03990e1f5355f5 [diff]
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz
index 390d6d0..4e92997 100644
--- a/gds/user_analog_project_wrapper.gds.gz
+++ b/gds/user_analog_project_wrapper.gds.gz
Binary files differ

diff --git a/mag/cp_buffered.mag b/mag/cp_buffered.mag
index f876789..98571c2 100644
--- a/mag/cp_buffered.mag
+++ b/mag/cp_buffered.mag

@@ -1,6 +1,21 @@
 magic
 tech sky130A
-timestamp 1647806434
+timestamp 1647816110
+<< nwell >>
+rect 2072 1415 2306 1709
+rect 3397 1364 3631 1658
+<< nsubdiff >>
+rect 2117 1574 2258 1581
+rect 2117 1467 2129 1574
+rect 2242 1467 2258 1574
+rect 2117 1451 2258 1467
+rect 3441 1518 3576 1543
+rect 3441 1428 3465 1518
+rect 3555 1428 3576 1518
+rect 3441 1399 3576 1428
+<< nsubdiffcont >>
+rect 2129 1467 2242 1574
+rect 3465 1428 3555 1518
 << locali >>
 rect -151 4655 4 4664
 rect -151 4633 -137 4655
@@ -12,7 +27,16 @@
 rect -42 3886 3965 3891
 rect 3805 3537 3955 3886
 rect 27 1458 160 2216
+rect 2116 1574 2262 1589
+rect 2116 1467 2129 1574
+rect 2242 1467 2262 1574
 rect 27 1334 581 1458
+rect 2116 1450 2262 1467
+rect 3321 1531 3448 1755
+rect 3321 1518 3565 1531
+rect 3321 1428 3465 1518
+rect 3555 1428 3565 1518
+rect 3321 1417 3565 1428
 rect 4708 1370 5156 1530
 rect 49 1331 581 1334
 rect 448 1255 578 1331
@@ -144,22 +168,22 @@
 rect 169 -2019 397 -2008
 rect 157 -2373 397 -2019
 rect 157 -2384 385 -2373
+use tapered_buf  tapered_buf_0
+timestamp 1647816110
+transform 1 0 469 0 1 5051
+box -470 -910 43675 404
+use tapered_buf  tapered_buf_1
+timestamp 1647816110
+transform 1 0 447 0 1 -1140
+box -470 -910 43675 404
+use tapered_buf  tapered_buf_2
+timestamp 1647816110
+transform 1 0 447 0 1 -2688
+box -470 -910 43675 404
 use cp  cp_0
-timestamp 1640911461
+timestamp 1647816110
 transform 1 0 415 0 1 1715
 box -415 -1715 4690 2035
-use tapered_buf  tapered_buf_0
-timestamp 1647784636
-transform 1 0 469 0 1 5051
-box -470 -910 43675 400
-use tapered_buf  tapered_buf_1
-timestamp 1647784636
-transform 1 0 447 0 1 -1140
-box -470 -910 43675 400
-use tapered_buf  tapered_buf_2
-timestamp 1647784636
-transform 1 0 447 0 1 -2688
-box -470 -910 43675 400
 << labels >>
 rlabel space 5 5096 5 5096 1 up
 rlabel space 7 -1106 7 -1106 1 out

diff --git a/mag/divider_buffered.mag b/mag/divider_buffered.mag
index 8aeefea..5ee4bf0 100644
--- a/mag/divider_buffered.mag
+++ b/mag/divider_buffered.mag

@@ -1,6 +1,6 @@
 magic
 tech sky130A
-timestamp 1647807579
+timestamp 1647816202
 << locali >>
 rect 4852 699 4944 707
 rect 4852 625 4863 699
@@ -29,11 +29,11 @@
 << via1 >>
 rect -57 -455 60 -336
 << metal2 >>
-rect -450 4267 -293 4290
-rect -450 4163 -430 4267
-rect -318 4163 -293 4267
-rect -450 4146 -293 4163
-rect -413 752 -333 4146
+rect -450 4360 -293 4383
+rect -450 4256 -430 4360
+rect -318 4256 -293 4360
+rect -450 4239 -293 4256
+rect -413 752 -333 4239
 rect -191 2951 -32 2961
 rect -191 2832 -174 2951
 rect -50 2832 -32 2951
@@ -49,29 +49,29 @@
 rect -76 -474 79 -455
 rect -38 -653 38 -474
 << via2 >>
-rect -430 4163 -318 4267
+rect -430 4256 -318 4360
 rect -174 2832 -50 2951
 << metal3 >>
-rect -450 4267 -293 4290
-rect -450 4163 -430 4267
-rect -318 4163 -293 4267
-rect -450 4146 -293 4163
+rect -450 4360 -293 4383
+rect -450 4256 -430 4360
+rect -318 4256 -293 4360
+rect -450 4239 -293 4256
 rect -191 2951 -32 2961
 rect -191 2832 -174 2951
 rect -50 2832 -32 2951
 rect -191 2822 -32 2832
 << via3 >>
-rect -430 4163 -318 4267
+rect -430 4256 -318 4360
 rect -174 2832 -50 2951
 << metal4 >>
-rect -746 4424 342 4590
-rect -736 3260 -610 4424
-rect -450 4275 -293 4290
-rect -453 4267 63 4275
-rect -453 4163 -430 4267
-rect -318 4163 63 4267
-rect -453 4151 63 4163
-rect -450 4146 -293 4151
+rect -746 4517 342 4683
+rect -736 3260 -610 4517
+rect -450 4368 -293 4383
+rect -453 4360 63 4368
+rect -453 4256 -430 4360
+rect -318 4256 63 4360
+rect -453 4244 63 4256
+rect -450 4239 -293 4244
 rect -736 3094 377 3260
 rect -736 -729 -610 3094
 rect -191 2959 -32 2961
@@ -87,7 +87,7 @@
 << via4 >>
 rect 566 1355 700 1476
 << metal5 >>
-rect 185 3695 402 3856
+rect 185 3695 402 3949
 rect 68 2350 404 2569
 rect 69 1504 230 2350
 rect 69 1476 732 1504
@@ -97,26 +97,26 @@
 rect 69 389 230 1327
 rect 69 225 380 389
 rect 163 -293 380 225
-use tapered_buf  tapered_buf_3
-timestamp 1647784636
-transform 1 0 447 0 1 -658
-box -470 -910 43675 400
 use tapered_buf  tapered_buf_1
-timestamp 1647784636
-transform 1 0 472 0 1 4669
-box -470 -910 43675 400
+timestamp 1647815768
+transform 1 0 472 0 1 4762
+box -470 -910 43675 404
+use tapered_buf  tapered_buf_3
+timestamp 1647815768
+transform 1 0 447 0 1 -658
+box -470 -910 43675 404
 use tapered_buf  tapered_buf_0
-timestamp 1647784636
+timestamp 1647815768
 transform 1 0 473 0 1 3342
-box -470 -910 43675 400
+box -470 -910 43675 404
 use divider  divider_0
-timestamp 1647769399
+timestamp 1647816202
 transform 1 0 489 0 1 235
 box -490 -235 4690 2150
 << labels >>
 rlabel space 44 3384 44 3384 1 mc2
-rlabel space 24 4702 24 4702 1 clk
 rlabel space 30 -1142 30 -1142 1 out
 rlabel metal4 -691 1606 -691 1606 1 gnd!
 rlabel metal5 195 2465 195 2465 1 vdd!
+rlabel space 24 4795 24 4795 1 clk
 << end >>

diff --git a/mag/pd_buffered.mag b/mag/pd_buffered.mag
index 0d2d1e3..c36d81f 100644
--- a/mag/pd_buffered.mag
+++ b/mag/pd_buffered.mag

@@ -1,6 +1,6 @@
 magic
 tech sky130A
-timestamp 1647804540
+timestamp 1647816385
 << locali >>
 rect -458 708 70 709
 rect -470 698 70 708
@@ -28,7 +28,7 @@
 rect 2065 -161 2145 7
 rect -525 -172 1757 -169
 rect -525 -188 32 -172
-rect -525 -2102 -380 -188
+rect -525 -2214 -380 -188
 rect -60 -316 29 -314
 rect 2062 -316 2151 -161
 rect -60 -397 2151 -316
@@ -38,24 +38,24 @@
 rect -143 -873 -108 -742
 rect 13 -873 50 -742
 rect -143 -897 50 -873
-rect -542 -2128 -354 -2102
-rect -542 -2252 -518 -2128
-rect -384 -2252 -354 -2128
-rect -542 -2273 -354 -2252
+rect -542 -2240 -354 -2214
+rect -542 -2364 -518 -2240
+rect -384 -2364 -354 -2240
+rect -542 -2385 -354 -2364
 << via1 >>
 rect -458 594 -351 698
 rect -108 -873 13 -742
-rect -518 -2252 -384 -2128
+rect -518 -2364 -384 -2240
 << metal2 >>
-rect -271 3561 -120 3578
-rect -271 3441 -260 3561
-rect -137 3441 -120 3561
-rect -271 3427 -120 3441
+rect -271 3655 -120 3672
+rect -271 3535 -260 3655
+rect -137 3535 -120 3655
+rect -271 3521 -120 3535
 rect -470 698 -339 708
 rect -470 594 -458 698
 rect -351 594 -339 698
 rect -470 584 -339 594
-rect -231 344 -170 3427
+rect -231 344 -170 3521
 rect -91 2196 22 2210
 rect -91 2099 -81 2196
 rect 13 2099 22 2196
@@ -69,21 +69,21 @@
 rect -143 -873 -108 -742
 rect 13 -873 50 -742
 rect -143 -897 50 -873
-rect -542 -2128 -354 -2102
-rect -542 -2252 -518 -2128
-rect -384 -2150 -354 -2128
-rect -384 -2244 56 -2150
-rect -384 -2252 -354 -2244
-rect -542 -2273 -354 -2252
+rect -542 -2240 -354 -2214
+rect -542 -2364 -518 -2240
+rect -384 -2262 -354 -2240
+rect -384 -2356 56 -2262
+rect -384 -2364 -354 -2356
+rect -542 -2385 -354 -2364
 << via2 >>
-rect -260 3441 -137 3561
+rect -260 3535 -137 3655
 rect -458 594 -351 698
 rect -81 2099 13 2196
 << metal3 >>
-rect -271 3561 -120 3578
-rect -271 3441 -260 3561
-rect -137 3441 -120 3561
-rect -271 3427 -120 3441
+rect -271 3655 -120 3672
+rect -271 3535 -260 3655
+rect -137 3535 -120 3655
+rect -271 3521 -120 3535
 rect -88 2196 22 2205
 rect -88 2099 -81 2196
 rect 13 2099 22 2196
@@ -93,16 +93,16 @@
 rect -351 594 -339 698
 rect -470 584 -339 594
 << via3 >>
-rect -260 3441 -137 3561
+rect -260 3535 -137 3655
 rect -81 2099 13 2196
 rect -458 594 -351 698
 << metal4 >>
-rect -926 3724 308 3859
-rect -924 2510 -768 3724
-rect -283 3561 70 3587
-rect -283 3441 -260 3561
-rect -137 3441 70 3561
-rect -283 3425 70 3441
+rect -926 3818 308 3953
+rect -924 2510 -768 3818
+rect -283 3655 70 3681
+rect -283 3535 -260 3655
+rect -137 3535 70 3655
+rect -283 3519 70 3535
 rect -924 2366 354 2510
 rect -924 713 -768 2366
 rect -91 2196 22 2210
@@ -115,34 +115,34 @@
 rect -924 577 -329 594
 rect -924 -959 -768 577
 rect -924 -1134 329 -959
-rect -924 -2333 -768 -1134
-rect -947 -2508 293 -2333
+rect -924 -2445 -768 -1134
+rect -947 -2620 293 -2445
 << metal5 >>
-rect 186 2938 404 3142
-rect 145 -1871 363 -1667
+rect 186 2938 404 3236
+rect 145 -1983 363 -1667
+use tapered_buf  tapered_buf_3
+timestamp 1647815768
+transform 1 0 429 0 1 -2346
+box -470 -910 43675 404
+use tapered_buf  tapered_buf_1
+timestamp 1647815768
+transform 1 0 473 0 1 4052
+box -470 -910 43675 404
+use tapered_buf  tapered_buf_2
+timestamp 1647815768
+transform 1 0 434 0 1 -881
+box -470 -910 43675 404
+use tapered_buf  tapered_buf_0
+timestamp 1647815768
+transform 1 0 468 0 1 2605
+box -470 -910 43675 404
 use pd  pd_0
-timestamp 1647804088
+timestamp 1647816385
 transform 1 0 215 0 1 781
 box -215 -855 1685 810
-use tapered_buf  tapered_buf_2
-timestamp 1647784636
-transform 1 0 434 0 1 -881
-box -470 -910 43675 400
-use tapered_buf  tapered_buf_3
-timestamp 1647784636
-transform 1 0 429 0 1 -2234
-box -470 -910 43675 400
-use tapered_buf  tapered_buf_1
-timestamp 1647784636
-transform 1 0 473 0 1 3958
-box -470 -910 43675 400
-use tapered_buf  tapered_buf_0
-timestamp 1647784636
-transform 1 0 468 0 1 2605
-box -470 -910 43675 400
 << labels >>
 rlabel space 48 2642 48 2642 1 ref
-rlabel space 64 3988 64 3988 1 div
 rlabel space 40 -1345 40 -1345 1 up
-rlabel space -14 -2692 -14 -2692 1 down
+rlabel space 64 4082 64 4082 1 div
+rlabel space -14 -2804 -14 -2804 1 down
 << end >>

diff --git a/mag/tapered_buf.mag b/mag/tapered_buf.mag
index 0a3660c..2b0da57 100644
--- a/mag/tapered_buf.mag
+++ b/mag/tapered_buf.mag

@@ -1,9 +1,16 @@
 magic
 tech sky130A
-timestamp 1647784636
+timestamp 1647815768
 << nwell >>
-rect -35 85 29690 260
-rect 35 -710 43675 -470
+rect -98 383 140 404
+rect -98 358 141 383
+rect -98 319 29689 358
+rect -66 317 29689 319
+rect -35 306 29689 317
+rect -35 85 29690 306
+rect 35 -709 43675 -470
+rect 31 -710 43675 -709
+rect 31 -887 43660 -710
 << nmos >>
 rect 275 0 290 50
 rect 360 0 375 50
@@ -19898,6 +19905,325 @@
 rect 43595 -580 43625 -550
 rect 43595 -630 43625 -600
 rect 43595 -680 43625 -650
+<< psubdiff >>
+rect 195 -138 285 -121
+rect 195 -192 215 -138
+rect 268 -192 285 -138
+rect 195 -210 285 -192
+rect 1056 -131 1146 -114
+rect 1056 -185 1076 -131
+rect 1129 -185 1146 -131
+rect 1056 -203 1146 -185
+rect 2633 -123 2723 -106
+rect 2633 -177 2653 -123
+rect 2706 -177 2723 -123
+rect 2633 -195 2723 -177
+rect 3808 -132 3898 -115
+rect 3808 -186 3828 -132
+rect 3881 -186 3898 -132
+rect 3808 -204 3898 -186
+rect 5119 -124 5209 -107
+rect 5119 -178 5139 -124
+rect 5192 -178 5209 -124
+rect 5119 -196 5209 -178
+rect 6810 -138 6900 -121
+rect 6810 -192 6830 -138
+rect 6883 -192 6900 -138
+rect 6810 -210 6900 -192
+rect 8352 -144 8442 -127
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+rect 10181 -142 10271 -125
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+rect 10181 -214 10271 -196
+rect 12033 -140 12123 -123
+rect 12033 -194 12053 -140
+rect 12106 -194 12123 -140
+rect 12033 -212 12123 -194
+rect 13669 -140 13759 -123
+rect 13669 -194 13689 -140
+rect 13742 -194 13759 -140
+rect 13669 -212 13759 -194
+rect 15699 -138 15789 -121
+rect 15699 -192 15719 -138
+rect 15772 -192 15789 -138
+rect 15699 -210 15789 -192
+rect 17430 -136 17520 -119
+rect 17430 -190 17450 -136
+rect 17503 -190 17520 -136
+rect 17430 -208 17520 -190
+rect 18665 -136 18755 -119
+rect 18665 -190 18685 -136
+rect 18738 -190 18755 -136
+rect 18665 -208 18755 -190
+rect 20252 -136 20342 -119
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+rect 20325 -190 20342 -136
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+rect 22016 -136 22106 -119
+rect 22016 -190 22036 -136
+rect 22089 -190 22106 -136
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+rect 23603 -136 23693 -119
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+rect 25543 -136 25633 -119
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+rect 25616 -190 25633 -136
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+rect 27307 -136 27397 -119
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+rect 28541 -136 28631 -119
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+rect 28614 -190 28631 -136
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+rect 30129 -136 30219 -119
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+rect 31892 -136 31982 -119
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+rect 43180 -136 43270 -119
+rect 43180 -190 43200 -136
+rect 43253 -190 43270 -136
+rect 43180 -208 43270 -190
+<< nsubdiff >>
+rect 1054 318 1144 336
+rect 1054 271 1071 318
+rect 1126 271 1144 318
+rect 1054 256 1144 271
+rect 3163 318 3253 336
+rect 3163 271 3180 318
+rect 3235 271 3253 318
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+rect 5848 318 5938 336
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+rect 5848 256 5938 271
+rect 8725 318 8815 336
+rect 8725 271 8742 318
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+rect 8725 256 8815 271
+rect 10244 318 10334 336
+rect 10244 271 10261 318
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+rect 10244 256 10334 271
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+rect 12177 256 12267 271
+rect 14958 318 15048 336
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+rect 17642 256 17732 271
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+rect 20327 256 20417 271
+rect 23012 318 23102 336
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+rect 23084 271 23102 318
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+rect 25794 319 25884 337
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+rect 43052 -788 43142 -770
+rect 43052 -835 43069 -788
+rect 43124 -835 43142 -788
+rect 43052 -850 43142 -835
+<< psubdiffcont >>
+rect 215 -192 268 -138
+rect 1076 -185 1129 -131
+rect 2653 -177 2706 -123
+rect 3828 -186 3881 -132
+rect 5139 -178 5192 -124
+rect 6830 -192 6883 -138
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+rect 35440 -190 35493 -136
+rect 37203 -190 37256 -136
+rect 39143 -190 39196 -136
+rect 41260 -190 41313 -136
+rect 43200 -190 43253 -136
+<< nsubdiffcont >>
+rect 1071 271 1126 318
+rect 3180 271 3235 318
+rect 5865 271 5920 318
+rect 8742 271 8797 318
+rect 10261 271 10316 318
+rect 12194 271 12249 318
+rect 14975 271 15030 318
+rect 17659 271 17714 318
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 << via1 >>
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 << metal2 >>
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 << metal3 >>
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+rect 32365 -835 36394 -829
+rect 36449 -829 37658 -788
+rect 37713 -788 41059 -782
+rect 37713 -829 39782 -788
+rect 36449 -835 39782 -829
+rect 39837 -829 41059 -788
+rect 41114 -788 43660 -782
+rect 41114 -829 43069 -788
+rect 39837 -835 43069 -829
+rect 43124 -835 43660 -788
+rect 1082 -836 43660 -835
+rect 31 -887 43660 -836
 << via4 >>
 rect -230 200 -100 335
 rect -235 -805 -105 -670
@@ -76146,8 +77942,8 @@
 rect -105 -805 -70 -670
 rect -280 -910 -70 -805
 << labels >>
-rlabel metal4 -376 -475 -376 -475 1 out
-rlabel metal2 -410 25 -410 25 1 in
 rlabel metal4 -15 276 -15 276 1 vdd!
 rlabel metal4 -17 -186 -17 -186 1 gnd!
+rlabel metal2 -410 25 -410 25 1 in
+rlabel metal4 -376 -475 -376 -475 1 out
 << end >>

diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index 2e457dd..1ef2fac 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice

@@ -106,1965 +106,1958 @@
 + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
 + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
 + wbs_stb_i wbs_we_i
-C0 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF
-C1 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF
-C2 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF
-C3 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C4 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF
-C5 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF
-C6 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C7 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF
-C8 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF
-C9 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF
-C10 divider_0/nor_1/B divider_0/and_0/A 0.26fF
-C11 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
-C12 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF
-C13 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF
-C14 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF
-C15 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C16 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF
-C17 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF
-C18 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF
-C19 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/in 0.02fF
-C20 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF
-C21 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF
-C22 divider_0/prescaler_0/Out divider_0/nor_1/A 0.15fF
-C23 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C24 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF
-C25 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF
-C26 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF
-C27 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C28 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF
-C29 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF
-C30 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF
-C31 divider_0/nor_1/A divider_0/and_0/B 0.08fF
-C32 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
-C33 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF
-C34 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF
-C35 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF
-C36 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
-C37 io_clamp_high[2] io_analog[6] 0.53fF
-C38 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
-C39 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF
-C40 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF
-C41 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
-C42 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF
-C43 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF
-C44 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/in 0.04fF
-C45 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF
-C46 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF
-C47 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF
-C48 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF
-C49 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
-C50 divider_0/nor_0/B divider_0/and_0/B 0.29fF
-C51 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 2.89fF
-C52 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF
-C53 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF
-C54 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF
-C55 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C56 divider_1/nor_1/A divider_1/and_0/B 0.08fF
-C57 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
-C58 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
-C59 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.01fF
-C60 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.19fF
-C61 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C62 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF
-C63 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
-C64 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF
-C65 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF
-C66 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF
-C67 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF
-C68 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF
-C69 divider_0/mc2 divider_0/and_0/OUT 0.05fF
-C70 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF
-C71 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
-C72 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C73 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_1650_0# 2.89fF
-C74 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF
-C75 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF
-C76 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF
-C77 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF
-C78 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Q 0.04fF
-C79 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF
-C80 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C81 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
-C82 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
-C83 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF
-C84 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF
-C85 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF
-C86 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
-C87 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_580_0# 1.27fF
-C88 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
-C89 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
-C90 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
-C91 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF
-C92 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF
-C93 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF
-C94 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C95 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C96 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF
-C97 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C98 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C99 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF
-C100 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
-C101 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C102 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF
-C103 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF
-C104 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF
-C105 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF
-C106 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
-C107 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
-C108 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C109 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF
-C110 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.22fF
-C111 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF
-C112 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF
-C113 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
-C114 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
-C115 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF
-C116 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/in 0.02fF
-C117 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF
-C118 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C119 divider_0/tspc_0/Z3 divider_0/nor_1/A 0.38fF
-C120 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C121 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF
-C122 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
-C123 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C124 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C125 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF
-C126 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF
-C127 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF
-C128 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF
-C129 divider_0/nor_0/B divider_0/Out 0.22fF
-C130 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
-C131 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF
-C132 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C133 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF
-C134 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF
-C135 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C136 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF
-C137 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
-C138 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF
-C139 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF
-C140 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.09fF
-C141 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 29.21fF
-C142 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF
-C143 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C144 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF
-C145 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF
-C146 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C147 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF
-C148 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C149 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C150 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF
-C151 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C152 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
-C153 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF
-C154 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C155 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF
-C156 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF
-C157 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C158 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C159 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF
-C160 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF
-C161 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF
-C162 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
-C163 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF
-C164 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF
-C165 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF
-C166 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF
-C167 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF
-C168 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.02fF
-C169 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/tspc_r_0/z5 0.02fF
-C170 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C171 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C172 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF
-C173 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C174 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar 0.03fF
-C175 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF
-C176 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF
-C177 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF
-C178 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF
-C179 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF
-C180 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF
-C181 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C182 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF
-C183 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF
-C184 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C185 ro_complete_buffered_0/tapered_buf_6/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF
-C186 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_n10_n140# 0.04fF
-C187 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF
-C188 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF
-C189 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF
-C190 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF
-C191 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
-C192 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF
-C193 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
-C194 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF
-C195 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C196 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF
-C197 io_clamp_low[1] io_analog[5] 0.53fF
-C198 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/divider_0/mc2 0.02fF
-C199 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/out 26.29fF
-C200 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF
-C201 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
-C202 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
-C203 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C204 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C205 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C206 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C207 pd_buffered_0/tapered_buf_1/out pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF
-C208 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF
-C209 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF
-C210 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF
-C211 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
-C212 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C213 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C214 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF
-C215 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF
-C216 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C217 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF
-C218 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
-C219 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.02fF
-C220 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.22fF
-C221 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
-C222 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
-C223 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF
-C224 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
-C225 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF
-C226 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF
-C227 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
-C228 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF
-C229 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
-C230 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF
-C231 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF
-C232 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF
-C233 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C234 pll_full_1/pd_0/R pll_full_1/div 0.51fF
-C235 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C236 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF
-C237 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF
-C238 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF
-C239 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C240 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF
-C241 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF
-C242 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
-C243 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C244 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.22fF
-C245 divider_1/mc2 divider_1/and_0/A 0.16fF
-C246 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF
-C247 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C248 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
-C249 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF
-C250 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
-C251 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF
-C252 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF
-C253 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/UP 0.04fF
-C254 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF
-C255 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C256 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C257 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF
-C258 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF
-C259 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF
-C260 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
-C261 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
-C262 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
-C263 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
-C264 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
-C265 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF
-C266 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF
-C267 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.22fF
-C268 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
-C269 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
-C270 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
-C271 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF
-C272 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
-C273 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
-C274 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C275 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C276 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C277 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C278 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
-C279 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
-C280 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF
-C281 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF
-C282 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C283 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C284 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF
-C285 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF
-C286 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
-C287 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF
-C288 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF
-C289 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
-C290 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
-C291 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C292 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C293 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
-C294 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C295 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C296 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
-C297 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C298 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
-C299 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF
-C300 divider_1/nor_1/B divider_1/tspc_0/Q 0.22fF
-C301 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF
-C302 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C303 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF
-C304 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF
-C305 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
-C306 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF
-C307 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
-C308 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.01fF
-C309 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C310 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
-C311 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C312 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF
-C313 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF
-C314 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF
-C315 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF
-C316 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
-C317 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C318 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
-C319 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
-C320 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C321 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C322 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF
-C323 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF
-C324 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF
-C325 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
-C326 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF
-C327 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C328 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF
-C329 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C330 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF
-C331 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
-C332 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF
-C333 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF
-C334 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF
-C335 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
-C336 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF
-C337 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C338 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
-C339 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF
-C340 div_pd_buffered_0/tapered_buf_3/out div_pd_buffered_0/tapered_buf_3/a_210_n610# 26.29fF
-C341 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
-C342 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C343 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF
-C344 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF
-C345 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
-C346 div_pd_buffered_0/tapered_buf_0/in div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF
-C347 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF
-C348 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C349 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF
-C350 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
-C351 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C352 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF
-C353 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF
-C354 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/in 0.02fF
-C355 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF
-C356 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF
-C357 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF
-C358 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C359 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C360 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
-C361 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
-C362 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF
-C363 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF
-C364 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF
-C365 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF
-C366 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF
-C367 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C368 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF
-C369 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_160_230# 0.17fF
-C370 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF
-C371 pll_full_1/cp_0/down pll_full_1/cp_0/upbar 0.02fF
-C372 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C373 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C374 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF
-C375 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.19fF
-C376 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C377 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
-C378 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C379 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
-C380 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF
-C381 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF
-C382 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF
-C383 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF
-C384 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF
-C385 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF
-C386 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF
-C387 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF
-C388 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C389 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/DOWN 0.21fF
-C390 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF
-C391 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF
-C392 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C393 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF
-C394 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF
-C395 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C396 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF
-C397 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF
-C398 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
-C399 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C400 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
-C401 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.84fF
-C402 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF
-C403 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C404 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
-C405 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C406 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF
-C407 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF
-C408 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF
-C409 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.01fF
-C410 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF
-C411 gnd ro_complete_buffered_0/tapered_buf_1/a_580_0# 5.71fF
-C412 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF
-C413 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF
-C414 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF
-C415 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF
-C416 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF
-C417 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
-C418 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
-C419 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF
-C420 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
-C421 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C422 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF
-C423 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C424 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF
-C425 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
-C426 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF
-C427 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C428 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF
-C429 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF
-C430 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF
-C431 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF
-C432 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
-C433 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
-C434 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
-C435 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF
-C436 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF
-C437 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF
-C438 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C439 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF
-C440 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF
-C441 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C442 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF
-C443 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF
-C444 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF
-C445 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C446 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
-C447 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
-C448 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF
-C449 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF
-C450 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
-C451 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
-C452 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF
-C453 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
-C454 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF
-C455 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF
-C456 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.02fF
-C457 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.22fF
-C458 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF
-C459 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
-C460 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF
-C461 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C462 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF
-C463 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C464 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C465 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF
-C466 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
-C467 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C468 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
-C469 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
-C470 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF
-C471 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C472 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF
-C473 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_580_0# 1.27fF
-C474 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF
-C475 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF
-C476 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF
-C477 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF
-C478 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF
-C479 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C480 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF
-C481 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
-C482 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF
-C483 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF
-C484 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF
-C485 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF
-C486 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF
-C487 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF
-C488 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/R 0.27fF
-C489 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C490 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C491 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C492 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_580_0# 0.35fF
-C493 div_pd_buffered_0/tapered_buf_1/a_160_230# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF
-C494 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF
-C495 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF
-C496 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
-C497 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF
-C498 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF
-C499 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF
-C500 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF
-C501 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C502 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
-C503 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C504 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
-C505 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.01fF
-C506 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C507 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
-C508 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
-C509 io_clamp_high[0] io_analog[4] 0.53fF
-C510 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
-C511 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF
-C512 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF
-C513 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF
-C514 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C515 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C516 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF
-C517 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF
-C518 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF
-C519 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF
-C520 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C521 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF
-C522 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C523 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C524 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C525 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF
-C526 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z2 0.16fF
-C527 pll_full_1/div pll_full_1/vco 2.26fF
-C528 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF
-C529 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_210_n610# 0.84fF
-C530 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF
-C531 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
-C532 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C533 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
-C534 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C535 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
-C536 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF
-C537 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF
-C538 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF
-C539 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF
-C540 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF
-C541 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF
-C542 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF
-C543 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF
-C544 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
-C545 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
-C546 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF
-C547 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF
-C548 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF
-C549 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF
-C550 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
-C551 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF
-C552 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF
-C553 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
-C554 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
-C555 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF
-C556 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF
-C557 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF
-C558 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF
-C559 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF
-C560 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF
-C561 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF
-C562 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF
-C563 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C564 gnd ro_complete_buffered_0/tapered_buf_1/a_1650_0# 20.70fF
-C565 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF
-C566 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF
-C567 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF
-C568 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
-C569 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF
-C570 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF
-C571 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
-C572 filter_0/v filter_0/a_4216_n5230# 0.91fF
-C573 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
-C574 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C575 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C576 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
-C577 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF
-C578 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF
-C579 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
-C580 divider_0/mc2 divider_0/nor_1/B 0.06fF
-C581 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF
-C582 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/a_210_n610# 26.29fF
-C583 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
-C584 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C585 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF
-C586 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C587 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF
-C588 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
-C589 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF
-C590 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF
-C591 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF
-C592 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF
-C593 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C594 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C595 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C596 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
-C597 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF
-C598 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C599 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z1 0.09fF
-C600 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF
-C601 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF
-C602 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C603 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
-C604 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF
-C605 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF
-C606 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C607 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF
-C608 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF
-C609 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.19fF
-C610 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C611 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF
-C612 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C613 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF
-C614 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF
-C615 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C616 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF
-C617 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF
-C618 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF
-C619 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C620 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF
-C621 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
-C622 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
-C623 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
-C624 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C625 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF
-C626 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF
-C627 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C628 divider_1/nor_1/B divider_1/tspc_1/Z2 0.30fF
-C629 ro_complete_buffered_0/tapered_buf_1/a_210_n610# gnd 212.43fF
-C630 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF
-C631 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF
-C632 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF
-C633 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF
-C634 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF
-C635 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C636 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C637 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C638 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/down 26.29fF
-C639 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF
-C640 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF
-C641 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF
-C642 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF
-C643 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF
-C644 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
-C645 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
-C646 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF
-C647 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF
-C648 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF
-C649 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
-C650 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
-C651 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 4.78fF
-C652 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C653 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF
-C654 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF
-C655 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
-C656 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
-C657 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C658 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF
-C659 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF
-C660 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/tapered_buf_3/in 0.04fF
-C661 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF
-C662 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF
-C663 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C664 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C665 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
-C666 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF
-C667 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF
-C668 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_160_n140# 0.22fF
-C669 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C670 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
-C671 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF
-C672 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF
-C673 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF
-C674 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF
-C675 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF
-C676 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C677 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.19fF
-C678 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
-C679 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF
-C680 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
-C681 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C682 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C683 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF
-C684 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF
-C685 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF
-C686 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF
-C687 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C688 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF
-C689 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C690 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
-C691 divider_1/nor_1/B divider_1/and_0/A 0.26fF
-C692 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
-C693 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_6/in 0.05fF
-C694 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF
-C695 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF
-C696 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF
-C697 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF
-C698 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF
-C699 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
-C700 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF
-C701 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF
-C702 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C703 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF
-C704 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF
-C705 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF
-C706 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C707 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
-C708 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
-C709 divider_1/and_0/OUT divider_1/clk 0.04fF
-C710 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C711 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C712 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
-C713 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF
-C714 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF
-C715 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF
-C716 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF
-C717 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
-C718 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF
-C719 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF
-C720 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C721 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C722 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_6/in 1.43fF
-C723 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF
-C724 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF
-C725 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF
-C726 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF
-C727 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF
-C728 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF
-C729 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
-C730 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF
-C731 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C732 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
-C733 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C734 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
-C735 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
-C736 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
-C737 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF
-C738 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 29.21fF
-C739 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
-C740 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF
-C741 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF
-C742 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF
-C743 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF
-C744 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
-C745 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF
-C746 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF
-C747 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_210_n610# 29.21fF
-C748 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF
-C749 divider_0/mc2 divider_0/and_0/A 0.16fF
-C750 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C751 gnd ro_complete_buffered_0/tapered_buf_1/a_4670_0# 82.48fF
-C752 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF
-C753 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF
-C754 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF
-C755 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF
-C756 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF
-C757 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF
-C758 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF
-C759 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C760 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF
-C761 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF
-C762 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF
-C763 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF
-C764 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF
-C765 filter_0/v filter_0/a_4216_n2998# 0.36fF
-C766 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C767 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF
-C768 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C769 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C770 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF
-C771 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
-C772 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
-C773 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C774 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF
-C775 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF
-C776 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF
-C777 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C778 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C779 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
-C780 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF
-C781 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C782 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
-C783 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF
-C784 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF
-C785 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
-C786 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C787 divider_0/nor_1/B divider_0/nor_1/A 1.21fF
-C788 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_580_0# 0.35fF
-C789 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF
-C790 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF
-C791 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF
-C792 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF
-C793 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 2.89fF
-C794 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF
-C795 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
-C796 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF
-C797 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF
-C798 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF
-C799 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF
-C800 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C801 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF
-C802 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C803 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF
-C804 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C805 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF
-C806 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF
-C807 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF
-C808 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
-C809 divider_0/nor_1/B divider_0/nor_0/B 0.47fF
-C810 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF
-C811 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF
-C812 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C813 divider_1/mc2 divider_1/and_0/out1 0.06fF
-C814 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
-C815 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
-C816 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
-C817 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF
-C818 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
-C819 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF
-C820 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF
-C821 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF
-C822 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_160_230# 0.09fF
-C823 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF
-C824 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C825 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C826 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C827 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF
-C828 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF
-C829 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF
-C830 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF
-C831 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF
-C832 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF
-C833 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF
-C834 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
-C835 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF
-C836 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
-C837 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
-C838 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
-C839 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF
-C840 divider_1/and_0/A divider_1/and_0/B 0.18fF
-C841 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF
-C842 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
-C843 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF
-C844 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C845 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C846 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C847 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF
-C848 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C849 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF
-C850 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C851 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C852 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF
-C853 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF
-C854 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF
-C855 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF
-C856 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF
-C857 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
-C858 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF
-C859 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF
-C860 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF
-C861 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C862 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C863 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
-C864 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
-C865 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF
-C866 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C867 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF
-C868 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
-C869 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
-C870 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
-C871 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C872 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF
-C873 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF
-C874 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF
-C875 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C876 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C877 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF
-C878 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF
-C879 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
-C880 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF
-C881 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF
-C882 divider_0/prescaler_0/Out divider_0/clk 0.51fF
-C883 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C884 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF
-C885 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF
-C886 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF
-C887 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
-C888 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/in 0.04fF
-C889 divider_1/prescaler_0/Out divider_1/clk 0.51fF
-C890 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF
-C891 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
-C892 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
-C893 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C894 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF
-C895 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
-C896 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF
-C897 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF
-C898 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF
-C899 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF
-C900 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C901 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
-C902 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF
-C903 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF
-C904 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C905 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF
-C906 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C907 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF
-C908 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
-C909 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
-C910 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
-C911 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
-C912 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
-C913 divider_1/tspc_1/Z2 divider_1/nor_1/A 0.15fF
-C914 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF
-C915 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
-C916 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF
-C917 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
-C918 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF
-C919 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF
-C920 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF
-C921 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C922 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C923 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF
-C924 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
-C925 gnd ro_complete_buffered_0/ro_complete_0/a4 87.74fF
-C926 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF
-C927 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.19fF
-C928 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C929 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF
-C930 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF
-C931 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF
-C932 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
-C933 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF
-C934 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF
-C935 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C936 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF
-C937 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
-C938 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF
-C939 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF
-C940 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF
-C941 divider_0/nor_1/A divider_0/and_0/A 0.01fF
-C942 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
-C943 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF
-C944 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
-C945 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C946 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF
-C947 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF
-C948 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
-C949 io_clamp_low[2] io_analog[6] 0.53fF
-C950 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF
-C951 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF
-C952 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C953 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF
-C954 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF
-C955 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF
-C956 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
-C957 pll_full_0/pd_0/R pll_full_0/div 0.51fF
-C958 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF
-C959 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF
-C960 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C961 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C962 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF
-C963 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF
-C964 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF
-C965 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C966 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C967 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF
-C968 divider_1/nor_1/A divider_1/and_0/A 0.01fF
-C969 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.05fF
-C970 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF
-C971 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C972 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF
-C973 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF
-C974 pll_full_0/div pll_full_0/vco 2.26fF
-C975 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF
-C976 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
-C977 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C978 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
-C979 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C980 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF
-C981 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF
-C982 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF
-C983 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF
-C984 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C985 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
-C986 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF
-C987 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF
-C988 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF
-C989 divider_1/tspc_2/Z3 divider_1/Out 0.05fF
-C990 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
-C991 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF
-C992 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF
-C993 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF
-C994 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF
-C995 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF
-C996 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF
-C997 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C998 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C999 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF
-C1000 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C1001 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C1002 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
-C1003 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C1004 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
-C1005 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF
-C1006 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF
-C1007 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF
-C1008 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1009 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF
-C1010 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF
-C1011 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
-C1012 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF
-C1013 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1014 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF
-C1015 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
-C1016 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.30fF
-C1017 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.17fF
-C1018 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF
-C1019 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF
-C1020 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF
-C1021 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C1022 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
-C1023 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1024 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF
-C1025 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
-C1026 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF
-C1027 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C1028 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C1029 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
-C1030 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
-C1031 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF
-C1032 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
-C1033 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF
-C1034 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
-C1035 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
-C1036 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1037 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF
-C1038 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF
-C1039 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
-C1040 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
-C1041 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF
-C1042 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C1043 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF
-C1044 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1045 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C1046 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF
-C1047 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C1048 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
-C1049 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF
-C1050 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C1051 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF
-C1052 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF
-C1053 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_1650_0# 2.89fF
-C1054 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF
-C1055 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF
-C1056 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
-C1057 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
-C1058 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
-C1059 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
-C1060 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
-C1061 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1062 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
-C1063 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
-C1064 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.05fF
-C1065 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
-C1066 divider_1/mc2 divider_1/nor_0/B 0.15fF
-C1067 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
-C1068 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1069 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
-C1070 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
-C1071 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1072 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
-C1073 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
-C1074 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1075 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/m1_2700_2190# 0.19fF
-C1076 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_6/in 0.05fF
-C1077 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF
-C1078 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF
-C1079 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF
-C1080 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF
-C1081 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF
-C1082 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF
-C1083 divider_0/nor_1/B divider_0/and_0/B 0.31fF
-C1084 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
-C1085 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.01fF
-C1086 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C1087 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
-C1088 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
-C1089 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF
-C1090 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF
-C1091 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF
-C1092 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF
-C1093 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF
-C1094 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C1095 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF
-C1096 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/in 0.19fF
-C1097 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF
-C1098 gnd ro_complete_buffered_0/tapered_buf_1/a_160_n140# 1.34fF
-C1099 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
-C1100 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF
-C1101 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF
-C1102 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF
-C1103 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
-C1104 divider_0/and_0/OUT divider_0/clk 0.04fF
-C1105 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF
-C1106 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF
-C1107 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1108 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1109 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF
-C1110 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
-C1111 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
-C1112 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF
-C1113 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF
-C1114 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF
-C1115 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
-C1116 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF
-C1117 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C1118 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1119 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF
-C1120 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1121 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF
-C1122 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C1123 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
-C1124 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C1125 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF
-C1126 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C1127 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C1128 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
-C1129 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1130 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.02fF
-C1131 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.17fF
-C1132 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
-C1133 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF
-C1134 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
-C1135 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF
-C1136 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF
-C1137 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF
-C1138 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF
-C1139 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF
-C1140 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF
-C1141 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
-C1142 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C1143 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF
-C1144 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
-C1145 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_6/in 0.05fF
-C1146 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C1147 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1148 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF
-C1149 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
-C1150 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF
-C1151 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF
-C1152 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1153 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1154 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF
-C1155 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
-C1156 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF
-C1157 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF
-C1158 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF
-C1159 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C1160 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF
-C1161 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.35fF
-C1162 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C1163 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF
-C1164 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF
-C1165 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF
-C1166 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF
-C1167 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF
-C1168 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
-C1169 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
-C1170 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF
-C1171 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF
-C1172 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF
-C1173 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF
-C1174 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF
-C1175 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF
-C1176 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
-C1177 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C1178 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
-C1179 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF
-C1180 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF
-C1181 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF
-C1182 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF
-C1183 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF
-C1184 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF
-C1185 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF
-C1186 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF
-C1187 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF
-C1188 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF
-C1189 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
-C1190 divider_1/nor_1/B divider_1/mc2 0.06fF
-C1191 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF
-C1192 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C1193 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
-C1194 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF
-C1195 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/pd_0/REF 26.29fF
-C1196 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF
+C0 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF
+C1 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF
+C2 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
+C3 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF
+C4 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
+C5 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF
+C6 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C7 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF
+C8 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF
+C9 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
+C10 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF
+C11 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
+C12 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C13 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF
+C14 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF
+C15 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF
+C16 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF
+C17 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF
+C18 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF
+C19 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF
+C20 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF
+C21 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/tapered_buf_3/out 26.29fF
+C22 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF
+C23 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C24 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
+C25 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF
+C26 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF
+C27 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C28 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C29 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF
+C30 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF
+C31 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF
+C32 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF
+C33 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF
+C34 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF
+C35 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
+C36 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
+C37 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C38 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF
+C39 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C40 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 4.78fF
+C41 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF
+C42 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C43 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF
+C44 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF
+C45 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C46 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_210_n610# 2.89fF
+C47 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF
+C48 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF
+C49 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF
+C50 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF
+C51 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF
+C52 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
+C53 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C54 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
+C55 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF
+C56 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF
+C57 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF
+C58 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF
+C59 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF
+C60 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF
+C61 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C62 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF
+C63 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C64 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
+C65 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
+C66 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF
+C67 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF
+C68 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF
+C69 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF
+C70 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF
+C71 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_160_230# 0.17fF
+C72 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
+C73 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF
+C74 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF
+C75 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF
+C76 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF
+C77 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
+C78 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C79 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
+C80 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.05fF
+C81 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF
+C82 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF
+C83 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF
+C84 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF
+C85 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF
+C86 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF
+C87 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF
+C88 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C89 divider_1/tspc_0/Q divider_1/tspc_0/a_630_n680# 0.04fF
+C90 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
+C91 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C92 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C93 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
+C94 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C95 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
+C96 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF
+C97 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
+C98 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF
+C99 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF
+C100 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF
+C101 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF
+C102 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C103 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C104 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C105 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF
+C106 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_1/in 0.05fF
+C107 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF
+C108 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF
+C109 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
+C110 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
+C111 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C112 divider_0/nor_1/B divider_0/and_0/A 0.26fF
+C113 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z3 0.27fF
+C114 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
+C115 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C116 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C117 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF
+C118 divider_0/nor_1/A divider_0/tspc_0/Q 0.55fF
+C119 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF
+C120 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C121 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF
+C122 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF
+C123 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
+C124 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF
+C125 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF
+C126 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF
+C127 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF
+C128 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_1/in 1.43fF
+C129 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF
+C130 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF
+C131 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
+C132 pd_buffered_0/tapered_buf_2/a_160_230# pd_buffered_0/tapered_buf_2/a_580_0# 0.02fF
+C133 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF
+C134 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.30fF
+C135 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
+C136 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/in 0.19fF
+C137 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF
+C138 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
+C139 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C140 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C141 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
+C142 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF
+C143 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C144 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C145 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
+C146 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C147 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF
+C148 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF
+C149 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF
+C150 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF
+C151 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C152 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF
+C153 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C154 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
+C155 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF
+C156 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C157 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF
+C158 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF
+C159 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF
+C160 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
+C161 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C162 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF
+C163 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/down 0.32fF
+C164 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
+C165 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
+C166 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF
+C167 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF
+C168 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF
+C169 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C170 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF
+C171 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/in 0.19fF
+C172 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C173 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
+C174 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C175 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF
+C176 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF
+C177 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF
+C178 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF
+C179 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
+C180 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
+C181 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
+C182 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C183 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF
+C184 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C185 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF
+C186 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF
+C187 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C188 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C189 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF
+C190 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF
+C191 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF
+C192 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF
+C193 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C194 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.22fF
+C195 divider_1/mc2 divider_1/and_0/A 0.16fF
+C196 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF
+C197 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF
+C198 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C199 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C200 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
+C201 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
+C202 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF
+C203 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF
+C204 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF
+C205 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF
+C206 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF
+C207 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF
+C208 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF
+C209 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/pd_0/DOWN 0.19fF
+C210 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF
+C211 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
+C212 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF
+C213 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
+C214 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
+C215 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF
+C216 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF
+C217 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF
+C218 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF
+C219 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF
+C220 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C221 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
+C222 io_clamp_high[0] io_analog[4] 0.53fF
+C223 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
+C224 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
+C225 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
+C226 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF
+C227 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C228 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C229 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
+C230 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
+C231 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF
+C232 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C233 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C234 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF
+C235 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF
+C236 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
+C237 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C238 pll_full_1/div pll_full_1/vco 2.26fF
+C239 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
+C240 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
+C241 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF
+C242 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
+C243 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C244 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF
+C245 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF
+C246 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
+C247 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF
+C248 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
+C249 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF
+C250 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF
+C251 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C252 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF
+C253 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF
+C254 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF
+C255 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF
+C256 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF
+C257 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
+C258 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C259 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
+C260 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
+C261 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF
+C262 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF
+C263 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF
+C264 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
+C265 divider_1/nor_1/A divider_1/tspc_0/a_630_n680# 0.35fF
+C266 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
+C267 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF
+C268 divider_1/and_0/OUT divider_1/clk 0.04fF
+C269 filter_0/a_4216_n5230# filter_0/v 0.91fF
+C270 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF
+C271 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF
+C272 divider_0/nor_1/A divider_0/and_0/A 0.01fF
+C273 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF
+C274 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
+C275 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF
+C276 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF
+C277 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
+C278 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C279 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF
+C280 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF
+C281 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C282 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF
+C283 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF
+C284 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C285 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
+C286 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF
+C287 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
+C288 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C289 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF
+C290 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C291 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C292 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF
+C293 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C294 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF
+C295 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C296 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C297 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
+C298 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF
+C299 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF
+C300 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF
+C301 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF
+C302 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF
+C303 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C304 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C305 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C306 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C307 filter_0/a_4216_n2998# filter_0/v 0.36fF
+C308 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF
+C309 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF
+C310 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF
+C311 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF
+C312 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
+C313 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF
+C314 divider_0/mc2 divider_0/and_0/A 0.16fF
+C315 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF
+C316 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF
+C317 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C318 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
+C319 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
+C320 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF
+C321 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.17fF
+C322 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF
+C323 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF
+C324 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C325 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF
+C326 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
+C327 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF
+C328 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF
+C329 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C330 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF
+C331 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF
+C332 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF
+C333 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C334 divider_1/tspc_0/Z3 divider_1/tspc_0/a_630_n680# 0.05fF
+C335 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
+C336 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF
+C337 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF
+C338 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C339 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/divider_0/mc2 0.02fF
+C340 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF
+C341 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF
+C342 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF
+C343 div_pd_buffered_0/tapered_buf_1/out div_pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF
+C344 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF
+C345 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF
+C346 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C347 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C348 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF
+C349 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF
+C350 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF
+C351 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF
+C352 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C353 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF
+C354 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C355 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF
+C356 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
+C357 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
+C358 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF
+C359 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
+C360 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF
+C361 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C362 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.17fF
+C363 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF
+C364 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C365 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF
+C366 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
+C367 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF
+C368 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
+C369 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF
+C370 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF
+C371 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF
+C372 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF
+C373 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF
+C374 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C375 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF
+C376 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF
+C377 pd_buffered_0/pd_0/REF pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF
+C378 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF
+C379 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF
+C380 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF
+C381 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF
+C382 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
+C383 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C384 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C385 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
+C386 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
+C387 divider_1/and_0/A divider_1/and_0/B 0.18fF
+C388 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
+C389 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF
+C390 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C391 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C392 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
+C393 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF
+C394 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF
+C395 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C396 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF
+C397 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
+C398 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF
+C399 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
+C400 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF
+C401 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF
+C402 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C403 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF
+C404 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C405 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C406 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
+C407 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF
+C408 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
+C409 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
+C410 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF
+C411 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF
+C412 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF
+C413 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF
+C414 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C415 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF
+C416 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C417 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C418 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C419 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C420 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
+C421 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF
+C422 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
+C423 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF
+C424 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF
+C425 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF
+C426 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
+C427 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
+C428 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
+C429 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF
+C430 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C431 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
+C432 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C433 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF
+C434 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/ref 0.17fF
+C435 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/in 0.02fF
+C436 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
+C437 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/ref 0.04fF
+C438 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF
+C439 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF
+C440 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF
+C441 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C442 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF
+C443 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_1/in 0.05fF
+C444 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF
+C445 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF
+C446 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF
+C447 divider_0/tspc_1/Z2 divider_0/tspc_0/Q 0.14fF
+C448 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
+C449 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
+C450 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C451 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C452 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF
+C453 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF
+C454 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C455 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C456 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF
+C457 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF
+C458 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z1 0.71fF
+C459 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF
+C460 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C461 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF
+C462 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C463 divider_1/prescaler_0/Out divider_1/tspc_0/a_630_n680# 0.01fF
+C464 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF
+C465 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
+C466 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C467 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF
+C468 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF
+C469 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF
+C470 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C471 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
+C472 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF
+C473 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF
+C474 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
+C475 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF
+C476 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF
+C477 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF
+C478 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 2.89fF
+C479 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF
+C480 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF
+C481 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C482 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF
+C483 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF
+C484 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.84fF
+C485 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF
+C486 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C487 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
+C488 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C489 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF
+C490 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C491 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF
+C492 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF
+C493 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
+C494 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
+C495 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C496 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF
+C497 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C498 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF
+C499 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF
+C500 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF
+C501 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
+C502 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF
+C503 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF
+C504 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF
+C505 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C506 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF
+C507 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF
+C508 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_1/in 0.05fF
+C509 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF
+C510 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF
+C511 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF
+C512 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF
+C513 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF
+C514 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
+C515 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
+C516 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
+C517 divider_1/tspc_2/Z3 divider_1/Out 0.05fF
+C518 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF
+C519 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF
+C520 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF
+C521 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF
+C522 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/in 0.19fF
+C523 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 2.89fF
+C524 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C525 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF
+C526 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF
+C527 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.35fF
+C528 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF
+C529 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF
+C530 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF
+C531 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C532 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF
+C533 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
+C534 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF
+C535 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF
+C536 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF
+C537 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF
+C538 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
+C539 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
+C540 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF
+C541 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C542 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF
+C543 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C544 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF
+C545 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF
+C546 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C547 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C548 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C549 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF
+C550 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF
+C551 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF
+C552 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF
+C553 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF
+C554 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
+C555 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF
+C556 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF
+C557 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
+C558 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
+C559 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF
+C560 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
+C561 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
+C562 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF
+C563 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF
+C564 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF
+C565 divider_1/nor_1/B divider_1/nor_0/B 0.47fF
+C566 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
+C567 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
+C568 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C569 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF
+C570 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 4.78fF
+C571 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.22fF
+C572 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF
+C573 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF
+C574 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C575 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.35fF
+C576 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF
+C577 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
+C578 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF
+C579 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C580 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
+C581 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
+C582 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF
+C583 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF
+C584 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF
+C585 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
+C586 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C587 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF
+C588 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
+C589 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF
+C590 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF
+C591 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF
+C592 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C593 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF
+C594 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
+C595 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
+C596 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF
+C597 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF
+C598 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C599 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF
+C600 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF
+C601 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF
+C602 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
+C603 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
+C604 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF
+C605 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF
+C606 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z2 0.71fF
+C607 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
+C608 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF
+C609 divider_1/tspc_1/Z1 divider_1/nor_1/B 0.03fF
+C610 io_clamp_low[2] io_analog[6] 0.53fF
+C611 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF
+C612 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
+C613 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C614 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF
+C615 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF
+C616 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF
+C617 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF
+C618 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C619 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
+C620 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
+C621 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
+C622 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF
+C623 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF
+C624 divider_1/mc2 divider_1/nor_1/B 0.06fF
+C625 divider_0/and_0/OUT divider_0/clk 0.04fF
+C626 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C627 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C628 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.35fF
+C629 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF
+C630 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C631 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF
+C632 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 1.27fF
+C633 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
+C634 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 4.78fF
+C635 pll_full_0/div pll_full_0/vco 2.26fF
+C636 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF
+C637 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF
+C638 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C639 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF
+C640 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C641 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
+C642 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
+C643 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C644 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF
+C645 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF
+C646 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF
+C647 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
+C648 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF
+C649 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C650 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C651 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF
+C652 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
+C653 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
+C654 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF
+C655 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF
+C656 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C657 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
+C658 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF
+C659 divider_0/nor_1/A divider_0/nor_1/B 1.21fF
+C660 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF
+C661 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF
+C662 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF
+C663 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF
+C664 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
+C665 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/cp_0/down 26.29fF
+C666 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF
+C667 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.27fF
+C668 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF
+C669 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF
+C670 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF
+C671 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF
+C672 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C673 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C674 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF
+C675 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF
+C676 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
+C677 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C678 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF
+C679 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF
+C680 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/in 0.19fF
+C681 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF
+C682 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C683 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
+C684 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF
+C685 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C686 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF
+C687 divider_1/prescaler_0/Out divider_1/clk 0.51fF
+C688 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
+C689 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
+C690 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF
+C691 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF
+C692 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF
+C693 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C694 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.17fF
+C695 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF
+C696 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/R 0.01fF
+C697 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF
+C698 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF
+C699 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C700 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C701 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF
+C702 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
+C703 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF
+C704 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF
+C705 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C706 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF
+C707 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Q 0.04fF
+C708 divider_0/mc2 divider_0/nor_1/B 0.06fF
+C709 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF
+C710 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
+C711 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C712 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
+C713 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF
+C714 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF
+C715 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF
+C716 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C717 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF
+C718 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C719 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF
+C720 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF
+C721 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C722 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
+C723 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF
+C724 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
+C725 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
+C726 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C727 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF
+C728 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF
+C729 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF
+C730 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
+C731 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 2.89fF
+C732 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF
+C733 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C734 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF
+C735 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C736 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
+C737 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
+C738 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF
+C739 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
+C740 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF
+C741 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
+C742 pd_buffered_0/tapered_buf_0/in pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF
+C743 pd_buffered_0/tapered_buf_1/a_1650_0# pd_buffered_0/tapered_buf_1/a_4670_0# 4.78fF
+C744 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF
+C745 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF
+C746 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
+C747 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C748 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_230# 0.02fF
+C749 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_210_n610# 0.22fF
+C750 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
+C751 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF
+C752 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
+C753 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 29.21fF
+C754 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.35fF
+C755 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF
+C756 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF
+C757 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF
+C758 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_1/in 0.05fF
+C759 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF
+C760 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF
+C761 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
+C762 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF
+C763 divider_1/nor_1/A divider_1/tspc_1/Z2 0.15fF
+C764 divider_1/mc2 divider_1/and_0/out1 0.06fF
+C765 divider_0/and_0/A divider_0/and_0/B 0.18fF
+C766 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C767 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF
+C768 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
+C769 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
+C770 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF
+C771 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF
+C772 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF
+C773 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C774 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF
+C775 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF
+C776 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF
+C777 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
+C778 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_n10_230# 0.01fF
+C779 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF
+C780 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
+C781 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF
+C782 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF
+C783 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF
+C784 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF
+C785 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF
+C786 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF
+C787 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF
+C788 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
+C789 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF
+C790 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF
+C791 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C792 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
+C793 divider_1/tspc_1/Z3 divider_1/nor_1/B 0.38fF
+C794 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF
+C795 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF
+C796 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF
+C797 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF
+C798 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF
+C799 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF
+C800 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF
+C801 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF
+C802 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF
+C803 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C804 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C805 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C806 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF
+C807 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C808 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF
+C809 pll_full_0/ref pll_full_0/pd_0/R 0.61fF
+C810 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF
+C811 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
+C812 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
+C813 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF
+C814 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.30fF
+C815 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF
+C816 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C817 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
+C818 divider_1/nor_1/A divider_1/and_0/A 0.01fF
+C819 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF
+C820 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF
+C821 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF
+C822 cp_buffered_0/cp_0/upbar cp_buffered_0/cp_0/down 0.02fF
+C823 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF
+C824 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF
+C825 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C826 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF
+C827 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF
+C828 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF
+C829 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF
+C830 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C831 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 4.78fF
+C832 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C833 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
+C834 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C835 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C836 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF
+C837 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF
+C838 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
+C839 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF
+C840 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
+C841 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF
+C842 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF
+C843 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF
+C844 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C845 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C846 pll_full_0/pd_0/R pll_full_0/div 0.51fF
+C847 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
+C848 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF
+C849 divider_1/nor_1/B divider_1/and_0/B 0.31fF
+C850 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
+C851 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
+C852 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF
+C853 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF
+C854 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 29.21fF
+C855 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF
+C856 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF
+C857 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF
+C858 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF
+C859 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C860 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
+C861 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF
+C862 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C863 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C864 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C865 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
+C866 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_1/in 0.05fF
+C867 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF
+C868 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF
+C869 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF
+C870 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF
+C871 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
+C872 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
+C873 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF
+C874 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
+C875 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
+C876 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF
+C877 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF
+C878 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C879 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C880 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF
+C881 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF
+C882 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF
+C883 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF
+C884 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.19fF
+C885 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF
+C886 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF
+C887 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.84fF
+C888 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF
+C889 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF
+C890 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C891 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF
+C892 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C893 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF
+C894 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF
+C895 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C896 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C897 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C898 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF
+C899 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF
+C900 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C901 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF
+C902 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF
+C903 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
+C904 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C905 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF
+C906 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Z3 0.38fF
+C907 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF
+C908 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF
+C909 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF
+C910 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C911 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF
+C912 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
+C913 divider_0/mc2 divider_0/and_0/out1 0.06fF
+C914 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF
+C915 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
+C916 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF
+C917 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF
+C918 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF
+C919 divider_0/mc2 divider_0/nor_1/A 0.04fF
+C920 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.22fF
+C921 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C922 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF
+C923 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF
+C924 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF
+C925 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF
+C926 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF
+C927 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF
+C928 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF
+C929 divider_0/nor_1/B divider_0/nor_0/B 0.47fF
+C930 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C931 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF
+C932 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
+C933 divider_0/tspc_2/Z3 divider_0/Out 0.05fF
+C934 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
+C935 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C936 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF
+C937 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF
+C938 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF
+C939 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF
+C940 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF
+C941 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF
+C942 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
+C943 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
+C944 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
+C945 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C946 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF
+C947 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C948 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF
+C949 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF
+C950 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF
+C951 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C952 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C953 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF
+C954 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/pd_0/DOWN 0.04fF
+C955 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
+C956 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
+C957 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
+C958 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
+C959 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/DOWN 0.03fF
+C960 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF
+C961 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C962 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
+C963 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF
+C964 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF
+C965 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
+C966 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF
+C967 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF
+C968 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF
+C969 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C970 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
+C971 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF
+C972 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF
+C973 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF
+C974 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C975 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF
+C976 io_clamp_high[1] io_analog[5] 0.53fF
+C977 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF
+C978 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.22fF
+C979 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
+C980 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF
+C981 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF
+C982 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
+C983 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF
+C984 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF
+C985 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.19fF
+C986 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C987 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF
+C988 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
+C989 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF
+C990 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C991 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF
+C992 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF
+C993 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C994 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C995 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
+C996 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
+C997 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF
+C998 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF
+C999 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF
+C1000 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF
+C1001 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z4 0.04fF
+C1002 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C1003 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C1004 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
+C1005 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C1006 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C1007 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF
+C1008 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF
+C1009 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF
+C1010 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C1011 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF
+C1012 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF
+C1013 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1014 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
+C1015 divider_1/mc2 divider_1/nor_0/B 0.15fF
+C1016 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C1017 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF
+C1018 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
+C1019 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF
+C1020 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF
+C1021 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
+C1022 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C1023 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF
+C1024 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF
+C1025 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
+C1026 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF
+C1027 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
+C1028 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C1029 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF
+C1030 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
+C1031 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF
+C1032 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF
+C1033 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF
+C1034 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF
+C1035 ro_complete_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 4.78fF
+C1036 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
+C1037 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
+C1038 divider_0/prescaler_0/Out divider_0/clk 0.51fF
+C1039 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1040 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
+C1041 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF
+C1042 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF
+C1043 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_580_0# 1.27fF
+C1044 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z2 0.21fF
+C1045 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
+C1046 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF
+C1047 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1048 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
+C1049 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF
+C1050 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1051 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF
+C1052 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1053 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1054 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1055 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF
+C1056 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF
+C1057 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF
+C1058 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF
+C1059 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C1060 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF
+C1061 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF
+C1062 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF
+C1063 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
+C1064 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF
+C1065 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF
+C1066 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF
+C1067 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF
+C1068 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF
+C1069 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
+C1070 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF
+C1071 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.05fF
+C1072 pll_full_0/pd_0/DOWN pll_full_0/ref 1.48fF
+C1073 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C1074 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1075 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
+C1076 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
+C1077 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF
+C1078 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF
+C1079 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
+C1080 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1081 divider_1/tspc_0/Q divider_1/nor_1/B 0.22fF
+C1082 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF
+C1083 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
+C1084 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
+C1085 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C1086 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
+C1087 cp_buffered_0/cp_0/out cp_buffered_0/cp_0/down 0.79fF
+C1088 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/in 0.19fF
+C1089 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF
+C1090 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1091 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C1092 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF
+C1093 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1094 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_1/in 0.10fF
+C1095 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF
+C1096 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF
+C1097 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF
+C1098 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF
+C1099 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C1100 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
+C1101 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1102 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
+C1103 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF
+C1104 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF
+C1105 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF
+C1106 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
+C1107 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF
+C1108 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF
+C1109 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF
+C1110 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1111 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF
+C1112 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF
+C1113 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF
+C1114 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF
+C1115 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C1116 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF
+C1117 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF
+C1118 ro_complete_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/ro_complete_0/a5 26.29fF
+C1119 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF
+C1120 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C1121 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1122 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
+C1123 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1124 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF
+C1125 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
+C1126 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
+C1127 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_160_230# 0.02fF
+C1128 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF
+C1129 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF
+C1130 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF
+C1131 divider_0/mc2 divider_0/nor_0/B 0.15fF
+C1132 io_clamp_low[0] io_analog[4] 0.53fF
+C1133 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF
+C1134 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
+C1135 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF
+C1136 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF
+C1137 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1138 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF
+C1139 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF
+C1140 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF
+C1141 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF
+C1142 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C1143 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF
+C1144 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
+C1145 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1146 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C1147 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF
+C1148 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF
+C1149 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
+C1150 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF
+C1151 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
+C1152 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF
+C1153 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF
+C1154 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF
+C1155 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C1156 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF
+C1157 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF
+C1158 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF
+C1159 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
+C1160 divider_0/nor_1/B divider_0/and_0/B 0.31fF
+C1161 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
+C1162 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
+C1163 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF
+C1164 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF
+C1165 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
+C1166 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
+C1167 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF
+C1168 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C1169 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF
+C1170 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF
+C1171 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C1172 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/in 0.19fF
+C1173 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1174 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_1/in 1.27fF
+C1175 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF
+C1176 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF
+C1177 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF
+C1178 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF
+C1179 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/tapered_buf_2/a_580_0# 0.84fF
+C1180 pll_full_1/pd_0/R pll_full_1/pd_0/DOWN 0.36fF
+C1181 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
+C1182 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1183 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF
+C1184 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF
+C1185 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF
+C1186 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.01fF
+C1187 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
+C1188 divider_0/nor_1/A divider_0/tspc_1/Z2 0.15fF
+C1189 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF
+C1190 divider_1/nor_0/B divider_1/and_0/B 0.29fF
+C1191 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C1192 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
+C1193 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.02fF
+C1194 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF
+C1195 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1196 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
 C1197 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
 C1198 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C1199 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF
-C1200 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
-C1201 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
-C1202 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF
-C1203 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF
-C1204 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C1205 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF
-C1206 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
-C1207 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF
-C1208 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
-C1209 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF
-C1210 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF
-C1211 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
-C1212 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF
-C1213 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1214 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
-C1215 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C1216 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
-C1217 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF
-C1218 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C1219 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
-C1220 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C1221 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
-C1222 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF
-C1223 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
+C1199 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF
+C1200 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C1201 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF
+C1202 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF
+C1203 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C1204 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF
+C1205 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF
+C1206 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF
+C1207 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF
+C1208 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF
+C1209 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF
+C1210 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
+C1211 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
+C1212 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C1213 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1214 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/upbar 26.29fF
+C1215 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF
+C1216 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF
+C1217 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C1218 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF
+C1219 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.01fF
+C1220 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
+C1221 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
+C1222 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF
+C1223 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF
 C1224 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C1225 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF
-C1226 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF
-C1227 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF
-C1228 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF
-C1229 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1230 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
-C1231 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
-C1232 divider_0/and_0/A divider_0/and_0/B 0.18fF
-C1233 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF
-C1234 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF
-C1235 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF
-C1236 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
-C1237 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
-C1238 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/R 0.30fF
-C1239 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
-C1240 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C1241 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF
-C1242 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF
-C1243 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
-C1244 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF
-C1245 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C1246 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/in 0.02fF
-C1247 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF
-C1248 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF
-C1249 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF
-C1250 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF
-C1251 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF
-C1252 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF
-C1253 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF
-C1254 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF
-C1255 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
-C1256 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
-C1257 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF
-C1258 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
-C1259 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
-C1260 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C1261 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
-C1262 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF
-C1263 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF
-C1264 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C1265 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF
-C1266 ro_complete_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 4.78fF
-C1267 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1268 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
-C1269 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1270 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
-C1271 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF
-C1272 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF
-C1273 io_clamp_low[2] io_clamp_high[2] 0.53fF
-C1274 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
-C1275 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C1276 io_clamp_high[1] io_analog[5] 0.53fF
-C1277 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF
-C1278 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF
-C1279 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF
-C1280 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C1281 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
-C1282 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
-C1283 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1284 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF
-C1285 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF
-C1286 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF
-C1287 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C1288 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1289 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF
-C1290 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
-C1291 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF
-C1292 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
-C1293 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.84fF
-C1294 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.05fF
-C1295 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C1296 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF
-C1297 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF
-C1298 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF
-C1299 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF
-C1300 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF
-C1301 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF
-C1302 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C1303 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1304 div_pd_buffered_0/tapered_buf_1/a_160_230# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF
-C1305 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1306 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
-C1307 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C1308 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF
-C1309 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF
-C1310 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF
-C1311 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/upbar 0.02fF
-C1312 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
-C1313 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C1314 divider_1/tspc_0/Z2 divider_1/nor_1/A 0.23fF
-C1315 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C1316 divider_1/mc2 divider_1/and_0/B 0.20fF
-C1317 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
-C1318 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
-C1319 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF
-C1320 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF
-C1321 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C1322 divider_0/mc2 divider_0/and_0/out1 0.06fF
-C1323 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF
-C1324 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF
-C1325 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF
-C1326 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_160_n140# 0.19fF
-C1327 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
-C1328 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C1329 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF
-C1330 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
-C1331 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C1332 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
-C1333 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF
-C1334 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1335 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
-C1336 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF
-C1337 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF
-C1338 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 4.78fF
-C1339 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF
-C1340 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1341 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF
-C1342 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C1343 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF
-C1344 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C1345 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF
-C1346 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF
-C1347 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF
-C1348 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF
-C1349 divider_0/tspc_2/Z3 divider_0/Out 0.05fF
-C1350 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
-C1351 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF
-C1352 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF
-C1353 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF
-C1354 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF
-C1355 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF
-C1356 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
-C1357 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF
-C1358 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF
-C1359 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.02fF
-C1360 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.17fF
-C1361 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_6/in 0.05fF
-C1362 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF
-C1363 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
-C1364 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF
-C1365 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
-C1366 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF
-C1367 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
-C1368 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C1369 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF
-C1370 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.35fF
-C1371 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C1372 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
-C1373 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
-C1374 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
-C1375 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF
-C1376 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF
-C1377 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF
-C1378 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF
-C1379 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1380 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF
-C1381 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF
-C1382 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
-C1383 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF
-C1384 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF
-C1385 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C1386 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1387 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF
-C1388 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C1389 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1390 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_1650_0# 2.89fF
-C1391 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.17fF
-C1392 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.01fF
-C1393 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF
-C1394 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1395 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF
-C1396 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C1397 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
-C1398 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF
-C1399 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C1400 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF
-C1401 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF
-C1402 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/in 0.02fF
-C1403 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.35fF
-C1404 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF
-C1405 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C1406 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1407 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF
-C1408 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF
-C1409 divider_1/mc2 divider_1/nor_1/A 0.04fF
-C1410 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF
-C1411 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF
-C1412 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C1413 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1414 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF
-C1415 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
-C1416 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
-C1417 io_clamp_low[0] io_analog[4] 0.53fF
-C1418 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF
-C1419 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF
-C1420 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF
-C1421 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF
-C1422 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF
-C1423 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF
-C1424 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C1425 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
-C1426 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF
-C1427 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C1428 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF
-C1429 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF
-C1430 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
-C1431 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_230# 0.02fF
-C1432 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_210_n610# 0.22fF
-C1433 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF
-C1434 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
-C1435 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF
-C1436 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
-C1437 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF
-C1438 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF
-C1439 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF
-C1440 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF
-C1441 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF
-C1442 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF
-C1443 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF
-C1444 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z1 0.71fF
-C1445 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF
-C1446 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C1447 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF
-C1448 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF
-C1449 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_6/in 0.05fF
-C1450 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF
-C1451 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF
-C1452 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
-C1453 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
-C1454 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1455 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF
-C1456 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
-C1457 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z3 0.25fF
-C1458 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF
-C1459 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF
-C1460 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C1461 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF
-C1462 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF
-C1463 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.35fF
-C1464 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF
-C1465 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C1466 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF
-C1467 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/and_pd_0/Z1 0.18fF
-C1468 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF
-C1469 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF
-C1470 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C1471 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF
-C1472 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF
-C1473 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
-C1474 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
-C1475 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C1476 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF
-C1477 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C1478 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF
-C1479 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF
-C1480 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1481 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/in 0.19fF
-C1482 divider_1/nor_1/B divider_1/nor_0/B 0.47fF
-C1483 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF
-C1484 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF
-C1485 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF
-C1486 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF
-C1487 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1488 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF
-C1489 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/out 26.29fF
-C1490 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF
-C1491 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF
-C1492 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF
-C1493 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF
-C1494 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF
-C1495 pll_full_0/ref pll_full_0/pd_0/R 0.61fF
-C1496 divider_1/mc2 divider_1/and_0/OUT 0.05fF
-C1497 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
-C1498 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C1499 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1500 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF
-C1501 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
-C1502 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
-C1503 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
-C1504 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF
-C1505 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C1506 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF
-C1507 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF
-C1508 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF
-C1509 divider_0/mc2 divider_0/nor_1/A 0.04fF
-C1510 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
-C1511 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF
-C1512 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C1513 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF
-C1514 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.84fF
-C1515 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.05fF
-C1516 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C1517 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF
-C1518 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF
-C1519 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF
-C1520 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C1521 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF
-C1522 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
-C1523 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
-C1524 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF
-C1525 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
-C1526 pll_full_0/ref pll_full_0/pd_0/DOWN 1.48fF
-C1527 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF
-C1528 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF
-C1529 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
-C1530 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_580_0# 1.27fF
-C1531 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C1532 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
-C1533 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C1534 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1535 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF
-C1536 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
-C1537 divider_1/nor_1/B divider_1/tspc_1/Z1 0.03fF
-C1538 divider_0/mc2 divider_0/nor_0/B 0.15fF
-C1539 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF
-C1540 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF
-C1541 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C1542 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1543 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
-C1544 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF
-C1545 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF
-C1546 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF
-C1547 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF
-C1548 divider_1/prescaler_0/Out divider_1/tspc_0/Z2 0.11fF
-C1549 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF
-C1550 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C1551 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.02fF
-C1552 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
-C1553 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF
-C1554 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
-C1555 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF
-C1556 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF
-C1557 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
-C1558 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C1559 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
-C1560 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF
-C1561 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF
-C1562 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
-C1563 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
-C1564 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF
-C1565 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF
-C1566 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF
-C1567 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF
-C1568 cp_buffered_0/cp_0/upbar cp_buffered_0/tapered_buf_0/a_210_n610# 26.29fF
-C1569 io_clamp_low[1] io_clamp_high[1] 0.53fF
-C1570 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
-C1571 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF
-C1572 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF
-C1573 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF
-C1574 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
-C1575 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF
-C1576 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C1577 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C1578 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
-C1579 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
-C1580 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF
-C1581 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF
-C1582 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF
-C1583 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C1584 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF
-C1585 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF
-C1586 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF
-C1587 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C1588 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
-C1589 pd_buffered_0/tapered_buf_3/in pd_buffered_0/pd_0/DIV 0.02fF
-C1590 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF
-C1591 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF
-C1592 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF
-C1593 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF
-C1594 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C1595 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF
-C1596 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF
-C1597 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF
-C1598 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/in 0.19fF
-C1599 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
-C1600 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
-C1601 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF
-C1602 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_4670_0# 4.78fF
-C1603 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
-C1604 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF
-C1605 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF
-C1606 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/a_740_n680# 0.08fF
-C1607 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF
-C1608 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF
-C1609 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF
-C1610 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF
-C1611 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C1612 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF
-C1613 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF
-C1614 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C1615 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF
-C1616 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF
-C1617 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF
-C1618 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF
-C1619 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF
-C1620 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C1621 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C1622 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
-C1623 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF
-C1624 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF
-C1625 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 2.89fF
-C1626 divider_1/nor_0/B divider_1/and_0/B 0.29fF
-C1627 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
-C1628 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.27fF
-C1629 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF
-C1630 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF
-C1631 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
-C1632 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF
-C1633 divider_1/nor_1/B divider_1/nor_0/Z1 0.18fF
-C1634 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF
-C1635 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF
-C1636 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C1637 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF
-C1638 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1639 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF
-C1640 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF
-C1641 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C1642 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1643 divider_1/tspc_0/a_630_n680# divider_1/nor_1/A 0.35fF
-C1644 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF
-C1645 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF
-C1646 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF
-C1647 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF
-C1648 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF
-C1649 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF
-C1650 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
-C1651 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF
-C1652 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C1653 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C1654 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF
-C1655 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF
-C1656 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
-C1657 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C1658 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C1659 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF
-C1660 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF
-C1661 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
-C1662 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF
-C1663 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF
-C1664 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/DOWN 0.03fF
-C1665 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF
-C1666 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
-C1667 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF
-C1668 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
-C1669 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1670 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF
-C1671 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C1672 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
-C1673 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF
-C1674 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF
-C1675 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF
-C1676 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C1677 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
-C1678 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF
-C1679 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
-C1680 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
-C1681 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF
-C1682 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1683 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C1684 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C1685 pd_buffered_0/tapered_buf_1/a_4670_0# pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF
-C1686 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
-C1687 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF
-C1688 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF
-C1689 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_6/in 0.10fF
-C1690 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF
-C1691 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF
-C1692 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF
-C1693 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C1694 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C1695 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
-C1696 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C1697 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF
-C1698 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF
-C1699 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF
-C1700 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C1701 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C1702 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C1703 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF
-C1704 divider_1/nor_0/B divider_1/Out 0.22fF
-C1705 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
-C1706 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF
-C1707 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF
-C1708 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF
-C1709 divider_1/nor_1/B divider_1/tspc_1/Z3 0.38fF
-C1710 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF
-C1711 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C1712 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1713 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF
-C1714 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/DOWN 0.03fF
-C1715 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF
-C1716 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF
-C1717 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF
-C1718 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF
-C1719 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF
-C1720 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
-C1721 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF
-C1722 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C1723 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF
-C1724 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
-C1725 divider_1/nor_1/A divider_1/tspc_0/Z4 0.21fF
-C1726 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
-C1727 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
-C1728 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C1729 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF
-C1730 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF
-C1731 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF
-C1732 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
-C1733 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF
-C1734 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C1735 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF
-C1736 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF
-C1737 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF
-C1738 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1739 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF
-C1740 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
-C1741 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF
-C1742 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C1743 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF
-C1744 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF
-C1745 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_580_0# 0.84fF
-C1746 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/tapered_buf_0/a_160_n140# 0.05fF
-C1747 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
-C1748 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF
-C1749 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF
-C1750 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
-C1751 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
-C1752 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
-C1753 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.05fF
-C1754 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/in 0.04fF
-C1755 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF
-C1756 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
-C1757 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
-C1758 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF
-C1759 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF
-C1760 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF
-C1761 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C1762 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C1763 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF
-C1764 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF
-C1765 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF
-C1766 divider_1/nor_1/B divider_1/and_0/B 0.31fF
-C1767 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
-C1768 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF
-C1769 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF
-C1770 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF
-C1771 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
-C1772 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C1773 divider_1/tspc_0/Q divider_1/tspc_1/a_630_n680# 0.01fF
-C1774 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
-C1775 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF
-C1776 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
-C1777 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
-C1778 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C1779 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF
-C1780 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C1781 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF
-C1782 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF
-C1783 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF
-C1784 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF
-C1785 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C1786 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_6/in 1.27fF
-C1787 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF
-C1788 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C1789 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF
-C1790 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF
-C1791 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
-C1792 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
-C1793 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF
-C1794 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF
-C1795 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1796 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C1797 pll_full_1/pd_0/R pll_full_1/ref 0.61fF
-C1798 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF
-C1799 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C1800 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
-C1801 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF
-C1802 divider_0/mc2 divider_0/and_0/B 0.20fF
-C1803 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C1804 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF
-C1805 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF
-C1806 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF
-C1807 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF
-C1808 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF
-C1809 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
-C1810 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF
-C1811 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF
-C1812 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF
-C1813 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF
-C1814 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF
-C1815 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF
-C1816 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF
-C1817 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C1818 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
-C1819 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
-C1820 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
-C1821 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
-C1822 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
-C1823 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF
-C1824 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF
-C1825 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C1826 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1827 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF
-C1828 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF
-C1829 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C1830 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
-C1831 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1832 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF
-C1833 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF
-C1834 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF
-C1835 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
-C1836 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF
-C1837 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF
-C1838 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF
-C1839 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
-C1840 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1841 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF
-C1842 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
-C1843 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.09fF
-C1844 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 29.21fF
-C1845 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
-C1846 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
-C1847 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
-C1848 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C1849 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF
-C1850 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF
-C1851 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF
-C1852 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1853 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF
-C1854 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
-C1855 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF
-C1856 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C1857 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C1858 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF
-C1859 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF
-C1860 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF
-C1861 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
-C1862 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
-C1863 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
-C1864 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C1865 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF
-C1866 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
-C1867 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF
-C1868 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF
-C1869 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z2 0.14fF
-C1870 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF
-C1871 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF
-C1872 divider_1/nor_1/B divider_1/nor_1/A 1.21fF
-C1873 ro_complete_buffered_0/tapered_buf_1/in gnd 0.04fF
-C1874 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C1875 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C1876 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF
-C1877 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF
-C1878 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C1879 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1880 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF
-C1881 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF
-C1882 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF
-C1883 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF
-C1884 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF
-C1885 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
-C1886 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
-C1887 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF
-C1888 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C1889 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
-C1890 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
-C1891 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
-C1892 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF
-C1893 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C1894 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF
-C1895 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF
-C1896 divider_1/nor_1/B divider_1/nor_1/Z1 0.06fF
-C1897 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/tapered_buf_6/out 26.29fF
-C1898 divider_1/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.01fF
-C1899 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1900 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
-C1901 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF
-C1902 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF
-C1903 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C1904 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1905 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
-C1906 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF
-C1907 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF
-C1908 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF
-C1909 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF
-C1910 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF
-C1911 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
-C1912 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF
-C1913 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF
-C1914 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
-C1915 io_clamp_low[0] io_clamp_high[0] 0.53fF
-C1916 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1917 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C1918 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF
-C1919 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1920 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF
-C1921 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/pd_0/REF 26.29fF
-C1922 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF
-C1923 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF
-C1924 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF
-C1925 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF
-C1926 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C1927 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1928 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_n10_230# 0.09fF
-C1929 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF
-C1930 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF
-C1931 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
-C1932 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF
-C1933 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1934 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF
-C1935 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF
-C1936 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF
-C1937 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF
-C1938 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
-C1939 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
-C1940 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C1941 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C1942 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF
-C1943 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
-C1944 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
-C1945 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF
-C1946 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF
-C1947 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C1948 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF
-Xpd_buffered_0/tapered_buf_2 pd_buffered_0/pd_0/DIV pd_buffered_0/tapered_buf_2/in
-+ vdda1 vssa1 tapered_buf
-Xpd_buffered_0/tapered_buf_3 pd_buffered_0/pd_0/REF pd_buffered_0/tapered_buf_3/in
-+ vdda1 vssa1 tapered_buf
+C1225 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1226 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C1227 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF
+C1228 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_n10_230# 0.09fF
+C1229 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF
+C1230 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C1231 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF
+C1232 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF
+C1233 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF
+C1234 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
+C1235 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_n10_230# 0.02fF
+C1236 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C1237 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C1238 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF
+C1239 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
+C1240 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
+C1241 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
+C1242 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF
+C1243 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
+C1244 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF
+C1245 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF
+C1246 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
+C1247 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF
+C1248 divider_1/nor_0/Z1 divider_1/nor_1/B 0.18fF
+C1249 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z1 1.07fF
+C1250 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C1251 divider_1/nor_1/A divider_1/nor_1/B 1.21fF
+C1252 divider_1/mc2 divider_1/and_0/B 0.20fF
+C1253 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
+C1254 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF
+C1255 divider_1/nor_0/B divider_1/Out 0.22fF
+C1256 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
+C1257 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF
+C1258 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1259 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF
+C1260 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C1261 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF
+C1262 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF
+C1263 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF
+C1264 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF
+C1265 io_clamp_low[1] io_clamp_high[1] 0.53fF
+C1266 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF
+C1267 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
+C1268 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF
+C1269 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
+C1270 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF
+C1271 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF
+C1272 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
+C1273 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF
+C1274 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
+C1275 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
+C1276 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_n10_230# 0.01fF
+C1277 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF
+C1278 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF
+C1279 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
+C1280 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C1281 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
+C1282 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF
+C1283 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C1284 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF
+C1285 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF
+C1286 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF
+C1287 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF
+C1288 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF
+C1289 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.01fF
+C1290 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF
+C1291 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C1292 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C1293 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF
+C1294 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF
+C1295 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF
+C1296 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF
+C1297 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF
+C1298 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF
+C1299 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C1300 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF
+C1301 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
+C1302 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
+C1303 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
+C1304 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF
+C1305 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF
+C1306 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF
+C1307 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
+C1308 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
+C1309 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF
+C1310 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF
+C1311 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF
+C1312 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF
+C1313 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
+C1314 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF
+C1315 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF
+C1316 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF
+C1317 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.09fF
+C1318 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF
+C1319 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
+C1320 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
+C1321 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
+C1322 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF
+C1323 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1324 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF
+C1325 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF
+C1326 divider_0/nor_1/A divider_0/and_0/B 0.08fF
+C1327 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
+C1328 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF
+C1329 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF
+C1330 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1331 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
+C1332 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C1333 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF
+C1334 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
+C1335 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF
+C1336 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.02fF
+C1337 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.02fF
+C1338 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF
+C1339 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF
+C1340 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF
+C1341 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF
+C1342 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF
+C1343 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C1344 divider_0/tspc_1/Z1 divider_0/tspc_0/Q 0.01fF
+C1345 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
+C1346 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF
+C1347 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C1348 divider_0/nor_1/A divider_0/prescaler_0/m1_2700_2190# 0.01fF
+C1349 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF
+C1350 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
+C1351 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF
+C1352 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C1353 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF
+C1354 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C1355 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF
+C1356 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF
+C1357 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF
+C1358 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF
+C1359 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C1360 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF
+C1361 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C1362 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C1363 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF
+C1364 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF
+C1365 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF
+C1366 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF
+C1367 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C1368 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/ref 0.12fF
+C1369 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF
+C1370 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
+C1371 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
+C1372 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
+C1373 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
+C1374 divider_0/mc2 divider_0/and_0/B 0.20fF
+C1375 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF
+C1376 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF
+C1377 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF
+C1378 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF
+C1379 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF
+C1380 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/in 0.02fF
+C1381 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C1382 divider_1/tspc_1/a_630_n680# divider_1/tspc_0/Q 0.01fF
+C1383 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.02fF
+C1384 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.22fF
+C1385 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF
+C1386 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF
+C1387 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1388 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1389 div_pd_buffered_0/tapered_buf_0/out div_pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF
+C1390 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF
+C1391 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C1392 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF
+C1393 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
+C1394 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF
+C1395 pll_full_1/pd_0/R pll_full_1/ref 0.61fF
+C1396 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C1397 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C1398 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF
+C1399 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
+C1400 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
+C1401 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF
+C1402 pd_buffered_0/tapered_buf_0/a_4670_0# pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF
+C1403 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF
+C1404 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF
+C1405 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C1406 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF
+C1407 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF
+C1408 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF
+C1409 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF
+C1410 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C1411 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C1412 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF
+C1413 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF
+C1414 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF
+C1415 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C1416 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF
+C1417 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C1418 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
+C1419 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF
+C1420 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF
+C1421 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
+C1422 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF
+C1423 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
+C1424 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C1425 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C1426 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1427 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF
+C1428 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF
+C1429 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.17fF
+C1430 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C1431 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF
+C1432 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF
+C1433 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF
+C1434 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
+C1435 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
+C1436 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
+C1437 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF
+C1438 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF
+C1439 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
+C1440 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF
+C1441 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
+C1442 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
+C1443 divider_0/nor_1/A divider_0/tspc_0/a_630_n680# 0.35fF
+C1444 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C1445 div_pd_buffered_0/tapered_buf_4/in div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.19fF
+C1446 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF
+C1447 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
+C1448 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
+C1449 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF
+C1450 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C1451 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF
+C1452 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
+C1453 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF
+C1454 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF
+C1455 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF
+C1456 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF
+C1457 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.19fF
+C1458 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF
+C1459 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
+C1460 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF
+C1461 divider_1/mc2 divider_1/and_0/OUT 0.05fF
+C1462 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF
+C1463 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF
+C1464 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
+C1465 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF
+C1466 pd_buffered_0/tapered_buf_0/in pd_buffered_0/tapered_buf_0/a_n10_230# 0.02fF
+C1467 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF
+C1468 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF
+C1469 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
+C1470 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF
+C1471 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF
+C1472 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C1473 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF
+C1474 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1475 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF
+C1476 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF
+C1477 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
+C1478 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
+C1479 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
+C1480 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C1481 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
+C1482 divider_1/nor_1/A divider_1/tspc_0/Z2 0.23fF
+C1483 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
+C1484 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF
+C1485 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF
+C1486 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C1487 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF
+C1488 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF
+C1489 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
+C1490 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF
+C1491 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF
+C1492 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF
+C1493 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF
+C1494 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF
+C1495 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF
+C1496 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C1497 divider_0/tspc_1/Z3 divider_0/tspc_0/Q 0.45fF
+C1498 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C1499 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
+C1500 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
+C1501 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
+C1502 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF
+C1503 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF
+C1504 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF
+C1505 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C1506 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1507 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/pd_0/REF 26.29fF
+C1508 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C1509 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF
+C1510 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF
+C1511 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
+C1512 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C1513 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF
+C1514 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF
+C1515 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF
+C1516 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
+C1517 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF
+C1518 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF
+C1519 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
+C1520 divider_0/tspc_1/Z4 divider_0/tspc_0/Q 0.15fF
+C1521 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
+C1522 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
+C1523 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
+C1524 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/out 26.29fF
+C1525 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF
+C1526 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
+C1527 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C1528 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF
+C1529 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1530 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF
+C1531 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
+C1532 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/ref 0.65fF
+C1533 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.84fF
+C1534 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF
+C1535 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C1536 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF
+C1537 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.09fF
+C1538 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 29.21fF
+C1539 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C1540 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF
+C1541 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF
+C1542 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF
+C1543 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF
+C1544 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C1545 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1546 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1547 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF
+C1548 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
+C1549 divider_1/tspc_0/Z3 divider_1/tspc_0/Z2 0.16fF
+C1550 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
+C1551 divider_0/nor_0/B divider_0/and_0/B 0.29fF
+C1552 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C1553 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
+C1554 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
+C1555 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF
+C1556 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF
+C1557 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF
+C1558 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF
+C1559 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF
+C1560 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1561 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C1562 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF
+C1563 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF
+C1564 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF
+C1565 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF
+C1566 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
+C1567 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C1568 divider_1/nor_1/A divider_1/tspc_0/Z4 0.21fF
+C1569 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
+C1570 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF
+C1571 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C1572 divider_0/mc2 divider_0/and_0/OUT 0.05fF
+C1573 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
+C1574 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF
+C1575 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
+C1576 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF
+C1577 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
+C1578 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF
+C1579 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF
+C1580 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF
+C1581 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF
+C1582 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF
+C1583 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1584 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C1585 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
+C1586 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C1587 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1588 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
+C1589 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF
+C1590 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
+C1591 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
+C1592 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
+C1593 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF
+C1594 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
+C1595 pd_buffered_0/pd_0/DIV pd_buffered_0/tapered_buf_0/in 0.02fF
+C1596 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF
+C1597 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
+C1598 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF
+C1599 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF
+C1600 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF
+C1601 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C1602 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF
+C1603 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF
+C1604 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF
+C1605 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF
+C1606 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF
+C1607 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF
+C1608 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
+C1609 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C1610 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C1611 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF
+C1612 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C1613 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF
+C1614 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
+C1615 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/in 0.02fF
+C1616 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF
+C1617 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF
+C1618 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF
+C1619 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C1620 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF
+C1621 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF
+C1622 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF
+C1623 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
+C1624 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C1625 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF
+C1626 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/a_630_n680# 0.01fF
+C1627 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
+C1628 divider_0/nor_0/B divider_0/Out 0.22fF
+C1629 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
+C1630 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF
+C1631 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF
+C1632 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF
+C1633 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C1634 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF
+C1635 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF
+C1636 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 1.27fF
+C1637 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF
+C1638 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_160_230# 0.17fF
+C1639 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF
+C1640 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C1641 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF
+C1642 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF
+C1643 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C1644 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF
+C1645 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/Z3 0.05fF
+C1646 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C1647 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1648 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF
+C1649 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
+C1650 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF
+C1651 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1652 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1653 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
+C1654 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
+C1655 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF
+C1656 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF
+C1657 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.35fF
+C1658 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
+C1659 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF
+C1660 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF
+C1661 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF
+C1662 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
+C1663 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF
+C1664 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF
+C1665 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C1666 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF
+C1667 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C1668 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF
+C1669 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
+C1670 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF
+C1671 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
+C1672 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF
+C1673 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF
+C1674 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Z2 0.21fF
+C1675 divider_1/mc2 divider_1/nor_1/A 0.04fF
+C1676 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
+C1677 divider_1/tspc_1/Z2 divider_1/nor_1/B 0.30fF
+C1678 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1679 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
+C1680 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF
+C1681 io_clamp_high[2] io_analog[6] 0.53fF
+C1682 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/in 0.04fF
+C1683 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
+C1684 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF
+C1685 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF
+C1686 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
+C1687 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_740_n680# 0.21fF
+C1688 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF
+C1689 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
+C1690 divider_1/prescaler_0/Out divider_1/tspc_0/Z2 0.11fF
+C1691 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF
+C1692 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C1693 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF
+C1694 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
+C1695 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF
+C1696 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
+C1697 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF
+C1698 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF
+C1699 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF
+C1700 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
+C1701 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF
+C1702 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF
+C1703 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C1704 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C1705 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF
+C1706 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C1707 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
+C1708 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C1709 pd_buffered_0/tapered_buf_2/a_160_230# pd_buffered_0/tapered_buf_2/a_n10_230# 0.09fF
+C1710 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF
+C1711 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C1712 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
+C1713 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF
+C1714 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF
+C1715 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
+C1716 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C1717 divider_0/tspc_1/a_630_n680# divider_0/tspc_0/Q 0.01fF
+C1718 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
+C1719 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
+C1720 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF
+C1721 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar 0.03fF
+C1722 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
+C1723 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
+C1724 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
+C1725 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
+C1726 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF
+C1727 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
+C1728 divider_1/nor_1/B divider_1/and_0/A 0.26fF
+C1729 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF
+C1730 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF
+C1731 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF
+C1732 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
+C1733 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF
+C1734 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF
+C1735 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF
+C1736 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
+C1737 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C1738 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C1739 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C1740 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/tspc_r_1/Z4 0.04fF
+C1741 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF
+C1742 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF
+C1743 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF
+C1744 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
+C1745 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
+C1746 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
+C1747 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1748 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
+C1749 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
+C1750 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C1751 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.02fF
+C1752 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF
+C1753 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF
+C1754 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
+C1755 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
+C1756 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF
+C1757 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF
+C1758 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF
+C1759 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.02fF
+C1760 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.22fF
+C1761 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
+C1762 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF
+C1763 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C1764 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF
+C1765 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C1766 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF
+C1767 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C1768 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF
+C1769 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF
+C1770 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
+C1771 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
+C1772 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
+C1773 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_160_n140# 0.35fF
+C1774 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF
+C1775 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF
+C1776 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF
+C1777 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF
+C1778 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C1779 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF
+C1780 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
+C1781 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF
+C1782 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF
+C1783 pll_full_1/pd_0/R pll_full_1/div 0.51fF
+C1784 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF
+C1785 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
+C1786 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF
+C1787 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C1788 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF
+C1789 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF
+C1790 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF
+C1791 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF
+C1792 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.09fF
+C1793 ro_complete_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 29.21fF
+C1794 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
+C1795 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
+C1796 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF
+C1797 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF
+C1798 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1799 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF
+C1800 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
+C1801 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1802 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
+C1803 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C1804 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF
+C1805 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF
+C1806 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1807 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1808 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF
+C1809 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_210_n610# 0.84fF
+C1810 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
+C1811 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.02fF
+C1812 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF
+C1813 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C1814 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF
+C1815 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
+C1816 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF
+C1817 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF
+C1818 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
+C1819 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF
+C1820 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF
+C1821 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_210_n610# 29.21fF
+C1822 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF
+C1823 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
+C1824 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
+C1825 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1826 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1827 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
+C1828 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
+C1829 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF
+C1830 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C1831 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C1832 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C1833 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF
+C1834 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
+C1835 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF
+C1836 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
+C1837 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF
+C1838 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/z5 0.03fF
+C1839 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
+C1840 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF
+C1841 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF
+C1842 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF
+C1843 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C1844 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF
+C1845 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF
+C1846 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF
+C1847 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
+C1848 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF
+C1849 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF
+C1850 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF
+C1851 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1852 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF
+C1853 divider_0/nor_1/A divider_0/tspc_0/Z4 0.21fF
+C1854 io_clamp_low[1] io_analog[5] 0.53fF
+C1855 div_pd_buffered_0/tapered_buf_4/a_160_230# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.17fF
+C1856 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
+C1857 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF
+C1858 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF
+C1859 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C1860 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C1861 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C1862 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF
+C1863 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF
+C1864 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF
+C1865 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 4.78fF
+C1866 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF
+C1867 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF
+C1868 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C1869 divider_1/nor_1/A divider_1/and_0/B 0.08fF
+C1870 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF
+C1871 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
+C1872 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF
+C1873 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF
+C1874 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.02fF
+C1875 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF
+C1876 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF
+C1877 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C1878 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C1879 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF
+C1880 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C1881 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C1882 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/a_n10_230# 0.01fF
+C1883 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
+C1884 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF
+C1885 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF
+C1886 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C1887 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C1888 divider_0/nor_1/B divider_0/tspc_0/Q 0.22fF
+C1889 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C1890 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z3 0.09fF
+C1891 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 2.89fF
+C1892 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF
+C1893 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1894 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
+C1895 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF
+C1896 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF
+C1897 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF
+C1898 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF
+C1899 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C1900 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF
+C1901 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C1902 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C1903 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
+C1904 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF
+C1905 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF
+C1906 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
+C1907 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF
+C1908 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF
+C1909 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF
+C1910 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF
+C1911 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1912 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
+C1913 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
+C1914 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
+C1915 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF
+C1916 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C1917 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF
+C1918 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
+C1919 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
+C1920 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C1921 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF
+C1922 ro_complete_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_1/a_210_n610# 26.29fF
+C1923 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF
+C1924 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF
+C1925 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF
+C1926 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF
+C1927 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C1928 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C1929 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF
+C1930 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF
+C1931 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
+C1932 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C1933 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
+C1934 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
+C1935 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF
+C1936 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C1937 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1938 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
+C1939 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
+C1940 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
+C1941 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF
+Xpd_buffered_0/tapered_buf_2 vdda1 vssa1 pd_buffered_0/tapered_buf_2/in pd_buffered_0/pd_0/DIV
++ tapered_buf
+Xpd_buffered_0/tapered_buf_3 vdd vssa1 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_3/out
++ tapered_buf
 Xpd_buffered_0/pd_0 vssa1 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/UP
 + pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R vssa1 vdd pd
-Xpd_buffered_0/tapered_buf_1 pd_buffered_0/tapered_buf_1/out pd_buffered_0/pd_0/DOWN
-+ vdd vssa1 tapered_buf
-Xpd_buffered_0/tapered_buf_0 pd_buffered_0/tapered_buf_0/out pd_buffered_0/pd_0/UP
-+ vdd vssa1 tapered_buf
+Xpd_buffered_0/tapered_buf_1 vdd vssa1 pd_buffered_0/pd_0/UP pd_buffered_0/tapered_buf_1/out
++ tapered_buf
+Xpd_buffered_0/tapered_buf_0 vdda1 vssa1 pd_buffered_0/tapered_buf_0/in pd_buffered_0/pd_0/REF
++ tapered_buf
 Xcp_buffered_0 vdda1 vdda1 cp_buffered
 Xfilter_0 vssa1 filter_0/v filter
 Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4
@@ -2075,1340 +2068,1339 @@
 Xdiv_pd_buffered_0 vdda1 vssa1 div_pd_buffered
 Xpll_full_0 vdd pll_full_0/ref pll_full_0/div pll_full_0/vco pll_full
 Xpll_full_1 vdd pll_full_1/ref pll_full_1/div pll_full_1/vco pll_full
-C1949 io_analog[4] vssa1 43.96fF
-C1950 io_analog[5] vssa1 44.13fF
-C1951 io_analog[6] vssa1 43.46fF
-C1952 io_in_3v3[0] vssa1 0.61fF
-C1953 io_oeb[26] vssa1 0.61fF
-C1954 io_in[0] vssa1 0.61fF
-C1955 io_out[26] vssa1 0.61fF
-C1956 io_out[0] vssa1 0.61fF
-C1957 io_in[26] vssa1 0.61fF
-C1958 io_oeb[0] vssa1 0.61fF
-C1959 io_in_3v3[26] vssa1 0.61fF
-C1960 io_in_3v3[1] vssa1 0.61fF
-C1961 io_oeb[25] vssa1 0.61fF
-C1962 io_in[1] vssa1 0.61fF
-C1963 io_out[25] vssa1 0.61fF
-C1964 io_out[1] vssa1 0.61fF
-C1965 io_in[25] vssa1 0.61fF
-C1966 io_oeb[1] vssa1 0.61fF
-C1967 io_in_3v3[25] vssa1 0.61fF
-C1968 io_in_3v3[2] vssa1 0.61fF
-C1969 io_oeb[24] vssa1 0.61fF
-C1970 io_in[2] vssa1 0.61fF
-C1971 io_out[24] vssa1 0.61fF
-C1972 io_out[2] vssa1 0.61fF
-C1973 io_in[24] vssa1 0.61fF
-C1974 io_oeb[2] vssa1 0.61fF
-C1975 io_in_3v3[24] vssa1 0.61fF
-C1976 io_in_3v3[3] vssa1 0.61fF
-C1977 gpio_noesd[17] vssa1 2.32fF
-C1978 io_in[3] vssa1 0.61fF
-C1979 gpio_analog[17] vssa1 2.30fF
-C1980 io_out[3] vssa1 0.61fF
-C1981 io_oeb[3] vssa1 0.61fF
-C1982 io_in_3v3[4] vssa1 0.61fF
-C1983 io_in[4] vssa1 0.61fF
-C1984 io_out[4] vssa1 0.61fF
-C1985 io_oeb[4] vssa1 0.61fF
-C1986 io_oeb[23] vssa1 0.61fF
-C1987 io_out[23] vssa1 0.61fF
-C1988 io_in[23] vssa1 0.61fF
-C1989 io_in_3v3[23] vssa1 0.61fF
-C1990 gpio_noesd[16] vssa1 2.30fF
-C1991 gpio_analog[16] vssa1 2.30fF
-C1992 io_in_3v3[5] vssa1 0.61fF
-C1993 io_in[5] vssa1 0.61fF
-C1994 io_out[5] vssa1 0.61fF
-C1995 io_oeb[5] vssa1 0.61fF
-C1996 io_oeb[22] vssa1 0.61fF
-C1997 io_out[22] vssa1 0.61fF
-C1998 io_in[22] vssa1 0.61fF
-C1999 io_in_3v3[22] vssa1 0.61fF
-C2000 gpio_noesd[15] vssa1 2.31fF
-C2001 gpio_analog[15] vssa1 2.30fF
-C2002 io_in_3v3[6] vssa1 0.61fF
-C2003 io_in[6] vssa1 0.61fF
-C2004 io_out[6] vssa1 0.61fF
-C2005 io_oeb[6] vssa1 0.61fF
-C2006 io_oeb[21] vssa1 0.61fF
-C2007 io_out[21] vssa1 0.61fF
-C2008 io_in[21] vssa1 0.61fF
-C2009 io_in_3v3[21] vssa1 0.61fF
-C2010 gpio_noesd[14] vssa1 2.30fF
-C2011 gpio_analog[14] vssa1 2.29fF
-C2012 vssd2 vssa1 38.54fF
-C2013 vssd1 vssa1 13.04fF
-C2014 vdda2 vssa1 38.30fF
-C2015 io_oeb[20] vssa1 0.61fF
-C2016 io_out[20] vssa1 0.61fF
-C2017 io_in[20] vssa1 0.61fF
-C2018 io_in_3v3[20] vssa1 0.61fF
-C2019 gpio_noesd[13] vssa1 2.31fF
-C2020 gpio_analog[13] vssa1 2.30fF
-C2021 gpio_analog[0] vssa1 0.61fF
-C2022 gpio_noesd[0] vssa1 0.61fF
-C2023 io_in_3v3[7] vssa1 0.61fF
-C2024 io_in[7] vssa1 0.61fF
-C2025 io_out[7] vssa1 0.61fF
-C2026 io_oeb[7] vssa1 0.61fF
-C2027 io_oeb[19] vssa1 0.61fF
-C2028 io_out[19] vssa1 0.61fF
-C2029 io_in[19] vssa1 0.61fF
-C2030 io_in_3v3[19] vssa1 0.61fF
-C2031 gpio_noesd[12] vssa1 2.32fF
-C2032 gpio_analog[12] vssa1 2.30fF
-C2033 gpio_analog[1] vssa1 0.61fF
-C2034 gpio_noesd[1] vssa1 0.61fF
-C2035 io_in_3v3[8] vssa1 0.61fF
-C2036 io_in[8] vssa1 0.61fF
-C2037 io_out[8] vssa1 0.61fF
-C2038 io_oeb[8] vssa1 0.61fF
-C2039 io_oeb[18] vssa1 0.61fF
-C2040 io_out[18] vssa1 0.61fF
-C2041 io_in[18] vssa1 0.61fF
-C2042 io_in_3v3[18] vssa1 0.61fF
-C2043 gpio_noesd[11] vssa1 2.30fF
-C2044 gpio_analog[11] vssa1 2.29fF
-C2045 gpio_analog[2] vssa1 0.61fF
-C2046 gpio_noesd[2] vssa1 0.61fF
-C2047 io_in_3v3[9] vssa1 0.61fF
-C2048 io_in[9] vssa1 0.61fF
-C2049 io_out[9] vssa1 0.61fF
-C2050 io_oeb[9] vssa1 0.61fF
-C2051 io_oeb[17] vssa1 0.61fF
-C2052 io_out[17] vssa1 0.61fF
-C2053 io_in[17] vssa1 0.61fF
-C2054 io_in_3v3[17] vssa1 0.61fF
-C2055 gpio_noesd[10] vssa1 2.31fF
-C2056 gpio_analog[10] vssa1 2.29fF
-C2057 gpio_analog[3] vssa1 0.61fF
-C2058 gpio_noesd[3] vssa1 0.61fF
-C2059 io_in_3v3[10] vssa1 0.61fF
-C2060 io_in[10] vssa1 0.61fF
-C2061 io_out[10] vssa1 0.61fF
-C2062 io_oeb[10] vssa1 0.61fF
-C2063 io_oeb[16] vssa1 0.61fF
-C2064 io_out[16] vssa1 0.61fF
-C2065 io_in[16] vssa1 0.61fF
-C2066 io_in_3v3[16] vssa1 0.61fF
-C2067 gpio_noesd[9] vssa1 2.28fF
-C2068 gpio_analog[9] vssa1 2.28fF
-C2069 gpio_analog[4] vssa1 0.61fF
-C2070 gpio_noesd[4] vssa1 0.61fF
-C2071 io_in_3v3[11] vssa1 0.61fF
-C2072 io_in[11] vssa1 0.61fF
-C2073 io_out[11] vssa1 0.61fF
-C2074 io_oeb[11] vssa1 0.61fF
-C2075 io_oeb[15] vssa1 0.61fF
-C2076 io_out[15] vssa1 0.61fF
-C2077 io_in[15] vssa1 0.61fF
-C2078 io_in_3v3[15] vssa1 0.61fF
-C2079 gpio_noesd[8] vssa1 2.28fF
-C2080 gpio_analog[8] vssa1 2.26fF
-C2081 gpio_analog[5] vssa1 0.61fF
-C2082 gpio_noesd[5] vssa1 0.61fF
-C2083 io_in_3v3[12] vssa1 0.61fF
-C2084 io_in[12] vssa1 0.61fF
-C2085 io_out[12] vssa1 0.61fF
-C2086 io_oeb[12] vssa1 0.61fF
-C2087 io_oeb[14] vssa1 0.61fF
-C2088 io_out[14] vssa1 0.61fF
-C2089 io_in[14] vssa1 0.61fF
-C2090 io_in_3v3[14] vssa1 0.61fF
-C2091 gpio_noesd[7] vssa1 2.30fF
-C2092 gpio_analog[7] vssa1 2.28fF
-C2093 vssa2 vssa1 38.35fF
-C2094 gpio_analog[6] vssa1 5.71fF
-C2095 gpio_noesd[6] vssa1 5.70fF
-C2096 io_in_3v3[13] vssa1 0.61fF
-C2097 io_in[13] vssa1 0.61fF
-C2098 io_out[13] vssa1 0.61fF
-C2099 io_oeb[13] vssa1 0.61fF
-C2100 vccd1 vssa1 39.84fF
-C2101 vccd2 vssa1 38.46fF
-C2102 io_analog[0] vssa1 19.99fF
-C2103 io_analog[10] vssa1 19.36fF
-C2104 io_analog[1] vssa1 13.17fF
-C2105 io_analog[2] vssa1 12.57fF
-C2106 io_analog[3] vssa1 12.83fF
-C2107 io_clamp_high[0] vssa1 3.58fF
-C2108 io_clamp_low[0] vssa1 3.58fF
-C2109 io_clamp_high[1] vssa1 3.58fF
-C2110 io_clamp_low[1] vssa1 3.58fF
-C2111 io_clamp_high[2] vssa1 3.58fF
-C2112 io_clamp_low[2] vssa1 3.58fF
-C2113 io_analog[7] vssa1 12.74fF
-C2114 io_analog[8] vssa1 13.08fF
-C2115 io_analog[9] vssa1 13.08fF
-C2116 user_irq[2] vssa1 0.63fF
-C2117 user_irq[1] vssa1 0.63fF
-C2118 user_irq[0] vssa1 0.63fF
-C2119 user_clock2 vssa1 0.63fF
-C2120 la_oenb[127] vssa1 0.63fF
-C2121 la_data_out[127] vssa1 0.63fF
-C2122 la_data_in[127] vssa1 0.63fF
-C2123 la_oenb[126] vssa1 0.63fF
-C2124 la_data_out[126] vssa1 0.63fF
-C2125 la_data_in[126] vssa1 0.63fF
-C2126 la_oenb[125] vssa1 0.63fF
-C2127 la_data_out[125] vssa1 0.63fF
-C2128 la_data_in[125] vssa1 0.63fF
-C2129 la_oenb[124] vssa1 0.63fF
-C2130 la_data_out[124] vssa1 0.63fF
-C2131 la_data_in[124] vssa1 0.63fF
-C2132 la_oenb[123] vssa1 0.63fF
-C2133 la_data_out[123] vssa1 0.63fF
-C2134 la_data_in[123] vssa1 0.63fF
-C2135 la_oenb[122] vssa1 0.63fF
-C2136 la_data_out[122] vssa1 0.63fF
-C2137 la_data_in[122] vssa1 0.63fF
-C2138 la_oenb[121] vssa1 0.63fF
-C2139 la_data_out[121] vssa1 0.63fF
-C2140 la_data_in[121] vssa1 0.63fF
-C2141 la_oenb[120] vssa1 0.63fF
-C2142 la_data_out[120] vssa1 0.63fF
-C2143 la_data_in[120] vssa1 0.63fF
-C2144 la_oenb[119] vssa1 0.63fF
-C2145 la_data_out[119] vssa1 0.63fF
-C2146 la_data_in[119] vssa1 0.63fF
-C2147 la_oenb[118] vssa1 0.63fF
-C2148 la_data_out[118] vssa1 0.63fF
-C2149 la_data_in[118] vssa1 0.63fF
-C2150 la_oenb[117] vssa1 0.63fF
-C2151 la_data_out[117] vssa1 0.63fF
-C2152 la_data_in[117] vssa1 0.63fF
-C2153 la_oenb[116] vssa1 0.63fF
-C2154 la_data_out[116] vssa1 0.63fF
-C2155 la_data_in[116] vssa1 0.63fF
-C2156 la_oenb[115] vssa1 0.63fF
-C2157 la_data_out[115] vssa1 0.63fF
-C2158 la_data_in[115] vssa1 0.63fF
-C2159 la_oenb[114] vssa1 0.63fF
-C2160 la_data_out[114] vssa1 0.63fF
-C2161 la_data_in[114] vssa1 0.63fF
-C2162 la_oenb[113] vssa1 0.63fF
-C2163 la_data_out[113] vssa1 0.63fF
-C2164 la_data_in[113] vssa1 0.63fF
-C2165 la_oenb[112] vssa1 0.63fF
-C2166 la_data_out[112] vssa1 0.63fF
-C2167 la_data_in[112] vssa1 0.63fF
-C2168 la_oenb[111] vssa1 0.63fF
-C2169 la_data_out[111] vssa1 0.63fF
-C2170 la_data_in[111] vssa1 0.63fF
-C2171 la_oenb[110] vssa1 0.63fF
-C2172 la_data_out[110] vssa1 0.63fF
-C2173 la_data_in[110] vssa1 0.63fF
-C2174 la_oenb[109] vssa1 0.63fF
-C2175 la_data_out[109] vssa1 0.63fF
-C2176 la_data_in[109] vssa1 0.63fF
-C2177 la_oenb[108] vssa1 0.63fF
-C2178 la_data_out[108] vssa1 0.63fF
-C2179 la_data_in[108] vssa1 0.63fF
-C2180 la_oenb[107] vssa1 0.63fF
-C2181 la_data_out[107] vssa1 0.63fF
-C2182 la_data_in[107] vssa1 0.63fF
-C2183 la_oenb[106] vssa1 0.63fF
-C2184 la_data_out[106] vssa1 0.63fF
-C2185 la_data_in[106] vssa1 0.63fF
-C2186 la_oenb[105] vssa1 0.63fF
-C2187 la_data_out[105] vssa1 0.63fF
-C2188 la_data_in[105] vssa1 0.63fF
-C2189 la_oenb[104] vssa1 0.63fF
-C2190 la_data_out[104] vssa1 0.63fF
-C2191 la_data_in[104] vssa1 0.63fF
-C2192 la_oenb[103] vssa1 0.63fF
-C2193 la_data_out[103] vssa1 0.63fF
-C2194 la_data_in[103] vssa1 0.63fF
-C2195 la_oenb[102] vssa1 0.63fF
-C2196 la_data_out[102] vssa1 0.63fF
-C2197 la_data_in[102] vssa1 0.63fF
-C2198 la_oenb[101] vssa1 0.63fF
-C2199 la_data_out[101] vssa1 0.63fF
-C2200 la_data_in[101] vssa1 0.63fF
-C2201 la_oenb[100] vssa1 0.63fF
-C2202 la_data_out[100] vssa1 0.63fF
-C2203 la_data_in[100] vssa1 0.63fF
-C2204 la_oenb[99] vssa1 0.63fF
-C2205 la_data_out[99] vssa1 0.63fF
-C2206 la_data_in[99] vssa1 0.63fF
-C2207 la_oenb[98] vssa1 0.63fF
-C2208 la_data_out[98] vssa1 0.63fF
-C2209 la_data_in[98] vssa1 0.63fF
-C2210 la_oenb[97] vssa1 0.63fF
-C2211 la_data_out[97] vssa1 0.63fF
-C2212 la_data_in[97] vssa1 0.63fF
-C2213 la_oenb[96] vssa1 0.63fF
-C2214 la_data_out[96] vssa1 0.63fF
-C2215 la_data_in[96] vssa1 0.63fF
-C2216 la_oenb[95] vssa1 0.63fF
-C2217 la_data_out[95] vssa1 0.63fF
-C2218 la_data_in[95] vssa1 0.63fF
-C2219 la_oenb[94] vssa1 0.63fF
-C2220 la_data_out[94] vssa1 0.63fF
-C2221 la_data_in[94] vssa1 0.63fF
-C2222 la_oenb[93] vssa1 0.63fF
-C2223 la_data_out[93] vssa1 0.63fF
-C2224 la_data_in[93] vssa1 0.63fF
-C2225 la_oenb[92] vssa1 0.63fF
-C2226 la_data_out[92] vssa1 0.63fF
-C2227 la_data_in[92] vssa1 0.63fF
-C2228 la_oenb[91] vssa1 0.63fF
-C2229 la_data_out[91] vssa1 0.63fF
-C2230 la_data_in[91] vssa1 0.63fF
-C2231 la_oenb[90] vssa1 0.63fF
-C2232 la_data_out[90] vssa1 0.63fF
-C2233 la_data_in[90] vssa1 0.63fF
-C2234 la_oenb[89] vssa1 0.63fF
-C2235 la_data_out[89] vssa1 0.63fF
-C2236 la_data_in[89] vssa1 0.63fF
-C2237 la_oenb[88] vssa1 0.63fF
-C2238 la_data_out[88] vssa1 0.63fF
-C2239 la_data_in[88] vssa1 0.63fF
-C2240 la_oenb[87] vssa1 0.63fF
-C2241 la_data_out[87] vssa1 0.63fF
-C2242 la_data_in[87] vssa1 0.63fF
-C2243 la_oenb[86] vssa1 0.63fF
-C2244 la_data_out[86] vssa1 0.63fF
-C2245 la_data_in[86] vssa1 0.63fF
-C2246 la_oenb[85] vssa1 0.63fF
-C2247 la_data_out[85] vssa1 0.63fF
-C2248 la_data_in[85] vssa1 0.63fF
-C2249 la_oenb[84] vssa1 0.63fF
-C2250 la_data_out[84] vssa1 0.63fF
-C2251 la_data_in[84] vssa1 0.63fF
-C2252 la_oenb[83] vssa1 0.63fF
-C2253 la_data_out[83] vssa1 0.63fF
-C2254 la_data_in[83] vssa1 0.63fF
-C2255 la_oenb[82] vssa1 0.63fF
-C2256 la_data_out[82] vssa1 0.63fF
-C2257 la_data_in[82] vssa1 0.63fF
-C2258 la_oenb[81] vssa1 0.63fF
-C2259 la_data_out[81] vssa1 0.63fF
-C2260 la_data_in[81] vssa1 0.63fF
-C2261 la_oenb[80] vssa1 0.63fF
-C2262 la_data_out[80] vssa1 0.63fF
-C2263 la_data_in[80] vssa1 0.63fF
-C2264 la_oenb[79] vssa1 0.63fF
-C2265 la_data_out[79] vssa1 0.63fF
-C2266 la_data_in[79] vssa1 0.63fF
-C2267 la_oenb[78] vssa1 0.63fF
-C2268 la_data_out[78] vssa1 0.63fF
-C2269 la_data_in[78] vssa1 0.63fF
-C2270 la_oenb[77] vssa1 0.63fF
-C2271 la_data_out[77] vssa1 0.63fF
-C2272 la_data_in[77] vssa1 0.63fF
-C2273 la_oenb[76] vssa1 0.63fF
-C2274 la_data_out[76] vssa1 0.63fF
-C2275 la_data_in[76] vssa1 0.63fF
-C2276 la_oenb[75] vssa1 0.63fF
-C2277 la_data_out[75] vssa1 0.63fF
-C2278 la_data_in[75] vssa1 0.63fF
-C2279 la_oenb[74] vssa1 0.63fF
-C2280 la_data_out[74] vssa1 0.63fF
-C2281 la_data_in[74] vssa1 0.63fF
-C2282 la_oenb[73] vssa1 0.63fF
-C2283 la_data_out[73] vssa1 0.63fF
-C2284 la_data_in[73] vssa1 0.63fF
-C2285 la_oenb[72] vssa1 0.63fF
-C2286 la_data_out[72] vssa1 0.63fF
-C2287 la_data_in[72] vssa1 0.63fF
-C2288 la_oenb[71] vssa1 0.63fF
-C2289 la_data_out[71] vssa1 0.63fF
-C2290 la_data_in[71] vssa1 0.63fF
-C2291 la_oenb[70] vssa1 0.63fF
-C2292 la_data_out[70] vssa1 0.63fF
-C2293 la_data_in[70] vssa1 0.63fF
-C2294 la_oenb[69] vssa1 0.63fF
-C2295 la_data_out[69] vssa1 0.63fF
-C2296 la_data_in[69] vssa1 0.63fF
-C2297 la_oenb[68] vssa1 0.63fF
-C2298 la_data_out[68] vssa1 0.63fF
-C2299 la_data_in[68] vssa1 0.63fF
-C2300 la_oenb[67] vssa1 0.63fF
-C2301 la_data_out[67] vssa1 0.63fF
-C2302 la_data_in[67] vssa1 0.63fF
-C2303 la_oenb[66] vssa1 0.63fF
-C2304 la_data_out[66] vssa1 0.63fF
-C2305 la_data_in[66] vssa1 0.63fF
-C2306 la_oenb[65] vssa1 0.63fF
-C2307 la_data_out[65] vssa1 0.63fF
-C2308 la_data_in[65] vssa1 0.63fF
-C2309 la_oenb[64] vssa1 0.63fF
-C2310 la_data_out[64] vssa1 0.63fF
-C2311 la_data_in[64] vssa1 0.63fF
-C2312 la_oenb[63] vssa1 0.63fF
-C2313 la_data_out[63] vssa1 0.63fF
-C2314 la_data_in[63] vssa1 0.63fF
-C2315 la_oenb[62] vssa1 0.63fF
-C2316 la_data_out[62] vssa1 0.63fF
-C2317 la_data_in[62] vssa1 0.63fF
-C2318 la_oenb[61] vssa1 0.63fF
-C2319 la_data_out[61] vssa1 0.63fF
-C2320 la_data_in[61] vssa1 0.63fF
-C2321 la_oenb[60] vssa1 0.63fF
-C2322 la_data_out[60] vssa1 0.63fF
-C2323 la_data_in[60] vssa1 0.63fF
-C2324 la_oenb[59] vssa1 0.63fF
-C2325 la_data_out[59] vssa1 0.63fF
-C2326 la_data_in[59] vssa1 0.63fF
-C2327 la_oenb[58] vssa1 0.63fF
-C2328 la_data_out[58] vssa1 0.63fF
-C2329 la_data_in[58] vssa1 0.63fF
-C2330 la_oenb[57] vssa1 0.63fF
-C2331 la_data_out[57] vssa1 0.63fF
-C2332 la_data_in[57] vssa1 0.63fF
-C2333 la_oenb[56] vssa1 0.63fF
-C2334 la_data_out[56] vssa1 0.63fF
-C2335 la_data_in[56] vssa1 0.63fF
-C2336 la_oenb[55] vssa1 0.63fF
-C2337 la_data_out[55] vssa1 0.63fF
-C2338 la_data_in[55] vssa1 0.63fF
-C2339 la_oenb[54] vssa1 0.63fF
-C2340 la_data_out[54] vssa1 0.63fF
-C2341 la_data_in[54] vssa1 0.63fF
-C2342 la_oenb[53] vssa1 0.63fF
-C2343 la_data_out[53] vssa1 0.63fF
-C2344 la_data_in[53] vssa1 0.63fF
-C2345 la_oenb[52] vssa1 0.63fF
-C2346 la_data_out[52] vssa1 0.63fF
-C2347 la_data_in[52] vssa1 0.63fF
-C2348 la_oenb[51] vssa1 0.63fF
-C2349 la_data_out[51] vssa1 0.63fF
-C2350 la_data_in[51] vssa1 0.63fF
-C2351 la_oenb[50] vssa1 0.63fF
-C2352 la_data_out[50] vssa1 0.63fF
-C2353 la_data_in[50] vssa1 0.63fF
-C2354 la_oenb[49] vssa1 0.63fF
-C2355 la_data_out[49] vssa1 0.63fF
-C2356 la_data_in[49] vssa1 0.63fF
-C2357 la_oenb[48] vssa1 0.63fF
-C2358 la_data_out[48] vssa1 0.63fF
-C2359 la_data_in[48] vssa1 0.63fF
-C2360 la_oenb[47] vssa1 0.63fF
-C2361 la_data_out[47] vssa1 0.63fF
-C2362 la_data_in[47] vssa1 0.63fF
-C2363 la_oenb[46] vssa1 0.63fF
-C2364 la_data_out[46] vssa1 0.63fF
-C2365 la_data_in[46] vssa1 0.63fF
-C2366 la_oenb[45] vssa1 0.63fF
-C2367 la_data_out[45] vssa1 0.63fF
-C2368 la_data_in[45] vssa1 0.63fF
-C2369 la_oenb[44] vssa1 0.63fF
-C2370 la_data_out[44] vssa1 0.63fF
-C2371 la_data_in[44] vssa1 0.63fF
-C2372 la_oenb[43] vssa1 0.63fF
-C2373 la_data_out[43] vssa1 0.63fF
-C2374 la_data_in[43] vssa1 0.63fF
-C2375 la_oenb[42] vssa1 0.63fF
-C2376 la_data_out[42] vssa1 0.63fF
-C2377 la_data_in[42] vssa1 0.63fF
-C2378 la_oenb[41] vssa1 0.63fF
-C2379 la_data_out[41] vssa1 0.63fF
-C2380 la_data_in[41] vssa1 0.63fF
-C2381 la_oenb[40] vssa1 0.63fF
-C2382 la_data_out[40] vssa1 0.63fF
-C2383 la_data_in[40] vssa1 0.63fF
-C2384 la_oenb[39] vssa1 0.63fF
-C2385 la_data_out[39] vssa1 0.63fF
-C2386 la_data_in[39] vssa1 0.63fF
-C2387 la_oenb[38] vssa1 0.63fF
-C2388 la_data_out[38] vssa1 0.63fF
-C2389 la_data_in[38] vssa1 0.63fF
-C2390 la_oenb[37] vssa1 0.63fF
-C2391 la_data_out[37] vssa1 0.63fF
-C2392 la_data_in[37] vssa1 0.63fF
-C2393 la_oenb[36] vssa1 0.63fF
-C2394 la_data_out[36] vssa1 0.63fF
-C2395 la_data_in[36] vssa1 0.63fF
-C2396 la_oenb[35] vssa1 0.63fF
-C2397 la_data_out[35] vssa1 0.63fF
-C2398 la_data_in[35] vssa1 0.63fF
-C2399 la_oenb[34] vssa1 0.63fF
-C2400 la_data_out[34] vssa1 0.63fF
-C2401 la_data_in[34] vssa1 0.63fF
-C2402 la_oenb[33] vssa1 0.63fF
-C2403 la_data_out[33] vssa1 0.63fF
-C2404 la_data_in[33] vssa1 0.63fF
-C2405 la_oenb[32] vssa1 0.63fF
-C2406 la_data_out[32] vssa1 0.63fF
-C2407 la_data_in[32] vssa1 0.63fF
-C2408 la_oenb[31] vssa1 0.63fF
-C2409 la_data_out[31] vssa1 0.63fF
-C2410 la_data_in[31] vssa1 0.63fF
-C2411 la_oenb[30] vssa1 0.63fF
-C2412 la_data_out[30] vssa1 0.63fF
-C2413 la_data_in[30] vssa1 0.63fF
-C2414 la_oenb[29] vssa1 0.63fF
-C2415 la_data_out[29] vssa1 0.63fF
-C2416 la_data_in[29] vssa1 0.63fF
-C2417 la_oenb[28] vssa1 0.63fF
-C2418 la_data_out[28] vssa1 0.63fF
-C2419 la_data_in[28] vssa1 0.63fF
-C2420 la_oenb[27] vssa1 0.63fF
-C2421 la_data_out[27] vssa1 0.63fF
-C2422 la_data_in[27] vssa1 0.63fF
-C2423 la_oenb[26] vssa1 0.63fF
-C2424 la_data_out[26] vssa1 0.63fF
-C2425 la_data_in[26] vssa1 0.63fF
-C2426 la_oenb[25] vssa1 0.63fF
-C2427 la_data_out[25] vssa1 0.63fF
-C2428 la_data_in[25] vssa1 0.63fF
-C2429 la_oenb[24] vssa1 0.63fF
-C2430 la_data_out[24] vssa1 0.63fF
-C2431 la_data_in[24] vssa1 0.63fF
-C2432 la_oenb[23] vssa1 0.63fF
-C2433 la_data_out[23] vssa1 0.63fF
-C2434 la_data_in[23] vssa1 0.63fF
-C2435 la_oenb[22] vssa1 0.63fF
-C2436 la_data_out[22] vssa1 0.63fF
-C2437 la_data_in[22] vssa1 0.63fF
-C2438 la_oenb[21] vssa1 0.63fF
-C2439 la_data_out[21] vssa1 0.63fF
-C2440 la_data_in[21] vssa1 0.63fF
-C2441 la_oenb[20] vssa1 0.63fF
-C2442 la_data_out[20] vssa1 0.63fF
-C2443 la_data_in[20] vssa1 0.63fF
-C2444 la_oenb[19] vssa1 0.63fF
-C2445 la_data_out[19] vssa1 0.63fF
-C2446 la_data_in[19] vssa1 0.63fF
-C2447 la_oenb[18] vssa1 0.63fF
-C2448 la_data_out[18] vssa1 0.63fF
-C2449 la_data_in[18] vssa1 0.63fF
-C2450 la_oenb[17] vssa1 0.63fF
-C2451 la_data_out[17] vssa1 0.63fF
-C2452 la_data_in[17] vssa1 0.63fF
-C2453 la_oenb[16] vssa1 0.63fF
-C2454 la_data_out[16] vssa1 0.63fF
-C2455 la_data_in[16] vssa1 0.63fF
-C2456 la_oenb[15] vssa1 0.63fF
-C2457 la_data_out[15] vssa1 0.63fF
-C2458 la_data_in[15] vssa1 0.63fF
-C2459 la_oenb[14] vssa1 0.63fF
-C2460 la_data_out[14] vssa1 0.63fF
-C2461 la_data_in[14] vssa1 0.63fF
-C2462 la_oenb[13] vssa1 0.63fF
-C2463 la_data_out[13] vssa1 0.63fF
-C2464 la_data_in[13] vssa1 0.63fF
-C2465 la_oenb[12] vssa1 0.63fF
-C2466 la_data_out[12] vssa1 0.63fF
-C2467 la_data_in[12] vssa1 0.63fF
-C2468 la_oenb[11] vssa1 0.63fF
-C2469 la_data_out[11] vssa1 0.63fF
-C2470 la_data_in[11] vssa1 0.63fF
-C2471 la_oenb[10] vssa1 0.63fF
-C2472 la_data_out[10] vssa1 0.63fF
-C2473 la_data_in[10] vssa1 0.63fF
-C2474 la_oenb[9] vssa1 0.63fF
-C2475 la_data_out[9] vssa1 0.63fF
-C2476 la_data_in[9] vssa1 0.63fF
-C2477 la_oenb[8] vssa1 0.63fF
-C2478 la_data_out[8] vssa1 0.63fF
-C2479 la_data_in[8] vssa1 0.63fF
-C2480 la_oenb[7] vssa1 0.63fF
-C2481 la_data_out[7] vssa1 0.63fF
-C2482 la_data_in[7] vssa1 0.63fF
-C2483 la_oenb[6] vssa1 0.63fF
-C2484 la_data_out[6] vssa1 0.63fF
-C2485 la_data_in[6] vssa1 0.63fF
-C2486 la_oenb[5] vssa1 0.63fF
-C2487 la_data_out[5] vssa1 0.63fF
-C2488 la_data_in[5] vssa1 0.63fF
-C2489 la_oenb[4] vssa1 0.63fF
-C2490 la_data_out[4] vssa1 0.63fF
-C2491 la_data_in[4] vssa1 0.63fF
-C2492 la_oenb[3] vssa1 0.63fF
-C2493 la_data_out[3] vssa1 0.63fF
-C2494 la_data_in[3] vssa1 0.63fF
-C2495 la_oenb[2] vssa1 0.63fF
-C2496 la_data_out[2] vssa1 0.63fF
-C2497 la_data_in[2] vssa1 0.63fF
-C2498 la_oenb[1] vssa1 0.63fF
-C2499 la_data_out[1] vssa1 0.63fF
-C2500 la_data_in[1] vssa1 0.63fF
-C2501 la_oenb[0] vssa1 0.63fF
-C2502 la_data_out[0] vssa1 0.63fF
-C2503 la_data_in[0] vssa1 0.63fF
-C2504 wbs_dat_o[31] vssa1 0.63fF
-C2505 wbs_dat_i[31] vssa1 0.63fF
-C2506 wbs_adr_i[31] vssa1 0.63fF
-C2507 wbs_dat_o[30] vssa1 0.63fF
-C2508 wbs_dat_i[30] vssa1 0.63fF
-C2509 wbs_adr_i[30] vssa1 0.63fF
-C2510 wbs_dat_o[29] vssa1 0.63fF
-C2511 wbs_dat_i[29] vssa1 0.63fF
-C2512 wbs_adr_i[29] vssa1 0.63fF
-C2513 wbs_dat_o[28] vssa1 0.63fF
-C2514 wbs_dat_i[28] vssa1 0.63fF
-C2515 wbs_adr_i[28] vssa1 0.63fF
-C2516 wbs_dat_o[27] vssa1 0.63fF
-C2517 wbs_dat_i[27] vssa1 0.63fF
-C2518 wbs_adr_i[27] vssa1 0.63fF
-C2519 wbs_dat_o[26] vssa1 0.63fF
-C2520 wbs_dat_i[26] vssa1 0.63fF
-C2521 wbs_adr_i[26] vssa1 0.63fF
-C2522 wbs_dat_o[25] vssa1 0.63fF
-C2523 wbs_dat_i[25] vssa1 0.63fF
-C2524 wbs_adr_i[25] vssa1 0.63fF
-C2525 wbs_dat_o[24] vssa1 0.63fF
-C2526 wbs_dat_i[24] vssa1 0.63fF
-C2527 wbs_adr_i[24] vssa1 0.63fF
-C2528 wbs_dat_o[23] vssa1 0.63fF
-C2529 wbs_dat_i[23] vssa1 0.63fF
-C2530 wbs_adr_i[23] vssa1 0.63fF
-C2531 wbs_dat_o[22] vssa1 0.63fF
-C2532 wbs_dat_i[22] vssa1 0.63fF
-C2533 wbs_adr_i[22] vssa1 0.63fF
-C2534 wbs_dat_o[21] vssa1 0.63fF
-C2535 wbs_dat_i[21] vssa1 0.63fF
-C2536 wbs_adr_i[21] vssa1 0.63fF
-C2537 wbs_dat_o[20] vssa1 0.63fF
-C2538 wbs_dat_i[20] vssa1 0.63fF
-C2539 wbs_adr_i[20] vssa1 0.63fF
-C2540 wbs_dat_o[19] vssa1 0.63fF
-C2541 wbs_dat_i[19] vssa1 0.63fF
-C2542 wbs_adr_i[19] vssa1 0.63fF
-C2543 wbs_dat_o[18] vssa1 0.63fF
-C2544 wbs_dat_i[18] vssa1 0.63fF
-C2545 wbs_adr_i[18] vssa1 0.63fF
-C2546 wbs_dat_o[17] vssa1 0.63fF
-C2547 wbs_dat_i[17] vssa1 0.63fF
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-C2789 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
-C2790 pll_full_0/ro_complete_0/a4 vssa1 5.81fF
-C2791 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
-C2792 pll_full_0/ro_complete_0/a5 vssa1 6.74fF
-C2793 pll_full_0/ro_complete_0/cbank_0/v vssa1 15.12fF
-C2794 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
-C2795 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
-C2796 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
-C2797 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
-C2798 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
-C2799 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
-C2800 pll_full_0/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING
-C2801 pll_full_0/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING
-C2802 pll_full_0/cp_0/down vssa1 1.54fF
-C2803 pll_full_0/cp_0/upbar vssa1 1.79fF
-C2804 pll_full_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
-C2805 pll_full_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
-C2806 pll_full_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
-C2807 pll_full_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
-C2808 pll_full_0/cp_0/a_3060_0# vssa1 2.50fF **FLOATING
-C2809 pll_full_0/cp_0/a_1710_0# vssa1 7.47fF **FLOATING
-C2810 pll_full_0/pd_0/UP vssa1 5.89fF
-C2811 pll_full_0/pd_0/and_pd_0/Z1 vssa1 0.39fF
-C2812 pll_full_0/pd_0/and_pd_0/Out1 vssa1 2.22fF
-C2813 pll_full_0/pd_0/tspc_r_1/z5 vssa1 1.10fF
-C2814 pll_full_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF
-C2815 pll_full_0/pd_0/R vssa1 3.05fF
-C2816 pll_full_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF
-C2817 pll_full_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF
-C2818 pll_full_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF
-C2819 pll_full_0/pd_0/DOWN vssa1 7.38fF
-C2820 pll_full_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
-C2821 pll_full_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF
-C2822 pll_full_0/pd_0/tspc_r_0/z5 vssa1 1.10fF
-C2823 pll_full_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF
-C2824 pll_full_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF
-C2825 pll_full_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF
-C2826 pll_full_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF
-C2827 pll_full_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
-C2828 pll_full_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF
-C2829 pll_full_0/ref vssa1 4.34fF
-C2830 div_pd_buffered_0/tapered_buf_0/in vssa1 1.13fF
-C2831 div_pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING
-C2832 div_pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING
-C2833 div_pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING
-C2834 div_pd_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING
-C2835 div_pd_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING
-C2836 div_pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING
-C2837 div_pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING
-C2838 div_pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING
-C2839 div_pd_buffered_0/tapered_buf_1/in vssa1 1.13fF
-C2840 div_pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING
-C2841 div_pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 588.54fF **FLOATING
-C2842 div_pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING
-C2843 div_pd_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING
-C2844 div_pd_buffered_0/tapered_buf_1/a_4670_0# vssa1 250.63fF **FLOATING
-C2845 div_pd_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.04fF **FLOATING
-C2846 div_pd_buffered_0/tapered_buf_1/a_580_0# vssa1 16.64fF **FLOATING
-C2847 div_pd_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.00fF **FLOATING
-C2848 div_pd_buffered_0/divider_0/and_0/Z1 vssa1 0.74fF
-C2849 div_pd_buffered_0/divider_0/and_0/B vssa1 2.25fF
-C2850 div_pd_buffered_0/divider_0/and_0/A vssa1 2.19fF
-C2851 div_pd_buffered_0/divider_0/and_0/out1 vssa1 2.93fF
-C2852 div_pd_buffered_0/divider_0/tspc_2/Z4 vssa1 0.86fF
-C2853 div_pd_buffered_0/divider_0/tspc_2/Z3 vssa1 2.26fF
-C2854 div_pd_buffered_0/divider_0/tspc_2/Z2 vssa1 1.46fF
-C2855 div_pd_buffered_0/divider_0/tspc_2/Z1 vssa1 0.99fF
-C2856 div_pd_buffered_0/divider_0/nor_0/B vssa1 6.37fF
-C2857 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C2858 div_pd_buffered_0/divider_0/tspc_1/Z4 vssa1 0.86fF
-C2859 div_pd_buffered_0/divider_0/tspc_1/Q vssa1 3.12fF
-C2860 div_pd_buffered_0/divider_0/tspc_1/Z3 vssa1 2.26fF
-C2861 div_pd_buffered_0/divider_0/tspc_1/Z2 vssa1 1.46fF
-C2862 div_pd_buffered_0/divider_0/tspc_1/Z1 vssa1 0.99fF
-C2863 div_pd_buffered_0/divider_0/nor_1/B vssa1 7.05fF
-C2864 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
-C2865 div_pd_buffered_0/divider_0/tspc_0/Z4 vssa1 0.86fF
-C2866 div_pd_buffered_0/divider_0/tspc_0/Q vssa1 3.14fF
-C2867 div_pd_buffered_0/divider_0/tspc_0/Z3 vssa1 2.26fF
-C2868 div_pd_buffered_0/divider_0/tspc_0/Z2 vssa1 1.46fF
-C2869 div_pd_buffered_0/divider_0/tspc_0/Z1 vssa1 0.99fF
-C2870 div_pd_buffered_0/divider_0/nor_1/A vssa1 7.04fF
-C2871 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING
-C2872 div_pd_buffered_0/divider_0/clk vssa1 398.71fF
-C2873 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
-C2874 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
-C2875 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF
-C2876 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
-C2877 div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
-C2878 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
-C2879 div_pd_buffered_0/divider_0/and_0/OUT vssa1 5.62fF
-C2880 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
-C2881 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
-C2882 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF
-C2883 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
-C2884 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C2885 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
-C2886 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
-C2887 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
-C2888 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
-C2889 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
-C2890 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
-C2891 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
-C2892 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
-C2893 div_pd_buffered_0/divider_0/prescaler_0/Out vssa1 4.59fF
-C2894 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
-C2895 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
-C2896 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
-C2897 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
-C2898 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
-C2899 div_pd_buffered_0/divider_0/nor_1/Z1 vssa1 1.34fF
-C2900 div_pd_buffered_0/divider_0/nor_0/Z1 vssa1 1.34fF
-C2901 div_pd_buffered_0/divider_0/mc2 vssa1 392.35fF
-C2902 div_pd_buffered_0/pd_0/UP vssa1 5.76fF
-C2903 div_pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF
-C2904 div_pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF
-C2905 div_pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF
-C2906 div_pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF
-C2907 div_pd_buffered_0/pd_0/R vssa1 3.05fF
-C2908 div_pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF
-C2909 div_pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF
-C2910 div_pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF
-C2911 div_pd_buffered_0/pd_0/DOWN vssa1 9.94fF
-C2912 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
-C2913 div_pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF
-C2914 div_pd_buffered_0/pd_0/DIV vssa1 5.85fF
-C2915 div_pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF
-C2916 div_pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF
-C2917 div_pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF
-C2918 div_pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF
-C2919 div_pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF
-C2920 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
-C2921 div_pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF
-C2922 div_pd_buffered_0/pd_0/REF vssa1 394.19fF
-C2923 div_pd_buffered_0/tapered_buf_4/out vssa1 385.14fF
-C2924 div_pd_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING
-C2925 div_pd_buffered_0/tapered_buf_4/a_210_n610# vssa1 588.54fF **FLOATING
-C2926 div_pd_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING
-C2927 div_pd_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING
-C2928 div_pd_buffered_0/tapered_buf_4/a_4670_0# vssa1 250.63fF **FLOATING
-C2929 div_pd_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.04fF **FLOATING
-C2930 div_pd_buffered_0/tapered_buf_4/a_580_0# vssa1 16.64fF **FLOATING
-C2931 div_pd_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.00fF **FLOATING
-C2932 div_pd_buffered_0/tapered_buf_3/out vssa1 385.17fF
-C2933 div_pd_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING
-C2934 div_pd_buffered_0/tapered_buf_3/a_210_n610# vssa1 588.54fF **FLOATING
-C2935 div_pd_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING
-C2936 div_pd_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING
-C2937 div_pd_buffered_0/tapered_buf_3/a_4670_0# vssa1 250.63fF **FLOATING
-C2938 div_pd_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.04fF **FLOATING
-C2939 div_pd_buffered_0/tapered_buf_3/a_580_0# vssa1 16.64fF **FLOATING
-C2940 div_pd_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.00fF **FLOATING
-C2941 div_pd_buffered_0/tapered_buf_2/in vssa1 1.13fF
-C2942 div_pd_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING
-C2943 div_pd_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING
-C2944 div_pd_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING
-C2945 div_pd_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING
-C2946 div_pd_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING
-C2947 div_pd_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING
-C2948 div_pd_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING
-C2949 div_pd_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING
-C2950 divider_1/and_0/Z1 vssa1 0.74fF
-C2951 divider_1/and_0/B vssa1 2.25fF
-C2952 divider_1/and_0/A vssa1 2.19fF
-C2953 divider_1/and_0/out1 vssa1 2.93fF
-C2954 divider_1/tspc_2/Z4 vssa1 0.86fF
-C2955 divider_1/Out vssa1 1.60fF
-C2956 divider_1/tspc_2/Z3 vssa1 2.26fF
-C2957 divider_1/tspc_2/Z2 vssa1 1.46fF
-C2958 divider_1/tspc_2/Z1 vssa1 0.99fF
-C2959 divider_1/nor_0/B vssa1 6.33fF
-C2960 divider_1/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C2961 divider_1/tspc_1/Z4 vssa1 0.86fF
-C2962 divider_1/tspc_1/Q vssa1 3.12fF
-C2963 divider_1/tspc_1/Z3 vssa1 2.26fF
-C2964 divider_1/tspc_1/Z2 vssa1 1.46fF
-C2965 divider_1/tspc_1/Z1 vssa1 0.99fF
-C2966 divider_1/nor_1/B vssa1 7.05fF
-C2967 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
-C2968 divider_1/tspc_0/Z4 vssa1 0.86fF
-C2969 divider_1/tspc_0/Q vssa1 3.14fF
-C2970 divider_1/tspc_0/Z3 vssa1 2.26fF
-C2971 divider_1/tspc_0/Z2 vssa1 1.46fF
-C2972 divider_1/tspc_0/Z1 vssa1 0.99fF
-C2973 divider_1/nor_1/A vssa1 7.04fF
-C2974 divider_1/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING
-C2975 divider_1/clk vssa1 5.63fF
-C2976 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF
-C2977 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF
-C2978 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF
-C2979 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF
-C2980 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF
-C2981 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF
-C2982 divider_1/and_0/OUT vssa1 5.62fF
-C2983 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF
-C2984 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF
-C2985 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF
-C2986 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF
-C2987 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C2988 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
-C2989 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF
-C2990 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF
-C2991 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF
-C2992 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF
-C2993 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
-C2994 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
-C2995 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF
-C2996 divider_1/prescaler_0/Out vssa1 4.59fF
-C2997 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF
-C2998 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF
-C2999 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF
-C3000 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
-C3001 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
-C3002 divider_1/nor_1/Z1 vssa1 1.34fF
-C3003 divider_1/nor_0/Z1 vssa1 1.34fF
-C3004 divider_1/mc2 vssa1 5.29fF
-C3005 divider_0/and_0/Z1 vssa1 0.74fF
-C3006 divider_0/and_0/B vssa1 2.25fF
-C3007 divider_0/and_0/A vssa1 2.19fF
-C3008 divider_0/and_0/out1 vssa1 2.93fF
-C3009 divider_0/tspc_2/Z4 vssa1 0.86fF
-C3010 divider_0/Out vssa1 1.60fF
-C3011 divider_0/tspc_2/Z3 vssa1 2.26fF
-C3012 divider_0/tspc_2/Z2 vssa1 1.46fF
-C3013 divider_0/tspc_2/Z1 vssa1 0.99fF
-C3014 divider_0/nor_0/B vssa1 6.33fF
-C3015 divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C3016 divider_0/tspc_1/Z4 vssa1 0.86fF
-C3017 divider_0/tspc_1/Q vssa1 3.12fF
-C3018 divider_0/tspc_1/Z3 vssa1 2.26fF
-C3019 divider_0/tspc_1/Z2 vssa1 1.46fF
-C3020 divider_0/tspc_1/Z1 vssa1 0.99fF
-C3021 divider_0/nor_1/B vssa1 7.05fF
-C3022 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
-C3023 divider_0/tspc_0/Z4 vssa1 0.86fF
-C3024 divider_0/tspc_0/Q vssa1 3.14fF
-C3025 divider_0/tspc_0/Z3 vssa1 2.26fF
-C3026 divider_0/tspc_0/Z2 vssa1 1.46fF
-C3027 divider_0/tspc_0/Z1 vssa1 0.99fF
-C3028 divider_0/nor_1/A vssa1 7.04fF
-C3029 divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING
-C3030 divider_0/clk vssa1 5.63fF
-C3031 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
-C3032 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
-C3033 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF
-C3034 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
-C3035 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
-C3036 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
-C3037 divider_0/and_0/OUT vssa1 5.62fF
-C3038 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
-C3039 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
-C3040 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF
-C3041 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
-C3042 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C3043 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
-C3044 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
-C3045 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
-C3046 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
-C3047 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
-C3048 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
-C3049 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
-C3050 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
-C3051 divider_0/prescaler_0/Out vssa1 4.59fF
-C3052 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
-C3053 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
-C3054 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
-C3055 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
-C3056 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
-C3057 divider_0/nor_1/Z1 vssa1 1.34fF
-C3058 divider_0/nor_0/Z1 vssa1 1.34fF
-C3059 divider_0/mc2 vssa1 5.29fF
-C3060 ro_complete_buffered_0/tapered_buf_0/in vssa1 1.13fF
-C3061 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING
-C3062 ro_complete_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING
-C3063 ro_complete_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING
-C3064 ro_complete_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING
-C3065 ro_complete_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING
-C3066 ro_complete_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING
-C3067 ro_complete_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING
-C3068 ro_complete_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING
-C3069 gnd vssa1 96.41fF
-C3070 ro_complete_buffered_0/tapered_buf_1/in vssa1 1.09fF
-C3071 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING
-C3072 ro_complete_buffered_0/tapered_buf_1/a_210_n610# vssa1 376.11fF **FLOATING
-C3073 ro_complete_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING
-C3074 ro_complete_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING
-C3075 ro_complete_buffered_0/tapered_buf_1/a_4670_0# vssa1 168.15fF **FLOATING
-C3076 ro_complete_buffered_0/tapered_buf_1/a_1650_0# vssa1 42.34fF **FLOATING
-C3077 ro_complete_buffered_0/tapered_buf_1/a_580_0# vssa1 10.93fF **FLOATING
-C3078 ro_complete_buffered_0/tapered_buf_1/a_160_n140# vssa1 2.66fF **FLOATING
-C3079 ro_complete_buffered_0/ro_complete_0/cbank_2/v vssa1 16.53fF
-C3080 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
-C3081 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
-C3082 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
-C3083 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
-C3084 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
-C3085 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
-C3086 ro_complete_buffered_0/tapered_buf_6/in vssa1 23.85fF
-C3087 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
-C3088 ro_complete_buffered_0/ro_complete_0/a0 vssa1 415.68fF
-C3089 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
-C3090 ro_complete_buffered_0/ro_complete_0/a1 vssa1 411.44fF
-C3091 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
-C3092 ro_complete_buffered_0/ro_complete_0/a3 vssa1 403.90fF
-C3093 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
-C3094 ro_complete_buffered_0/ro_complete_0/a2 vssa1 407.33fF
-C3095 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
-C3096 ro_complete_buffered_0/ro_complete_0/a4 vssa1 313.18fF
-C3097 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
-C3098 ro_complete_buffered_0/ro_complete_0/a5 vssa1 400.20fF
-C3099 ro_complete_buffered_0/ro_complete_0/cbank_0/v vssa1 15.13fF
-C3100 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
-C3101 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
-C3102 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
-C3103 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
-C3104 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
-C3105 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
-C3106 ro_complete_buffered_0/tapered_buf_7/in vssa1 1.13fF
-C3107 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# vssa1 0.06fF **FLOATING
-C3108 ro_complete_buffered_0/tapered_buf_7/a_210_n610# vssa1 614.83fF **FLOATING
-C3109 ro_complete_buffered_0/tapered_buf_7/a_160_230# vssa1 0.15fF **FLOATING
-C3110 ro_complete_buffered_0/tapered_buf_7/a_n10_230# vssa1 0.13fF **FLOATING
-C3111 ro_complete_buffered_0/tapered_buf_7/a_4670_0# vssa1 250.63fF **FLOATING
-C3112 ro_complete_buffered_0/tapered_buf_7/a_1650_0# vssa1 63.04fF **FLOATING
-C3113 ro_complete_buffered_0/tapered_buf_7/a_580_0# vssa1 16.64fF **FLOATING
-C3114 ro_complete_buffered_0/tapered_buf_7/a_160_n140# vssa1 4.00fF **FLOATING
-C3115 ro_complete_buffered_0/tapered_buf_6/out vssa1 385.11fF
-C3116 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# vssa1 0.06fF **FLOATING
-C3117 ro_complete_buffered_0/tapered_buf_6/a_210_n610# vssa1 588.54fF **FLOATING
-C3118 ro_complete_buffered_0/tapered_buf_6/a_160_230# vssa1 0.15fF **FLOATING
-C3119 ro_complete_buffered_0/tapered_buf_6/a_n10_230# vssa1 0.13fF **FLOATING
-C3120 ro_complete_buffered_0/tapered_buf_6/a_4670_0# vssa1 250.63fF **FLOATING
-C3121 ro_complete_buffered_0/tapered_buf_6/a_1650_0# vssa1 63.04fF **FLOATING
-C3122 ro_complete_buffered_0/tapered_buf_6/a_580_0# vssa1 16.64fF **FLOATING
-C3123 ro_complete_buffered_0/tapered_buf_6/a_160_n140# vssa1 4.00fF **FLOATING
-C3124 ro_complete_buffered_0/tapered_buf_5/in vssa1 1.13fF
-C3125 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# vssa1 0.06fF **FLOATING
-C3126 ro_complete_buffered_0/tapered_buf_5/a_210_n610# vssa1 588.54fF **FLOATING
-C3127 ro_complete_buffered_0/tapered_buf_5/a_160_230# vssa1 0.15fF **FLOATING
-C3128 ro_complete_buffered_0/tapered_buf_5/a_n10_230# vssa1 0.13fF **FLOATING
-C3129 ro_complete_buffered_0/tapered_buf_5/a_4670_0# vssa1 250.63fF **FLOATING
-C3130 ro_complete_buffered_0/tapered_buf_5/a_1650_0# vssa1 63.04fF **FLOATING
-C3131 ro_complete_buffered_0/tapered_buf_5/a_580_0# vssa1 16.64fF **FLOATING
-C3132 ro_complete_buffered_0/tapered_buf_5/a_160_n140# vssa1 4.00fF **FLOATING
-C3133 ro_complete_buffered_0/tapered_buf_4/in vssa1 1.13fF
-C3134 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING
-C3135 ro_complete_buffered_0/tapered_buf_4/a_210_n610# vssa1 588.54fF **FLOATING
-C3136 ro_complete_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING
-C3137 ro_complete_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING
-C3138 ro_complete_buffered_0/tapered_buf_4/a_4670_0# vssa1 250.63fF **FLOATING
-C3139 ro_complete_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.04fF **FLOATING
-C3140 ro_complete_buffered_0/tapered_buf_4/a_580_0# vssa1 16.64fF **FLOATING
-C3141 ro_complete_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.00fF **FLOATING
-C3142 ro_complete_buffered_0/tapered_buf_3/in vssa1 1.13fF
-C3143 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING
-C3144 ro_complete_buffered_0/tapered_buf_3/a_210_n610# vssa1 588.54fF **FLOATING
-C3145 ro_complete_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING
-C3146 ro_complete_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING
-C3147 ro_complete_buffered_0/tapered_buf_3/a_4670_0# vssa1 250.63fF **FLOATING
-C3148 ro_complete_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.04fF **FLOATING
-C3149 ro_complete_buffered_0/tapered_buf_3/a_580_0# vssa1 16.64fF **FLOATING
-C3150 ro_complete_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.00fF **FLOATING
-C3151 ro_complete_buffered_0/tapered_buf_2/in vssa1 1.13fF
-C3152 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING
-C3153 ro_complete_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING
-C3154 ro_complete_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING
-C3155 ro_complete_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING
-C3156 ro_complete_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING
-C3157 ro_complete_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING
-C3158 ro_complete_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING
-C3159 ro_complete_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING
-C3160 ro_complete_0/cbank_2/v vssa1 16.43fF
-C3161 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
-C3162 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
-C3163 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
-C3164 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
-C3165 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
-C3166 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
-C3167 ro_complete_0/cbank_1/v vssa1 16.43fF
-C3168 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
-C3169 ro_complete_0/a0 vssa1 5.35fF
-C3170 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
-C3171 ro_complete_0/a1 vssa1 6.54fF
-C3172 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
-C3173 ro_complete_0/a3 vssa1 5.96fF
-C3174 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
-C3175 ro_complete_0/a2 vssa1 5.21fF
-C3176 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
-C3177 ro_complete_0/a4 vssa1 5.81fF
-C3178 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
-C3179 ro_complete_0/a5 vssa1 6.74fF
-C3180 ro_complete_0/cbank_0/v vssa1 15.12fF
-C3181 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
-C3182 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
-C3183 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
-C3184 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
-C3185 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
-C3186 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
-C3187 filter_0/v vssa1 110.47fF
-C3188 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING
-C3189 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING
-C3190 cp_buffered_0/tapered_buf_0/in vssa1 1.13fF
-C3191 cp_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING
-C3192 cp_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING
-C3193 cp_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING
-C3194 cp_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING
-C3195 cp_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING
-C3196 cp_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING
-C3197 cp_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING
-C3198 cp_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING
-C3199 cp_buffered_0/cp_0/out vssa1 396.39fF
-C3200 cp_buffered_0/tapered_buf_1/in vssa1 1.13fF
-C3201 cp_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING
-C3202 cp_buffered_0/tapered_buf_1/a_210_n610# vssa1 588.54fF **FLOATING
-C3203 cp_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING
-C3204 cp_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING
-C3205 cp_buffered_0/tapered_buf_1/a_4670_0# vssa1 250.63fF **FLOATING
-C3206 cp_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.04fF **FLOATING
-C3207 cp_buffered_0/tapered_buf_1/a_580_0# vssa1 16.64fF **FLOATING
-C3208 cp_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.00fF **FLOATING
-C3209 cp_buffered_0/cp_0/upbar vssa1 392.61fF
-C3210 cp_buffered_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
-C3211 cp_buffered_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
-C3212 cp_buffered_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
-C3213 cp_buffered_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
-C3214 cp_buffered_0/cp_0/a_3060_0# vssa1 1.65fF **FLOATING
-C3215 cp_buffered_0/cp_0/a_1710_0# vssa1 5.76fF **FLOATING
-C3216 cp_buffered_0/cp_0/a_1710_n2840# vssa1 4.89fF **FLOATING
-C3217 cp_buffered_0/cp_0/a_10_n50# vssa1 3.19fF **FLOATING
-C3218 cp_buffered_0/cp_0/down vssa1 396.37fF
-C3219 cp_buffered_0/tapered_buf_2/in vssa1 1.13fF
-C3220 cp_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING
-C3221 cp_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING
-C3222 cp_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING
-C3223 cp_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING
-C3224 cp_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING
-C3225 cp_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING
-C3226 cp_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING
-C3227 cp_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING
-C3228 pd_buffered_0/tapered_buf_0/out vssa1 385.14fF
-C3229 pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING
-C3230 pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING
-C3231 pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING
-C3232 pd_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING
-C3233 pd_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING
-C3234 pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING
-C3235 pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING
-C3236 pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING
-C3237 pd_buffered_0/tapered_buf_1/out vssa1 385.17fF
-C3238 pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING
-C3239 pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 588.54fF **FLOATING
-C3240 pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING
-C3241 pd_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING
-C3242 pd_buffered_0/tapered_buf_1/a_4670_0# vssa1 250.63fF **FLOATING
-C3243 pd_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.04fF **FLOATING
-C3244 pd_buffered_0/tapered_buf_1/a_580_0# vssa1 16.64fF **FLOATING
-C3245 pd_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.00fF **FLOATING
-C3246 pd_buffered_0/pd_0/UP vssa1 5.46fF
-C3247 pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF
-C3248 pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF
-C3249 pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF
-C3250 pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF
-C3251 pd_buffered_0/pd_0/R vssa1 3.05fF
-C3252 pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF
-C3253 pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF
-C3254 pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF
-C3255 pd_buffered_0/pd_0/DOWN vssa1 9.89fF
-C3256 pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
-C3257 pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF
-C3258 pd_buffered_0/pd_0/DIV vssa1 389.98fF
-C3259 pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF
-C3260 pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF
-C3261 pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF
-C3262 pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF
-C3263 pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF
-C3264 pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
-C3265 pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF
-C3266 pd_buffered_0/pd_0/REF vssa1 388.35fF
-C3267 pd_buffered_0/tapered_buf_3/in vssa1 1.13fF
-C3268 pd_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING
-C3269 pd_buffered_0/tapered_buf_3/a_210_n610# vssa1 588.54fF **FLOATING
-C3270 pd_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING
-C3271 pd_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING
-C3272 pd_buffered_0/tapered_buf_3/a_4670_0# vssa1 250.63fF **FLOATING
-C3273 pd_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.04fF **FLOATING
-C3274 pd_buffered_0/tapered_buf_3/a_580_0# vssa1 16.64fF **FLOATING
-C3275 pd_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.00fF **FLOATING
-C3276 pd_buffered_0/tapered_buf_2/in vssa1 1.13fF
-C3277 pd_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING
-C3278 pd_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING
-C3279 pd_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING
-C3280 pd_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING
-C3281 pd_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING
-C3282 pd_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING
-C3283 pd_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING
-C3284 pd_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING
+C1942 io_analog[4] vssa1 43.96fF
+C1943 io_analog[5] vssa1 44.13fF
+C1944 io_analog[6] vssa1 43.46fF
+C1945 io_in_3v3[0] vssa1 0.61fF
+C1946 io_oeb[26] vssa1 0.61fF
+C1947 io_in[0] vssa1 0.61fF
+C1948 io_out[26] vssa1 0.61fF
+C1949 io_out[0] vssa1 0.61fF
+C1950 io_in[26] vssa1 0.61fF
+C1951 io_oeb[0] vssa1 0.61fF
+C1952 io_in_3v3[26] vssa1 0.61fF
+C1953 io_in_3v3[1] vssa1 0.61fF
+C1954 io_oeb[25] vssa1 0.61fF
+C1955 io_in[1] vssa1 0.61fF
+C1956 io_out[25] vssa1 0.61fF
+C1957 io_out[1] vssa1 0.61fF
+C1958 io_in[25] vssa1 0.61fF
+C1959 io_oeb[1] vssa1 0.61fF
+C1960 io_in_3v3[25] vssa1 0.61fF
+C1961 io_in_3v3[2] vssa1 0.61fF
+C1962 io_oeb[24] vssa1 0.61fF
+C1963 io_in[2] vssa1 0.61fF
+C1964 io_out[24] vssa1 0.61fF
+C1965 io_out[2] vssa1 0.61fF
+C1966 io_in[24] vssa1 0.61fF
+C1967 io_oeb[2] vssa1 0.61fF
+C1968 io_in_3v3[24] vssa1 0.61fF
+C1969 io_in_3v3[3] vssa1 0.61fF
+C1970 gpio_noesd[17] vssa1 2.32fF
+C1971 io_in[3] vssa1 0.61fF
+C1972 gpio_analog[17] vssa1 2.30fF
+C1973 io_out[3] vssa1 0.61fF
+C1974 io_oeb[3] vssa1 0.61fF
+C1975 io_in_3v3[4] vssa1 0.61fF
+C1976 io_in[4] vssa1 0.61fF
+C1977 io_out[4] vssa1 0.61fF
+C1978 io_oeb[4] vssa1 0.61fF
+C1979 io_oeb[23] vssa1 0.61fF
+C1980 io_out[23] vssa1 0.61fF
+C1981 io_in[23] vssa1 0.61fF
+C1982 io_in_3v3[23] vssa1 0.61fF
+C1983 gpio_noesd[16] vssa1 2.30fF
+C1984 gpio_analog[16] vssa1 2.30fF
+C1985 io_in_3v3[5] vssa1 0.61fF
+C1986 io_in[5] vssa1 0.61fF
+C1987 io_out[5] vssa1 0.61fF
+C1988 io_oeb[5] vssa1 0.61fF
+C1989 io_oeb[22] vssa1 0.61fF
+C1990 io_out[22] vssa1 0.61fF
+C1991 io_in[22] vssa1 0.61fF
+C1992 io_in_3v3[22] vssa1 0.61fF
+C1993 gpio_noesd[15] vssa1 2.31fF
+C1994 gpio_analog[15] vssa1 2.30fF
+C1995 io_in_3v3[6] vssa1 0.61fF
+C1996 io_in[6] vssa1 0.61fF
+C1997 io_out[6] vssa1 0.61fF
+C1998 io_oeb[6] vssa1 0.61fF
+C1999 io_oeb[21] vssa1 0.61fF
+C2000 io_out[21] vssa1 0.61fF
+C2001 io_in[21] vssa1 0.61fF
+C2002 io_in_3v3[21] vssa1 0.61fF
+C2003 gpio_noesd[14] vssa1 2.30fF
+C2004 gpio_analog[14] vssa1 2.29fF
+C2005 vssd2 vssa1 38.54fF
+C2006 vssd1 vssa1 13.04fF
+C2007 vdda2 vssa1 38.30fF
+C2008 io_oeb[20] vssa1 0.61fF
+C2009 io_out[20] vssa1 0.61fF
+C2010 io_in[20] vssa1 0.61fF
+C2011 io_in_3v3[20] vssa1 0.61fF
+C2012 gpio_noesd[13] vssa1 2.31fF
+C2013 gpio_analog[13] vssa1 2.30fF
+C2014 gpio_analog[0] vssa1 0.61fF
+C2015 gpio_noesd[0] vssa1 0.61fF
+C2016 io_in_3v3[7] vssa1 0.61fF
+C2017 io_in[7] vssa1 0.61fF
+C2018 io_out[7] vssa1 0.61fF
+C2019 io_oeb[7] vssa1 0.61fF
+C2020 io_oeb[19] vssa1 0.61fF
+C2021 io_out[19] vssa1 0.61fF
+C2022 io_in[19] vssa1 0.61fF
+C2023 io_in_3v3[19] vssa1 0.61fF
+C2024 gpio_noesd[12] vssa1 2.32fF
+C2025 gpio_analog[12] vssa1 2.30fF
+C2026 gpio_analog[1] vssa1 0.61fF
+C2027 gpio_noesd[1] vssa1 0.61fF
+C2028 io_in_3v3[8] vssa1 0.61fF
+C2029 io_in[8] vssa1 0.61fF
+C2030 io_out[8] vssa1 0.61fF
+C2031 io_oeb[8] vssa1 0.61fF
+C2032 io_oeb[18] vssa1 0.61fF
+C2033 io_out[18] vssa1 0.61fF
+C2034 io_in[18] vssa1 0.61fF
+C2035 io_in_3v3[18] vssa1 0.61fF
+C2036 gpio_noesd[11] vssa1 2.30fF
+C2037 gpio_analog[11] vssa1 2.29fF
+C2038 gpio_analog[2] vssa1 0.61fF
+C2039 gpio_noesd[2] vssa1 0.61fF
+C2040 io_in_3v3[9] vssa1 0.61fF
+C2041 io_in[9] vssa1 0.61fF
+C2042 io_out[9] vssa1 0.61fF
+C2043 io_oeb[9] vssa1 0.61fF
+C2044 io_oeb[17] vssa1 0.61fF
+C2045 io_out[17] vssa1 0.61fF
+C2046 io_in[17] vssa1 0.61fF
+C2047 io_in_3v3[17] vssa1 0.61fF
+C2048 gpio_noesd[10] vssa1 2.31fF
+C2049 gpio_analog[10] vssa1 2.29fF
+C2050 gpio_analog[3] vssa1 0.61fF
+C2051 gpio_noesd[3] vssa1 0.61fF
+C2052 io_in_3v3[10] vssa1 0.61fF
+C2053 io_in[10] vssa1 0.61fF
+C2054 io_out[10] vssa1 0.61fF
+C2055 io_oeb[10] vssa1 0.61fF
+C2056 io_oeb[16] vssa1 0.61fF
+C2057 io_out[16] vssa1 0.61fF
+C2058 io_in[16] vssa1 0.61fF
+C2059 io_in_3v3[16] vssa1 0.61fF
+C2060 gpio_noesd[9] vssa1 2.28fF
+C2061 gpio_analog[9] vssa1 2.28fF
+C2062 gpio_analog[4] vssa1 0.61fF
+C2063 gpio_noesd[4] vssa1 0.61fF
+C2064 io_in_3v3[11] vssa1 0.61fF
+C2065 io_in[11] vssa1 0.61fF
+C2066 io_out[11] vssa1 0.61fF
+C2067 io_oeb[11] vssa1 0.61fF
+C2068 io_oeb[15] vssa1 0.61fF
+C2069 io_out[15] vssa1 0.61fF
+C2070 io_in[15] vssa1 0.61fF
+C2071 io_in_3v3[15] vssa1 0.61fF
+C2072 gpio_noesd[8] vssa1 2.28fF
+C2073 gpio_analog[8] vssa1 2.26fF
+C2074 gpio_analog[5] vssa1 0.61fF
+C2075 gpio_noesd[5] vssa1 0.61fF
+C2076 io_in_3v3[12] vssa1 0.61fF
+C2077 io_in[12] vssa1 0.61fF
+C2078 io_out[12] vssa1 0.61fF
+C2079 io_oeb[12] vssa1 0.61fF
+C2080 io_oeb[14] vssa1 0.61fF
+C2081 io_out[14] vssa1 0.61fF
+C2082 io_in[14] vssa1 0.61fF
+C2083 io_in_3v3[14] vssa1 0.61fF
+C2084 gpio_noesd[7] vssa1 2.30fF
+C2085 gpio_analog[7] vssa1 2.28fF
+C2086 vssa2 vssa1 38.35fF
+C2087 gpio_analog[6] vssa1 5.71fF
+C2088 gpio_noesd[6] vssa1 5.70fF
+C2089 io_in_3v3[13] vssa1 0.61fF
+C2090 io_in[13] vssa1 0.61fF
+C2091 io_out[13] vssa1 0.61fF
+C2092 io_oeb[13] vssa1 0.61fF
+C2093 vccd1 vssa1 39.84fF
+C2094 vccd2 vssa1 38.46fF
+C2095 io_analog[0] vssa1 19.99fF
+C2096 io_analog[10] vssa1 19.36fF
+C2097 io_analog[1] vssa1 13.17fF
+C2098 io_analog[2] vssa1 12.57fF
+C2099 io_analog[3] vssa1 12.83fF
+C2100 io_clamp_high[0] vssa1 3.58fF
+C2101 io_clamp_low[0] vssa1 3.58fF
+C2102 io_clamp_high[1] vssa1 3.58fF
+C2103 io_clamp_low[1] vssa1 3.58fF
+C2104 io_clamp_high[2] vssa1 3.58fF
+C2105 io_clamp_low[2] vssa1 3.58fF
+C2106 io_analog[7] vssa1 12.74fF
+C2107 io_analog[8] vssa1 13.08fF
+C2108 io_analog[9] vssa1 13.08fF
+C2109 user_irq[2] vssa1 0.63fF
+C2110 user_irq[1] vssa1 0.63fF
+C2111 user_irq[0] vssa1 0.63fF
+C2112 user_clock2 vssa1 0.63fF
+C2113 la_oenb[127] vssa1 0.63fF
+C2114 la_data_out[127] vssa1 0.63fF
+C2115 la_data_in[127] vssa1 0.63fF
+C2116 la_oenb[126] vssa1 0.63fF
+C2117 la_data_out[126] vssa1 0.63fF
+C2118 la_data_in[126] vssa1 0.63fF
+C2119 la_oenb[125] vssa1 0.63fF
+C2120 la_data_out[125] vssa1 0.63fF
+C2121 la_data_in[125] vssa1 0.63fF
+C2122 la_oenb[124] vssa1 0.63fF
+C2123 la_data_out[124] vssa1 0.63fF
+C2124 la_data_in[124] vssa1 0.63fF
+C2125 la_oenb[123] vssa1 0.63fF
+C2126 la_data_out[123] vssa1 0.63fF
+C2127 la_data_in[123] vssa1 0.63fF
+C2128 la_oenb[122] vssa1 0.63fF
+C2129 la_data_out[122] vssa1 0.63fF
+C2130 la_data_in[122] vssa1 0.63fF
+C2131 la_oenb[121] vssa1 0.63fF
+C2132 la_data_out[121] vssa1 0.63fF
+C2133 la_data_in[121] vssa1 0.63fF
+C2134 la_oenb[120] vssa1 0.63fF
+C2135 la_data_out[120] vssa1 0.63fF
+C2136 la_data_in[120] vssa1 0.63fF
+C2137 la_oenb[119] vssa1 0.63fF
+C2138 la_data_out[119] vssa1 0.63fF
+C2139 la_data_in[119] vssa1 0.63fF
+C2140 la_oenb[118] vssa1 0.63fF
+C2141 la_data_out[118] vssa1 0.63fF
+C2142 la_data_in[118] vssa1 0.63fF
+C2143 la_oenb[117] vssa1 0.63fF
+C2144 la_data_out[117] vssa1 0.63fF
+C2145 la_data_in[117] vssa1 0.63fF
+C2146 la_oenb[116] vssa1 0.63fF
+C2147 la_data_out[116] vssa1 0.63fF
+C2148 la_data_in[116] vssa1 0.63fF
+C2149 la_oenb[115] vssa1 0.63fF
+C2150 la_data_out[115] vssa1 0.63fF
+C2151 la_data_in[115] vssa1 0.63fF
+C2152 la_oenb[114] vssa1 0.63fF
+C2153 la_data_out[114] vssa1 0.63fF
+C2154 la_data_in[114] vssa1 0.63fF
+C2155 la_oenb[113] vssa1 0.63fF
+C2156 la_data_out[113] vssa1 0.63fF
+C2157 la_data_in[113] vssa1 0.63fF
+C2158 la_oenb[112] vssa1 0.63fF
+C2159 la_data_out[112] vssa1 0.63fF
+C2160 la_data_in[112] vssa1 0.63fF
+C2161 la_oenb[111] vssa1 0.63fF
+C2162 la_data_out[111] vssa1 0.63fF
+C2163 la_data_in[111] vssa1 0.63fF
+C2164 la_oenb[110] vssa1 0.63fF
+C2165 la_data_out[110] vssa1 0.63fF
+C2166 la_data_in[110] vssa1 0.63fF
+C2167 la_oenb[109] vssa1 0.63fF
+C2168 la_data_out[109] vssa1 0.63fF
+C2169 la_data_in[109] vssa1 0.63fF
+C2170 la_oenb[108] vssa1 0.63fF
+C2171 la_data_out[108] vssa1 0.63fF
+C2172 la_data_in[108] vssa1 0.63fF
+C2173 la_oenb[107] vssa1 0.63fF
+C2174 la_data_out[107] vssa1 0.63fF
+C2175 la_data_in[107] vssa1 0.63fF
+C2176 la_oenb[106] vssa1 0.63fF
+C2177 la_data_out[106] vssa1 0.63fF
+C2178 la_data_in[106] vssa1 0.63fF
+C2179 la_oenb[105] vssa1 0.63fF
+C2180 la_data_out[105] vssa1 0.63fF
+C2181 la_data_in[105] vssa1 0.63fF
+C2182 la_oenb[104] vssa1 0.63fF
+C2183 la_data_out[104] vssa1 0.63fF
+C2184 la_data_in[104] vssa1 0.63fF
+C2185 la_oenb[103] vssa1 0.63fF
+C2186 la_data_out[103] vssa1 0.63fF
+C2187 la_data_in[103] vssa1 0.63fF
+C2188 la_oenb[102] vssa1 0.63fF
+C2189 la_data_out[102] vssa1 0.63fF
+C2190 la_data_in[102] vssa1 0.63fF
+C2191 la_oenb[101] vssa1 0.63fF
+C2192 la_data_out[101] vssa1 0.63fF
+C2193 la_data_in[101] vssa1 0.63fF
+C2194 la_oenb[100] vssa1 0.63fF
+C2195 la_data_out[100] vssa1 0.63fF
+C2196 la_data_in[100] vssa1 0.63fF
+C2197 la_oenb[99] vssa1 0.63fF
+C2198 la_data_out[99] vssa1 0.63fF
+C2199 la_data_in[99] vssa1 0.63fF
+C2200 la_oenb[98] vssa1 0.63fF
+C2201 la_data_out[98] vssa1 0.63fF
+C2202 la_data_in[98] vssa1 0.63fF
+C2203 la_oenb[97] vssa1 0.63fF
+C2204 la_data_out[97] vssa1 0.63fF
+C2205 la_data_in[97] vssa1 0.63fF
+C2206 la_oenb[96] vssa1 0.63fF
+C2207 la_data_out[96] vssa1 0.63fF
+C2208 la_data_in[96] vssa1 0.63fF
+C2209 la_oenb[95] vssa1 0.63fF
+C2210 la_data_out[95] vssa1 0.63fF
+C2211 la_data_in[95] vssa1 0.63fF
+C2212 la_oenb[94] vssa1 0.63fF
+C2213 la_data_out[94] vssa1 0.63fF
+C2214 la_data_in[94] vssa1 0.63fF
+C2215 la_oenb[93] vssa1 0.63fF
+C2216 la_data_out[93] vssa1 0.63fF
+C2217 la_data_in[93] vssa1 0.63fF
+C2218 la_oenb[92] vssa1 0.63fF
+C2219 la_data_out[92] vssa1 0.63fF
+C2220 la_data_in[92] vssa1 0.63fF
+C2221 la_oenb[91] vssa1 0.63fF
+C2222 la_data_out[91] vssa1 0.63fF
+C2223 la_data_in[91] vssa1 0.63fF
+C2224 la_oenb[90] vssa1 0.63fF
+C2225 la_data_out[90] vssa1 0.63fF
+C2226 la_data_in[90] vssa1 0.63fF
+C2227 la_oenb[89] vssa1 0.63fF
+C2228 la_data_out[89] vssa1 0.63fF
+C2229 la_data_in[89] vssa1 0.63fF
+C2230 la_oenb[88] vssa1 0.63fF
+C2231 la_data_out[88] vssa1 0.63fF
+C2232 la_data_in[88] vssa1 0.63fF
+C2233 la_oenb[87] vssa1 0.63fF
+C2234 la_data_out[87] vssa1 0.63fF
+C2235 la_data_in[87] vssa1 0.63fF
+C2236 la_oenb[86] vssa1 0.63fF
+C2237 la_data_out[86] vssa1 0.63fF
+C2238 la_data_in[86] vssa1 0.63fF
+C2239 la_oenb[85] vssa1 0.63fF
+C2240 la_data_out[85] vssa1 0.63fF
+C2241 la_data_in[85] vssa1 0.63fF
+C2242 la_oenb[84] vssa1 0.63fF
+C2243 la_data_out[84] vssa1 0.63fF
+C2244 la_data_in[84] vssa1 0.63fF
+C2245 la_oenb[83] vssa1 0.63fF
+C2246 la_data_out[83] vssa1 0.63fF
+C2247 la_data_in[83] vssa1 0.63fF
+C2248 la_oenb[82] vssa1 0.63fF
+C2249 la_data_out[82] vssa1 0.63fF
+C2250 la_data_in[82] vssa1 0.63fF
+C2251 la_oenb[81] vssa1 0.63fF
+C2252 la_data_out[81] vssa1 0.63fF
+C2253 la_data_in[81] vssa1 0.63fF
+C2254 la_oenb[80] vssa1 0.63fF
+C2255 la_data_out[80] vssa1 0.63fF
+C2256 la_data_in[80] vssa1 0.63fF
+C2257 la_oenb[79] vssa1 0.63fF
+C2258 la_data_out[79] vssa1 0.63fF
+C2259 la_data_in[79] vssa1 0.63fF
+C2260 la_oenb[78] vssa1 0.63fF
+C2261 la_data_out[78] vssa1 0.63fF
+C2262 la_data_in[78] vssa1 0.63fF
+C2263 la_oenb[77] vssa1 0.63fF
+C2264 la_data_out[77] vssa1 0.63fF
+C2265 la_data_in[77] vssa1 0.63fF
+C2266 la_oenb[76] vssa1 0.63fF
+C2267 la_data_out[76] vssa1 0.63fF
+C2268 la_data_in[76] vssa1 0.63fF
+C2269 la_oenb[75] vssa1 0.63fF
+C2270 la_data_out[75] vssa1 0.63fF
+C2271 la_data_in[75] vssa1 0.63fF
+C2272 la_oenb[74] vssa1 0.63fF
+C2273 la_data_out[74] vssa1 0.63fF
+C2274 la_data_in[74] vssa1 0.63fF
+C2275 la_oenb[73] vssa1 0.63fF
+C2276 la_data_out[73] vssa1 0.63fF
+C2277 la_data_in[73] vssa1 0.63fF
+C2278 la_oenb[72] vssa1 0.63fF
+C2279 la_data_out[72] vssa1 0.63fF
+C2280 la_data_in[72] vssa1 0.63fF
+C2281 la_oenb[71] vssa1 0.63fF
+C2282 la_data_out[71] vssa1 0.63fF
+C2283 la_data_in[71] vssa1 0.63fF
+C2284 la_oenb[70] vssa1 0.63fF
+C2285 la_data_out[70] vssa1 0.63fF
+C2286 la_data_in[70] vssa1 0.63fF
+C2287 la_oenb[69] vssa1 0.63fF
+C2288 la_data_out[69] vssa1 0.63fF
+C2289 la_data_in[69] vssa1 0.63fF
+C2290 la_oenb[68] vssa1 0.63fF
+C2291 la_data_out[68] vssa1 0.63fF
+C2292 la_data_in[68] vssa1 0.63fF
+C2293 la_oenb[67] vssa1 0.63fF
+C2294 la_data_out[67] vssa1 0.63fF
+C2295 la_data_in[67] vssa1 0.63fF
+C2296 la_oenb[66] vssa1 0.63fF
+C2297 la_data_out[66] vssa1 0.63fF
+C2298 la_data_in[66] vssa1 0.63fF
+C2299 la_oenb[65] vssa1 0.63fF
+C2300 la_data_out[65] vssa1 0.63fF
+C2301 la_data_in[65] vssa1 0.63fF
+C2302 la_oenb[64] vssa1 0.63fF
+C2303 la_data_out[64] vssa1 0.63fF
+C2304 la_data_in[64] vssa1 0.63fF
+C2305 la_oenb[63] vssa1 0.63fF
+C2306 la_data_out[63] vssa1 0.63fF
+C2307 la_data_in[63] vssa1 0.63fF
+C2308 la_oenb[62] vssa1 0.63fF
+C2309 la_data_out[62] vssa1 0.63fF
+C2310 la_data_in[62] vssa1 0.63fF
+C2311 la_oenb[61] vssa1 0.63fF
+C2312 la_data_out[61] vssa1 0.63fF
+C2313 la_data_in[61] vssa1 0.63fF
+C2314 la_oenb[60] vssa1 0.63fF
+C2315 la_data_out[60] vssa1 0.63fF
+C2316 la_data_in[60] vssa1 0.63fF
+C2317 la_oenb[59] vssa1 0.63fF
+C2318 la_data_out[59] vssa1 0.63fF
+C2319 la_data_in[59] vssa1 0.63fF
+C2320 la_oenb[58] vssa1 0.63fF
+C2321 la_data_out[58] vssa1 0.63fF
+C2322 la_data_in[58] vssa1 0.63fF
+C2323 la_oenb[57] vssa1 0.63fF
+C2324 la_data_out[57] vssa1 0.63fF
+C2325 la_data_in[57] vssa1 0.63fF
+C2326 la_oenb[56] vssa1 0.63fF
+C2327 la_data_out[56] vssa1 0.63fF
+C2328 la_data_in[56] vssa1 0.63fF
+C2329 la_oenb[55] vssa1 0.63fF
+C2330 la_data_out[55] vssa1 0.63fF
+C2331 la_data_in[55] vssa1 0.63fF
+C2332 la_oenb[54] vssa1 0.63fF
+C2333 la_data_out[54] vssa1 0.63fF
+C2334 la_data_in[54] vssa1 0.63fF
+C2335 la_oenb[53] vssa1 0.63fF
+C2336 la_data_out[53] vssa1 0.63fF
+C2337 la_data_in[53] vssa1 0.63fF
+C2338 la_oenb[52] vssa1 0.63fF
+C2339 la_data_out[52] vssa1 0.63fF
+C2340 la_data_in[52] vssa1 0.63fF
+C2341 la_oenb[51] vssa1 0.63fF
+C2342 la_data_out[51] vssa1 0.63fF
+C2343 la_data_in[51] vssa1 0.63fF
+C2344 la_oenb[50] vssa1 0.63fF
+C2345 la_data_out[50] vssa1 0.63fF
+C2346 la_data_in[50] vssa1 0.63fF
+C2347 la_oenb[49] vssa1 0.63fF
+C2348 la_data_out[49] vssa1 0.63fF
+C2349 la_data_in[49] vssa1 0.63fF
+C2350 la_oenb[48] vssa1 0.63fF
+C2351 la_data_out[48] vssa1 0.63fF
+C2352 la_data_in[48] vssa1 0.63fF
+C2353 la_oenb[47] vssa1 0.63fF
+C2354 la_data_out[47] vssa1 0.63fF
+C2355 la_data_in[47] vssa1 0.63fF
+C2356 la_oenb[46] vssa1 0.63fF
+C2357 la_data_out[46] vssa1 0.63fF
+C2358 la_data_in[46] vssa1 0.63fF
+C2359 la_oenb[45] vssa1 0.63fF
+C2360 la_data_out[45] vssa1 0.63fF
+C2361 la_data_in[45] vssa1 0.63fF
+C2362 la_oenb[44] vssa1 0.63fF
+C2363 la_data_out[44] vssa1 0.63fF
+C2364 la_data_in[44] vssa1 0.63fF
+C2365 la_oenb[43] vssa1 0.63fF
+C2366 la_data_out[43] vssa1 0.63fF
+C2367 la_data_in[43] vssa1 0.63fF
+C2368 la_oenb[42] vssa1 0.63fF
+C2369 la_data_out[42] vssa1 0.63fF
+C2370 la_data_in[42] vssa1 0.63fF
+C2371 la_oenb[41] vssa1 0.63fF
+C2372 la_data_out[41] vssa1 0.63fF
+C2373 la_data_in[41] vssa1 0.63fF
+C2374 la_oenb[40] vssa1 0.63fF
+C2375 la_data_out[40] vssa1 0.63fF
+C2376 la_data_in[40] vssa1 0.63fF
+C2377 la_oenb[39] vssa1 0.63fF
+C2378 la_data_out[39] vssa1 0.63fF
+C2379 la_data_in[39] vssa1 0.63fF
+C2380 la_oenb[38] vssa1 0.63fF
+C2381 la_data_out[38] vssa1 0.63fF
+C2382 la_data_in[38] vssa1 0.63fF
+C2383 la_oenb[37] vssa1 0.63fF
+C2384 la_data_out[37] vssa1 0.63fF
+C2385 la_data_in[37] vssa1 0.63fF
+C2386 la_oenb[36] vssa1 0.63fF
+C2387 la_data_out[36] vssa1 0.63fF
+C2388 la_data_in[36] vssa1 0.63fF
+C2389 la_oenb[35] vssa1 0.63fF
+C2390 la_data_out[35] vssa1 0.63fF
+C2391 la_data_in[35] vssa1 0.63fF
+C2392 la_oenb[34] vssa1 0.63fF
+C2393 la_data_out[34] vssa1 0.63fF
+C2394 la_data_in[34] vssa1 0.63fF
+C2395 la_oenb[33] vssa1 0.63fF
+C2396 la_data_out[33] vssa1 0.63fF
+C2397 la_data_in[33] vssa1 0.63fF
+C2398 la_oenb[32] vssa1 0.63fF
+C2399 la_data_out[32] vssa1 0.63fF
+C2400 la_data_in[32] vssa1 0.63fF
+C2401 la_oenb[31] vssa1 0.63fF
+C2402 la_data_out[31] vssa1 0.63fF
+C2403 la_data_in[31] vssa1 0.63fF
+C2404 la_oenb[30] vssa1 0.63fF
+C2405 la_data_out[30] vssa1 0.63fF
+C2406 la_data_in[30] vssa1 0.63fF
+C2407 la_oenb[29] vssa1 0.63fF
+C2408 la_data_out[29] vssa1 0.63fF
+C2409 la_data_in[29] vssa1 0.63fF
+C2410 la_oenb[28] vssa1 0.63fF
+C2411 la_data_out[28] vssa1 0.63fF
+C2412 la_data_in[28] vssa1 0.63fF
+C2413 la_oenb[27] vssa1 0.63fF
+C2414 la_data_out[27] vssa1 0.63fF
+C2415 la_data_in[27] vssa1 0.63fF
+C2416 la_oenb[26] vssa1 0.63fF
+C2417 la_data_out[26] vssa1 0.63fF
+C2418 la_data_in[26] vssa1 0.63fF
+C2419 la_oenb[25] vssa1 0.63fF
+C2420 la_data_out[25] vssa1 0.63fF
+C2421 la_data_in[25] vssa1 0.63fF
+C2422 la_oenb[24] vssa1 0.63fF
+C2423 la_data_out[24] vssa1 0.63fF
+C2424 la_data_in[24] vssa1 0.63fF
+C2425 la_oenb[23] vssa1 0.63fF
+C2426 la_data_out[23] vssa1 0.63fF
+C2427 la_data_in[23] vssa1 0.63fF
+C2428 la_oenb[22] vssa1 0.63fF
+C2429 la_data_out[22] vssa1 0.63fF
+C2430 la_data_in[22] vssa1 0.63fF
+C2431 la_oenb[21] vssa1 0.63fF
+C2432 la_data_out[21] vssa1 0.63fF
+C2433 la_data_in[21] vssa1 0.63fF
+C2434 la_oenb[20] vssa1 0.63fF
+C2435 la_data_out[20] vssa1 0.63fF
+C2436 la_data_in[20] vssa1 0.63fF
+C2437 la_oenb[19] vssa1 0.63fF
+C2438 la_data_out[19] vssa1 0.63fF
+C2439 la_data_in[19] vssa1 0.63fF
+C2440 la_oenb[18] vssa1 0.63fF
+C2441 la_data_out[18] vssa1 0.63fF
+C2442 la_data_in[18] vssa1 0.63fF
+C2443 la_oenb[17] vssa1 0.63fF
+C2444 la_data_out[17] vssa1 0.63fF
+C2445 la_data_in[17] vssa1 0.63fF
+C2446 la_oenb[16] vssa1 0.63fF
+C2447 la_data_out[16] vssa1 0.63fF
+C2448 la_data_in[16] vssa1 0.63fF
+C2449 la_oenb[15] vssa1 0.63fF
+C2450 la_data_out[15] vssa1 0.63fF
+C2451 la_data_in[15] vssa1 0.63fF
+C2452 la_oenb[14] vssa1 0.63fF
+C2453 la_data_out[14] vssa1 0.63fF
+C2454 la_data_in[14] vssa1 0.63fF
+C2455 la_oenb[13] vssa1 0.63fF
+C2456 la_data_out[13] vssa1 0.63fF
+C2457 la_data_in[13] vssa1 0.63fF
+C2458 la_oenb[12] vssa1 0.63fF
+C2459 la_data_out[12] vssa1 0.63fF
+C2460 la_data_in[12] vssa1 0.63fF
+C2461 la_oenb[11] vssa1 0.63fF
+C2462 la_data_out[11] vssa1 0.63fF
+C2463 la_data_in[11] vssa1 0.63fF
+C2464 la_oenb[10] vssa1 0.63fF
+C2465 la_data_out[10] vssa1 0.63fF
+C2466 la_data_in[10] vssa1 0.63fF
+C2467 la_oenb[9] vssa1 0.63fF
+C2468 la_data_out[9] vssa1 0.63fF
+C2469 la_data_in[9] vssa1 0.63fF
+C2470 la_oenb[8] vssa1 0.63fF
+C2471 la_data_out[8] vssa1 0.63fF
+C2472 la_data_in[8] vssa1 0.63fF
+C2473 la_oenb[7] vssa1 0.63fF
+C2474 la_data_out[7] vssa1 0.63fF
+C2475 la_data_in[7] vssa1 0.63fF
+C2476 la_oenb[6] vssa1 0.63fF
+C2477 la_data_out[6] vssa1 0.63fF
+C2478 la_data_in[6] vssa1 0.63fF
+C2479 la_oenb[5] vssa1 0.63fF
+C2480 la_data_out[5] vssa1 0.63fF
+C2481 la_data_in[5] vssa1 0.63fF
+C2482 la_oenb[4] vssa1 0.63fF
+C2483 la_data_out[4] vssa1 0.63fF
+C2484 la_data_in[4] vssa1 0.63fF
+C2485 la_oenb[3] vssa1 0.63fF
+C2486 la_data_out[3] vssa1 0.63fF
+C2487 la_data_in[3] vssa1 0.63fF
+C2488 la_oenb[2] vssa1 0.63fF
+C2489 la_data_out[2] vssa1 0.63fF
+C2490 la_data_in[2] vssa1 0.63fF
+C2491 la_oenb[1] vssa1 0.63fF
+C2492 la_data_out[1] vssa1 0.63fF
+C2493 la_data_in[1] vssa1 0.63fF
+C2494 la_oenb[0] vssa1 0.63fF
+C2495 la_data_out[0] vssa1 0.63fF
+C2496 la_data_in[0] vssa1 0.63fF
+C2497 wbs_dat_o[31] vssa1 0.63fF
+C2498 wbs_dat_i[31] vssa1 0.63fF
+C2499 wbs_adr_i[31] vssa1 0.63fF
+C2500 wbs_dat_o[30] vssa1 0.63fF
+C2501 wbs_dat_i[30] vssa1 0.63fF
+C2502 wbs_adr_i[30] vssa1 0.63fF
+C2503 wbs_dat_o[29] vssa1 0.63fF
+C2504 wbs_dat_i[29] vssa1 0.63fF
+C2505 wbs_adr_i[29] vssa1 0.63fF
+C2506 wbs_dat_o[28] vssa1 0.63fF
+C2507 wbs_dat_i[28] vssa1 0.63fF
+C2508 wbs_adr_i[28] vssa1 0.63fF
+C2509 wbs_dat_o[27] vssa1 0.63fF
+C2510 wbs_dat_i[27] vssa1 0.63fF
+C2511 wbs_adr_i[27] vssa1 0.63fF
+C2512 wbs_dat_o[26] vssa1 0.63fF
+C2513 wbs_dat_i[26] vssa1 0.63fF
+C2514 wbs_adr_i[26] vssa1 0.63fF
+C2515 wbs_dat_o[25] vssa1 0.63fF
+C2516 wbs_dat_i[25] vssa1 0.63fF
+C2517 wbs_adr_i[25] vssa1 0.63fF
+C2518 wbs_dat_o[24] vssa1 0.63fF
+C2519 wbs_dat_i[24] vssa1 0.63fF
+C2520 wbs_adr_i[24] vssa1 0.63fF
+C2521 wbs_dat_o[23] vssa1 0.63fF
+C2522 wbs_dat_i[23] vssa1 0.63fF
+C2523 wbs_adr_i[23] vssa1 0.63fF
+C2524 wbs_dat_o[22] vssa1 0.63fF
+C2525 wbs_dat_i[22] vssa1 0.63fF
+C2526 wbs_adr_i[22] vssa1 0.63fF
+C2527 wbs_dat_o[21] vssa1 0.63fF
+C2528 wbs_dat_i[21] vssa1 0.63fF
+C2529 wbs_adr_i[21] vssa1 0.63fF
+C2530 wbs_dat_o[20] vssa1 0.63fF
+C2531 wbs_dat_i[20] vssa1 0.63fF
+C2532 wbs_adr_i[20] vssa1 0.63fF
+C2533 wbs_dat_o[19] vssa1 0.63fF
+C2534 wbs_dat_i[19] vssa1 0.63fF
+C2535 wbs_adr_i[19] vssa1 0.63fF
+C2536 wbs_dat_o[18] vssa1 0.63fF
+C2537 wbs_dat_i[18] vssa1 0.63fF
+C2538 wbs_adr_i[18] vssa1 0.63fF
+C2539 wbs_dat_o[17] vssa1 0.63fF
+C2540 wbs_dat_i[17] vssa1 0.63fF
+C2541 wbs_adr_i[17] vssa1 0.63fF
+C2542 wbs_dat_o[16] vssa1 0.63fF
+C2543 wbs_dat_i[16] vssa1 0.63fF
+C2544 wbs_adr_i[16] vssa1 0.63fF
+C2545 wbs_dat_o[15] vssa1 0.63fF
+C2546 wbs_dat_i[15] vssa1 0.63fF
+C2547 wbs_adr_i[15] vssa1 0.63fF
+C2548 wbs_dat_o[14] vssa1 0.63fF
+C2549 wbs_dat_i[14] vssa1 0.63fF
+C2550 wbs_adr_i[14] vssa1 0.63fF
+C2551 wbs_dat_o[13] vssa1 0.63fF
+C2552 wbs_dat_i[13] vssa1 0.63fF
+C2553 wbs_adr_i[13] vssa1 0.63fF
+C2554 wbs_dat_o[12] vssa1 0.63fF
+C2555 wbs_dat_i[12] vssa1 0.63fF
+C2556 wbs_adr_i[12] vssa1 0.63fF
+C2557 wbs_dat_o[11] vssa1 0.63fF
+C2558 wbs_dat_i[11] vssa1 0.63fF
+C2559 wbs_adr_i[11] vssa1 0.63fF
+C2560 wbs_dat_o[10] vssa1 0.63fF
+C2561 wbs_dat_i[10] vssa1 0.63fF
+C2562 wbs_adr_i[10] vssa1 0.63fF
+C2563 wbs_dat_o[9] vssa1 0.63fF
+C2564 wbs_dat_i[9] vssa1 0.63fF
+C2565 wbs_adr_i[9] vssa1 0.63fF
+C2566 wbs_dat_o[8] vssa1 0.63fF
+C2567 wbs_dat_i[8] vssa1 0.63fF
+C2568 wbs_adr_i[8] vssa1 0.63fF
+C2569 wbs_dat_o[7] vssa1 0.63fF
+C2570 wbs_dat_i[7] vssa1 0.63fF
+C2571 wbs_adr_i[7] vssa1 0.63fF
+C2572 wbs_dat_o[6] vssa1 0.63fF
+C2573 wbs_dat_i[6] vssa1 0.63fF
+C2574 wbs_adr_i[6] vssa1 0.63fF
+C2575 wbs_dat_o[5] vssa1 0.63fF
+C2576 wbs_dat_i[5] vssa1 0.63fF
+C2577 wbs_adr_i[5] vssa1 0.63fF
+C2578 wbs_dat_o[4] vssa1 0.63fF
+C2579 wbs_dat_i[4] vssa1 0.63fF
+C2580 wbs_adr_i[4] vssa1 0.63fF
+C2581 wbs_sel_i[3] vssa1 0.63fF
+C2582 wbs_dat_o[3] vssa1 0.63fF
+C2583 wbs_dat_i[3] vssa1 0.63fF
+C2584 wbs_adr_i[3] vssa1 0.63fF
+C2585 wbs_sel_i[2] vssa1 0.63fF
+C2586 wbs_dat_o[2] vssa1 0.63fF
+C2587 wbs_dat_i[2] vssa1 0.63fF
+C2588 wbs_adr_i[2] vssa1 0.63fF
+C2589 wbs_sel_i[1] vssa1 0.63fF
+C2590 wbs_dat_o[1] vssa1 0.63fF
+C2591 wbs_dat_i[1] vssa1 0.63fF
+C2592 wbs_adr_i[1] vssa1 0.63fF
+C2593 wbs_sel_i[0] vssa1 0.63fF
+C2594 wbs_dat_o[0] vssa1 0.63fF
+C2595 wbs_dat_i[0] vssa1 0.63fF
+C2596 wbs_adr_i[0] vssa1 0.63fF
+C2597 wbs_we_i vssa1 0.63fF
+C2598 wbs_stb_i vssa1 0.63fF
+C2599 wbs_cyc_i vssa1 0.63fF
+C2600 wbs_ack_o vssa1 0.63fF
+C2601 wb_rst_i vssa1 0.63fF
+C2602 wb_clk_i vssa1 0.63fF
+C2603 pll_full_1/divider_0/and_0/Z1 vssa1 0.65fF
+C2604 pll_full_1/divider_0/and_0/B vssa1 2.45fF
+C2605 pll_full_1/divider_0/and_0/A vssa1 2.35fF
+C2606 pll_full_1/divider_0/and_0/out1 vssa1 2.99fF
+C2607 pll_full_1/divider_0/tspc_2/Z4 vssa1 0.86fF
+C2608 pll_full_1/div vssa1 14.90fF
+C2609 pll_full_1/divider_0/tspc_2/Z3 vssa1 2.26fF
+C2610 pll_full_1/divider_0/tspc_2/Z2 vssa1 1.46fF
+C2611 pll_full_1/divider_0/tspc_2/Z1 vssa1 0.99fF
+C2612 pll_full_1/divider_0/nor_0/B vssa1 6.48fF
+C2613 pll_full_1/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
+C2614 pll_full_1/divider_0/tspc_1/Z4 vssa1 0.86fF
+C2615 pll_full_1/divider_0/tspc_1/Q vssa1 3.12fF
+C2616 pll_full_1/divider_0/tspc_1/Z3 vssa1 2.26fF
+C2617 pll_full_1/divider_0/tspc_1/Z2 vssa1 1.46fF
+C2618 pll_full_1/divider_0/tspc_1/Z1 vssa1 0.99fF
+C2619 pll_full_1/divider_0/nor_1/B vssa1 7.12fF
+C2620 pll_full_1/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
+C2621 pll_full_1/divider_0/tspc_0/Z4 vssa1 0.86fF
+C2622 pll_full_1/divider_0/tspc_0/Q vssa1 3.14fF
+C2623 pll_full_1/divider_0/tspc_0/Z3 vssa1 2.26fF
+C2624 pll_full_1/divider_0/tspc_0/Z2 vssa1 1.46fF
+C2625 pll_full_1/divider_0/tspc_0/Z1 vssa1 0.99fF
+C2626 pll_full_1/divider_0/nor_1/A vssa1 7.08fF
+C2627 pll_full_1/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING
+C2628 pll_full_1/vco vssa1 35.22fF
+C2629 pll_full_1/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
+C2630 pll_full_1/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
+C2631 pll_full_1/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF
+C2632 pll_full_1/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
+C2633 pll_full_1/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
+C2634 pll_full_1/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
+C2635 pll_full_1/divider_0/and_0/OUT vssa1 5.67fF
+C2636 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
+C2637 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
+C2638 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF
+C2639 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
+C2640 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING
+C2641 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
+C2642 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
+C2643 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
+C2644 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
+C2645 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
+C2646 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
+C2647 pll_full_1/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
+C2648 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
+C2649 pll_full_1/divider_0/prescaler_0/Out vssa1 4.59fF
+C2650 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
+C2651 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
+C2652 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
+C2653 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
+C2654 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
+C2655 pll_full_1/divider_0/nor_1/Z1 vssa1 1.34fF
+C2656 pll_full_1/divider_0/nor_0/Z1 vssa1 1.34fF
+C2657 pll_full_1/ro_complete_0/cbank_2/v vssa1 16.43fF
+C2658 pll_full_1/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
+C2659 pll_full_1/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
+C2660 pll_full_1/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
+C2661 pll_full_1/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
+C2662 pll_full_1/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
+C2663 pll_full_1/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
+C2664 pll_full_1/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
+C2665 pll_full_1/ro_complete_0/a0 vssa1 5.35fF
+C2666 pll_full_1/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
+C2667 pll_full_1/ro_complete_0/a1 vssa1 6.54fF
+C2668 pll_full_1/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
+C2669 pll_full_1/ro_complete_0/a3 vssa1 5.96fF
+C2670 pll_full_1/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
+C2671 pll_full_1/ro_complete_0/a2 vssa1 5.21fF
+C2672 pll_full_1/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
+C2673 pll_full_1/ro_complete_0/a4 vssa1 5.81fF
+C2674 pll_full_1/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
+C2675 pll_full_1/ro_complete_0/a5 vssa1 6.74fF
+C2676 pll_full_1/ro_complete_0/cbank_0/v vssa1 15.12fF
+C2677 pll_full_1/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
+C2678 pll_full_1/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
+C2679 pll_full_1/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
+C2680 pll_full_1/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
+C2681 pll_full_1/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
+C2682 pll_full_1/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
+C2683 pll_full_1/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING
+C2684 pll_full_1/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING
+C2685 pll_full_1/cp_0/down vssa1 1.54fF
+C2686 pll_full_1/cp_0/upbar vssa1 1.79fF
+C2687 pll_full_1/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
+C2688 pll_full_1/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
+C2689 pll_full_1/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
+C2690 pll_full_1/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
+C2691 pll_full_1/cp_0/a_3060_0# vssa1 2.50fF **FLOATING
+C2692 pll_full_1/cp_0/a_1710_0# vssa1 7.47fF **FLOATING
+C2693 pll_full_1/pd_0/UP vssa1 5.89fF
+C2694 pll_full_1/pd_0/and_pd_0/Z1 vssa1 0.39fF
+C2695 pll_full_1/pd_0/and_pd_0/Out1 vssa1 2.22fF
+C2696 pll_full_1/pd_0/tspc_r_1/z5 vssa1 1.10fF
+C2697 pll_full_1/pd_0/tspc_r_1/Z4 vssa1 1.07fF
+C2698 pll_full_1/pd_0/R vssa1 3.05fF
+C2699 pll_full_1/pd_0/tspc_r_1/Qbar vssa1 0.79fF
+C2700 pll_full_1/pd_0/tspc_r_1/Z2 vssa1 1.22fF
+C2701 pll_full_1/pd_0/tspc_r_1/Z1 vssa1 0.67fF
+C2702 pll_full_1/pd_0/DOWN vssa1 7.38fF
+C2703 pll_full_1/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
+C2704 pll_full_1/pd_0/tspc_r_1/Z3 vssa1 2.12fF
+C2705 pll_full_1/pd_0/tspc_r_0/z5 vssa1 1.10fF
+C2706 pll_full_1/pd_0/tspc_r_0/Z4 vssa1 1.07fF
+C2707 pll_full_1/pd_0/tspc_r_0/Qbar vssa1 0.88fF
+C2708 pll_full_1/pd_0/tspc_r_0/Z2 vssa1 1.22fF
+C2709 pll_full_1/pd_0/tspc_r_0/Z1 vssa1 0.67fF
+C2710 pll_full_1/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
+C2711 pll_full_1/pd_0/tspc_r_0/Z3 vssa1 2.12fF
+C2712 pll_full_1/ref vssa1 4.34fF
+C2713 pll_full_0/divider_0/and_0/Z1 vssa1 0.65fF
+C2714 pll_full_0/divider_0/and_0/B vssa1 2.45fF
+C2715 pll_full_0/divider_0/and_0/A vssa1 2.35fF
+C2716 pll_full_0/divider_0/and_0/out1 vssa1 2.99fF
+C2717 pll_full_0/divider_0/tspc_2/Z4 vssa1 0.86fF
+C2718 pll_full_0/div vssa1 14.90fF
+C2719 pll_full_0/divider_0/tspc_2/Z3 vssa1 2.26fF
+C2720 pll_full_0/divider_0/tspc_2/Z2 vssa1 1.46fF
+C2721 pll_full_0/divider_0/tspc_2/Z1 vssa1 0.99fF
+C2722 pll_full_0/divider_0/nor_0/B vssa1 6.48fF
+C2723 pll_full_0/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
+C2724 pll_full_0/divider_0/tspc_1/Z4 vssa1 0.86fF
+C2725 pll_full_0/divider_0/tspc_1/Q vssa1 3.12fF
+C2726 pll_full_0/divider_0/tspc_1/Z3 vssa1 2.26fF
+C2727 pll_full_0/divider_0/tspc_1/Z2 vssa1 1.46fF
+C2728 pll_full_0/divider_0/tspc_1/Z1 vssa1 0.99fF
+C2729 pll_full_0/divider_0/nor_1/B vssa1 7.12fF
+C2730 pll_full_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
+C2731 pll_full_0/divider_0/tspc_0/Z4 vssa1 0.86fF
+C2732 pll_full_0/divider_0/tspc_0/Q vssa1 3.14fF
+C2733 pll_full_0/divider_0/tspc_0/Z3 vssa1 2.26fF
+C2734 pll_full_0/divider_0/tspc_0/Z2 vssa1 1.46fF
+C2735 pll_full_0/divider_0/tspc_0/Z1 vssa1 0.99fF
+C2736 pll_full_0/divider_0/nor_1/A vssa1 7.08fF
+C2737 pll_full_0/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING
+C2738 pll_full_0/vco vssa1 35.22fF
+C2739 pll_full_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
+C2740 pll_full_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
+C2741 pll_full_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF
+C2742 pll_full_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
+C2743 pll_full_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
+C2744 pll_full_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
+C2745 pll_full_0/divider_0/and_0/OUT vssa1 5.67fF
+C2746 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
+C2747 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
+C2748 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF
+C2749 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
+C2750 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING
+C2751 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
+C2752 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
+C2753 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
+C2754 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
+C2755 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
+C2756 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
+C2757 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
+C2758 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
+C2759 pll_full_0/divider_0/prescaler_0/Out vssa1 4.59fF
+C2760 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
+C2761 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
+C2762 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
+C2763 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
+C2764 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
+C2765 pll_full_0/divider_0/nor_1/Z1 vssa1 1.34fF
+C2766 pll_full_0/divider_0/nor_0/Z1 vssa1 1.34fF
+C2767 pll_full_0/ro_complete_0/cbank_2/v vssa1 16.43fF
+C2768 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
+C2769 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
+C2770 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
+C2771 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
+C2772 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
+C2773 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
+C2774 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
+C2775 pll_full_0/ro_complete_0/a0 vssa1 5.35fF
+C2776 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
+C2777 pll_full_0/ro_complete_0/a1 vssa1 6.54fF
+C2778 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
+C2779 pll_full_0/ro_complete_0/a3 vssa1 5.96fF
+C2780 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
+C2781 pll_full_0/ro_complete_0/a2 vssa1 5.21fF
+C2782 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
+C2783 pll_full_0/ro_complete_0/a4 vssa1 5.81fF
+C2784 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
+C2785 pll_full_0/ro_complete_0/a5 vssa1 6.74fF
+C2786 pll_full_0/ro_complete_0/cbank_0/v vssa1 15.12fF
+C2787 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
+C2788 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
+C2789 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
+C2790 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
+C2791 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
+C2792 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
+C2793 pll_full_0/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING
+C2794 pll_full_0/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING
+C2795 pll_full_0/cp_0/down vssa1 1.54fF
+C2796 pll_full_0/cp_0/upbar vssa1 1.79fF
+C2797 pll_full_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
+C2798 pll_full_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
+C2799 pll_full_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
+C2800 pll_full_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
+C2801 pll_full_0/cp_0/a_3060_0# vssa1 2.50fF **FLOATING
+C2802 pll_full_0/cp_0/a_1710_0# vssa1 7.47fF **FLOATING
+C2803 pll_full_0/pd_0/UP vssa1 5.89fF
+C2804 pll_full_0/pd_0/and_pd_0/Z1 vssa1 0.39fF
+C2805 pll_full_0/pd_0/and_pd_0/Out1 vssa1 2.22fF
+C2806 pll_full_0/pd_0/tspc_r_1/z5 vssa1 1.10fF
+C2807 pll_full_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF
+C2808 pll_full_0/pd_0/R vssa1 3.05fF
+C2809 pll_full_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF
+C2810 pll_full_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF
+C2811 pll_full_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF
+C2812 pll_full_0/pd_0/DOWN vssa1 7.38fF
+C2813 pll_full_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
+C2814 pll_full_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF
+C2815 pll_full_0/pd_0/tspc_r_0/z5 vssa1 1.10fF
+C2816 pll_full_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF
+C2817 pll_full_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF
+C2818 pll_full_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF
+C2819 pll_full_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF
+C2820 pll_full_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
+C2821 pll_full_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF
+C2822 pll_full_0/ref vssa1 4.34fF
+C2823 div_pd_buffered_0/tapered_buf_0/out vssa1 385.91fF
+C2824 div_pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING
+C2825 div_pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 592.97fF **FLOATING
+C2826 div_pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING
+C2827 div_pd_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING
+C2828 div_pd_buffered_0/tapered_buf_0/a_4670_0# vssa1 252.41fF **FLOATING
+C2829 div_pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.61fF **FLOATING
+C2830 div_pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.76fF **FLOATING
+C2831 div_pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.09fF **FLOATING
+C2832 div_pd_buffered_0/tapered_buf_1/out vssa1 385.93fF
+C2833 div_pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING
+C2834 div_pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 592.97fF **FLOATING
+C2835 div_pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING
+C2836 div_pd_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING
+C2837 div_pd_buffered_0/tapered_buf_1/a_4670_0# vssa1 252.41fF **FLOATING
+C2838 div_pd_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.61fF **FLOATING
+C2839 div_pd_buffered_0/tapered_buf_1/a_580_0# vssa1 16.76fF **FLOATING
+C2840 div_pd_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.09fF **FLOATING
+C2841 div_pd_buffered_0/divider_0/and_0/Z1 vssa1 0.74fF
+C2842 div_pd_buffered_0/divider_0/and_0/B vssa1 2.25fF
+C2843 div_pd_buffered_0/divider_0/and_0/A vssa1 2.19fF
+C2844 div_pd_buffered_0/divider_0/and_0/out1 vssa1 2.93fF
+C2845 div_pd_buffered_0/divider_0/tspc_2/Z4 vssa1 0.86fF
+C2846 div_pd_buffered_0/divider_0/tspc_2/Z3 vssa1 2.26fF
+C2847 div_pd_buffered_0/divider_0/tspc_2/Z2 vssa1 1.46fF
+C2848 div_pd_buffered_0/divider_0/tspc_2/Z1 vssa1 0.99fF
+C2849 div_pd_buffered_0/divider_0/nor_0/B vssa1 6.37fF
+C2850 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
+C2851 div_pd_buffered_0/divider_0/tspc_1/Z4 vssa1 0.86fF
+C2852 div_pd_buffered_0/divider_0/tspc_1/Q vssa1 3.12fF
+C2853 div_pd_buffered_0/divider_0/tspc_1/Z3 vssa1 2.26fF
+C2854 div_pd_buffered_0/divider_0/tspc_1/Z2 vssa1 1.46fF
+C2855 div_pd_buffered_0/divider_0/tspc_1/Z1 vssa1 0.99fF
+C2856 div_pd_buffered_0/divider_0/nor_1/B vssa1 7.05fF
+C2857 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
+C2858 div_pd_buffered_0/divider_0/tspc_0/Z4 vssa1 0.86fF
+C2859 div_pd_buffered_0/divider_0/tspc_0/Q vssa1 3.14fF
+C2860 div_pd_buffered_0/divider_0/tspc_0/Z3 vssa1 2.26fF
+C2861 div_pd_buffered_0/divider_0/tspc_0/Z2 vssa1 1.46fF
+C2862 div_pd_buffered_0/divider_0/tspc_0/Z1 vssa1 0.99fF
+C2863 div_pd_buffered_0/divider_0/nor_1/A vssa1 7.04fF
+C2864 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING
+C2865 div_pd_buffered_0/divider_0/clk vssa1 399.47fF
+C2866 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
+C2867 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
+C2868 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF
+C2869 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
+C2870 div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
+C2871 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
+C2872 div_pd_buffered_0/divider_0/and_0/OUT vssa1 5.62fF
+C2873 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
+C2874 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
+C2875 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF
+C2876 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
+C2877 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
+C2878 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
+C2879 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
+C2880 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
+C2881 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
+C2882 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
+C2883 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
+C2884 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
+C2885 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
+C2886 div_pd_buffered_0/divider_0/prescaler_0/Out vssa1 4.59fF
+C2887 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
+C2888 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
+C2889 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
+C2890 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
+C2891 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
+C2892 div_pd_buffered_0/divider_0/nor_1/Z1 vssa1 1.34fF
+C2893 div_pd_buffered_0/divider_0/nor_0/Z1 vssa1 1.34fF
+C2894 div_pd_buffered_0/divider_0/mc2 vssa1 393.11fF
+C2895 div_pd_buffered_0/pd_0/UP vssa1 5.85fF
+C2896 div_pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF
+C2897 div_pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF
+C2898 div_pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF
+C2899 div_pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF
+C2900 div_pd_buffered_0/pd_0/R vssa1 3.05fF
+C2901 div_pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF
+C2902 div_pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF
+C2903 div_pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF
+C2904 div_pd_buffered_0/pd_0/DOWN vssa1 9.94fF
+C2905 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
+C2906 div_pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF
+C2907 div_pd_buffered_0/pd_0/DIV vssa1 5.85fF
+C2908 div_pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF
+C2909 div_pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF
+C2910 div_pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF
+C2911 div_pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF
+C2912 div_pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF
+C2913 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
+C2914 div_pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF
+C2915 div_pd_buffered_0/pd_0/REF vssa1 391.02fF
+C2916 div_pd_buffered_0/tapered_buf_4/in vssa1 1.13fF
+C2917 div_pd_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING
+C2918 div_pd_buffered_0/tapered_buf_4/a_210_n610# vssa1 592.97fF **FLOATING
+C2919 div_pd_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING
+C2920 div_pd_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING
+C2921 div_pd_buffered_0/tapered_buf_4/a_4670_0# vssa1 252.41fF **FLOATING
+C2922 div_pd_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.61fF **FLOATING
+C2923 div_pd_buffered_0/tapered_buf_4/a_580_0# vssa1 16.76fF **FLOATING
+C2924 div_pd_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.09fF **FLOATING
+C2925 div_pd_buffered_0/tapered_buf_3/in vssa1 1.13fF
+C2926 div_pd_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING
+C2927 div_pd_buffered_0/tapered_buf_3/a_210_n610# vssa1 592.97fF **FLOATING
+C2928 div_pd_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING
+C2929 div_pd_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING
+C2930 div_pd_buffered_0/tapered_buf_3/a_4670_0# vssa1 252.41fF **FLOATING
+C2931 div_pd_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.61fF **FLOATING
+C2932 div_pd_buffered_0/tapered_buf_3/a_580_0# vssa1 16.76fF **FLOATING
+C2933 div_pd_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.09fF **FLOATING
+C2934 div_pd_buffered_0/tapered_buf_2/in vssa1 1.13fF
+C2935 div_pd_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING
+C2936 div_pd_buffered_0/tapered_buf_2/a_210_n610# vssa1 592.97fF **FLOATING
+C2937 div_pd_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING
+C2938 div_pd_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING
+C2939 div_pd_buffered_0/tapered_buf_2/a_4670_0# vssa1 252.41fF **FLOATING
+C2940 div_pd_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.61fF **FLOATING
+C2941 div_pd_buffered_0/tapered_buf_2/a_580_0# vssa1 16.76fF **FLOATING
+C2942 div_pd_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.09fF **FLOATING
+C2943 divider_1/and_0/Z1 vssa1 0.74fF
+C2944 divider_1/and_0/B vssa1 2.25fF
+C2945 divider_1/and_0/A vssa1 2.19fF
+C2946 divider_1/and_0/out1 vssa1 2.93fF
+C2947 divider_1/tspc_2/Z4 vssa1 0.86fF
+C2948 divider_1/Out vssa1 1.60fF
+C2949 divider_1/tspc_2/Z3 vssa1 2.26fF
+C2950 divider_1/tspc_2/Z2 vssa1 1.46fF
+C2951 divider_1/tspc_2/Z1 vssa1 0.99fF
+C2952 divider_1/nor_0/B vssa1 6.33fF
+C2953 divider_1/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
+C2954 divider_1/tspc_1/Z4 vssa1 0.86fF
+C2955 divider_1/tspc_1/Q vssa1 3.12fF
+C2956 divider_1/tspc_1/Z3 vssa1 2.26fF
+C2957 divider_1/tspc_1/Z2 vssa1 1.46fF
+C2958 divider_1/tspc_1/Z1 vssa1 0.99fF
+C2959 divider_1/nor_1/B vssa1 7.05fF
+C2960 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
+C2961 divider_1/tspc_0/Z4 vssa1 0.86fF
+C2962 divider_1/tspc_0/Q vssa1 3.14fF
+C2963 divider_1/tspc_0/Z3 vssa1 2.26fF
+C2964 divider_1/tspc_0/Z2 vssa1 1.46fF
+C2965 divider_1/tspc_0/Z1 vssa1 0.99fF
+C2966 divider_1/nor_1/A vssa1 7.04fF
+C2967 divider_1/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING
+C2968 divider_1/clk vssa1 5.63fF
+C2969 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF
+C2970 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF
+C2971 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF
+C2972 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF
+C2973 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF
+C2974 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF
+C2975 divider_1/and_0/OUT vssa1 5.62fF
+C2976 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF
+C2977 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF
+C2978 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF
+C2979 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF
+C2980 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
+C2981 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
+C2982 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF
+C2983 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF
+C2984 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF
+C2985 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF
+C2986 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
+C2987 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
+C2988 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF
+C2989 divider_1/prescaler_0/Out vssa1 4.59fF
+C2990 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF
+C2991 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF
+C2992 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF
+C2993 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
+C2994 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
+C2995 divider_1/nor_1/Z1 vssa1 1.34fF
+C2996 divider_1/nor_0/Z1 vssa1 1.34fF
+C2997 divider_1/mc2 vssa1 5.29fF
+C2998 divider_0/and_0/Z1 vssa1 0.74fF
+C2999 divider_0/and_0/B vssa1 2.25fF
+C3000 divider_0/and_0/A vssa1 2.19fF
+C3001 divider_0/and_0/out1 vssa1 2.93fF
+C3002 divider_0/tspc_2/Z4 vssa1 0.86fF
+C3003 divider_0/Out vssa1 1.60fF
+C3004 divider_0/tspc_2/Z3 vssa1 2.26fF
+C3005 divider_0/tspc_2/Z2 vssa1 1.46fF
+C3006 divider_0/tspc_2/Z1 vssa1 0.99fF
+C3007 divider_0/nor_0/B vssa1 6.33fF
+C3008 divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
+C3009 divider_0/tspc_1/Z4 vssa1 0.86fF
+C3010 divider_0/tspc_1/Q vssa1 3.12fF
+C3011 divider_0/tspc_1/Z3 vssa1 2.26fF
+C3012 divider_0/tspc_1/Z2 vssa1 1.46fF
+C3013 divider_0/tspc_1/Z1 vssa1 0.99fF
+C3014 divider_0/nor_1/B vssa1 7.05fF
+C3015 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
+C3016 divider_0/tspc_0/Z4 vssa1 0.86fF
+C3017 divider_0/tspc_0/Q vssa1 3.14fF
+C3018 divider_0/tspc_0/Z3 vssa1 2.26fF
+C3019 divider_0/tspc_0/Z2 vssa1 1.46fF
+C3020 divider_0/tspc_0/Z1 vssa1 0.99fF
+C3021 divider_0/nor_1/A vssa1 7.04fF
+C3022 divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING
+C3023 divider_0/clk vssa1 5.63fF
+C3024 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
+C3025 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
+C3026 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF
+C3027 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
+C3028 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
+C3029 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
+C3030 divider_0/and_0/OUT vssa1 5.62fF
+C3031 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
+C3032 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
+C3033 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF
+C3034 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
+C3035 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
+C3036 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
+C3037 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
+C3038 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
+C3039 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
+C3040 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
+C3041 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
+C3042 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
+C3043 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
+C3044 divider_0/prescaler_0/Out vssa1 4.59fF
+C3045 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
+C3046 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
+C3047 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
+C3048 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
+C3049 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
+C3050 divider_0/nor_1/Z1 vssa1 1.34fF
+C3051 divider_0/nor_0/Z1 vssa1 1.34fF
+C3052 divider_0/mc2 vssa1 5.29fF
+C3053 ro_complete_buffered_0/tapered_buf_0/in vssa1 1.13fF
+C3054 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING
+C3055 ro_complete_buffered_0/tapered_buf_0/a_210_n610# vssa1 619.27fF **FLOATING
+C3056 ro_complete_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING
+C3057 ro_complete_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING
+C3058 ro_complete_buffered_0/tapered_buf_0/a_4670_0# vssa1 252.41fF **FLOATING
+C3059 ro_complete_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.61fF **FLOATING
+C3060 ro_complete_buffered_0/tapered_buf_0/a_580_0# vssa1 16.76fF **FLOATING
+C3061 ro_complete_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.09fF **FLOATING
+C3062 ro_complete_buffered_0/tapered_buf_1/out vssa1 385.87fF
+C3063 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING
+C3064 ro_complete_buffered_0/tapered_buf_1/a_210_n610# vssa1 592.97fF **FLOATING
+C3065 ro_complete_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING
+C3066 ro_complete_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING
+C3067 ro_complete_buffered_0/tapered_buf_1/a_4670_0# vssa1 252.41fF **FLOATING
+C3068 ro_complete_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.61fF **FLOATING
+C3069 ro_complete_buffered_0/tapered_buf_1/a_580_0# vssa1 16.76fF **FLOATING
+C3070 ro_complete_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.09fF **FLOATING
+C3071 ro_complete_buffered_0/ro_complete_0/cbank_2/v vssa1 16.53fF
+C3072 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
+C3073 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
+C3074 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
+C3075 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
+C3076 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
+C3077 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
+C3078 ro_complete_buffered_0/tapered_buf_1/in vssa1 26.52fF
+C3079 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
+C3080 ro_complete_buffered_0/ro_complete_0/a0 vssa1 416.45fF
+C3081 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
+C3082 ro_complete_buffered_0/ro_complete_0/a1 vssa1 412.13fF
+C3083 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
+C3084 ro_complete_buffered_0/ro_complete_0/a3 vssa1 402.70fF
+C3085 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
+C3086 ro_complete_buffered_0/ro_complete_0/a2 vssa1 407.26fF
+C3087 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
+C3088 ro_complete_buffered_0/ro_complete_0/a4 vssa1 398.93fF
+C3089 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
+C3090 ro_complete_buffered_0/ro_complete_0/a5 vssa1 395.79fF
+C3091 ro_complete_buffered_0/ro_complete_0/cbank_0/v vssa1 15.13fF
+C3092 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
+C3093 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
+C3094 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
+C3095 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
+C3096 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
+C3097 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
+C3098 ro_complete_buffered_0/tapered_buf_7/in vssa1 1.13fF
+C3099 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# vssa1 0.06fF **FLOATING
+C3100 ro_complete_buffered_0/tapered_buf_7/a_210_n610# vssa1 592.97fF **FLOATING
+C3101 ro_complete_buffered_0/tapered_buf_7/a_160_230# vssa1 0.15fF **FLOATING
+C3102 ro_complete_buffered_0/tapered_buf_7/a_n10_230# vssa1 0.13fF **FLOATING
+C3103 ro_complete_buffered_0/tapered_buf_7/a_4670_0# vssa1 252.41fF **FLOATING
+C3104 ro_complete_buffered_0/tapered_buf_7/a_1650_0# vssa1 63.61fF **FLOATING
+C3105 ro_complete_buffered_0/tapered_buf_7/a_580_0# vssa1 16.76fF **FLOATING
+C3106 ro_complete_buffered_0/tapered_buf_7/a_160_n140# vssa1 4.09fF **FLOATING
+C3107 ro_complete_buffered_0/tapered_buf_6/in vssa1 1.13fF
+C3108 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# vssa1 0.06fF **FLOATING
+C3109 ro_complete_buffered_0/tapered_buf_6/a_210_n610# vssa1 592.97fF **FLOATING
+C3110 ro_complete_buffered_0/tapered_buf_6/a_160_230# vssa1 0.15fF **FLOATING
+C3111 ro_complete_buffered_0/tapered_buf_6/a_n10_230# vssa1 0.13fF **FLOATING
+C3112 ro_complete_buffered_0/tapered_buf_6/a_4670_0# vssa1 252.41fF **FLOATING
+C3113 ro_complete_buffered_0/tapered_buf_6/a_1650_0# vssa1 63.61fF **FLOATING
+C3114 ro_complete_buffered_0/tapered_buf_6/a_580_0# vssa1 16.76fF **FLOATING
+C3115 ro_complete_buffered_0/tapered_buf_6/a_160_n140# vssa1 4.09fF **FLOATING
+C3116 ro_complete_buffered_0/tapered_buf_5/in vssa1 1.13fF
+C3117 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# vssa1 0.06fF **FLOATING
+C3118 ro_complete_buffered_0/tapered_buf_5/a_210_n610# vssa1 592.97fF **FLOATING
+C3119 ro_complete_buffered_0/tapered_buf_5/a_160_230# vssa1 0.15fF **FLOATING
+C3120 ro_complete_buffered_0/tapered_buf_5/a_n10_230# vssa1 0.13fF **FLOATING
+C3121 ro_complete_buffered_0/tapered_buf_5/a_4670_0# vssa1 252.41fF **FLOATING
+C3122 ro_complete_buffered_0/tapered_buf_5/a_1650_0# vssa1 63.61fF **FLOATING
+C3123 ro_complete_buffered_0/tapered_buf_5/a_580_0# vssa1 16.76fF **FLOATING
+C3124 ro_complete_buffered_0/tapered_buf_5/a_160_n140# vssa1 4.09fF **FLOATING
+C3125 ro_complete_buffered_0/tapered_buf_4/in vssa1 1.13fF
+C3126 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING
+C3127 ro_complete_buffered_0/tapered_buf_4/a_210_n610# vssa1 592.97fF **FLOATING
+C3128 ro_complete_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING
+C3129 ro_complete_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING
+C3130 ro_complete_buffered_0/tapered_buf_4/a_4670_0# vssa1 252.41fF **FLOATING
+C3131 ro_complete_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.61fF **FLOATING
+C3132 ro_complete_buffered_0/tapered_buf_4/a_580_0# vssa1 16.76fF **FLOATING
+C3133 ro_complete_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.09fF **FLOATING
+C3134 ro_complete_buffered_0/tapered_buf_3/in vssa1 1.13fF
+C3135 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING
+C3136 ro_complete_buffered_0/tapered_buf_3/a_210_n610# vssa1 592.97fF **FLOATING
+C3137 ro_complete_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING
+C3138 ro_complete_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING
+C3139 ro_complete_buffered_0/tapered_buf_3/a_4670_0# vssa1 252.41fF **FLOATING
+C3140 ro_complete_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.61fF **FLOATING
+C3141 ro_complete_buffered_0/tapered_buf_3/a_580_0# vssa1 16.76fF **FLOATING
+C3142 ro_complete_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.09fF **FLOATING
+C3143 ro_complete_buffered_0/tapered_buf_2/in vssa1 1.13fF
+C3144 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING
+C3145 ro_complete_buffered_0/tapered_buf_2/a_210_n610# vssa1 592.97fF **FLOATING
+C3146 ro_complete_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING
+C3147 ro_complete_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING
+C3148 ro_complete_buffered_0/tapered_buf_2/a_4670_0# vssa1 252.41fF **FLOATING
+C3149 ro_complete_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.61fF **FLOATING
+C3150 ro_complete_buffered_0/tapered_buf_2/a_580_0# vssa1 16.76fF **FLOATING
+C3151 ro_complete_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.09fF **FLOATING
+C3152 ro_complete_0/cbank_2/v vssa1 16.43fF
+C3153 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
+C3154 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
+C3155 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
+C3156 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
+C3157 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
+C3158 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
+C3159 ro_complete_0/cbank_1/v vssa1 16.43fF
+C3160 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
+C3161 ro_complete_0/a0 vssa1 5.35fF
+C3162 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
+C3163 ro_complete_0/a1 vssa1 6.54fF
+C3164 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
+C3165 ro_complete_0/a3 vssa1 5.96fF
+C3166 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
+C3167 ro_complete_0/a2 vssa1 5.21fF
+C3168 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
+C3169 ro_complete_0/a4 vssa1 5.81fF
+C3170 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
+C3171 ro_complete_0/a5 vssa1 6.74fF
+C3172 ro_complete_0/cbank_0/v vssa1 15.12fF
+C3173 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
+C3174 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
+C3175 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
+C3176 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
+C3177 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
+C3178 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
+C3179 filter_0/v vssa1 110.47fF
+C3180 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING
+C3181 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING
+C3182 cp_buffered_0/cp_0/down vssa1 397.14fF
+C3183 cp_buffered_0/tapered_buf_0/in vssa1 1.13fF
+C3184 cp_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING
+C3185 cp_buffered_0/tapered_buf_0/a_210_n610# vssa1 592.97fF **FLOATING
+C3186 cp_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING
+C3187 cp_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING
+C3188 cp_buffered_0/tapered_buf_0/a_4670_0# vssa1 252.41fF **FLOATING
+C3189 cp_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.61fF **FLOATING
+C3190 cp_buffered_0/tapered_buf_0/a_580_0# vssa1 16.76fF **FLOATING
+C3191 cp_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.09fF **FLOATING
+C3192 cp_buffered_0/cp_0/out vssa1 397.36fF
+C3193 cp_buffered_0/tapered_buf_1/in vssa1 1.13fF
+C3194 cp_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING
+C3195 cp_buffered_0/tapered_buf_1/a_210_n610# vssa1 592.97fF **FLOATING
+C3196 cp_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING
+C3197 cp_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING
+C3198 cp_buffered_0/tapered_buf_1/a_4670_0# vssa1 252.41fF **FLOATING
+C3199 cp_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.61fF **FLOATING
+C3200 cp_buffered_0/tapered_buf_1/a_580_0# vssa1 16.76fF **FLOATING
+C3201 cp_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.09fF **FLOATING
+C3202 cp_buffered_0/cp_0/upbar vssa1 393.41fF
+C3203 cp_buffered_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
+C3204 cp_buffered_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
+C3205 cp_buffered_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
+C3206 cp_buffered_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
+C3207 cp_buffered_0/cp_0/a_3060_0# vssa1 1.65fF **FLOATING
+C3208 cp_buffered_0/cp_0/a_1710_0# vssa1 5.76fF **FLOATING
+C3209 cp_buffered_0/cp_0/a_1710_n2840# vssa1 5.24fF **FLOATING
+C3210 cp_buffered_0/cp_0/a_10_n50# vssa1 3.19fF **FLOATING
+C3211 cp_buffered_0/tapered_buf_2/in vssa1 1.13fF
+C3212 cp_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING
+C3213 cp_buffered_0/tapered_buf_2/a_210_n610# vssa1 592.97fF **FLOATING
+C3214 cp_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING
+C3215 cp_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING
+C3216 cp_buffered_0/tapered_buf_2/a_4670_0# vssa1 252.41fF **FLOATING
+C3217 cp_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.61fF **FLOATING
+C3218 cp_buffered_0/tapered_buf_2/a_580_0# vssa1 16.76fF **FLOATING
+C3219 cp_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.09fF **FLOATING
+C3220 pd_buffered_0/tapered_buf_0/in vssa1 1.13fF
+C3221 pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING
+C3222 pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 592.97fF **FLOATING
+C3223 pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING
+C3224 pd_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING
+C3225 pd_buffered_0/tapered_buf_0/a_4670_0# vssa1 252.41fF **FLOATING
+C3226 pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.61fF **FLOATING
+C3227 pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.76fF **FLOATING
+C3228 pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.09fF **FLOATING
+C3229 pd_buffered_0/tapered_buf_1/out vssa1 385.91fF
+C3230 pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING
+C3231 pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 592.97fF **FLOATING
+C3232 pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING
+C3233 pd_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING
+C3234 pd_buffered_0/tapered_buf_1/a_4670_0# vssa1 252.41fF **FLOATING
+C3235 pd_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.61fF **FLOATING
+C3236 pd_buffered_0/tapered_buf_1/a_580_0# vssa1 16.76fF **FLOATING
+C3237 pd_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.09fF **FLOATING
+C3238 pd_buffered_0/pd_0/UP vssa1 5.51fF
+C3239 pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF
+C3240 pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF
+C3241 pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF
+C3242 pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF
+C3243 pd_buffered_0/pd_0/R vssa1 3.05fF
+C3244 pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF
+C3245 pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF
+C3246 pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF
+C3247 pd_buffered_0/pd_0/DOWN vssa1 8.92fF
+C3248 pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
+C3249 pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF
+C3250 pd_buffered_0/pd_0/DIV vssa1 390.67fF
+C3251 pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF
+C3252 pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF
+C3253 pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF
+C3254 pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF
+C3255 pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF
+C3256 pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
+C3257 pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF
+C3258 pd_buffered_0/pd_0/REF vssa1 388.56fF
+C3259 pd_buffered_0/tapered_buf_3/out vssa1 385.93fF
+C3260 pd_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING
+C3261 pd_buffered_0/tapered_buf_3/a_210_n610# vssa1 592.97fF **FLOATING
+C3262 pd_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING
+C3263 pd_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING
+C3264 pd_buffered_0/tapered_buf_3/a_4670_0# vssa1 252.41fF **FLOATING
+C3265 pd_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.61fF **FLOATING
+C3266 pd_buffered_0/tapered_buf_3/a_580_0# vssa1 16.76fF **FLOATING
+C3267 pd_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.09fF **FLOATING
+C3268 pd_buffered_0/tapered_buf_2/in vssa1 1.13fF
+C3269 pd_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING
+C3270 pd_buffered_0/tapered_buf_2/a_210_n610# vssa1 592.97fF **FLOATING
+C3271 pd_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING
+C3272 pd_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING
+C3273 pd_buffered_0/tapered_buf_2/a_4670_0# vssa1 252.41fF **FLOATING
+C3274 pd_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.61fF **FLOATING
+C3275 pd_buffered_0/tapered_buf_2/a_580_0# vssa1 16.76fF **FLOATING
+C3276 pd_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.09fF **FLOATING
 .ends
commit	54e3f87ae6fdcad71c81cafd3443b9d3549b8144	[log] [tgz]
author	adithyasunil26 <adithyasunil26@gmail.com>	Mon Mar 21 04:21:44 2022 +0530
committer	adithyasunil26 <adithyasunil26@gmail.com>	Mon Mar 21 04:21:44 2022 +0530
tree	589eea87da2500a606743ae7a38df2cda6dd16d4
parent	82abb99dd157bc10329de2562e03990e1f5355f5 [diff]