1. 2fdf66c caravel wb address range fix by dineshannayya · 3 years ago
  2. 3906256 uart master added + la[0] added as soft reset by dineshannayya · 3 years, 2 months ago
  3. 7e953da document clean-up + LBIST Bypass mode added by dineshannayya · 3 years, 3 months ago
  4. f9a1334 Full chip STA closure with caravel setup by dineshannayya · 3 years, 3 months ago
  5. c0813b4 Timing closed and Full chip Scan Stiched Database by dineshannayya · 3 years, 3 months ago
  6. 5dc57f7 scan integrated glbl + logic bist core integrated by dineshannayya · 3 years, 3 months ago
  7. 0826a22 Signature Reg Added in glbl reg by dineshannayya · 3 years, 4 months ago
  8. 4376ed5 Timing clean up by dineshannayya · 3 years, 4 months ago
  9. 59a04a6 Feed through added at global route signals through wishbone interconnect for better buffering by dineshannayya · 3 years, 4 months ago
  10. 9393f21 totally 4 x 2KB SRAM and 4x 1KB SRAM integrated by dineshannayya · 3 years, 4 months ago
  11. c928ee3 4x SRAM + 4x MBIST integrated with wishbone interconnect by dineshannayya · 3 years, 4 months ago
  12. 7e64246 wb host output timing fix by dineshannayya · 3 years, 4 months ago
  13. 1d1009a clk_ctl bug fix in wb_host by dineshannayya · 3 years, 4 months ago
  14. 38b9a1b Full Chip Hold timing closed database by dineshannayya · 3 years, 4 months ago
  15. cb34d09 test bench update due to ctech cell addition in wb_host and mbist by dineshannayya · 3 years, 4 months ago
  16. ff3bedd wb_port reset bug fix and timing clean up by dineshannayya · 3 years, 4 months ago
  17. 1c06214 pre-check clean database by dineshannayya · 3 years, 4 months ago
  18. 2a9362c validation clean-up by dineshannayya · 3 years, 4 months ago
  19. dc9a1cf mbist verify and design fix by dineshannayya · 3 years, 5 months ago
  20. 99bd6ab mbist test case clean up by dineshannayya · 3 years, 5 months ago
  21. 23bfd40 mbist test clean-up and RTL fix for MBIST ERror insertion by dineshannayya · 3 years, 5 months ago
  22. 804a797 Verification clean-up, working wb_host test case by dineshannayya · 3 years, 5 months ago
  23. a3774d5 user proj example removed by dineshannayya · 3 years, 5 months ago
  24. 913410a initial version of mbist by dineshannayya · 3 years, 5 months ago
  25. 8719f46 [DATA] Update macros (hardened with latest openlane) by manarabdelaty · 3 years, 6 months ago
  26. c89cfac Update to coincide with the most recent commit to the caravel by Tim Edwards · 3 years, 11 months ago
  27. 401a14d Fix syntax error by manarabdelaty · 3 years, 11 months ago
  28. 694bfd3 Added the 3 user IRQ lines to the project wrapper and zeroed them by Tim Edwards · 3 years, 11 months ago
  29. 609ec98 [DATA] Update views by manarabdelaty · 3 years, 11 months ago
  30. 191408b Add SPDX header by manarabdelaty · 4 years ago
  31. f989c64 Corrected the user_project_wrapper verilog to have the correct by Tim Edwards · 4 years ago
  32. a7929f3 Added mprj_stimulus test by manarabdelaty · 4 years ago
  33. a63e2e6 Makefile and RTL updates to run GL sim by manarabdelaty · 4 years ago
  34. 69bd326 Updated DV tests by manarabdelaty · 4 years ago
  35. d4ec2f0 Example of a full run of user_project_wrapper by Ahmed Ghazy · 4 years ago