commit | c3c83c1f942f10d2d42ef799e3914c834bf7237c | [log] [tgz] |
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author | matt venn <matt@mattvenn.net> | Sun Mar 20 14:21:32 2022 +0100 |
committer | matt venn <matt@mattvenn.net> | Sun Mar 20 14:21:32 2022 +0100 |
tree | 7e2654ffacf846cb2ec24941968d63500210dec3 | |
parent | 5a4ac89211f9721b5d6628fe969a352837ec2c7a [diff] |
reharden without hacksoc to pass mpw5 precheck
This ASIC was designed by members of the Zero to ASIC course.
This submission was configured and built by the multi project tools at commit 46a776b27ff3d422db1e3554d6e046daf8806ea5
# clone all repos, and include support for shared OpenRAM ./multi_tool.py --clone-repos --clone-shared-repos --create-openlane-config --copy-gds --copy-project --openram # run all the tests ./multi_tool.py --test-all --force-delete # build user project wrapper submission cd $CARAVEL_ROOT; make user_project_wrapper # create docs ./multi_tool.py --generate-doc --annotate-image