First test commit to try MPW precheck
30 files changed
tree: bd40c1fa09701fbd862f12f5c0ff74799e8dc80d
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. verilog/
  11. .gitignore
  12. info.yaml
  13. LICENSE
  14. Makefile
  15. README.md
README.md

Ariel eFPGA

License

Test project for eFPGA fabric implemented with OpenLane. FPGA contains 880 4-input LUTs and uses Yosys+VPR opensource flow for FPGA bitstreams.

DOCUMENTATION UNDER DEVELOPMENT