Corrected the user_project_wrapper verilog to have the correct
number of GPIO analog-through bits (reduced by 2 since MPW-one).
Corrected the mprj_stimulus testbench, which failed due to a
byproduct of the change to add flash I/O channels 2 and 3 to the
highest two GPIO channels. This makes the channels different
from the others and cannot be configured in the same way for the
stimulus. The solution was to move the status vector down by
two bits to avoid those channels. Also improved the make process
by making the #include statement in the .c file a relative path
and adding -I $(CARAVEL_PATH) as a gcc option. This lets the
testbench run correctly with CARAVEL_PATH coming from an overriding
environment variable. This change should be applied to the other
testbenches as well.
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v
index 7cf8dad..796d3aa 100644
--- a/verilog/rtl/user_project_wrapper.v
+++ b/verilog/rtl/user_project_wrapper.v
@@ -70,7 +70,7 @@
// Note that analog I/O is not available on the 7 lowest-numbered
// GPIO pads, and so the analog_io indexing is offset from the
// GPIO indexing by 7.
- inout [`MPRJ_IO_PADS-8:0] analog_io,
+ inout [`MPRJ_IO_PADS-10:0] analog_io,
// Independent clock (on independent integer divider)
input user_clock2
