commit fded6d701c582644b0e089f57e5ad5f28a2a954f
author DESKTOP-QFPBD39\dinesha <dinesh.annayya@gmail.com> Mon Jun 14 12:14:15 2021 +0530
committer DESKTOP-QFPBD39\dinesha <dinesh.annayya@gmail.com> Mon Jun 14 12:14:15 2021 +0530
tree 32d36e3572b31b70e1cebad782cc13f29ba87199
parent 2eebfb2064d27451a5a41aea080afc0fe8ddacfd

readme updated

README.md

diff --git a/README.md b/README.md
index 745affb..590021e 100644
--- a/README.md
+++ b/README.md
@@ -25,6 +25,7 @@
 - [Tests preparation](#tests-preparation)
     - [Running Simuation](#running-simulation)
 - [Tool sets](#tool-sets)
+- [Documentation](#documentation)
 
 
 # Overview
@@ -56,7 +57,7 @@
     * Verification suite provided
 ```
 
-#Sub IP features
+# Sub IP features
 
 ## RISC V Core
 
@@ -236,3 +237,11 @@
 
 Report an issue: <https://github.com/dineshannayya/yifive_r0/issues>
 
+# Documentation
+```bash
+    * Syntacore Link: https://github.com/syntacore/scr1
+    * SDRAM Controller : https://opencores.org/projects/sdr_ctrl
+```
+
+
+