Added xschem schematic of the POR and testbench simulations and results.
diff --git a/mag/simple_por.mag b/mag/example_por.mag similarity index 100% rename from mag/simple_por.mag rename to mag/example_por.mag
diff --git a/netgen/comp.out b/netgen/comp.out new file mode 100644 index 0000000..9155711 --- /dev/null +++ b/netgen/comp.out
@@ -0,0 +1,163 @@ +Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_2_W5U4AW in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_TGFUGS in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_3YBPVB in circuit example_por (0)(4 instances) +Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YUHPXE in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_PKVMTM in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_WRT4AW in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YEUEBV in circuit example_por (0)(1 instance) +Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_YUHPBG in circuit example_por (0)(1 instance) +Equate elements: no current cell. +Equate elements: no current cell. +Equate elements: no current cell. +Equate elements: no current cell. +Equate elements: no current cell. +Equate elements: no current cell. +Equate elements: no current cell. +Class sky130_fd_sc_hvl__buf_8: Merged 18 devices. +Class sky130_fd_sc_hvl__buf_8: Merged 18 devices. + +Subcircuit summary: +Circuit 1: sky130_fd_sc_hvl__buf_8 |Circuit 2: sky130_fd_sc_hvl__buf_8 +-------------------------------------------|------------------------------------------- +sky130_fd_pr__pfet_g5v0d10v5 (2) |sky130_fd_pr__pfet_g5v0d10v5 (2) +sky130_fd_pr__nfet_g5v0d10v5 (2) |sky130_fd_pr__nfet_g5v0d10v5 (2) +Number of devices: 4 |Number of devices: 4 +Number of nets: 7 |Number of nets: 7 +--------------------------------------------------------------------------------------- +Circuits match uniquely. +Netlists match uniquely. + +Subcircuit pins: +Circuit 1: sky130_fd_sc_hvl__buf_8 |Circuit 2: sky130_fd_sc_hvl__buf_8 +-------------------------------------------|------------------------------------------- +A |A +VPWR |VPWR +VPB |VPB +X |X +VGND |VGND +VNB |VNB +--------------------------------------------------------------------------------------- +Cell pin lists are equivalent. +Device classes sky130_fd_sc_hvl__buf_8 and sky130_fd_sc_hvl__buf_8 are equivalent. + +Subcircuit summary: +Circuit 1: sky130_fd_sc_hvl__schmittbuf_1 |Circuit 2: sky130_fd_sc_hvl__schmittbuf_1 +-------------------------------------------|------------------------------------------- +sky130_fd_pr__res_generic_pd__hv (1) |sky130_fd_pr__res_generic_pd__hv (1) +sky130_fd_pr__pfet_g5v0d10v5 (4) |sky130_fd_pr__pfet_g5v0d10v5 (4) +sky130_fd_pr__nfet_g5v0d10v5 (4) |sky130_fd_pr__nfet_g5v0d10v5 (4) +sky130_fd_pr__res_generic_nd__hv (1) |sky130_fd_pr__res_generic_nd__hv (1) +Number of devices: 10 |Number of devices: 10 +Number of nets: 11 |Number of nets: 11 +--------------------------------------------------------------------------------------- +Circuits match uniquely. +Netlists match uniquely. + +Subcircuit pins: +Circuit 1: sky130_fd_sc_hvl__schmittbuf_1 |Circuit 2: sky130_fd_sc_hvl__schmittbuf_1 +-------------------------------------------|------------------------------------------- +A |A +VPB |VPB +VNB |VNB +VGND |VGND +VPWR |VPWR +X |X +--------------------------------------------------------------------------------------- +Cell pin lists are equivalent. +Device classes sky130_fd_sc_hvl__schmittbuf_1 and sky130_fd_sc_hvl__schmittbuf_1 are equivalent. +Class sky130_fd_sc_hvl__inv_8: Merged 14 devices. +Class sky130_fd_sc_hvl__inv_8: Merged 14 devices. + +Subcircuit summary: +Circuit 1: sky130_fd_sc_hvl__inv_8 |Circuit 2: sky130_fd_sc_hvl__inv_8 +-------------------------------------------|------------------------------------------- +sky130_fd_pr__pfet_g5v0d10v5 (1) |sky130_fd_pr__pfet_g5v0d10v5 (1) +sky130_fd_pr__nfet_g5v0d10v5 (1) |sky130_fd_pr__nfet_g5v0d10v5 (1) +Number of devices: 2 |Number of devices: 2 +Number of nets: 6 |Number of nets: 6 +--------------------------------------------------------------------------------------- +Circuits match uniquely. +Netlists match uniquely. + +Subcircuit pins: +Circuit 1: sky130_fd_sc_hvl__inv_8 |Circuit 2: sky130_fd_sc_hvl__inv_8 +-------------------------------------------|------------------------------------------- +VPWR |VPWR +VPB |VPB +VGND |VGND +VNB |VNB +A |A +Y |Y +--------------------------------------------------------------------------------------- +Cell pin lists are equivalent. +Device classes sky130_fd_sc_hvl__inv_8 and sky130_fd_sc_hvl__inv_8 are equivalent. +Class example_por: Merged 20 devices. + +Subcircuit summary: +Circuit 1: example_por |Circuit 2: example_por +-------------------------------------------|------------------------------------------- +sky130_fd_pr__cap_mim_m3_2 (1) |sky130_fd_pr__cap_mim_m3_2 (1) +sky130_fd_sc_hvl__buf_8 (2) |sky130_fd_sc_hvl__buf_8 (2) +sky130_fd_pr__pfet_g5v0d10v5 (8) |sky130_fd_pr__pfet_g5v0d10v5 (8) +sky130_fd_pr__nfet_g5v0d10v5 (3) |sky130_fd_pr__nfet_g5v0d10v5 (5) **Mismatc +sky130_fd_pr__res_xhigh_po_0p69 (3) |sky130_fd_pr__res_xhigh_po_0p69 (3) +sky130_fd_sc_hvl__schmittbuf_1 (1) |sky130_fd_sc_hvl__schmittbuf_1 (1) +sky130_fd_pr__cap_mim_m3_1 (1) |sky130_fd_pr__cap_mim_m3_1 (1) +sky130_fd_sc_hvl__inv_8 (1) |sky130_fd_sc_hvl__inv_8 (1) +Number of devices: 20 **Mismatch** |Number of devices: 22 **Mismatch** +Number of nets: 16 **Mismatch** |Number of nets: 18 **Mismatch** +--------------------------------------------------------------------------------------- +NET mismatches: Class fragments follow (with fanout counts): +Circuit 1: example_por |Circuit 2: example_por + +--------------------------------------------------------------------------------------- +Net: vss |Net: vss + sky130_fd_pr__cap_mim_m3_1/2 = 1 | sky130_fd_pr__cap_mim_m3_1/2 = 1 + sky130_fd_pr__cap_mim_m3_2/1 = 1 | sky130_fd_pr__cap_mim_m3_2/2 = 1 + sky130_fd_pr__nfet_g5v0d10v5/(1|3) = 3 | sky130_fd_pr__nfet_g5v0d10v5/(1|3) = 3 + sky130_fd_pr__nfet_g5v0d10v5/4 = 3 | sky130_fd_pr__nfet_g5v0d10v5/4 = 5 + sky130_fd_pr__res_xhigh_po_0p69/3 = 3 | sky130_fd_pr__res_xhigh_po_0p69/3 = 3 + sky130_fd_pr__res_xhigh_po_0p69/(1|2) = | sky130_fd_pr__res_xhigh_po_0p69/(1|2) = + sky130_fd_sc_hvl__buf_8/VGND = 2 | sky130_fd_sc_hvl__buf_8/VGND = 2 + sky130_fd_sc_hvl__buf_8/VNB = 2 | sky130_fd_sc_hvl__buf_8/VNB = 2 + sky130_fd_sc_hvl__inv_8/VGND = 1 | sky130_fd_sc_hvl__inv_8/VGND = 1 + sky130_fd_sc_hvl__inv_8/VNB = 1 | sky130_fd_sc_hvl__inv_8/VNB = 1 + sky130_fd_sc_hvl__schmittbuf_1/VGND = 1 | sky130_fd_sc_hvl__schmittbuf_1/VGND = 1 + sky130_fd_sc_hvl__schmittbuf_1/VNB = 1 | sky130_fd_sc_hvl__schmittbuf_1/VNB = 1 + | +Net: sky130_fd_sc_hvl__schmittbuf_1_0/A |Net: net4 + sky130_fd_pr__cap_mim_m3_2/2 = 1 | sky130_fd_pr__nfet_g5v0d10v5/2 = 2 + sky130_fd_sc_hvl__schmittbuf_1/A = 1 | sky130_fd_pr__nfet_g5v0d10v5/(1|3) = 2 + sky130_fd_pr__pfet_g5v0d10v5/(1|3) = 1 | + sky130_fd_pr__cap_mim_m3_1/1 = 1 | + | +(no matching net) |Net: net1 + | sky130_fd_pr__nfet_g5v0d10v5/(1|3) = 2 + | +(no matching net) |Net: net11 + | sky130_fd_pr__cap_mim_m3_1/1 = 1 + | sky130_fd_pr__cap_mim_m3_2/1 = 1 + | sky130_fd_pr__pfet_g5v0d10v5/(1|3) = 1 + | sky130_fd_sc_hvl__schmittbuf_1/A = 1 +--------------------------------------------------------------------------------------- +DEVICE mismatches: Class fragments follow (with node fanout counts): +Circuit 1: example_por |Circuit 2: example_por + +--------------------------------------------------------------------------------------- +(no matching instance) |Instance: sky130_fd_pr__nfet_g5v0d10v5M5 + | (1,3) = (24,4) + | 2 = 4 + | 4 = 24 + | + | +(no matching instance) |Instance: sky130_fd_pr__nfet_g5v0d10v5M2 + | (1,3) = (24,2) + | 2 = 4 + | 4 = 24 + | +--------------------------------------------------------------------------------------- +Netlists do not match. +Netlists do not match.
diff --git a/netgen/example_por.spice b/netgen/example_por.spice new file mode 100644 index 0000000..499f397 --- /dev/null +++ b/netgen/example_por.spice
@@ -0,0 +1,213 @@ +* NGSPICE file created from example_por.ext - technology: sky130A + +.subckt sky130_fd_pr__cap_mim_m3_2_W5U4AW VSUBS m4_n3179_n3100# c2_n3079_n3000# +X0 c2_n3079_n3000# m4_n3179_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u +.ends + +.subckt sky130_fd_sc_hvl__buf_8 A VGND VNB VPB VPWR X +X0 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=2.9175e+12p pd=2.189e+07u as=8.475e+11p ps=7.13e+06u w=1.5e+06u l=500000u +X1 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=1.45875e+12p pd=1.289e+07u as=8.4e+11p ps=8.24e+06u w=750000u l=500000u +X2 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=1.68e+12p ps=1.424e+07u w=1.5e+06u l=500000u +X3 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X4 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X5 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=4.2375e+11p pd=4.13e+06u as=0p ps=0u w=750000u l=500000u +X6 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X7 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X8 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X9 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X10 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X11 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X12 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X13 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X14 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X15 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X16 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X17 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X18 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X19 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X20 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X21 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +.ends + +.subckt sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ VSUBS a_n465_n200# a_n247_n200# a_n29_n200# ++ a_843_n200# w_n1101_n497# a_n843_n297# a_625_n200# a_683_n297# a_n625_n297# a_407_n200# ++ a_465_n297# a_n407_n297# a_247_n297# a_n901_n200# a_189_n200# a_29_n297# a_n189_n297# ++ a_n683_n200# +X0 a_407_n200# a_247_n297# a_189_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X1 a_843_n200# a_683_n297# a_625_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X2 a_n465_n200# a_n625_n297# a_n683_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X3 a_189_n200# a_29_n297# a_n29_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X4 a_625_n200# a_465_n297# a_407_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u +X5 a_n247_n200# a_n407_n297# a_n465_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=0p ps=0u w=2e+06u l=800000u +X6 a_n683_n200# a_n843_n297# a_n901_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X7 a_n29_n200# a_n189_n297# a_n247_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u +.ends + +.subckt sky130_fd_pr__nfet_g5v0d10v5_TGFUGS a_n80_n288# a_n574_n200# a_n356_n200# ++ a_n138_n200# a_n734_n288# a_574_n288# a_n516_n288# a_356_n288# a_80_n200# a_n298_n288# ++ a_138_n288# w_n962_n458# a_734_n200# a_516_n200# a_298_n200# a_n792_n200# +X0 a_516_n200# a_356_n288# a_298_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X1 a_n574_n200# a_n734_n288# a_n792_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X2 a_298_n200# a_138_n288# a_80_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X3 a_80_n200# a_n80_n288# a_n138_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X4 a_734_n200# a_574_n288# a_516_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=0p ps=0u w=2e+06u l=800000u +X5 a_n356_n200# a_n516_n288# a_n574_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=0p ps=0u w=2e+06u l=800000u +X6 a_n138_n200# a_n298_n288# a_n356_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u +.ends + +.subckt sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 a_n2578_n2932# a_5142_2500# a_n1034_n2932# ++ a_n262_2500# a_1668_2500# a_n262_n2932# a_n3736_2500# a_3984_n2932# a_n2192_2500# ++ a_3984_2500# a_2440_n2932# a_2440_2500# a_4370_n2932# a_3598_2500# a_2054_2500# ++ a_n4508_n2932# a_510_2500# a_n4122_2500# a_n2964_n2932# a_124_2500# a_n4894_n2932# ++ a_1282_n2932# a_124_n2932# a_n1420_n2932# a_4370_2500# a_n3350_n2932# a_n648_n2932# ++ a_n648_2500# a_n5280_n2932# a_n1420_2500# a_n2964_2500# a_n2578_2500# a_n1034_2500# ++ a_2826_n2932# a_n2192_n2932# a_2826_2500# a_4756_n2932# w_n5446_n3098# a_1282_2500# ++ a_3212_n2932# a_n4894_2500# a_n3350_2500# a_n4508_2500# a_5142_n2932# a_896_2500# ++ a_510_n2932# a_1668_n2932# a_n1806_n2932# a_4756_2500# a_n3736_n2932# a_3598_n2932# ++ a_3212_2500# a_2054_n2932# a_896_n2932# a_n5280_2500# a_n4122_n2932# a_n1806_2500# +X0 a_n3350_n2932# a_n3350_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X1 a_n4508_n2932# a_n4508_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X2 a_n2578_n2932# a_n2578_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X3 a_n1420_n2932# a_n1420_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X4 a_n4894_n2932# a_n4894_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X5 a_n3736_n2932# a_n3736_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X6 a_3598_n2932# a_3598_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X7 a_124_n2932# a_124_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X8 a_4756_n2932# a_4756_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X9 a_n2964_n2932# a_n2964_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X10 a_1668_n2932# a_1668_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X11 a_n1806_n2932# a_n1806_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X12 a_n648_n2932# a_n648_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X13 a_3984_n2932# a_3984_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X14 a_2826_n2932# a_2826_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X15 a_510_n2932# a_510_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X16 a_n4122_n2932# a_n4122_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X17 a_n2192_n2932# a_n2192_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X18 a_5142_n2932# a_5142_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X19 a_n1034_n2932# a_n1034_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X20 a_2054_n2932# a_2054_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X21 a_4370_n2932# a_4370_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X22 a_3212_n2932# a_3212_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X23 a_1282_n2932# a_1282_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X24 a_n262_n2932# a_n262_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X25 a_n5280_n2932# a_n5280_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X26 a_2440_n2932# a_2440_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +X27 a_896_n2932# a_896_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u +.ends + +.subckt sky130_fd_pr__pfet_g5v0d10v5_3YBPVB VSUBS a_n138_n200# w_n338_n497# a_80_n200# ++ a_n80_n297# +X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +.ends + +.subckt sky130_fd_sc_hvl__schmittbuf_1 A VGND VNB VPB VPWR X +X0 a_64_207# VPWR VPB sky130_fd_pr__res_generic_pd__hv w=290000u l=3.11e+06u +X1 a_231_463# A a_117_181# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=4.0875e+11p pd=4.09e+06u as=1.9875e+11p ps=2.03e+06u w=750000u l=500000u +X2 a_217_207# A a_117_181# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=2.289e+11p pd=2.77e+06u as=1.113e+11p ps=1.37e+06u w=420000u l=500000u +X3 VPWR A a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=1.02225e+12p pd=5.2e+06u as=0p ps=0u w=750000u l=500000u +X4 a_217_207# a_117_181# a_64_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=1.113e+11p ps=1.37e+06u w=420000u l=500000u +X5 X a_117_181# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=1.9875e+11p pd=2.03e+06u as=9.478e+11p ps=4.36e+06u w=750000u l=500000u +X6 a_78_463# VGND VNB sky130_fd_pr__res_generic_nd__hv w=290000u l=1.355e+06u +X7 X a_117_181# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=3.975e+11p pd=3.53e+06u as=0p ps=0u w=1.5e+06u l=500000u +X8 VGND A a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u +X9 a_231_463# a_117_181# a_78_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=1.9875e+11p ps=2.03e+06u w=750000u l=500000u +.ends + +.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPXE VSUBS a_n138_n200# w_n338_n497# a_80_n200# ++ a_n80_n297# +X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +.ends + +.subckt sky130_fd_pr__nfet_g5v0d10v5_PKVMTM a_n80_n288# a_n138_n200# a_80_n200# w_n308_n458# +X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +.ends + +.subckt sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC a_n80_n288# a_n138_n200# a_80_n200# w_n308_n458# +X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +.ends + +.subckt sky130_fd_pr__cap_mim_m3_1_WRT4AW VSUBS m3_n3136_n3100# c1_n3036_n3000# +X0 c1_n3036_n3000# m3_n3136_n3100# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u +.ends + +.subckt sky130_fd_pr__pfet_g5v0d10v5_YEUEBV VSUBS w_n992_n497# a_n574_n200# a_n356_n200# ++ a_n138_n200# a_80_n200# a_n80_n297# a_734_n200# a_n734_n297# a_516_n200# a_574_n297# ++ a_n516_n297# a_356_n297# a_298_n200# a_n298_n297# a_138_n297# a_n792_n200# +X0 a_734_n200# a_574_n297# a_516_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X1 a_n356_n200# a_n516_n297# a_n574_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X2 a_n138_n200# a_n298_n297# a_n356_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=0p ps=0u w=2e+06u l=800000u +X3 a_516_n200# a_356_n297# a_298_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X4 a_n574_n200# a_n734_n297# a_n792_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X5 a_298_n200# a_138_n297# a_80_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +X6 a_80_n200# a_n80_n297# a_n138_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u +.ends + +.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPBG VSUBS a_n138_n200# w_n338_n497# a_80_n200# ++ a_n80_n297# +X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=5.8e+11p pd=4.58e+06u as=5.8e+11p ps=4.58e+06u w=2e+06u l=800000u +.ends + +.subckt sky130_fd_sc_hvl__inv_8 A VGND VNB VPB VPWR Y +X0 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=1.68e+12p pd=1.424e+07u as=2.055e+12p ps=1.774e+07u w=1.5e+06u l=500000u +X1 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=8.4e+11p pd=8.24e+06u as=1.14e+12p ps=1.054e+07u w=750000u l=500000u +X2 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X3 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X4 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X5 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X6 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X7 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X8 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X9 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X10 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X11 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X12 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u +X13 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X14 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +X15 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u +.ends + +.subckt example_por vdd3v3 vdd1v8 vss porb_h por_l porb_l +Xsky130_fd_pr__cap_mim_m3_2_W5U4AW_0 vss sky130_fd_sc_hvl__schmittbuf_1_0/A vss sky130_fd_pr__cap_mim_m3_2_W5U4AW +Xsky130_fd_sc_hvl__buf_8_1 sky130_fd_sc_hvl__inv_8_0/A vss vss vdd1v8 vdd1v8 porb_l ++ sky130_fd_sc_hvl__buf_8 +Xsky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 vss vdd3v3 m1_502_7653# vdd3v3 vdd3v3 vdd3v3 ++ m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# ++ m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653# sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ +Xsky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0 m1_721_6815# vss m1_721_6815# vss m1_721_6815# ++ m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# vss ++ vss m1_721_6815# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_TGFUGS +Xsky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 li_2935_165# vss li_4479_165# li_4866_5813# ++ li_7182_5813# li_5251_165# li_1778_5813# li_9111_165# li_3322_5813# li_9498_5813# ++ li_7567_165# li_7954_5813# li_9883_165# li_8726_5813# li_7182_5813# li_619_165# ++ li_5638_5813# li_1006_5813# li_2163_165# li_5638_5813# li_619_165# li_6795_165# ++ li_5251_165# li_3707_165# li_9498_5813# li_2163_165# li_4479_165# li_4866_5813# ++ vss li_4094_5813# li_2550_5813# li_2550_5813# li_4094_5813# li_8339_165# li_2935_165# ++ li_7954_5813# li_9883_165# vss li_6410_5813# li_8339_165# vss li_1778_5813# li_1006_5813# ++ vss li_6410_5813# li_6023_165# li_6795_165# li_3707_165# vdd3v3 li_1391_165# li_9111_165# ++ li_8726_5813# li_7567_165# li_6023_165# vss li_1391_165# li_3322_5813# sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 +Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 vss m1_2993_7658# vdd3v3 m1_721_6815# m1_185_6573# ++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB +Xsky130_fd_sc_hvl__schmittbuf_1_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss vss vdd3v3 ++ vdd3v3 sky130_fd_sc_hvl__inv_8_0/A sky130_fd_sc_hvl__schmittbuf_1 +Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 vss m1_2756_6573# vdd3v3 m1_4283_8081# m1_2756_6573# ++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB +Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 vss m1_6249_7690# vdd3v3 sky130_fd_sc_hvl__schmittbuf_1_0/A ++ m1_2756_6573# sky130_fd_pr__pfet_g5v0d10v5_3YBPVB +Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 vss m1_185_6573# vdd3v3 m1_502_7653# m1_185_6573# ++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB +Xsky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0 vss vdd3v3 vdd3v3 m1_6249_7690# m1_4283_8081# ++ sky130_fd_pr__pfet_g5v0d10v5_YUHPXE +Xsky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 m1_721_6815# vss m1_2756_6573# vss sky130_fd_pr__nfet_g5v0d10v5_PKVMTM +Xsky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_1 li_2550_5813# vss m1_185_6573# vss sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC +Xsky130_fd_pr__cap_mim_m3_1_WRT4AW_0 vss vss sky130_fd_sc_hvl__schmittbuf_1_0/A sky130_fd_pr__cap_mim_m3_1_WRT4AW +Xsky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0 vss vdd3v3 m1_4283_8081# vdd3v3 m1_4283_8081# ++ vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 m1_4283_8081# m1_4283_8081# ++ m1_4283_8081# m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YEUEBV +Xsky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 vss vdd3v3 vdd3v3 m1_2993_7658# m1_502_7653# ++ sky130_fd_pr__pfet_g5v0d10v5_YUHPBG +Xsky130_fd_sc_hvl__inv_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vss vdd1v8 vdd1v8 por_l ++ sky130_fd_sc_hvl__inv_8 +Xsky130_fd_sc_hvl__buf_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vss vdd3v3 vdd3v3 porb_h ++ sky130_fd_sc_hvl__buf_8 +.ends +
diff --git a/netgen/run_lvs_por.sh b/netgen/run_lvs_por.sh new file mode 100755 index 0000000..1d1ad9f --- /dev/null +++ b/netgen/run_lvs_por.sh
@@ -0,0 +1,24 @@ +#!/bin/sh +# SPDX-FileCopyrightText: 2020 Efabless Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# SPDX-License-Identifier: Apache-2.0 + +#-------------------------------------------------------------------------------- +# Run LVS on the example_por layout +# +# NOTE: By specifying the testbench for the schematic-side netlist, the proper +# includes used by the testbench simulation are picked up. Otherwise, the LVS +# itself compares just the simple_por subcircuit from the testbench. +#-------------------------------------------------------------------------------- +netgen -batch lvs "example_por.spice example_por" "../xschem/example_por_tb.spice example_por" /usr/share/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl comp.out
diff --git a/xschem/.spiceinit b/xschem/.spiceinit new file mode 100644 index 0000000..e6a73aa --- /dev/null +++ b/xschem/.spiceinit
@@ -0,0 +1,5 @@ +* ngspice initialization for sky130 +* assert BSIM compatibility mode with "nf" vs. "W" +set ngbehavior=hsa +* "nomodcheck" speeds up loading time +set ng_nomodcheck
diff --git a/xschem/current_test.spice b/xschem/current_test.spice new file mode 100644 index 0000000..1df1edd --- /dev/null +++ b/xschem/current_test.spice
@@ -0,0 +1,86 @@ +*--------------------------------------------------------------------------- +* SPDX-FileCopyrightText: 2020 Efabless Corporation +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* https://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +* SPDX-License-Identifier: Apache-2.0 +*--------------------------------------------------------------------------- +* Simple POR circuit for Caravel current mirror test +*------------------------------------------------------------------- + +.param mc_switch=0 +.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt + +* Note: 20 resistors of length 25um connected in series +Xres1 vdda vin vss sky130_fd_pr__res_xhigh_po_0p69 l=500 +Xres2 vin vss vss sky130_fd_pr__res_xhigh_po_0p69 l=149 + +* voltage sources at 0V for measuring current in each branch + +Vm1 vssm1 vss DC=0 +Vm2 vdda vddm2 DC=0 +Vm3 vdda vddm3 DC=0 +Vm4 vssm4 vss DC=0 +Vm5 vssm5 vss DC=0 +Vm6 vdda vddm6 DC=0 +Vm7 vdda vddm7 DC=0 + +* D G S B +Xm1 casc1 vin vssm1 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=1 +Xc1 mir1 casc1 casc1 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1 +Xm2 mir1 mir1 vddm2 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=8 +Xm3 mir2 mir1 vddm3 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1 +Xc2 casc2 casc1 mir2 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1 +Xm4 casc2 casc2 vssm4 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=7 +Xm5 casc3 casc2 vssm5 vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 m=1 +Xc3 mir3 casc3 casc3 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1 +Xm6 mir3 mir3 vddm6 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=7 +Xm7 mir4 mir3 vddm7 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1 +Xc4 vcap casc3 mir4 vdda sky130_fd_pr__pfet_g5v0d10v5 w=2 l=0.8 m=1 + +* Check branch currents in each mirror branch. +* 1st branch should be 240nA +* 2nd branch should be 30nA +* 3rd branch should be 4.3nA +* 4th branch should be 612pA +* +* Result: vin sits at 0.7590 (close to 0.7575 target) +* I(Vm1/2) = 202.80 nA +* I(Vm3/4) = 26.10 nA (should be /8) actually /7.77 +* I(Vm5/6) = 4.58 nA (should be /7) actually /5.70 +* I(Vm7) = 0.67 nA (should be /7) actually /6.80 + +*---------------------------- +* Testbench circuit +*---------------------------- +Vpwr vdda vss DC=3.3 +Rgnd vss 0 0.01 +Rload vcap vss 1MEG +*---------------------------- + +*---------------------------- +* Testbench control +*---------------------------- +.control +op +print V(vin) +print I(Vm1) +print I(Vm2) +print I(Vm3) +print I(Vm4) +print I(Vm5) +print I(Vm6) +print I(Vm7) +.endc + +.end +
diff --git a/xschem/example_por.sch b/xschem/example_por.sch new file mode 100644 index 0000000..0dfa849 --- /dev/null +++ b/xschem/example_por.sch
@@ -0,0 +1,300 @@ +v {xschem version=2.9.9 file_version=1.2 } +G {} +K {} +V {} +S {} +E {} +L 4 3370 -60 3390 -60 {} +L 4 3390 -60 3390 80 {} +L 4 3370 80 3390 80 {} +T {Current step-down mirror} 2270 140 0 0 0.4 0.4 {} +T {Charge accumulator} 2650 140 0 0 0.4 0.4 {} +T {Voltage divider} 1860 140 0 0 0.4 0.4 {} +T {Schmitt trigger} 2930 -200 0 0 0.4 0.4 {} +T {150 / 650 * 3.3V = 0.76V} 1860 180 0 0 0.4 0.4 {} +T {step down 8x} 2130 -430 0 0 0.4 0.4 {} +T {step down 7x} 2330 80 0 0 0.4 0.4 {} +T {step down 7x} 2520 -430 0 0 0.4 0.4 {} +T {1.8V domain outputs} 3400 0 0 0 0.4 0.4 {} +T {3.3V domain output} 3410 -140 0 0 0.4 0.4 {} +T {392 : 1} 2270 180 0 0 0.4 0.4 {} +T {Simple power-on-reset circuit +calibrated to 500us nominal delay +no temperature compensation} 1950 -570 0 0 0.6 0.6 {} +N 2500 -310 2500 -270 { lab=#net2} +N 2500 -210 2500 -100 { lab=#net3} +N 2300 -40 2300 20 { lab=#net4} +N 2300 80 2300 110 { lab=vss} +N 2360 110 2500 110 { lab=vss} +N 2500 80 2500 110 { lab=vss} +N 2400 50 2460 50 { lab=#net4} +N 2360 -400 2500 -400 { lab=vdd3v3} +N 2500 -400 2500 -370 { lab=vdd3v3} +N 2500 -400 2790 -400 { lab=vdd3v3} +N 2300 -10 2370 -10 { lab=#net4} +N 2370 -10 2370 50 { lab=#net4} +N 2500 -290 2570 -290 { lab=#net2} +N 2570 -340 2570 -290 { lab=#net2} +N 2540 -340 2570 -340 { lab=#net2} +N 2500 -190 2570 -190 { lab=#net3} +N 2570 -240 2570 -190 { lab=#net3} +N 2540 -240 2570 -240 { lab=#net3} +N 2240 110 2360 110 { lab=vss} +N 2500 110 2630 110 { lab=vss} +N 2500 50 2630 50 { lab=vss} +N 2110 110 2240 110 { lab=vss} +N 1930 60 1930 110 { lab=vss} +N 1930 -160 1930 0 { lab=#net6} +N 1930 -400 1930 -220 { lab=vdd3v3} +N 2110 -400 2360 -400 { lab=vdd3v3} +N 1880 -190 1910 -190 { lab=vss} +N 1880 -190 1880 110 { lab=vss} +N 1880 110 1930 110 { lab=vss} +N 1880 30 1910 30 { lab=vss} +N 2300 -310 2300 -270 { lab=#net7} +N 2300 -400 2300 -370 { lab=vdd3v3} +N 2300 -140 2300 -100 { lab=#net5} +N 2340 50 2400 50 { lab=#net4} +N 2300 -210 2300 -140 { lab=#net5} +N 2100 80 2100 110 { lab=vss} +N 2100 110 2110 110 { lab=vss} +N 2050 50 2060 50 { lab=#net6} +N 2050 -70 2050 50 { lab=#net6} +N 1930 -70 2050 -70 { lab=#net6} +N 1930 -400 2110 -400 { lab=vdd3v3} +N 2100 -400 2100 -370 { lab=vdd3v3} +N 2100 -310 2100 -270 { lab=#net8} +N 2100 -210 2100 20 { lab=#net9} +N 2100 50 2300 50 { lab=vss} +N 2200 50 2200 110 { lab=vss} +N 2140 -240 2260 -240 { lab=#net9} +N 2140 -340 2260 -340 { lab=#net8} +N 2100 -290 2180 -290 { lab=#net8} +N 2180 -340 2180 -290 { lab=#net8} +N 2100 -180 2180 -180 { lab=#net9} +N 2180 -240 2180 -180 { lab=#net9} +N 1930 -240 2100 -240 { lab=vdd3v3} +N 1930 -340 2100 -340 { lab=vdd3v3} +N 1930 110 2100 110 { lab=vss} +N 2300 -240 2500 -240 { lab=vdd3v3} +N 2300 -340 2500 -340 { lab=vdd3v3} +N 2400 -340 2400 -240 { lab=vdd3v3} +N 2400 -400 2400 -340 { lab=vdd3v3} +N 2570 -240 2650 -240 { lab=#net3} +N 2570 -340 2650 -340 { lab=#net2} +N 2690 -400 2690 -370 { lab=vdd3v3} +N 2790 -400 2790 -340 { lab=vdd3v3} +N 2690 -340 2790 -340 { lab=vdd3v3} +N 2690 -240 2790 -240 { lab=vdd3v3} +N 2790 -340 2790 -240 { lab=vdd3v3} +N 2690 -310 2690 -270 { lab=#net10} +N 2690 -210 2690 -150 { lab=#net11} +N 1830 30 1880 30 { lab=vss} +N 1810 60 1810 110 { lab=vss} +N 1810 110 1880 110 { lab=vss} +N 1810 -70 1810 0 { lab=vss} +N 1810 -70 1880 -70 { lab=vss} +N 2690 -150 2690 -70 { lab=#net11} +N 2820 -130 2820 -70 { lab=#net11} +N 2690 -130 2820 -130 { lab=#net11} +N 2630 110 2820 110 { lab=vss} +N 2820 -10 2820 110 { lab=vss} +N 2690 -10 2690 110 { lab=vss} +N 2820 -130 2980 -130 { lab=#net11} +N 3060 -130 3130 -130 { lab=#net12} +N 3090 -130 3090 60 { lab=#net12} +N 3090 60 3130 60 { lab=#net12} +N 3090 -40 3130 -40 { lab=#net12} +N 3210 -130 3300 -130 { lab=porb_h} +N 3210 -40 3300 -40 { lab=porb_l} +N 3210 60 3300 60 { lab=por_l} +N 2790 -400 2840 -400 { lab=vdd3v3} +N 2820 110 2870 110 { lab=vss} +N 2630 50 2690 50 {} +N 2300 -100 2300 -40 {} +N 2500 -100 2500 -30 {} +N 2500 -30 2500 20 {} +C {sky130_fd_pr/cap_mim_m3_1.sym} 2690 -40 0 0 {name=C1 model=cap_mim_m3_1 W=30 L=30 MF=1 spiceprefix=X} +C {sky130_fd_pr/cap_mim_m3_2.sym} 2820 -40 0 0 {name=C2 model=cap_mim_m3_2 W=30 L=30 MF=1 spiceprefix=X} +C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2280 -240 0 0 {name=M1 +L=0.8 +W=2 +nf=1 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=pfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2480 50 0 0 {name=M2 +L=0.8 +W=2 +nf=1 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=nfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1930 -190 0 0 {name=R1 +W=0.69 +L=500 +model=res_xhigh_po_0p69 +spiceprefix=X +mult=1} +C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2280 -340 0 0 {name=M4 +L=0.8 +W=2 +nf=1 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=pfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2320 50 0 1 {name=M5 +L=0.8 +W=14 +nf=7 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=nfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1930 30 0 0 {name=R2 +W=0.69 +L=150 +model=res_xhigh_po_0p69 +spiceprefix=X +mult=1} +C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2520 -240 0 1 {name=M7 +L=0.8 +W=2 +nf=1 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=pfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2520 -340 0 1 {name=M8 +L=0.8 +W=14 +nf=7 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=pfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/nfet_g5v0d10v5.sym} 2080 50 0 0 {name=M10 +L=0.8 +W=2 +nf=1 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=nfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2120 -240 0 1 {name=M9 +L=0.8 +W=2 +nf=1 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=pfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2120 -340 0 1 {name=M11 +L=0.8 +W=16 +nf=8 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=pfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2670 -340 0 0 {name=M12 +L=0.8 +W=2 +nf=1 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=pfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/pfet_g5v0d10v5.sym} 2670 -240 0 0 {name=M13 +L=0.8 +W=2 +nf=1 +mult=1 +ad="'int((nf+1)/2) * W/nf * 0.29'" +pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" +as="'int((nf+2)/2) * W/nf * 0.29'" +ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" +nrd="'0.29 / W'" nrs="'0.29 / W'" +sa=0 sb=0 sd=0 +model=pfet_g5v0d10v5 +spiceprefix=X +} +C {sky130_fd_pr/res_xhigh_po_0p69.sym} 1810 30 0 1 {name=R3 +W=0.69 +L=25 +model=res_xhigh_po_0p69 +spiceprefix=X +mult=2} +C {sky130_stdcells/buf_8.sym} 3170 -130 0 0 {name=x2 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__ } +C {sky130_stdcells/buf_8.sym} 3170 -40 0 0 {name=x3 VGND=vss VNB=vss VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ } +C {sky130_stdcells/inv_8.sym} 3170 60 0 0 {name=x4 VGND=vss VNB=vss VPB=vdd1v8 VPWR=vdd1v8 prefix=sky130_fd_sc_hvl__ } +C {sky130_stdcells/buf_1.sym} 3020 -130 0 0 {name=x5 VGND=vss VNB=vss VPB=vdd3v3 VPWR=vdd3v3 prefix=sky130_fd_sc_hvl__schmitt } +C {devices/iopin.sym} 2840 -400 0 0 {name=p1 lab=vdd3v3} +C {devices/iopin.sym} 2870 110 0 0 {name=p2 lab=vss} +C {devices/opin.sym} 3300 -130 0 0 {name=p3 lab=porb_h} +C {devices/opin.sym} 3300 -40 0 0 {name=p4 lab=porb_l} +C {devices/opin.sym} 3300 60 0 0 {name=p5 lab=por_l} +C {devices/iopin.sym} 2840 -330 0 0 {name=p6 lab=vdd1v8}
diff --git a/xschem/example_por.sym b/xschem/example_por.sym new file mode 100644 index 0000000..e3875f5 --- /dev/null +++ b/xschem/example_por.sym
@@ -0,0 +1,33 @@ +v {xschem version=2.9.9 file_version=1.2 } +G {} +K {type=subcircuit +format="@name @pinlist @symname" +template="name=x1" +} +V {} +S {} +E {} +L 4 -130 -60 130 -60 {} +L 4 -130 60 130 60 {} +L 4 -130 -60 -130 60 {} +L 4 130 -60 130 60 {} +L 4 130 -30 150 -30 {} +L 4 130 0 150 0 {} +L 4 130 30 150 30 {} +L 7 -30 -80 -30 -60 {} +L 7 30 -80 30 -60 {} +L 7 0 60 0 80 {} +B 5 -32.5 -82.5 -27.5 -77.5 {name=vdd3v3 dir=inout } +B 5 27.5 -82.5 32.5 -77.5 {name=vdd1v8 dir=inout } +B 5 147.5 -32.5 152.5 -27.5 {name=porb_h dir=out } +B 5 147.5 -2.5 152.5 2.5 {name=porb_l dir=out } +B 5 147.5 27.5 152.5 32.5 {name=por_l dir=out } +B 5 -2.5 77.5 2.5 82.5 {name=vss dir=inout } +T {@symname} -47.5 -6 0 0 0.3 0.3 {} +T {@name} -25 18 0 0 0.2 0.2 {} +T {vdd3v3} -15 -54 0 1 0.2 0.2 {} +T {vdd1v8} 55 -54 0 1 0.2 0.2 {} +T {porb_h} 125 -34 0 1 0.2 0.2 {} +T {porb_l} 125 -4 0 1 0.2 0.2 {} +T {por_l} 125 26 0 1 0.2 0.2 {} +T {vss} 5 46 0 1 0.2 0.2 {}
diff --git a/xschem/example_por_tb.sch b/xschem/example_por_tb.sch new file mode 100644 index 0000000..2d9ba11 --- /dev/null +++ b/xschem/example_por_tb.sch
@@ -0,0 +1,36 @@ +v {xschem version=2.9.9 file_version=1.2 } +G {} +K {} +V {} +S {} +E {} +T {Testbench for simple POR} -350 -240 0 0 0.6 0.6 {} +N -280 60 -10 60 { lab=GND} +N -330 0 -330 60 { lab=GND} +N -210 -0 -210 60 { lab=GND} +N -210 -100 -210 -60 { lab=vdd3v3} +N -210 -110 -210 -100 { lab=vdd3v3} +N -210 -110 -40 -110 { lab=vdd3v3} +N -40 -110 -40 -100 { lab=vdd3v3} +N -330 -130 -330 -60 { lab=vdd1v8} +N -280 -130 20 -130 { lab=vdd1v8} +N 20 -130 20 -100 { lab=vdd1v8} +N 140 -50 180 -50 { lab=porb_h} +N 140 -20 180 -20 { lab=porb_l} +N 140 10 180 10 { lab=por_l} +N -220 -110 -210 -110 { lab=vdd3v3} +N -290 -130 -280 -130 { lab=vdd1v8} +N -330 -130 -290 -130 { lab=vdd1v8} +N -350 -130 -330 -130 { lab=vdd1v8} +N -330 60 -280 60 { lab=GND} +C {example_por.sym} -10 -20 0 0 {name=x1} +C {devices/gnd.sym} -100 60 0 0 {name=l1 lab=GND} +C {devices/vsource.sym} -210 -30 0 0 {name=V1 value="PWL(0.0 0 100u 0 5m 3.3)"} +C {devices/vsource.sym} -330 -30 0 0 {name=V2 value="PWL(0.0 0 300u 0 5.3m 1.8)"} +C {devices/opin.sym} -220 -110 0 1 {name=p1 lab=vdd3v3} +C {devices/opin.sym} -350 -130 0 1 {name=p2 lab=vdd1v8} +C {devices/opin.sym} 180 -50 0 0 {name=p3 lab=porb_h} +C {devices/opin.sym} 180 -20 0 0 {name=p4 lab=porb_l} +C {devices/opin.sym} 180 10 0 0 {name=p5 lab=por_l} +C {devices/code.sym} 140 -270 0 0 {name=s1 only_toplevel=false value=".lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt"} +C {devices/code.sym} 260 -270 0 0 {name=s2 only_toplevel=false value=".include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice"}
diff --git a/xschem/example_por_tb.spice b/xschem/example_por_tb.spice new file mode 100644 index 0000000..5af67cf --- /dev/null +++ b/xschem/example_por_tb.spice
@@ -0,0 +1,82 @@ +**.subckt example_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l +.param mc_switch=0 +*.opin vdd3v3 +*.opin vdd1v8 +*.opin porb_h +*.opin porb_l +*.opin por_l +x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND example_por +V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3) +V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8) +**** begin user architecture code + +.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt + + +.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice + +.control +tran 1u 20m +plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l) +.endc + +**** end user architecture code +**.ends + +* expanding symbol: example_por.sym # of pins=6 +* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym +* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch +.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss +*.iopin vdd3v3 +*.iopin vss +*.opin porb_h +*.opin porb_l +*.opin por_l +*.iopin vdd1v8 +XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1 +XC2 net9 vss sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1 +XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' ++ sa=0 sb=0 sd=0 mult=1 m=1 +XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=500 mult=1 m=1 +XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' ++ sa=0 sb=0 sd=0 mult=1 m=1 +XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=150 mult=1 m=1 +XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' ++ sa=0 sb=0 sd=0 mult=1 m=1 +XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=25 mult=2 m=2 +x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8 +x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8 +x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8 +x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1 +.ends + +.GLOBAL GND +** flattened .save nodes +.end
diff --git a/xschem/example_por_tb.spice.orig b/xschem/example_por_tb.spice.orig new file mode 100644 index 0000000..069c74d --- /dev/null +++ b/xschem/example_por_tb.spice.orig
@@ -0,0 +1,88 @@ +**.subckt example_por_tb vdd3v3 vdd1v8 porb_h porb_l por_l +.param mc_switch=0 +*.opin vdd3v3 +*.opin vdd1v8 +*.opin porb_h +*.opin porb_l +*.opin por_l +x1 vdd3v3 vdd1v8 porb_h porb_l por_l GND example_por +V1 vdd3v3 GND PWL(0.0 0 100u 0 5m 3.3) +V2 vdd1v8 GND PWL(0.0 0 300u 0 5.3m 1.8) +**** begin user architecture code + +.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt + + +.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice + +.control +tran 1u 20m +plot V(vdd3v3) V(vdd1v8) V(porb_h) V(porb_l) V(por_l) +.endc + +**** end user architecture code +**.ends + +* expanding symbol: example_por.sym # of pins=6 +* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym +* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch +.subckt example_por vdd3v3 vdd1v8 porb_h porb_l por_l vss +*.iopin vdd3v3 +*.iopin vss +*.opin porb_h +*.opin porb_l +*.opin por_l +*.iopin vdd1v8 +XC1 net11 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1 +XC2 net11 vss sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1 +XM1 net5 net9 net7 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM2 net1 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' ++ sa=0 sb=0 sd=0 mult=1 m=1 +XR1 net6 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=500 mult=1 m=1 +XM3 net3 net5 net1 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' ++ sa=0 sb=0 sd=0 mult=1 m=1 +XM4 net7 net8 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM5 net4 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' ++ sa=0 sb=0 sd=0 mult=1 m=1 +XM6 net5 net5 net4 vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' ++ sa=0 sb=0 sd=0 mult=1 m=1 +XR2 vss net6 vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=150 mult=1 m=1 +XM7 net3 net3 net2 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM8 net2 net2 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM10 net9 net6 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29' ++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' ++ sa=0 sb=0 sd=0 mult=1 m=1 +XM9 net9 net9 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM11 net8 net8 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM12 net10 net2 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XM13 net11 net3 net10 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' ++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' ++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 +XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 W=0.69 L=25 mult=2 m=2 +x2 net12 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8 +x3 net12 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8 +x4 net12 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8 +x5 net11 vss vss vdd3v3 vdd3v3 net12 sky130_fd_sc_hvl__schmittbuf_1 +.ends + +.GLOBAL GND +** flattened .save nodes +.end
diff --git a/xschem/test.data b/xschem/test.data new file mode 100644 index 0000000..c9cde37 --- /dev/null +++ b/xschem/test.data
@@ -0,0 +1,101 @@ + 7.00000000e-01 -8.93059159e-08 7.00000000e-01 7.00000000e-01 + 7.01000000e-01 -9.08452852e-08 7.01000000e-01 7.01000000e-01 + 7.02000000e-01 -9.24385447e-08 7.02000000e-01 7.02000000e-01 + 7.03000000e-01 -9.40459956e-08 7.03000000e-01 7.03000000e-01 + 7.04000000e-01 -9.56814959e-08 7.04000000e-01 7.04000000e-01 + 7.05000000e-01 -9.73455368e-08 7.05000000e-01 7.05000000e-01 + 7.06000000e-01 -9.90386085e-08 7.06000000e-01 7.06000000e-01 + 7.07000000e-01 -1.00761227e-07 7.07000000e-01 7.07000000e-01 + 7.08000000e-01 -1.02513882e-07 7.08000000e-01 7.08000000e-01 + 7.09000000e-01 -1.04297110e-07 7.09000000e-01 7.09000000e-01 + 7.10000000e-01 -1.06111443e-07 7.10000000e-01 7.10000000e-01 + 7.11000000e-01 -1.07957415e-07 7.11000000e-01 7.11000000e-01 + 7.12000000e-01 -1.09835552e-07 7.12000000e-01 7.12000000e-01 + 7.13000000e-01 -1.11746436e-07 7.13000000e-01 7.13000000e-01 + 7.14000000e-01 -1.13690603e-07 7.14000000e-01 7.14000000e-01 + 7.15000000e-01 -1.15668634e-07 7.15000000e-01 7.15000000e-01 + 7.16000000e-01 -1.17681129e-07 7.16000000e-01 7.16000000e-01 + 7.17000000e-01 -1.19728657e-07 7.17000000e-01 7.17000000e-01 + 7.18000000e-01 -1.21811839e-07 7.18000000e-01 7.18000000e-01 + 7.19000000e-01 -1.23931259e-07 7.19000000e-01 7.19000000e-01 + 7.20000000e-01 -1.26087554e-07 7.20000000e-01 7.20000000e-01 + 7.21000000e-01 -1.28281358e-07 7.21000000e-01 7.21000000e-01 + 7.22000000e-01 -1.30513286e-07 7.22000000e-01 7.22000000e-01 + 7.23000000e-01 -1.32784003e-07 7.23000000e-01 7.23000000e-01 + 7.24000000e-01 -1.35094165e-07 7.24000000e-01 7.24000000e-01 + 7.25000000e-01 -1.37444453e-07 7.25000000e-01 7.25000000e-01 + 7.26000000e-01 -1.39835535e-07 7.26000000e-01 7.26000000e-01 + 7.27000000e-01 -1.42268085e-07 7.27000000e-01 7.27000000e-01 + 7.28000000e-01 -1.44742842e-07 7.28000000e-01 7.28000000e-01 + 7.29000000e-01 -1.47260486e-07 7.29000000e-01 7.29000000e-01 + 7.30000000e-01 -1.49821761e-07 7.30000000e-01 7.30000000e-01 + 7.31000000e-01 -1.52427364e-07 7.31000000e-01 7.31000000e-01 + 7.32000000e-01 -1.55078077e-07 7.32000000e-01 7.32000000e-01 + 7.33000000e-01 -1.57774611e-07 7.33000000e-01 7.33000000e-01 + 7.34000000e-01 -1.60517775e-07 7.34000000e-01 7.34000000e-01 + 7.35000000e-01 -1.63308337e-07 7.35000000e-01 7.35000000e-01 + 7.36000000e-01 -1.66147061e-07 7.36000000e-01 7.36000000e-01 + 7.37000000e-01 -1.69034765e-07 7.37000000e-01 7.37000000e-01 + 7.38000000e-01 -1.71972266e-07 7.38000000e-01 7.38000000e-01 + 7.39000000e-01 -1.74960357e-07 7.39000000e-01 7.39000000e-01 + 7.40000000e-01 -1.77999888e-07 7.40000000e-01 7.40000000e-01 + 7.41000000e-01 -1.81091703e-07 7.41000000e-01 7.41000000e-01 + 7.42000000e-01 -1.84236664e-07 7.42000000e-01 7.42000000e-01 + 7.43000000e-01 -1.87435634e-07 7.43000000e-01 7.43000000e-01 + 7.44000000e-01 -1.90689493e-07 7.44000000e-01 7.44000000e-01 + 7.45000000e-01 -1.93999127e-07 7.45000000e-01 7.45000000e-01 + 7.46000000e-01 -1.97365464e-07 7.46000000e-01 7.46000000e-01 + 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diff --git a/xschem/threshold_test_tb.spice b/xschem/threshold_test_tb.spice new file mode 100644 index 0000000..849a0f5 --- /dev/null +++ b/xschem/threshold_test_tb.spice
@@ -0,0 +1,47 @@ +*--------------------------------------------------------------------------- +* SPDX-FileCopyrightText: 2020 Efabless Corporation +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* https://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +* +* SPDX-License-Identifier: Apache-2.0 +*--------------------------------------------------------------------------- +* Threshold test for POR circuit +* Determine gate voltage at which the HV NFET draws 240nA nominal +* +* Result: 0.7575V +*------------------------------------------------------------------- + +.param mc_switch=0 +.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt + +*---------------------------- +* Testbench circuit +*---------------------------- +Rtest vdda mir1 1MEG +Xm1 mir1 vin vss vss sky130_fd_pr__nfet_g5v0d10v5 w=2 l=0.8 + +Vgate vin vss DC=0 +Vpwr vdda vss DC=3.3 +Rgnd vss 0 0.1 + +*---------------------------- +* Testbench control +*---------------------------- +.control +* DC sweep from 0.7 to 0.8V +dc Vgate 0.7 0.8 0.001 +wrdata test.data Vpwr#branch vin + +.endc + +.end +
diff --git a/xschem/xschemrc b/xschem/xschemrc new file mode 100644 index 0000000..98fead5 --- /dev/null +++ b/xschem/xschemrc
@@ -0,0 +1,273 @@ +#### xschemrc system configuration file + +#### values may be overridden by user's ~/.xschem/xschemrc configuration file +#### or by project-local ./xschemrc + +########################################################################### +#### XSCHEM INSTALLATION DIRECTORY: XSCHEM_SHAREDIR +########################################################################### +#### Normally there is no reason to set this variable if using standard +#### installation. Location of files is set at compile time but may be overridden +#### with following line: +# set XSCHEM_SHAREDIR $env(HOME)/share/xschem + +########################################################################### +#### XSCHEM SYSTEM-WIDE DESIGN LIBRARY PATHS: XSCHEM_LIBRARY_PATH +########################################################################### +#### If unset xschem starts with XSCHEM_LIBRARY_PATH set to the default, typically: +# /home/schippes/.xschem/xschem_library +# /home/schippes/share/xschem/xschem_library/devices +# /home/schippes/share/doc/xschem/examples +# /home/schippes/share/doc/xschem/ngspice +# /home/schippes/share/doc/xschem/logic +# /home/schippes/share/doc/xschem/xschem_simulator +# /home/schippes/share/doc/xschem/binto7seg +# /home/schippes/share/doc/xschem/pcb +# /home/schippes/share/doc/xschem/rom8k + +#### Flush any previous definition +set XSCHEM_LIBRARY_PATH {} +#### include devices/*.sym +append XSCHEM_LIBRARY_PATH ${XSCHEM_SHAREDIR}/xschem_library +#### include skywater libraries. Here i use [pwd]. This works if i start xschem from here. +append XSCHEM_LIBRARY_PATH :$env(PWD) +append XSCHEM_LIBRARY_PATH :/usr/share/pdk/sky130A/libs.tech/xschem +#### add ~/.xschem/xschem_library (USER_CONF_DIR is normally ~/.xschem) +append XSCHEM_LIBRARY_PATH :$USER_CONF_DIR/xschem_library + +########################################################################### +#### SET CUSTOM COLORS FOR XSCHEM LIBRARIES MATCHING CERTAIN PATTERNS +########################################################################### +#### each line contains a dircolor(pattern) followed by a color +#### color can be an ordinary name (grey, brown, blue) or a hex code {#77aaff} +#### hex code must be enclosed in braces +array unset dircolor +set dircolor(sky130_fd_pr$) blue +set dircolor(sky130_tests$) blue +set dircolor(xschem_sky130$) blue +set dircolor(xschem_library$) red +set dircolor(devices$) red + +########################################################################### +#### WINDOW TO OPEN ON STARTUP: XSCHEM_START_WINDOW +########################################################################### +#### Start without a design if no filename given on command line: +#### To avoid absolute paths, use a path that is relative to one of the +#### XSCHEM_LIBRARY_PATH directories. Default: empty +set XSCHEM_START_WINDOW {sky130_tests/top.sch} + +########################################################################### +#### DIRECTORY WHERE SIMULATIONS, NETLIST AND SIMULATOR OUTPUTS ARE PLACED +########################################################################### +#### If unset $USER_CONF_DIR/simulations is assumed (normally ~/.xschem/simulations) +# set netlist_dir $env(HOME)/.xschem/simulations +set netlist_dir . + +########################################################################### +#### CHANGE DEFAULT [] WITH SOME OTHER CHARACTERS FOR BUSSED SIGNALS +#### IN SPICE NETLISTS (EXAMPLE: DATA[7] --> DATA<7>) +########################################################################### +#### default: empty (use xschem default, [ ]) +# set bus_replacement_char {<>} +#### for XSPICE: replace square brackets as the are used for XSPICE vector nodes. +# set bus_replacement_char {__} + +########################################################################### +#### SOME DEFAULT BEHAVIOR +########################################################################### +#### Allowed values: spice, verilog, vhdl, tedax, default: spice +# set netlist_type spice + +#### Some netlisting options (these are the defaults) +# set hspice_netlist 1 +# set verilog_2001 1 + +#### to use a fixed line with set change_lw to 0 and set some value to line_width +#### these are the defaults +# set line_width 0 +# set change_lw 1 + +#### allow color postscript and svg exports. Default: 1, enable color +# set color_ps 1 + +#### initial size of xschem window you can specify also position with (wxh+x+y) +#### this is the default: +# set initial_geometry {900x600} + +#### if set to 0, when zooming out allow the viewport do drift toward the mouse position, +#### allowing to move away by zooming / unzooming with mouse wheel +#### default setting: 0 +# set unzoom_nodrift 0 + +#### if set to 1 allow to place multiple components with same name. +#### Warning: this is normally not allowed in any simulation netlist. +#### default: 0, do not allow place multiple elements with same name (refdes) +# set disable_unique_names 0 + +#### if set to 1 continue drawing lines / wires after click +#### default: 0 +# set persistent_command 1 + +#### if set to 1 automatically join/trim wires while editing +#### this may slow down on rally big designs. Can be disabled via menu +#### default: 0 +# set autotrim_wires 0 + +#### set widget scaling (mainly for font display), this is useful on 4K displays +#### default: unset (tk uses its default) > 1.0 ==> bigger +# set tk_scaling 1.7 + +#### disable some symbol layers. Default: none, all layers are visible. +# set enable_layer(5) 0 ;# example to disable pin red boxes + +#### enable to scale grid point size as done with lines at close zoom, default: 0 +# set big_grid_points 0 + +########################################################################### +#### EXPORT FORMAT TRANSLATORS, PNG AND PDF +########################################################################### +#### command to translate xpm to png; (assumes command takes source +#### and dest file as arguments, example: gm convert plot.xpm plot.png) +#### default: {gm convert} +# set to_png {gm convert} + +#### command to translate ps to pdf; (assumes command takes source +#### and dest file as arguments, example: ps2pdf plot.ps plot.pdf) +#### default: ps2pdf +# set to_pdf ps2pdf + +########################################################################### +#### CUSTOM GRID / SNAP VALUE SETTINGS +########################################################################### +#### Warning: changing these values will likely break compatibility +#### with existing symbol libraries. Defaults: grid 20, snap 10. +# set grid 20 +# set snap 10 + +########################################################################### +#### CUSTOM COLORS MAY BE DEFINED HERE +########################################################################### +# set cadlayers 22 +# set light_colors { +# "#ffffff" "#0044ee" "#aaaaaa" "#222222" "#229900" +# "#bb2200" "#00ccee" "#ff0000" "#888800" "#00aaaa" +# "#880088" "#00ff00" "#0000cc" "#666600" "#557755" +# "#aa2222" "#7ccc40" "#00ffcc" "#ce0097" "#d2d46b" +# "#ef6158" "#fdb200" } + +# set dark_colors { +# "#000000" "#00ccee" "#3f3f3f" "#cccccc" "#88dd00" +# "#bb2200" "#00ccee" "#ff0000" "#ffff00" "#ffffff" +# "#ff00ff" "#00ff00" "#0000cc" "#aaaa00" "#aaccaa" +# "#ff7777" "#bfff81" "#00ffcc" "#ce0097" "#d2d46b" +# "#ef6158" "#fdb200" } + +########################################################################### +#### CAIRO STUFF +########################################################################### +#### Scale all fonts by this number +# set cairo_font_scale 1.0 + +#### default for following two is 0.85 (xscale) and 0.88 (yscale) to +#### match cairo font spacing +# set nocairo_font_xscale 1.0 +#### set nocairo_font_yscale 1.0 + +#### Scale line spacing by this number +# set cairo_font_line_spacing 1.0 + +#### Specify a font +# set cairo_font_name {Sans-Serif} +# set svg_font_name {Sans-Serif} + +#### Lift up text by some zoom-corrected pixels for +#### better compatibility wrt no cairo version. +#### Useful values in the range [-1, 3] +# set cairo_vert_correct 0 +# set nocairo_vert_correct 0 + +########################################################################### +#### KEYBINDINGS +########################################################################### +#### General format for specifying a replacement for a keybind +#### Replace Ctrl-d with Escape (so you wont kill the program) +# set replace_key(Control-d) Escape + +#### swap w and W keybinds; Always specify Shift for capital letters +# set replace_key(Shift-W) w +# set replace_key(w) Shift-W + +########################################################################### +#### TERMINAL +########################################################################### +#### default for linux: xterm +# set terminal {xterm -geometry 100x35 -fn 9x15 -bg black -fg white -cr white -ms white } +#### lxterminal is not OK since it will not inherit env vars: +#### In order to reduce memory usage and increase the performance, all instances +#### of the lxterminal are sharing a single process. LXTerminal is part of LXDE + +########################################################################### +#### EDITOR +########################################################################### +#### editor must not detach from launching shell (-f mandatory for gvim) +#### default for linux: gvim -f +# set editor {gvim -f -geometry 90x28} +# set editor { xterm -geometry 100x40 -e nano } +# set editor { xterm -geometry 100x40 -e pico } + +#### For Windows +# set editor {notepad.exe} + +########################################################################### +#### SHOW ERC INFO WINDOW (erc errors, warnings etc) +########################################################################### +#### default: 0 (can be enabled by menu) +# set show_infowindow 0 + +########################################################################### +#### CONFIGURE COMPUTER FARM JOB REDIRECTORS FOR SIMULATIONS +########################################################################### +#### RTDA NC +# set computerfarm {nc run -Il} +#### LSF BSUB +# set computerfarm {bsub -Is} + +########################################################################### +#### TCP CONNECTION WITH GAW +########################################################################### +#### set gaw address for socket connection: {host port} +#### default: set to localhost, port 2020 +# set gaw_tcp_address {localhost 2020} + +########################################################################### +#### XSCHEM LISTEN TO TCP PORT +########################################################################### +#### set xschem listening port; default: not enabled +# set xschem_listen_port 2021 + +########################################################################### +#### UTILE SPICE STIMULI DESCRIPTION LANGUAGE AND TRANSLATOR +########################################################################### +#### default paths are set as shown here: +# set utile_gui_path ${XSCHEM_SHAREDIR}/utile/utile3 +# set utile_cmd_path ${XSCHEM_SHAREDIR}/utile/utile + +########################################################################### +#### TCL FILES TO LOAD AT STARTUP +########################################################################### +#### list of tcl files to preload. +# lappend tcl_files ${XSCHEM_SHAREDIR}/change_index.tcl +lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl +lappend tcl_files /usr/share/pdk/sky130A/libs.tech/xschem/scripts/sky130_models.tcl +########################################################################### +#### XSCHEM TOOLBAR +########################################################################### +#### default: not enabled. +# set toolbar_visible 1 +# set toolbar_horiz 1 + +########################################################################### +#### SKYWATER PDK SPECIFIC VARIABLES +########################################################################### +set SKYWATER_MODELS ~/skywater-pdk/libraries/sky130_fd_pr_ngspice/latest +set SKYWATER_STDCELLS ~/skywater-pdk/libraries/sky130_fd_sc_hd/latest