Add files via upload
diff --git a/xschem/Buffer_VCRO.sch b/xschem/Buffer_VCRO.sch
new file mode 100644
index 0000000..a95763d
--- /dev/null
+++ b/xschem/Buffer_VCRO.sch
@@ -0,0 +1,171 @@
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+}
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+ad="'int((nf+1)/2) * W/nf * 0.29'"
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+nrd="'0.29 / W'" nrs="'0.29 / W'"
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+spiceprefix=X
+}
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+}
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+spiceprefix=X
+}
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+}
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+}
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+}
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+}
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diff --git a/xschem/Buffer_VCRO.sym b/xschem/Buffer_VCRO.sym
new file mode 100644
index 0000000..bbf1fe2
--- /dev/null
+++ b/xschem/Buffer_VCRO.sym
@@ -0,0 +1,27 @@
+v {xschem version=3.0.0 file_version=1.2 }
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+template="name=x1"
+}
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diff --git a/xschem/Final_5_NSO.sch b/xschem/Final_5_NSO.sch
new file mode 100644
index 0000000..935e2b9
--- /dev/null
+++ b/xschem/Final_5_NSO.sch
@@ -0,0 +1,988 @@
+v {xschem version=3.0.0 file_version=1.2 }
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+N -50 60 -50 260 { lab=VN}
+N 240 60 240 260 { lab=VN}
+N 520 60 520 260 { lab=VN}
+N 830 60 830 260 { lab=VN}
+N 1120 60 1120 260 { lab=VN}
+N 420 210 420 340 { lab=VN}
+N -50 -60 -50 0 { lab=#net1}
+N 240 -70 240 0 { lab=#net4}
+N 520 -70 520 0 { lab=#net7}
+N 830 -70 830 0 { lab=#net10}
+N 1120 -70 1120 0 { lab=#net13}
+N -100 30 -90 30 { lab=#net7}
+N -100 -30 -100 30 { lab=#net7}
+N -260 -30 -100 -30 { lab=#net7}
+N -260 -100 -260 -30 { lab=#net7}
+N 180 30 200 30 { lab=#net10}
+N 180 -30 180 30 { lab=#net10}
+N 470 30 480 30 { lab=#net13}
+N 470 -110 470 30 { lab=#net13}
+N 780 30 790 30 { lab=#net1}
+N 780 -120 780 30 { lab=#net1}
+N 580 -120 780 -120 { lab=#net1}
+N 1070 30 1080 30 { lab=#net4}
+N 1070 -130 1070 30 { lab=#net4}
+N 890 -130 1070 -130 { lab=#net4}
+N -50 30 -40 30 { lab=VN}
+N -40 30 -40 170 { lab=VN}
+N -40 170 30 170 { lab=VN}
+N 240 30 250 30 { lab=VN}
+N 250 30 250 170 { lab=VN}
+N 250 170 320 170 { lab=VN}
+N 520 30 530 30 { lab=VN}
+N 530 30 530 170 { lab=VN}
+N 530 170 610 170 { lab=VN}
+N 840 170 910 170 { lab=VN}
+N 840 -70 850 -70 { lab=#net10}
+N 850 30 940 30 { lab=#net10}
+N 830 30 840 30 { lab=VN}
+N 840 30 840 170 { lab=VN}
+N 1130 250 1190 250 { lab=#net13}
+N 1130 -70 1190 -70 { lab=#net13}
+N 1120 30 1130 30 { lab=VN}
+N 1130 30 1130 170 { lab=VN}
+N 1060 170 1130 170 { lab=VN}
+N -50 260 420 260 { lab=VN}
+N 420 260 520 260 { lab=VN}
+N 520 260 830 260 { lab=VN}
+N 830 260 1120 260 { lab=VN}
+N -400 230 -400 250 { lab=VN}
+N -400 250 -400 260 { lab=VN}
+N -400 260 -50 260 { lab=VN}
+N 1270 -40 1270 260 { lab=VN}
+N 1120 260 1270 260 { lab=VN}
+N 1270 150 1320 150 { lab=VN}
+N 420 340 420 360 { lab=VN}
+N 400 360 420 360 { lab=VN}
+N -570 -120 -480 -120 { lab=VB}
+N 1070 740 1100 740 { lab=OUT_2}
+N 440 -70 440 330 { lab=#net7}
+N -160 -60 -160 550 { lab=#net1}
+N 160 -20 160 400 { lab=#net4}
+N 100 -20 150 -20 { lab=#net4}
+N 750 760 770 760 { lab=#net10}
+N -160 550 -160 580 { lab=#net1}
+N -180 580 -160 580 { lab=#net1}
+N -500 600 -480 600 { lab=OUT_5}
+N 160 400 160 450 { lab=#net4}
+N 150 -20 160 -20 { lab=#net4}
+N 160 450 160 680 { lab=#net4}
+N 140 680 160 680 { lab=#net4}
+N -180 700 -160 700 { lab=OUT_4}
+N 440 330 440 680 { lab=#net7}
+N 440 680 440 770 { lab=#net7}
+N 410 770 440 770 { lab=#net7}
+N 90 790 110 790 { lab=OUT_3}
+N -180 600 -160 600 { lab=#net19}
+N -180 530 -180 560 { lab=VN}
+N -210 530 -180 530 { lab=VN}
+N 140 630 140 660 { lab=VN}
+N 110 630 140 630 { lab=VN}
+N 140 700 170 700 { lab=VP}
+N 410 730 410 750 { lab=VN}
+N 410 720 410 730 { lab=VN}
+N 370 720 410 720 { lab=VN}
+N 410 790 450 790 { lab=VP}
+N 740 -70 740 760 { lab=#net10}
+N 740 760 750 760 { lab=#net10}
+N 770 710 770 740 { lab=VP}
+N 770 710 810 710 { lab=VP}
+N 730 780 770 780 { lab=VN}
+N 1190 250 1190 490 { lab=#net13}
+N 1190 490 1220 490 { lab=#net13}
+N 1520 470 1540 470 { lab=OUT_1}
+N 1220 440 1220 470 { lab=VP}
+N 1220 440 1270 440 { lab=VP}
+N 1180 510 1220 510 { lab=VN}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} -200 30 0 0 {name=M1
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} -200 -170 0 0 {name=M2
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} -270 -260 0 0 {name=M3
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} -80 -260 0 1 {name=M4
+L=0.15
+W=40
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} -270 130 0 0 {name=M5
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} -80 130 0 1 {name=M6
+L=0.15
+W=55
+nf=11
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 80 30 0 0 {name=M7
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 80 -170 0 0 {name=M8
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 10 -260 0 0 {name=M9
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 200 -260 0 1 {name=M10
+L=0.15
+W=40
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 10 130 0 0 {name=M11
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 200 130 0 1 {name=M12
+L=0.15
+W=55
+nf=11
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 370 30 0 0 {name=M13
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 370 -170 0 0 {name=M14
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 300 -260 0 0 {name=M15
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 490 -260 0 1 {name=M16
+L=0.15
+W=40
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 300 130 0 0 {name=M17
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 490 130 0 1 {name=M18
+L=0.15
+W=55
+nf=11
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 660 30 0 0 {name=M19
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 660 -170 0 0 {name=M20
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 590 -260 0 0 {name=M21
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 780 -260 0 1 {name=M22
+L=0.15
+W=40
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 590 130 0 0 {name=M23
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 780 130 0 1 {name=M24
+L=0.15
+W=55
+nf=11
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 960 30 0 0 {name=M25
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 960 -170 0 0 {name=M26
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 890 -260 0 0 {name=M27
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 1080 -260 0 1 {name=M28
+L=0.15
+W=40
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 890 130 0 0 {name=M29
+L=0.15
+W=60
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 1080 130 0 1 {name=M30
+L=0.15
+W=55
+nf=11
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} -420 -300 0 0 {name=M31
+L=0.20
+W=40
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} -420 170 0 0 {name=M32
+L=0.20
+W=40
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 1300 100 0 0 {name=M34
+L=0.15
+W=6
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/pfet_01v8.sym} 1300 -100 0 0 {name=M35
+L=0.15
+W=20
+nf=4
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} -420 -120 0 0 {name=M33
+L=0.15
+W=40
+nf=8
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} -70 30 0 0 {name=M36
+L=0.5
+W=1
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 220 30 0 0 {name=M37
+L=0.5
+W=1
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 500 30 0 0 {name=M38
+L=0.5
+W=1
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 810 30 0 0 {name=M39
+L=0.5
+W=1
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 1100 30 0 0 {name=M40
+L=0.5
+W=1
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {ipin.sym} -570 -350 0 0 {name=p1 lab=VP}
+C {ipin.sym} 1240 140 3 0 {name=p2 lab=VCT}
+C {opin.sym} 1540 470 0 0 {name=p3 lab=OUT_1}
+C {ipin.sym} 400 360 0 0 {name=p4 lab=VN}
+C {ipin.sym} -570 -120 0 0 {name=p5 lab=VB}
+C {opin.sym} -180 700 2 0 {name=p6 lab=OUT_4}
+C {opin.sym} 90 790 2 0 {name=p7 lab=OUT_3}
+C {opin.sym} 1100 740 0 0 {name=p8 lab=OUT_2}
+C {opin.sym} -500 600 2 0 {name=p9 lab=OUT_5}
+C {Anchit_Tests/Buffer_VCRO.sym} 920 760 0 0 {name=x1}
+C {Anchit_Tests/Buffer_VCRO.sym} -330 580 2 0 {name=x2}
+C {Anchit_Tests/Buffer_VCRO.sym} -10 680 2 0 {name=x3}
+C {Anchit_Tests/Buffer_VCRO.sym} 260 770 2 0 {name=x4}
+C {Anchit_Tests/Buffer_VCRO.sym} 1370 490 0 0 {name=x5}
+C {lab_pin.sym} 1180 510 0 0 {name=l1 sig_type=std_logic lab=VN}
+C {lab_pin.sym} 730 780 0 0 {name=l2 sig_type=std_logic lab=VN}
+C {lab_pin.sym} 370 720 0 0 {name=l3 sig_type=std_logic lab=VN}
+C {lab_pin.sym} 110 630 0 0 {name=l4 sig_type=std_logic lab=VN}
+C {lab_pin.sym} -210 530 0 0 {name=l5 sig_type=std_logic lab=VN}
+C {lab_pin.sym} 810 710 2 0 {name=l6 sig_type=std_logic lab=VP}
+C {lab_pin.sym} 1270 440 2 0 {name=l7 sig_type=std_logic lab=VP}
+C {lab_pin.sym} 450 790 2 0 {name=l8 sig_type=std_logic lab=VP}
+C {lab_pin.sym} 170 700 2 0 {name=l9 sig_type=std_logic lab=VP}
+C {lab_pin.sym} -160 600 2 0 {name=l10 sig_type=std_logic lab=VP}
diff --git a/xschem/Final_5_NSO.sym b/xschem/Final_5_NSO.sym
new file mode 100644
index 0000000..8d03f1c
--- /dev/null
+++ b/xschem/Final_5_NSO.sym
@@ -0,0 +1,42 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -130 -50 130 -50 {}
+L 4 -130 50 130 50 {}
+L 4 -130 -50 -130 50 {}
+L 4 130 -50 130 50 {}
+L 4 130 -40 150 -40 {}
+L 4 -150 -40 -130 -40 {}
+L 4 130 -20 150 -20 {}
+L 4 -150 -20 -130 -20 {}
+L 4 130 0 150 0 {}
+L 4 -150 0 -130 0 {}
+L 4 -150 20 -130 20 {}
+L 4 130 20 150 20 {}
+L 4 130 40 150 40 {}
+B 5 147.5 -42.5 152.5 -37.5 {name=OUT_2 dir=out }
+B 5 -152.5 -42.5 -147.5 -37.5 {name=VP dir=in }
+B 5 147.5 -22.5 152.5 -17.5 {name=OUT_1 dir=out }
+B 5 -152.5 -22.5 -147.5 -17.5 {name=VB dir=in }
+B 5 147.5 -2.5 152.5 2.5 {name=OUT_3 dir=out }
+B 5 -152.5 -2.5 -147.5 2.5 {name=VCT dir=in }
+B 5 -152.5 17.5 -147.5 22.5 {name=VN dir=in }
+B 5 147.5 17.5 152.5 22.5 {name=OUT_4 dir=out }
+B 5 147.5 37.5 152.5 42.5 {name=OUT_5 dir=out }
+T {@symname} -67.5 -6 0 0 0.3 0.3 {}
+T {@name} 135 -62 0 0 0.2 0.2 {}
+T {OUT_2} 125 -44 0 1 0.2 0.2 {}
+T {VP} -125 -44 0 0 0.2 0.2 {}
+T {OUT_1} 125 -24 0 1 0.2 0.2 {}
+T {VB} -125 -24 0 0 0.2 0.2 {}
+T {OUT_3} 125 -4 0 1 0.2 0.2 {}
+T {VCT} -125 -4 0 0 0.2 0.2 {}
+T {VN} -125 16 0 0 0.2 0.2 {}
+T {OUT_4} 125 16 0 1 0.2 0.2 {}
+T {OUT_5} 125 36 0 1 0.2 0.2 {}
diff --git a/xschem/esd.sch b/xschem/esd.sch
new file mode 100644
index 0000000..f39f9e4
--- /dev/null
+++ b/xschem/esd.sch
@@ -0,0 +1,116 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 4300 200 4300 270 { lab=in}
+N 4340 300 4350 300 { lab=GND}
+N 4340 170 4350 170 { lab=VDD}
+N 4350 130 4350 170 { lab=VDD}
+N 4300 130 4350 130 { lab=VDD}
+N 4300 130 4300 140 { lab=VDD}
+N 4300 110 4300 130 { lab=VDD}
+N 4300 330 4300 350 { lab=GND}
+N 4490 200 4490 270 { lab=out}
+N 4530 300 4540 300 { lab=GND}
+N 4530 170 4540 170 { lab=VDD}
+N 4540 130 4540 170 { lab=VDD}
+N 4490 130 4540 130 { lab=VDD}
+N 4490 130 4490 140 { lab=VDD}
+N 4490 110 4490 130 { lab=VDD}
+N 4490 330 4490 350 { lab=GND}
+N 4490 230 4530 230 { lab=out}
+N 4350 300 4350 340 { lab=GND}
+N 4300 340 4350 340 { lab=GND}
+N 4540 300 4540 340 { lab=GND}
+N 4490 340 4540 340 { lab=GND}
+N 4300 230 4340 230 { lab=in}
+N 4430 230 4490 230 { lab=out}
+N 4340 230 4350 230 { lab=in}
+N 4410 230 4430 230 { lab=out}
+N 4530 230 4570 230 { lab=out}
+N 4230 230 4300 230 { lab=in}
+N 4480 300 4490 300 { lab=GND}
+N 4480 300 4480 330 { lab=GND}
+N 4480 330 4490 330 { lab=GND}
+N 4290 300 4300 300 { lab=GND}
+N 4290 300 4290 330 { lab=GND}
+N 4290 330 4300 330 { lab=GND}
+N 4480 170 4490 170 { lab=VDD}
+N 4480 140 4480 170 { lab=VDD}
+N 4480 140 4490 140 { lab=VDD}
+N 4290 170 4300 170 { lab=VDD}
+N 4290 140 4290 170 { lab=VDD}
+N 4290 140 4300 140 { lab=VDD}
+C {/home/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8_lvt.sym} 4320 300 0 1 {name=M9
+L=1
+W=5
+nf=1
+mult=20
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8_lvt
+spiceprefix=X
+}
+C {/home/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8_lvt.sym} 4320 170 0 1 {name=M10
+L=1
+W=5
+nf=1
+mult=20
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8_lvt
+spiceprefix=X
+}
+C {lab_pin.sym} 4300 110 0 0 {name=l13 sig_type=std_logic lab=VDD}
+C {lab_pin.sym} 4300 350 0 0 {name=l14 sig_type=std_logic lab=GND}
+C {/home/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/nfet_01v8_lvt.sym} 4510 300 0 1 {name=M11
+L=1
+W=5
+nf=1
+mult=20
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8_lvt
+spiceprefix=X
+}
+C {/home/open_pdks/sky130/sky130A/libs.tech/xschem/sky130_fd_pr/pfet_01v8_lvt.sym} 4510 170 0 1 {name=M12
+L=1
+W=5
+nf=1
+mult=20
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8_lvt
+spiceprefix=X
+}
+C {lab_pin.sym} 4490 110 0 0 {name=l15 sig_type=std_logic lab=VDD}
+C {lab_pin.sym} 4490 350 0 0 {name=l1 sig_type=std_logic lab=GND}
+C {xschem_sky130/sky130_fd_pr/res_high_po.sym} 4380 230 3 0 {name=R1
+W=2.85
+L=1.3
+model=res_high_po
+spiceprefix=X
+mult=1}
+C {iopin.sym} 4230 230 2 0 {name=p1 lab=in}
+C {iopin.sym} 4570 230 0 0 {name=p2 lab=out}
+C {iopin.sym} 4130 120 2 0 {name=p3 lab=VDD}
+C {iopin.sym} 4130 150 2 0 {name=p4 lab=GND}
+C {lab_pin.sym} 4380 250 0 0 {name=l2 sig_type=std_logic lab=GND}
diff --git a/xschem/esd.sym b/xschem/esd.sym
new file mode 100644
index 0000000..a1072b4
--- /dev/null
+++ b/xschem/esd.sym
@@ -0,0 +1,27 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -90 -40 -90 40 {}
+L 4 110 -40 110 40 {}
+L 4 -90 -40 110 -40 {}
+L 4 -90 40 110 40 {}
+L 7 0 -60 0 -40 {}
+L 7 0 40 0 60 {}
+L 7 110 0 130 0 {}
+L 7 -110 0 -90 0 {}
+B 5 -2.5 -62.5 2.5 -57.5 {name=VDD dir=inout }
+B 5 -2.5 57.5 2.5 62.5 {name=GND dir=inout }
+B 5 127.5 -2.5 132.5 2.5 {name=out dir=inout }
+B 5 -112.5 -2.5 -107.5 2.5 {name=in dir=inout }
+T {@symname} -1.5 -6 0 0 0.3 0.3 {}
+T {@name} 115 -42 0 0 0.2 0.2 {}
+T {VDD} 5 -34 0 1 0.2 0.2 {}
+T {GND} 5 26 0 1 0.2 0.2 {}
+T {out} 105 -4 0 1 0.2 0.2 {}
+T {in} -75 -4 0 1 0.2 0.2 {}
diff --git a/xschem/user_analog_project_tb.sch b/xschem/user_analog_project_tb.sch
new file mode 100644
index 0000000..63ba477
--- /dev/null
+++ b/xschem/user_analog_project_tb.sch
@@ -0,0 +1,155 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 250 150 490 150 { lab=io_analog[10:0]}
+N 250 -150 350 -150 { lab=#net1}
+N 250 -130 350 -130 { lab=#net2}
+N 250 -110 350 -110 { lab=GND}
+N 250 -90 350 -90 { lab=#net3}
+N 250 -70 350 -70 { lab=#net4}
+N 250 -50 350 -50 { lab=#net5}
+N 250 -30 350 -30 { lab=#net6}
+N 250 -10 350 -10 { lab=#net7}
+N 250 10 350 10 { lab=#net8}
+N 250 30 350 30 { lab=#net9}
+N 250 50 350 50 { lab=#net10}
+N 250 70 350 70 { lab=#net11}
+N 250 90 350 90 { lab=#net12}
+N 250 110 350 110 { lab=#net13}
+N 250 130 350 130 { lab=#net14}
+N 940 280 940 300 { lab=io_analog[1]}
+N 350 -70 430 -70 { lab=#net4}
+N 520 0 520 20 { lab=GND}
+N 1010 360 1010 380 { lab=GND}
+N 940 360 940 380 { lab=GND}
+N 350 -110 360 -110 { lab=GND}
+N 360 -110 360 -100 { lab=GND}
+N -80 -150 -50 -150 { lab=#net15}
+N -80 -130 -50 -130 { lab=#net16}
+N -80 -110 -50 -110 { lab=#net17}
+N -80 -90 -50 -90 { lab=#net18}
+N -80 -70 -50 -70 { lab=#net19}
+N -80 -50 -50 -50 { lab=#net20}
+N -80 -30 -50 -30 { lab=#net21}
+N -80 -10 -50 -10 { lab=#net22}
+N -80 10 -50 10 { lab=#net23}
+N -80 30 -50 30 { lab=#net24}
+N -80 50 -50 50 { lab=#net25}
+N -80 70 -50 70 { lab=#net26}
+N -80 90 -50 90 { lab=#net27}
+N 250 210 290 210 { lab=#net28}
+N 1010 160 1010 300 { lab=io_analog[2]}
+N 250 170 350 170 { lab=io_clamp_high[2:0]}
+N 250 190 350 190 { lab=io_clamp_low[2:0]}
+N 290 210 350 210 { lab=#net28}
+N 490 100 490 320 { lab=io_analog[10:0]}
+N 1010 110 1010 160 { lab=io_analog[2]}
+N 500 110 850 110 { lab=io_analog[2]}
+N 500 140 770 140 { lab=io_analog[1]}
+N 940 140 940 280 { lab=io_analog[1]}
+N 430 -70 470 -70 { lab=#net4}
+N 470 -70 520 -70 { lab=#net4}
+N 520 -70 520 -60 { lab=#net4}
+N 500 170 710 170 { lab=io_analog[7]}
+N 500 200 750 200 { lab=io_analog[6]}
+N 500 230 700 230 { lab=io_analog[5]}
+N 500 260 650 260 { lab=io_analog[4]}
+N 500 290 600 290 { lab=io_analog[3]}
+N 600 350 600 360 { lab=GND}
+N 650 320 650 330 { lab=GND}
+N 700 290 700 300 { lab=GND}
+N 750 260 750 270 { lab=GND}
+N 800 230 800 240 { lab=GND}
+N 770 140 940 140 { lab=io_analog[1]}
+N 850 110 1010 110 { lab=io_analog[2]}
+N 710 170 800 170 { lab=io_analog[7]}
+N 350 170 470 170 { lab=io_clamp_high[2:0]}
+N 350 190 360 190 { lab=io_clamp_low[2:0]}
+N 360 190 460 190 { lab=io_clamp_low[2:0]}
+C {vsource.sym} 1010 330 0 0 {name=V1 value=1.8}
+C {vsource.sym} 940 330 0 0 {name=V2 value=vct}
+C {vsource.sym} 520 -30 0 0 {name=V3 value=1.8}
+C {gnd.sym} 940 380 0 0 {name=l6 lab=GND}
+C {gnd.sym} 1010 380 0 0 {name=l7 lab=GND}
+C {gnd.sym} 520 20 0 0 {name=l8 lab=GND}
+C {gnd.sym} 360 -100 0 0 {name=l9 lab=GND}
+C {code.sym} 790 -500 0 0 {name=TT_MODELS
+only_toplevel=false
+format="tcleval( @value )"
+value=".lib /home/open_pdks/sky130/sky130A/libs.tech/ngspice/sky130.lib.spice tt"
+spice_ignore=false}
+C {code_shown.sym} 990 -840 0 0 {name=SPICE
+only_toplevel=false
+value=".include /root/user_analog_project_wrapper_flat.spice
+.param vct=1.8
+.IC v(io_analog[2])=1.8
+.func frequency(t) \{1/t\}
+.control
+ let v_start=0.1
+ let v_end=1.9
+ let v_step=0.2
+ let length=((v_end-v_start)/v_step)+1
+ let v_temp=v_start
+ let freq=unitvec(length)
+ let v_control=unitvec(length)
+ let v_map=unitvec(length)
+ let count=0
+ while v_temp le v_end
+ alter V2 v_temp
+ let v_control[count]=v_temp
+ tran 1000p 40n UIC
+ meas tran tdiff TRIG v(io_analog[3]) VAL=0.6 RISE=37 TARG v(io_analog[3]) VAL=0.6 RISE=38
+ let freq[count]=frequency(tdiff)
+ let v_temp=v_temp+v_step
+ let count=count+1
+ echo after while loop "%loop"
+ end
+ write user_analog_project_tb.raw
+ plot freq vs v_control
+ plot v(\\"io_analog[3]\\") v(\\"io_analog[4]\\") v(\\"io_analog[5]\\") v(\\"io_analog[6]\\") v(\\"io_analog[7]\\")
+.endc
+.save all"}
+C {Anchit_Tests/user_analog_project_wrapper.sym} 100 30 0 0 {name=x2}
+C {lab_pin.sym} 290 150 2 0 {name=l13 sig_type=std_logic lab=io_analog[10:0]}
+C {bus_connect.sym} 490 120 1 1 {name=l14 lab=io_analog[2]}
+C {bus_connect.sym} 490 150 1 1 {name=l1 lab=io_analog[1]}
+C {bus_connect.sym} 490 180 1 1 {name=l2 lab=io_analog[7]}
+C {bus_connect.sym} 490 210 1 1 {name=l3 lab=io_analog[6]}
+C {bus_connect.sym} 490 240 1 1 {name=l4 lab=io_analog[5]}
+C {bus_connect.sym} 490 270 1 1 {name=l5 lab=io_analog[4]}
+C {bus_connect.sym} 490 300 1 1 {name=l10 lab=io_analog[3]}
+C {capa.sym} 800 200 0 0 {name=C1
+m=1
+value=0.5p
+footprint=1206
+device="ceramic capacitor"}
+C {capa.sym} 750 230 0 0 {name=C2
+m=1
+value=0.5p
+footprint=1206
+device="ceramic capacitor"}
+C {capa.sym} 700 260 0 0 {name=C3
+m=1
+value=0.5p
+footprint=1206
+device="ceramic capacitor"}
+C {capa.sym} 650 290 0 0 {name=C4
+m=1
+value=0.5p
+footprint=1206
+device="ceramic capacitor"}
+C {capa.sym} 600 320 0 0 {name=C5
+m=1
+value=0.5p
+footprint=1206
+device="ceramic capacitor"}
+C {gnd.sym} 800 240 0 0 {name=l11 lab=GND}
+C {gnd.sym} 750 270 0 0 {name=l12 lab=GND}
+C {gnd.sym} 700 300 0 0 {name=l15 lab=GND}
+C {gnd.sym} 650 330 0 0 {name=l16 lab=GND}
+C {gnd.sym} 600 360 0 0 {name=l17 lab=GND}
+C {lab_pin.sym} 290 170 2 0 {name=l19 sig_type=std_logic lab=io_clamp_high[2:0]}
+C {lab_pin.sym} 290 190 2 0 {name=l20 sig_type=std_logic lab=io_clamp_low[2:0]}
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch
new file mode 100644
index 0000000..9ed3665
--- /dev/null
+++ b/xschem/user_analog_project_wrapper.sch
@@ -0,0 +1,105 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 4580 320 4610 320 { lab=vccd1}
+N 4580 380 4610 380 { lab=vssa1}
+N 4540 360 4610 360 { lab=#net1}
+N 4480 340 4610 340 { lab=#net2}
+N 4580 270 4580 320 { lab=vccd1}
+N 4480 360 4540 360 { lab=#net1}
+N 4910 60 4910 70 { lab=#net3}
+N 4580 250 4580 270 { lab=vccd1}
+N 4580 380 4580 400 { lab=vssa1}
+N 4580 400 4580 420 { lab=vssa1}
+N 4910 -110 5140 -110 { lab=#net3}
+N 5380 -110 5480 -110 { lab=io_analog[6]}
+N 4910 -110 4910 60 { lab=#net3}
+N 5380 60 5480 60 { lab=io_analog[7]}
+N 5380 230 5480 230 { lab=io_analog[5]}
+N 4910 70 4910 320 { lab=#net3}
+N 4950 60 5140 60 { lab=#net4}
+N 4950 60 4950 340 { lab=#net4}
+N 4910 340 4950 340 { lab=#net4}
+N 4990 230 5140 230 { lab=#net5}
+N 4990 230 4990 360 { lab=#net5}
+N 4910 360 4990 360 { lab=#net5}
+N 5380 400 5480 400 { lab=io_analog[4]}
+N 4990 400 5140 400 { lab=#net6}
+N 5380 570 5480 570 { lab=io_analog[3]}
+N 4990 570 5140 570 { lab=#net7}
+N 4910 380 4990 380 { lab=#net6}
+N 4990 380 4990 400 { lab=#net6}
+N 4910 400 4960 400 { lab=#net7}
+N 4960 400 4960 570 { lab=#net7}
+N 4960 570 4990 570 { lab=#net7}
+N 4420 340 4480 340 { lab=#net2}
+N 4010 340 4180 340 { lab=io_analog[2]}
+N 4480 360 4480 510 { lab=#net1}
+N 4420 510 4480 510 { lab=#net1}
+N 4010 510 4180 510 { lab=io_analog[1]}
+C {Anchit_Tests/Final_5_NSO.sym} 4760 360 0 0 {name=x3}
+C {iopin.sym} 3420 -310 0 0 {name=p1 lab=vdda1}
+C {iopin.sym} 3420 -280 0 0 {name=p2 lab=vdda2}
+C {iopin.sym} 3420 -250 0 0 {name=p3 lab=vssa1}
+C {iopin.sym} 3420 -220 0 0 {name=p4 lab=vssa2}
+C {iopin.sym} 3420 -190 0 0 {name=p5 lab=vccd1}
+C {iopin.sym} 3420 -160 0 0 {name=p6 lab=vccd2}
+C {iopin.sym} 3420 -130 0 0 {name=p7 lab=vssd1}
+C {iopin.sym} 3420 -100 0 0 {name=p8 lab=vssd2}
+C {ipin.sym} 3440 20 0 0 {name=p9 lab=wb_clk_i}
+C {ipin.sym} 3440 50 0 0 {name=p10 lab=wb_rst_i}
+C {ipin.sym} 3440 80 0 0 {name=p11 lab=wbs_stb_i}
+C {ipin.sym} 3440 110 0 0 {name=p12 lab=wbs_cyc_i}
+C {ipin.sym} 3440 140 0 0 {name=p13 lab=wbs_we_i}
+C {ipin.sym} 3440 170 0 0 {name=p14 lab=wbs_sel_i[3:0]}
+C {ipin.sym} 3440 200 0 0 {name=p15 lab=wbs_dat_i[31:0]}
+C {ipin.sym} 3440 230 0 0 {name=p16 lab=wbs_adr_i[31:0]}
+C {opin.sym} 3430 330 0 0 {name=p17 lab=wbs_ack_o}
+C {opin.sym} 3430 360 0 0 {name=p18 lab=wbs_dat_o[31:0]}
+C {opin.sym} 3430 480 0 0 {name=p19 lab=la_data_out[127:0]}
+C {ipin.sym} 3440 450 0 0 {name=p20 lab=la_data_in[127:0]}
+C {ipin.sym} 3440 510 0 0 {name=p21 lab=la_oenb[127:0]}
+C {ipin.sym} 3440 620 0 0 {name=p22 lab=io_in[26:0]}
+C {ipin.sym} 3440 650 0 0 {name=p23 lab=io_in_3v3[26:0]}
+C {opin.sym} 3430 680 0 0 {name=p24 lab=io_out[26:0]}
+C {opin.sym} 3430 710 0 0 {name=p25 lab=io_oeb[26:0]}
+C {iopin.sym} 3430 800 0 0 {name=p26 lab=gpio_analog[17:0]}
+C {iopin.sym} 3430 830 0 0 {name=p27 lab=gpio_noesd[17:0]}
+C {iopin.sym} 3430 860 0 0 {name=p28 lab=io_analog[10:0]}
+C {iopin.sym} 3430 890 0 0 {name=p29 lab=io_clamp_high[2:0]}
+C {iopin.sym} 3430 920 0 0 {name=p30 lab=io_clamp_low[2:0]}
+C {ipin.sym} 3440 1000 0 0 {name=p31 lab=user_clock2}
+C {opin.sym} 3430 1030 0 0 {name=p32 lab=user_irq[2:0]}
+C {lab_pin.sym} 4580 420 2 0 {name=l1 sig_type=std_logic lab=vssa1}
+C {lab_pin.sym} 4580 250 2 0 {name=l2 sig_type=std_logic lab=vccd1}
+C {lab_pin.sym} 5480 -110 2 0 {name=l32 sig_type=std_logic lab=io_analog[6]}
+C {Anchit_Tests/esd.sym} 5250 -110 0 0 {name=x1}
+C {lab_pin.sym} 5480 60 2 0 {name=l3 sig_type=std_logic lab=io_analog[7]}
+C {Anchit_Tests/esd.sym} 5250 60 0 0 {name=x2}
+C {lab_pin.sym} 5480 230 2 0 {name=l4 sig_type=std_logic lab=io_analog[5]}
+C {Anchit_Tests/esd.sym} 5250 230 0 0 {name=x4}
+C {lab_pin.sym} 5480 400 2 0 {name=l5 sig_type=std_logic lab=io_analog[4]}
+C {Anchit_Tests/esd.sym} 5250 400 0 0 {name=x5}
+C {lab_pin.sym} 5480 570 2 0 {name=l6 sig_type=std_logic lab=io_analog[3]}
+C {Anchit_Tests/esd.sym} 5250 570 0 0 {name=x6}
+C {Anchit_Tests/esd.sym} 4310 340 2 0 {name=x7}
+C {lab_pin.sym} 4310 400 2 0 {name=l7 sig_type=std_logic lab=vccd1}
+C {lab_pin.sym} 4310 280 2 0 {name=l8 sig_type=std_logic lab=vssa1}
+C {Anchit_Tests/esd.sym} 4310 510 2 0 {name=x8}
+C {lab_pin.sym} 4310 450 2 0 {name=l9 sig_type=std_logic lab=vssa1}
+C {lab_pin.sym} 4310 570 2 0 {name=l10 sig_type=std_logic lab=vccd1}
+C {lab_pin.sym} 5250 0 2 0 {name=l11 sig_type=std_logic lab=vccd1}
+C {lab_pin.sym} 5250 170 2 0 {name=l12 sig_type=std_logic lab=vccd1}
+C {lab_pin.sym} 5250 340 2 0 {name=l13 sig_type=std_logic lab=vccd1}
+C {lab_pin.sym} 5250 510 2 0 {name=l14 sig_type=std_logic lab=vccd1}
+C {lab_pin.sym} 5250 -170 2 0 {name=l15 sig_type=std_logic lab=vccd1}
+C {lab_pin.sym} 5250 630 2 0 {name=l16 sig_type=std_logic lab=vssa1}
+C {lab_pin.sym} 5250 460 2 0 {name=l17 sig_type=std_logic lab=vssa1}
+C {lab_pin.sym} 5250 290 2 0 {name=l18 sig_type=std_logic lab=vssa1}
+C {lab_pin.sym} 5250 120 2 0 {name=l19 sig_type=std_logic lab=vssa1}
+C {lab_pin.sym} 5250 -50 2 0 {name=l20 sig_type=std_logic lab=vssa1}
+C {lab_pin.sym} 4010 340 0 0 {name=l21 sig_type=std_logic lab=io_analog[2]}
+C {lab_pin.sym} 4010 510 0 0 {name=l22 sig_type=std_logic lab=io_analog[1]}
diff --git a/xschem/user_analog_project_wrapper.sym b/xschem/user_analog_project_wrapper.sym
new file mode 100644
index 0000000..9cb948a
--- /dev/null
+++ b/xschem/user_analog_project_wrapper.sym
@@ -0,0 +1,111 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {type=primative
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -130 -190 130 -190 {}
+L 4 -130 190 130 190 {}
+L 4 -130 -190 -130 190 {}
+L 4 130 -190 130 190 {}
+L 4 -150 -180 -130 -180 {}
+L 4 -150 -160 -130 -160 {}
+L 4 -150 -140 -130 -140 {}
+L 4 -150 -120 -130 -120 {}
+L 4 -150 -100 -130 -100 {}
+L 4 -150 -80 -130 -80 {}
+L 4 -150 -60 -130 -60 {}
+L 4 -150 -40 -130 -40 {}
+L 4 130 -20 150 -20 {}
+L 4 130 0 150 0 {}
+L 4 -150 -20 -130 -20 {}
+L 4 130 20 150 20 {}
+L 4 -150 0 -130 0 {}
+L 4 -150 20 -130 20 {}
+L 4 -150 40 -130 40 {}
+L 4 130 40 150 40 {}
+L 4 130 60 150 60 {}
+L 4 -150 60 -130 60 {}
+L 4 130 180 150 180 {}
+L 7 130 -180 150 -180 {}
+L 7 130 -160 150 -160 {}
+L 7 130 -140 150 -140 {}
+L 7 130 -120 150 -120 {}
+L 7 130 -100 150 -100 {}
+L 7 130 -80 150 -80 {}
+L 7 130 -60 150 -60 {}
+L 7 130 -40 150 -40 {}
+L 7 130 80 150 80 {}
+L 7 130 100 150 100 {}
+L 7 130 120 150 120 {}
+L 7 130 140 150 140 {}
+L 7 130 160 150 160 {}
+B 5 147.5 -182.5 152.5 -177.5 {name=vdda1 dir=inout }
+B 5 147.5 -162.5 152.5 -157.5 {name=vdda2 dir=inout }
+B 5 147.5 -142.5 152.5 -137.5 {name=vssa1 dir=inout }
+B 5 147.5 -122.5 152.5 -117.5 {name=vssa2 dir=inout }
+B 5 147.5 -102.5 152.5 -97.5 {name=vccd1 dir=inout }
+B 5 147.5 -82.5 152.5 -77.5 {name=vccd2 dir=inout }
+B 5 147.5 -62.5 152.5 -57.5 {name=vssd1 dir=inout }
+B 5 147.5 -42.5 152.5 -37.5 {name=vssd2 dir=inout }
+B 5 -152.5 -182.5 -147.5 -177.5 {name=wb_clk_i dir=in }
+B 5 -152.5 -162.5 -147.5 -157.5 {name=wb_rst_i dir=in }
+B 5 -152.5 -142.5 -147.5 -137.5 {name=wbs_stb_i dir=in }
+B 5 -152.5 -122.5 -147.5 -117.5 {name=wbs_cyc_i dir=in }
+B 5 -152.5 -102.5 -147.5 -97.5 {name=wbs_we_i dir=in }
+B 5 -152.5 -82.5 -147.5 -77.5 {name=wbs_sel_i[3:0] dir=in }
+B 5 -152.5 -62.5 -147.5 -57.5 {name=wbs_dat_i[31:0] dir=in }
+B 5 -152.5 -42.5 -147.5 -37.5 {name=wbs_adr_i[31:0] dir=in }
+B 5 147.5 -22.5 152.5 -17.5 {name=wbs_ack_o dir=out }
+B 5 147.5 -2.5 152.5 2.5 {name=wbs_dat_o[31:0] dir=out }
+B 5 -152.5 -22.5 -147.5 -17.5 {name=la_data_in[127:0] dir=in }
+B 5 147.5 17.5 152.5 22.5 {name=la_data_out[127:0] dir=out }
+B 5 -152.5 -2.5 -147.5 2.5 {name=la_oenb[127:0] dir=in }
+B 5 -152.5 17.5 -147.5 22.5 {name=io_in[26:0] dir=in }
+B 5 -152.5 37.5 -147.5 42.5 {name=io_in_3v3[26:0] dir=in }
+B 5 147.5 37.5 152.5 42.5 {name=io_out[26:0] dir=out }
+B 5 147.5 57.5 152.5 62.5 {name=io_oeb[26:0] dir=out }
+B 5 147.5 77.5 152.5 82.5 {name=gpio_analog[17:0] dir=inout }
+B 5 147.5 97.5 152.5 102.5 {name=gpio_noesd[17:0] dir=inout }
+B 5 147.5 117.5 152.5 122.5 {name=io_analog[10:0] dir=inout }
+B 5 147.5 137.5 152.5 142.5 {name=io_clamp_high[2:0] dir=inout }
+B 5 147.5 157.5 152.5 162.5 {name=io_clamp_low[2:0] dir=inout }
+B 5 -152.5 57.5 -147.5 62.5 {name=user_clock2 dir=in }
+B 5 147.5 177.5 152.5 182.5 {name=user_irq[2:0] dir=out }
+T {@symname} -119.5 114 0 0 0.3 0.3 {}
+T {@name} 135 -202 0 0 0.2 0.2 {}
+T {vdda1} 125 -184 0 1 0.2 0.2 {}
+T {vdda2} 125 -164 0 1 0.2 0.2 {}
+T {vssa1} 125 -144 0 1 0.2 0.2 {}
+T {vssa2} 125 -124 0 1 0.2 0.2 {}
+T {vccd1} 125 -104 0 1 0.2 0.2 {}
+T {vccd2} 125 -84 0 1 0.2 0.2 {}
+T {vssd1} 125 -64 0 1 0.2 0.2 {}
+T {vssd2} 125 -44 0 1 0.2 0.2 {}
+T {wb_clk_i} -125 -184 0 0 0.2 0.2 {}
+T {wb_rst_i} -125 -164 0 0 0.2 0.2 {}
+T {wbs_stb_i} -125 -144 0 0 0.2 0.2 {}
+T {wbs_cyc_i} -125 -124 0 0 0.2 0.2 {}
+T {wbs_we_i} -125 -104 0 0 0.2 0.2 {}
+T {wbs_sel_i[3:0]} -125 -84 0 0 0.2 0.2 {}
+T {wbs_dat_i[31:0]} -125 -64 0 0 0.2 0.2 {}
+T {wbs_adr_i[31:0]} -125 -44 0 0 0.2 0.2 {}
+T {wbs_ack_o} 125 -24 0 1 0.2 0.2 {}
+T {wbs_dat_o[31:0]} 125 -4 0 1 0.2 0.2 {}
+T {la_data_in[127:0]} -125 -24 0 0 0.2 0.2 {}
+T {la_data_out[127:0]} 125 16 0 1 0.2 0.2 {}
+T {la_oenb[127:0]} -125 -4 0 0 0.2 0.2 {}
+T {io_in[26:0]} -125 16 0 0 0.2 0.2 {}
+T {io_in_3v3[26:0]} -125 36 0 0 0.2 0.2 {}
+T {io_out[26:0]} 125 36 0 1 0.2 0.2 {}
+T {io_oeb[26:0]} 125 56 0 1 0.2 0.2 {}
+T {gpio_analog[17:0]} 125 76 0 1 0.2 0.2 {}
+T {gpio_noesd[17:0]} 125 96 0 1 0.2 0.2 {}
+T {io_analog[10:0]} 125 116 0 1 0.2 0.2 {}
+T {io_clamp_high[2:0]} 125 136 0 1 0.2 0.2 {}
+T {io_clamp_low[2:0]} 125 156 0 1 0.2 0.2 {}
+T {user_clock2} -125 56 0 0 0.2 0.2 {}
+T {user_irq[2:0]} 125 176 0 1 0.2 0.2 {}
diff --git a/xschem/xschemrc b/xschem/xschemrc
new file mode 100644
index 0000000..ca6e33e
--- /dev/null
+++ b/xschem/xschemrc
@@ -0,0 +1,296 @@
+#### xschemrc system configuration file
+
+#### values may be overridden by user's ~/.xschem/xschemrc configuration file
+#### or by project-local ./xschemrc
+
+###########################################################################
+#### XSCHEM INSTALLATION DIRECTORY: XSCHEM_SHAREDIR
+###########################################################################
+#### Normally there is no reason to set this variable if using standard
+#### installation. Location of files is set at compile time but may be overridden
+#### with following line:
+# set XSCHEM_SHAREDIR $env(HOME)/share/xschem
+
+###########################################################################
+#### XSCHEM SYSTEM-WIDE DESIGN LIBRARY PATHS: XSCHEM_LIBRARY_PATH
+###########################################################################
+#### If unset xschem starts with XSCHEM_LIBRARY_PATH set to the default, typically:
+# /home/schippes/.xschem/xschem_library
+# /home/schippes/share/xschem/xschem_library/devices
+# /home/schippes/share/doc/xschem/examples
+# /home/schippes/share/doc/xschem/ngspice
+# /home/schippes/share/doc/xschem/logic
+# /home/schippes/share/doc/xschem/xschem_simulator
+# /home/schippes/share/doc/xschem/binto7seg
+# /home/schippes/share/doc/xschem/pcb
+# /home/schippes/share/doc/xschem/rom8k
+
+#### Allow user environment to override the path to the PDK
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+ set PDKPATH "/usr/share/pdk/sky130A"
+}
+#### Flush any previous definition
+set XSCHEM_LIBRARY_PATH {}
+#### include devices/*.sym
+append XSCHEM_LIBRARY_PATH ${XSCHEM_SHAREDIR}/xschem_library
+#### include skywater libraries. Here i use [pwd]. This works if i start xschem from here.
+append XSCHEM_LIBRARY_PATH :$env(PWD)
+append XSCHEM_LIBRARY_PATH :$PDKPATH/libs.tech/xschem
+# append XSCHEM_LIBRARY_PATH :/mnt/sda7/home/schippes/pdks/sky130A/libs.tech/xschem
+#### add ~/.xschem/xschem_library (USER_CONF_DIR is normally ~/.xschem)
+append XSCHEM_LIBRARY_PATH :$USER_CONF_DIR/xschem_library
+
+###########################################################################
+#### SET CUSTOM COLORS FOR XSCHEM LIBRARIES MATCHING CERTAIN PATTERNS
+###########################################################################
+#### each line contains a dircolor(pattern) followed by a color
+#### color can be an ordinary name (grey, brown, blue) or a hex code {#77aaff}
+#### hex code must be enclosed in braces
+array unset dircolor
+set dircolor(sky130_fd_pr$) blue
+set dircolor(sky130_tests$) blue
+set dircolor(xschem_sky130$) blue
+set dircolor(xschem_library$) red
+set dircolor(devices$) red
+
+###########################################################################
+#### WINDOW TO OPEN ON STARTUP: XSCHEM_START_WINDOW
+###########################################################################
+#### Start without a design if no filename given on command line:
+#### To avoid absolute paths, use a path that is relative to one of the
+#### XSCHEM_LIBRARY_PATH directories. Default: empty
+set XSCHEM_START_WINDOW {sky130_tests/top.sch}
+
+###########################################################################
+#### DIRECTORY WHERE SIMULATIONS, NETLIST AND SIMULATOR OUTPUTS ARE PLACED
+###########################################################################
+#### If unset $USER_CONF_DIR/simulations is assumed (normally ~/.xschem/simulations)
+# set netlist_dir $env(HOME)/.xschem/simulations
+set netlist_dir .
+
+###########################################################################
+#### CHANGE DEFAULT [] WITH SOME OTHER CHARACTERS FOR BUSSED SIGNALS
+#### IN SPICE NETLISTS (EXAMPLE: DATA[7] --> DATA<7>)
+###########################################################################
+#### default: empty (use xschem default, [ ])
+# set bus_replacement_char {<>}
+#### for XSPICE: replace square brackets as the are used for XSPICE vector nodes.
+# set bus_replacement_char {__}
+
+###########################################################################
+#### SOME DEFAULT BEHAVIOR
+###########################################################################
+#### Allowed values: spice, verilog, vhdl, tedax, default: spice
+# set netlist_type spice
+
+#### Some netlisting options (these are the defaults)
+# set hspice_netlist 1
+# set verilog_2001 1
+
+#### to use a fixed line with set change_lw to 0 and set some value to line_width
+#### these are the defaults
+# set line_width 0
+# set change_lw 1
+
+#### allow color postscript and svg exports. Default: 1, enable color
+# set color_ps 1
+
+#### initial size of xschem window you can specify also position with (wxh+x+y)
+#### this is the default:
+# set initial_geometry {900x600}
+
+#### if set to 0, when zooming out allow the viewport do drift toward the mouse position,
+#### allowing to move away by zooming / unzooming with mouse wheel
+#### default setting: 0
+# set unzoom_nodrift 0
+
+#### if set to 1 allow to place multiple components with same name.
+#### Warning: this is normally not allowed in any simulation netlist.
+#### default: 0, do not allow place multiple elements with same name (refdes)
+# set disable_unique_names 0
+
+#### if set to 1 continue drawing lines / wires after click
+#### default: 0
+# set persistent_command 1
+
+#### if set to 1 automatically join/trim wires while editing
+#### this may slow down on rally big designs. Can be disabled via menu
+#### default: 0
+# set autotrim_wires 0
+
+#### set widget scaling (mainly for font display), this is useful on 4K displays
+#### default: unset (tk uses its default) > 1.0 ==> bigger
+# set tk_scaling 1.7
+
+#### disable some symbol layers. Default: none, all layers are visible.
+# set enable_layer(5) 0 ;# example to disable pin red boxes
+
+#### enable to scale grid point size as done with lines at close zoom, default: 0
+# set big_grid_points 0
+
+###########################################################################
+#### EXPORT FORMAT TRANSLATORS, PNG AND PDF
+###########################################################################
+#### command to translate xpm to png; (assumes command takes source
+#### and dest file as arguments, example: gm convert plot.xpm plot.png)
+#### default: {gm convert}
+# set to_png {gm convert}
+
+#### command to translate ps to pdf; (assumes command takes source
+#### and dest file as arguments, example: ps2pdf plot.ps plot.pdf)
+#### default: ps2pdf
+# set to_pdf ps2pdf
+set to_pdf {ps2pdf -dAutoRotatePages=/None}
+
+
+###########################################################################
+#### CUSTOM GRID / SNAP VALUE SETTINGS
+###########################################################################
+#### Warning: changing these values will likely break compatibility
+#### with existing symbol libraries. Defaults: grid 20, snap 10.
+# set grid 20
+# set snap 10
+
+###########################################################################
+#### CUSTOM COLORS MAY BE DEFINED HERE
+###########################################################################
+# set cadlayers 22
+# set light_colors {
+# "#ffffff" "#0044ee" "#aaaaaa" "#222222" "#229900"
+# "#bb2200" "#00ccee" "#ff0000" "#888800" "#00aaaa"
+# "#880088" "#00ff00" "#0000cc" "#666600" "#557755"
+# "#aa2222" "#7ccc40" "#00ffcc" "#ce0097" "#d2d46b"
+# "#ef6158" "#fdb200" }
+
+# set dark_colors {
+# "#000000" "#00ccee" "#3f3f3f" "#cccccc" "#88dd00"
+# "#bb2200" "#00ccee" "#ff0000" "#ffff00" "#ffffff"
+# "#ff00ff" "#00ff00" "#0000cc" "#aaaa00" "#aaccaa"
+# "#ff7777" "#bfff81" "#00ffcc" "#ce0097" "#d2d46b"
+# "#ef6158" "#fdb200" }
+
+###########################################################################
+#### CAIRO STUFF
+###########################################################################
+#### Scale all fonts by this number
+# set cairo_font_scale 1.0
+
+#### default for following two is 0.85 (xscale) and 0.88 (yscale) to
+#### match cairo font spacing
+# set nocairo_font_xscale 1.0
+#### set nocairo_font_yscale 1.0
+
+#### Scale line spacing by this number
+# set cairo_font_line_spacing 1.0
+
+#### Specify a font
+# set cairo_font_name {Sans-Serif}
+# set svg_font_name {Sans-Serif}
+
+#### Lift up text by some zoom-corrected pixels for
+#### better compatibility wrt no cairo version.
+#### Useful values in the range [-1, 3]
+# set cairo_vert_correct 0
+# set nocairo_vert_correct 0
+
+###########################################################################
+#### KEYBINDINGS
+###########################################################################
+#### General format for specifying a replacement for a keybind
+#### Replace Ctrl-d with Escape (so you wont kill the program)
+# set replace_key(Control-d) Escape
+
+#### swap w and W keybinds; Always specify Shift for capital letters
+# set replace_key(Shift-W) w
+# set replace_key(w) Shift-W
+
+###########################################################################
+#### TERMINAL
+###########################################################################
+#### default for linux: xterm
+# set terminal {xterm -geometry 100x35 -fn 9x15 -bg black -fg white -cr white -ms white }
+#### lxterminal is not OK since it will not inherit env vars:
+#### In order to reduce memory usage and increase the performance, all instances
+#### of the lxterminal are sharing a single process. LXTerminal is part of LXDE
+
+###########################################################################
+#### EDITOR
+###########################################################################
+#### editor must not detach from launching shell (-f mandatory for gvim)
+#### default for linux: gvim -f
+# set editor {gvim -f -geometry 90x28}
+# set editor { xterm -geometry 100x40 -e nano }
+# set editor { xterm -geometry 100x40 -e pico }
+
+#### For Windows
+# set editor {notepad.exe}
+
+###########################################################################
+#### SHOW ERC INFO WINDOW (erc errors, warnings etc)
+###########################################################################
+#### default: 0 (can be enabled by menu)
+# set show_infowindow 0
+
+###########################################################################
+#### CONFIGURE COMPUTER FARM JOB REDIRECTORS FOR SIMULATIONS
+###########################################################################
+#### RTDA NC
+# set computerfarm {nc run -Il}
+#### LSF BSUB
+# set computerfarm {bsub -Is}
+
+###########################################################################
+#### TCP CONNECTION WITH GAW
+###########################################################################
+#### set gaw address for socket connection: {host port}
+#### default: set to localhost, port 2020
+# set gaw_tcp_address {localhost 2020}
+
+###########################################################################
+#### XSCHEM LISTEN TO TCP PORT
+###########################################################################
+#### set xschem listening port; default: not enabled
+# set xschem_listen_port 2021
+
+###########################################################################
+#### BESPICE WAVE SOCKET CONNECTION
+###########################################################################
+#### set bespice wave listening port; default: not enabled
+set bespice_listen_port 2022
+
+
+
+###########################################################################
+#### UTILE SPICE STIMULI DESCRIPTION LANGUAGE AND TRANSLATOR
+###########################################################################
+#### default paths are set as shown here:
+# set utile_gui_path ${XSCHEM_SHAREDIR}/utile/utile3
+# set utile_cmd_path ${XSCHEM_SHAREDIR}/utile/utile
+
+###########################################################################
+#### TCL FILES TO LOAD AT STARTUP
+###########################################################################
+#### list of tcl files to preload.
+# lappend tcl_files ${XSCHEM_SHAREDIR}/change_index.tcl
+lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl
+lappend tcl_files $PDKPATH/libs.tech/xschem/scripts/sky130_models.tcl
+###########################################################################
+#### XSCHEM TOOLBAR
+###########################################################################
+#### default: not enabled.
+# set toolbar_visible 1
+# set toolbar_horiz 1
+
+###########################################################################
+#### SKYWATER PDK SPECIFIC VARIABLES
+###########################################################################
+
+## (spice patched) skywater-pdk install
+# set SKYWATER_MODELS ~/skywater-pdk/libraries/sky130_fd_pr_ngspice/latest
+# set SKYWATER_STDCELLS ~/skywater-pdk/libraries/sky130_fd_sc_hd/latest
+
+## opencircuitdesign pdks install. You need to change these to point to your open_pdks installation
+# set SKYWATER_MODELS /usr/local/share/pdk/sky130A/libs.tech/ngspice
+# set SKYWATER_STDCELLS /usr/local/share/pdk/sky130A/libs.ref/sky130_fd_sc_hd/spice
+set SKYWATER_MODELS $PDKPATH/libs.tech/ngspice
+set SKYWATER_STDCELLS $PDKPATH/libs.ref/sky130_fd_sc_hd/spice
