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eFPGA_core
tree: 456d322d4d507e99b367073daf1a31452467f9f8 [
path history
]
[
tgz
]
DSP_bot_ConfigMem.v
DSP_bot_switch_matrix.v
DSP_bot_tile.v
DSP_tile.v
DSP_top_ConfigMem.v
DSP_top_switch_matrix.v
DSP_top_tile.v
E_CPU_IO_bot_ConfigMem.v
E_CPU_IO_bot_switch_matrix.v
E_CPU_IO_bot_tile.v
E_CPU_IO_ConfigMem.v
E_CPU_IO_switch_matrix.v
E_CPU_IO_tile.v
eFPGAcore_netlists.vh
InPass4_frame_config_mux.v
IO_1_bidirectional_frame_config_pass.v
LUT4AB_ConfigMem.v
LUT4AB_switch_matrix.v
LUT4AB_tile.v
LUT4c_frame_config_dffesr.v
MULADD.v
MUX8LUT_frame_config_mux.v
N_term_DSP_switch_matrix.v
N_term_DSP_tile.v
N_term_RAM_IO_switch_matrix.v
N_term_RAM_IO_tile.v
N_term_single2_switch_matrix.v
N_term_single2_tile.v
N_term_single_switch_matrix.v
N_term_single_tile.v
OutPass4_frame_config_mux.v
RAM_IO_ConfigMem.v
RAM_IO_switch_matrix.v
RAM_IO_tile.v
RegFile_32x4.v
RegFile_ConfigMem.v
RegFile_switch_matrix.v
RegFile_tile.v
S_term_DSP_switch_matrix.v
S_term_DSP_tile.v
S_term_RAM_IO_switch_matrix.v
S_term_RAM_IO_tile.v
S_term_single2_switch_matrix.v
S_term_single2_tile.v
S_term_single_switch_matrix.v
S_term_single_tile.v
W_CPU_IO_bot_ConfigMem.v
W_CPU_IO_bot_switch_matrix.v
W_CPU_IO_bot_tile.v
W_CPU_IO_ConfigMem.v
W_CPU_IO_switch_matrix.v
W_CPU_IO_tile.v
W_IO_ConfigMem.v
W_IO_switch_matrix.v
W_IO_tile.v