Update
diff --git a/verilog/rtl/uprj_netlists.v b/verilog/rtl/uprj_netlists.v
index 7aca33c..1232147 100644
--- a/verilog/rtl/uprj_netlists.v
+++ b/verilog/rtl/uprj_netlists.v
@@ -26,8 +26,8 @@
 `else
     
    // for netlist verification
-    //`include "../gl/user_project_wrapper.v"
-    //`include "../gl/user_proj_example.v"
+   // `include "../gl/user_project_wrapper.v"
+   // `include "../gl/user_proj_example.v"
    
   // for rtl verification
     `include "user_project_wrapper.v"