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foss-eda-tools / third_party / shuttle / sky130 / mpw-004 / slot-003 / refs/heads/main
commitde2a343789a75a1b311dcf2ba4a88876c8782f8d[log] [tgz]
authorJeff DiCorpo <jeffdi@efabless.com>Sun Jan 09 08:21:23 2022 -0800
committerJeff DiCorpo <jeffdi@efabless.com>Sun Jan 09 08:21:23 2022 -0800
tree1043172237569e4b42f3175716f0b14899763985
parent9f9ce6785b6a83291345ea404172d2deee4f5c62 [diff]
final gds oasis
88 files changed
tree: 1043172237569e4b42f3175716f0b14899763985
  1. caravel/
  2. docs/
  3. gds/
  4. jobs/
  5. lib/
  6. mag/
  7. netgen/
  8. oas/
  9. openlane/
  10. signoff/
  11. spi/
  12. verilog/
  13. xschem/
  14. LICENSE
  15. Makefile
  16. README.md
README.md

A resistorless self-biased current source intended to be integrated in the efabless MPW4.

Table of contents

Summary

Most, if not all, analog integrated circuits are limited by their reference voltage and current sources. This project aims to provide a current source reference with the lowest power consumption and supply voltage possible for this technology.

A conventional gm-constant self-biased current source uses integrated resistors, which can be very large for very low current consumption. Besides that, the integrated resistor creates another independent variable of process variability in addition to the active components. A CMOS only current source process variability is a function of only the active components.

The proposed self-biased current source is based on the topology introduced by Francisco Serra-Graells and Jose Luis Huertas in “Sub-1-V CMOS proportional-to-absolute temperature references” [1], with the addition of high-swing cascode and series-parallel current mirrors [2].

Target Performance Summary

Specifications-
VDD1.0-1.8 V
Total current3.60 μA
Output current0.27 μA
Temperature stability0.5 %/V
Supply stability1160 ppm/°C
Area100 x 60 μm²

Description

Schematics and Layouts

image image

Self-biased current source circuit diagram

Simulation Results

TT corner

image image image image

Status and Issues

  • There are no schematics. All simulations are from extracted netlists.
  • This project also contains a CMOS only voltage reference based on the main current-source, but there is no documentation available.
  • There is a second version of the same current source, but using high-voltage transistors. Only the layer types were replaced.
  • Documentation is extremely incomplete.

Team members

Ph.D. Luís Henrique Rodovalho (Rodovalho) | luishenriquerodovalho@gmail.com |

References

[1] Serra-Graells, Francisco, and Jose Luis Huertas. “Sub-1-V CMOS proportional-to-absolute temperature references.” IEEE Journal of Solid-State Circuits 38.1 (2003): 84-88.

[2] Arnaud, Alfredo, Rafaella Fiorelli, and Carlos Galup-Montoro. “Nanowatt, sub-nS OTAs, with sub-10-mV input offset, using series-parallel current mirrors.” IEEE Journal of Solid-State Circuits 41.9 (2006): 2009-2018.