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foss-eda-tools / third_party / shuttle / sky130 / mpw-003 / slot-028 / bbc5af56614f931f95c857c038ee11d348d11dba / verilog / dv / la_test1
  1. 340cc4a Update full chip simulation to run from root by manarabdelaty · 3 years, 11 months ago
  2. 22f3cd0 Submodule caravel-lite by manarabdelaty · 3 years, 11 months ago
  3. c0f458a Update DV Makefile by manarabdelaty · 3 years, 11 months ago
  4. eac56e8 Rename CARAVEL_MASTER -> CARAVEL_ROOT by manarabdelaty · 4 years ago
  5. 8dbabc1 Update DV Makefiles by manarabdelaty · 4 years ago
  6. 496112a Add CARAVEL_PATH for the testbenches by manarabdelaty · 4 years ago
  7. a63e2e6 Makefile and RTL updates to run GL sim by manarabdelaty · 4 years ago
  8. 69bd326 Updated DV tests by manarabdelaty · 4 years ago