Revert "change location" This reverts commit 0f19648369dcc777a03a6cbba8c910da879e5263.
diff --git a/caravel/mag/sky130A.tech b/caravel/mag/sky130A.tech deleted file mode 100644 index be94895..0000000 --- a/caravel/mag/sky130A.tech +++ /dev/null
@@ -1,5388 +0,0 @@ -#------------------------------------------------------------------------ -# Copyright (c) 2020 R. Timothy Edwards -# Revisions: See below -# -# This file is an Open Source foundry process describing -# the SkyWater sky130 hybrid 0.18um / 0.13um fabrication -# process. The file may be distributed under the terms -# of the Apache 2.0 license agreement. -# -#------------------------------------------------------------------------ -tech - format 35 - sky130A -end - -version - version 1.0.204-0-ge27b678 - description "SkyWater SKY130: Open Source rules and DRC" - requires magic-8.3.111 -end - -#------------------------------------------------------------------------ -# Status 7/10/20: Rev 1 (alpha): -# First public release -# Status 8/14/20: Rev 2 (alpha): -# Started updating with new device/model naming convention -# Status 1/3/21: Taking out of beta and declaring an official release. -#------------------------------------------------------------------------ - -#------------------------------------------------------------------------ -# Supported device types -#------------------------------------------------------------------------ -# device name magic ID layer description -#------------------------------------------------------------------------ -# sky130_fd_pr__nfet_01v8 nfet standard nFET -# sky130_fd_pr__nfet_01v8 scnfet standard nFET in standard cell** -# sky130_fd_pr__special_nfet_latch npd special nFET in SRAM cell -# sky130_fd_pr__special_nfet_pass npass special nFET in SRAM cell -# sky130_fd_pr__nfet_01v8_lvt nfetlvt low Vt nFET -# sky130_fd_bs_flash__special_sonosfet_star nsonos SONOS nFET -# sky130_fd_pr__pfet_01v8 pfet standard pFET -# sky130_fd_pr__pfet_01v8 scpfet standard pFET in standard cell** -# sky130_fd_pr__special_pfet_pass ppu special pFET in SRAM cell -# sky130_fd_pr__pfet_01v8_lvt pfetlvt low Vt pFET -# sky130_fd_pr__pfet_01v8_mvt pfetmvt med Vt pFET -# sky130_fd_pr__pfet_01v8_hvt pfethvt high Vt pFET -# sky130_fd_pr__nfet_03v3_nvt nnfet native nFET -# sky130_fd_pr__pfet_g5v0d10v5 mvpfet thickox pFET -# sky130_fd_pr__nfet_g5v0d10v5 mvnfet thickox nFET -# sky130_fd_pr__nfet_01v8_nvt mvnnfet thickox native nFET -# sky130_fd_pr__diode_pw2nd_05v5 ndiode n+ diff diode -# sky130_fd_pr__diode_pw2nd_05v5_lvt ndiodelvt low Vt n+ diff diode -# sky130_fd_pr__diode_pw2nd_05v5_nvt nndiode diode with nndiff -# sky130_fd_pr__diode_pw2nd_11v0 mvndiode thickox n+ diff diode -# sky130_fd_pr__diode_pd2nw_05v5 pdiode p+ diff diode -# sky130_fd_pr__diode_pd2nw_05v5_lvt pdiodelvt low Vt p+ diff diode -# sky130_fd_pr__diode_pd2nw_05v5_hvt pdiodehvt high Vt p+ diff diode -# sky130_fd_pr__diode_pd2nw_11v0 mvpdiode thickox p+ diff diode -# sky130_fd_pr__npn_05v5 pbase NPN in deep nwell -# sky130_fd_pr__npn_11v0 pbase thick oxide gated NPN -# sky130_fd_pr__pnp_05v5 nbase PNP -# sky130_fd_pr__cap_mim_m3_1 mimcap MiM cap 1st plate -# sky130_fd_pr__cap_mim_m3_2 mimcap2 MiM cap 2nd plate -# sky130_fd_pr__res_generic_nd rdn n+ diff resistor -# sky130_fd_pr__res_generic_nd__hv mvrdn thickox n+ diff resistor -# sky130_fd_pr__res_generic_pd rdp p+ diff resistor -# sky130_fd_pr__res_generic_pd__nv mvrdp thickox p+ diff resistor -# sky130_fd_pr__res_generic_l1 rli local interconnect resistor -# sky130_fd_pr__res_generic_po npres n+ poly resistor -# sky130_fd_pr__res_high_po_* ppres (*) p+ poly resistor (300 Ohms/sq) -# sky130_fd_pr__res_xhigh_po_* xres (*) p+ poly resistor (2k Ohms/sq) -# sky130_fd_pr__cap_var_lvt varactor low Vt varactor -# sky130_fd_pr__cap_var_hvt varactorhvt high Vt varactor -# sky130_fd_pr__cap_var mvvaractor thickox varactor -# sky130_fd_pr__res_iso_pw rpw pwell resistor (in deep nwell) -# sky130_fd_pr__esd_nfet_g5v0d10v5 mvnfetesd ESD thickox nFET -# sky130_fd_pr__esd_pfet_g5v0d10v5 mvpfetesd ESD thickox pFET -# -# (*) Note that ppres may extract into some generic type called -# "sky130_fd_pr__res_xhigh_po", but only specific sizes of xhrpoly are -# allowed, and these are created from fixed layouts like the types below. -# -# (**) nFET and pFET in standard cells are the same as devices -# outside of the standard cell except for the DRC rule for -# FET to diffusion contact spacing (which is 0.05um, not 0.055um) -# -#------------------------------------------------------------- -# The following devices are not extracted but are represented -# only by script-generated subcells in the PDK. -#------------------------------------------------------------- -# sky130_fd_pr__esd_nfet_01v8 ESD nFET -# sky130_fd_pr__esd_nfet_05v0_nvt ESD native nFET -# sky130_fd_pr__special_nfet_pass_flash flash nFET device -# sky130_fd_pr__esd_rf_diode_pw2nd_11v0 ESD n+ diode -# sky130_fd_pr__esd_rf_diode_pd2nw_11v0 ESD p+ diode -# sky130_fd_pr__cap_vpp_* Vpp cap -# sky130_fd_pr__ind_* inductor -# sky130_fd_pr__fuse_m4 metal fuse device -#-------------------------------------------------------------- - -#----------------------------------------------------- -# Tile planes -#----------------------------------------------------- - -planes - dwell,dw - well,w - active,a - locali,li1,li - metal1,m1 - metal2,m2 - metal3,m3 - cap1,c1 - metal4,m4 - cap2,c2 - metal5,m5 - metali,mi - block,b - comment,c -end - -#----------------------------------------------------- -# Tile types -#----------------------------------------------------- - -types -# Deep nwell - dwell dnwell,dnw - dwell isosubstrate,isosub - -# Wells - well nwell,nw - well pwell,pw - well rpw,rpwell - -well obswell - well pbase,npn - well nbase,pnp - -# Transistors - active nmos,ntransistor,nfet - -active scnmos,scntransistor,scnfet - -active npd,npdfet,sramnfet - -active npass,npassfet,srampassfet - active pmos,ptransistor,pfet - -active scpmos,scptransistor,scpfet - -active scpmoshvt,scpfethvt - -active ppu,ppufet,srampfet - active nnmos,nntransistor,nnfet - active mvnmos,mvntransistor,mvnfet - active mvpmos,mvptransistor,mvpfet - active mvnnmos,mvnntransistor,mvnnfet - -active mvnmosesd,mvntransistoresd,mvnfetesd - -active mvpmosesd,mvptransistoresd,mvpfetesd - active varactor,varact,var - active mvvaractor,mvvaract,mvvar - - active pmoslvt,pfetlvt - active pmosmvt,pfetmvt - active pmoshvt,pfethvt - active nmoslvt,nfetlvt - active varactorhvt,varacthvt,varhvt - -active nsonos,sonos - -active sramnvar,corenvar,corenvaractor - -active srampvar,corepvar,corepvaractor - -# Diffusions - -active fomfill - active ndiff,ndiffusion,ndif - active pdiff,pdiffusion,pdif - active mvndiff,mvndiffusion,mvndif - active mvpdiff,mvpdiffusion,mvpdif - active ndiffc,ndcontact,ndc - active pdiffc,pdcontact,pdc - active mvndiffc,mvndcontact,mvndc - active mvpdiffc,mvpdcontact,mvpdc - active psubdiff,psubstratepdiff,ppdiff,ppd,psd,ptap - active nsubdiff,nsubstratendiff,nndiff,nnd,nsd,ntap - active mvpsubdiff,mvpsubstratepdiff,mvppdiff,mvppd,mvpsd,mvptap - active mvnsubdiff,mvnsubstratendiff,mvnndiff,mvnnd,mvnsd,mvntap - active psubdiffcont,psubstratepcontact,psc,ptapc - active nsubdiffcont,nsubstratencontact,nsc,ntapc - active mvpsubdiffcont,mvpsubstratepcontact,mvpsc,mvptapc - active mvnsubdiffcont,mvnsubstratencontact,mvnsc,mvntapc - -active obsactive - -active mvobsactive - -# Poly - active poly,p,polysilicon - active polycont,pc,pcontact,polycut,polyc - active xpolycontact,xpolyc,xpc - -active polyfill - -# Resistors - active npolyres,npres,mrp1 - active ppolyres,ppres,xhrpoly - active xpolyres,xpres,xres,uhrpoly - active ndiffres,rnd,rdn,rndiff - active pdiffres,rpd,rdp,rpdiff - active mvndiffres,mvrnd,mvrdn,mvrndiff - active mvpdiffres,mvrpd,mvrdp,mvrpdiff - active rmp - -# Diodes - active pdiode,pdi - active ndiode,ndi - active nndiode,nndi - active pdiodec,pdic - active ndiodec,ndic - active nndiodec,nndic - active mvpdiode,mvpdi - active mvndiode,mvndi - active mvpdiodec,mvpdic - active mvndiodec,mvndic - active pdiodelvt,pdilvt - active pdiodehvt,pdihvt - active ndiodelvt,ndilvt - active pdiodelvtc,pdilvtc - active pdiodehvtc,pdihvtc - active ndiodelvtc,ndilvtc - -# Local Interconnect - locali locali,li1,li - -locali corelocali,coreli1,coreli - locali rlocali,rli1,rli - locali viali,vial,mcon,m1c,v0 - -locali obsli1,obsli - -locali obsli1c,obsmcon - -locali lifill - -# Metal 1 - metal1 metal1,m1,met1 - metal1 rmetal1,rm1,rmet1 - metal1 via1,m2contact,m2cut,m2c,via,v,v1 - -metal1 obsm1 - metal1 padl - -metal1 m1fill - -# Metal 2 - metal2 metal2,m2,met2 - metal2 rmetal2,rm2,rmet2 - metal2 via2,m3contact,m3cut,m3c,v2 - -metal2 obsm2 - -metal2 m2fill - -# Metal 3 - metal3 metal3,m3,met3 - metal3 rmetal3,rm3,rmet3 - -metal3 obsm3 - metal3 via3,v3 - -metal3 m3fill - - cap1 mimcap,mim,capm - cap1 mimcapcontact,mimcapc,mimcc,capmc - -# Metal 4 - metal4 metal4,m4,met4 - metal4 rmetal4,rm4,rmet4 - -metal4 obsm4 - metal4 via4,v4 - -metal4 m4fill - - cap2 mimcap2,mim2,capm2 - cap2 mimcap2contact,mimcap2c,mim2cc,capm2c - -# Metal 5 - metal5 metal5,m5,met5 - metal5 rm5,rmetal5,rmet5 - -metal5 obsm5 - -metal5 m5fill - - metal5 mrdlcontact,mrdlc,pi1 - metali metalrdl,mrdl,metrdl,rdl - -metali obsmrdl - metali pi2 - block ubm - -# Miscellaneous - -block glass - -block fillblock,fillblock4 - comment comment - -comment obscomment -# fixed resistor width identifiers - -comment res0p35 - -comment res0p69 - -comment res1p41 - -comment res2p85 - -comment res5p73 -# fixed bipolar area identifiers - -comment pnp0p68 - -comment pnp3p40 - -comment npn1p00 - -comment npn2p00 - -comment npn11p0 - -end - -#----------------------------------------------------- -# Magic contact types -#----------------------------------------------------- - -contact - pc poly locali - ndc ndiff locali - pdc pdiff locali - nsc nsd locali - psc psd locali - ndic ndiode locali - ndilvtc ndiodelvt locali - nndic nndiode locali - pdic pdiode locali - pdilvtc pdiodelvt locali - pdihvtc pdiodehvt locali - xpc xpc locali - - mvndc mvndiff locali - mvpdc mvpdiff locali - mvnsc mvnsd locali - mvpsc mvpsd locali - mvndic mvndiode locali - mvpdic mvpdiode locali - - mcon locali metal1 - obsmcon obsli metal1 - - via1 metal1 metal2 - via2 metal2 metal3 - via3 metal3 metal4 - via4 metal4 metal5 - stackable - - # MiM cap contacts are not stackable! - mimcc mimcap metal4 - mim2cc mimcap2 metal5 - - padl m1 m2 m3 m4 m5 glass - - mrdlc metal5 mrdl - pi2 mrdl ubm -end - -#----------------------------------------------------- -# Layer aliases -#----------------------------------------------------- - -aliases - - allwellplane nwell - allnwell nwell,obswell,pnp - - allnfets nfet,npass,npd,scnfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nfetlvt,nsonos - allpfets pfet,ppu,scpfet,scpfethvt,mvpfet,mvpfetesd,pfethvt,pfetlvt,pfetmvt - allfets allnfets,allpfets,varactor,mvvaractor,varhvt,corenvar,corepvar - allfetsstd nfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nfetlvt,pfet,mvpfet,mvpfetesd,pfethvt,pfetlvt,pfetmvt - allfetsspecial scnfet,scpfet,scpfethvt - allfetscore npass,npd,nsonos,ppu,corenvar,corepvar - allfetsnolvt nfet,npass,npd,scnfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nsonos,pfet,ppu,scpfet,scpfethvt,mvpfet,mvpfetesd,pfethvt,pfetmvt,varactor,mvvaractor,varhvt,corenvar - - allnactivenonfet *ndiff,*nsd,*ndiode,*nndiode,*mvndiff,*mvnsd,*mvndiode,*ndiodelvt - allnactive allnactivenonfet,allnfets - allnactivenontap *ndiff,*ndiode,*nndiode,*mvndiff,*mvndiode,*ndiodelvt,allnfets - allnactivetap *nsd,*mvnsd,var,varhvt,mvvar,corenvar - - allpactivenonfet *pdiff,*psd,*pdiode,*mvpdiff,*mvpsd,*mvpdiode,*pdiodelvt,*pdiodehvt - allpactive allpactivenonfet,allpfets - allpactivenontap *pdiff,*pdiode,*mvpdiff,*mvpdiode,*pdiodelvt,*pdiodehvt,allpfets - allpactivetap *psd,*mvpsd,corepvar - - allactivenonfet allnactivenonfet,allpactivenonfet - allactive allactivenonfet,allfets - - allactiveres ndiffres,pdiffres,mvndiffres,mvpdiffres - - allndifflv *ndif,*nsd,*ndiode,ndiffres,nfet,npass,npd,scnfet,nfetlvt,nsonos - allpdifflv *pdif,*psd,*pdiode,pdiffres,pfet,ppu,scpfet,scpfethvt,pfetlvt,pfetmvt,pfethvt - alldifflv allndifflv,allpdifflv - allndifflvnonfet *ndif,*nsd,*ndiode,*nndiode,ndiffres,*ndiodelvt - allpdifflvnonfet *pdif,*psd,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt - alldifflvnonfet allndifflvnonfet,allpdifflvnonfet - - allndiffmv *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnfetesd,mvnnfet,nnfet - allpdiffmv *mvpdif,*mvpsd,*mvpdiode,mvpdiffres,mvpfet,mvpfetesd - alldiffmv allndiffmv,allpdiffmv - allndiffmvnontap *mvndif,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnfetesd,mvnnfet,nnfet - allpdiffmvnontap *mvpdif,*mvpdiode,mvpdiffres,mvpfet,mvpfetesd - alldiffmvnontap allndiffmvnontap,allpdiffmvnontap - allndiffmvnonfet *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres - allpdiffmvnonfet *mvpdif,*mvpsd,*mvpdiode,mvpdiffres - alldiffmvnonfet allndiffmvnonfet,allpdiffmvnonfet - - alldiffnonfet alldifflvnonfet,alldiffmvnonfet - alldiff alldifflv,alldiffmv,fomfill - - allpolyres mrp1,xhrpoly,uhrpoly,rmp - allpolynonfet *poly,allpolyres,xpc - allpolynonres *poly,allfets,xpc - - allpoly allpolynonfet,allfets - allpolynoncap *poly,xpc,allfets,allpolyres - - allndiffcontlv ndc,nsc,ndic,nndic,ndilvtc - allpdiffcontlv pdc,psc,pdic,pdilvtc,pdihvtc - allndiffcontmv mvndc,mvnsc,mvndic - allpdiffcontmv mvpdc,mvpsc,mvpdic - allndiffcont allndiffcontlv,allndiffcontmv - allpdiffcont allpdiffcontlv,allpdiffcontmv - alldiffcontlv allndiffcontlv,allpdiffcontlv - alldiffcontmv allndiffcontmv,allpdiffcontmv - alldiffcont alldiffcontlv,alldiffcontmv - - allcont alldiffcont,pc - - allres allpolyres,allactiveres - - allli *locali,coreli,rli - allm1 *m1,rm1 - allm2 *m2,rm2 - allm3 *m3,rm3 - allm4 *m4,rm4 - allm5 *m5,rm5 - - allpad padl - - psub pwell - - obstypes obswell,obsactive,obsli,obsmcon,obsm1,obsm2,obsm3,obsm4,obsm5,obsmrdl,obscomment - idtypes res0p35,res0p69,res1p41,res2p85,res5p73,pnp0p68,pnp3p40,npn1p00,npn2p00,npn11p0 - blocktypes fillblock,fillblock4 - -end - -#----------------------------------------------------- -# Layer drawing styles -#----------------------------------------------------- - -styles - styletype mos - dnwell cwell - isosub subcircuit - nwell nwell - pwell pwell - rpwell pwell ptransistor_stripes - ndiff ndiffusion - fomfill ndiffusion - pdiff pdiffusion - nsd ndiff_in_nwell - psd pdiff_in_pwell - nfet ntransistor ntransistor_stripes - scnfet ntransistor ntransistor_stripes - npass ntransistor ntransistor_stripes - npd ntransistor ntransistor_stripes - pfet ptransistor ptransistor_stripes - scpfet ptransistor ptransistor_stripes - scpfethvt ptransistor ptransistor_stripes implant2 - ppu ptransistor ptransistor_stripes - var polysilicon ndiff_in_nwell - ndc ndiffusion metal1 contact_X'es - pdc pdiffusion metal1 contact_X'es - nsc ndiff_in_nwell metal1 contact_X'es - psc pdiff_in_pwell metal1 contact_X'es - corenvar polysilicon ndiff_in_nwell - corepvar polysilicon pdiff_in_pwell - - pnp nwell ntransistor_stripes - npn pwell ptransistor_stripes - - pfetlvt ptransistor ptransistor_stripes implant1 - pfetmvt ptransistor ptransistor_stripes implant3 - pfethvt ptransistor ptransistor_stripes implant2 - nfetlvt ntransistor ntransistor_stripes implant1 - nsonos ntransistor implant3 - varhvt polysilicon ndiff_in_nwell implant2 - nnfet ntransistor ndiff_in_nwell - - mvndiff ndiffusion hvndiff_mask - mvpdiff pdiffusion hvpdiff_mask - mvnsd ndiff_in_nwell hvndiff_mask - mvpsd pdiff_in_pwell hvpdiff_mask - mvnfet ntransistor ntransistor_stripes hvndiff_mask - mvnfetesd ntransistor ntransistor_stripes hvndiff_mask - mvnnfet ntransistor ndiff_in_nwell hvndiff_mask - mvpfet ptransistor ptransistor_stripes - mvpfetesd ptransistor ptransistor_stripes - mvvar polysilicon ndiff_in_nwell hvndiff_mask - mvndc ndiffusion metal1 contact_X'es hvndiff_mask - mvpdc pdiffusion metal1 contact_X'es hvpdiff_mask - mvnsc ndiff_in_nwell metal1 contact_X'es hvndiff_mask - mvpsc pdiff_in_pwell metal1 contact_X'es hvpdiff_mask - - poly polysilicon - polyfill polysilicon - pc polysilicon metal1 contact_X'es - npolyres polysilicon silicide_block nselect2 - ppolyres polysilicon silicide_block pselect2 - xpc polysilicon pselect2 metal1 contact_X'es - rmp polysilicon poly_resist_stripes - - res0p35 implant1 - res0p69 implant1 - res1p41 implant1 - res2p85 implant1 - res5p73 implant1 - pnp0p68 implant1 - pnp3p40 implant1 - npn1p00 implant1 - npn2p00 implant1 - npn11p0 implant1 - - pdiode pdiffusion pselect2 - ndiode ndiffusion nselect2 - pdiodec pdiffusion pselect2 metal1 contact_X'es - ndiodec ndiffusion nselect2 metal1 contact_X'es - - nndiode ndiffusion nselect2 implant3 - ndiodelvt ndiffusion nselect2 implant1 - pdiodelvt pdiffusion pselect2 implant1 - pdiodehvt pdiffusion pselect2 implant2 - pdilvtc pdiffusion pselect2 implant1 metal1 contact_X'es - pdihvtc pdiffusion pselect2 implant2 metal1 contact_X'es - ndilvtc ndiffusion nselect2 implant1 metal1 contact_X'es - - mvpdiode pdiffusion pselect2 hvpdiff_mask - mvndiode ndiffusion nselect2 hvndiff_mask - mvpdiodec pdiffusion pselect2 metal1 contact_X'es hvpdiff_mask - mvndiodec ndiffusion nselect2 metal1 contact_X'es hvndiff_mask - nndiodec ndiff_in_nwell nselect2 metal1 contact_X'es hvndiff_mask - - locali metal1 - lifill metal1 - coreli metal1 - rli metal1 poly_resist_stripes - mcon metal1 metal2 via1arrow - obsli metal1 - obsmcon metal1 metal2 via1arrow - - metal1 metal2 - m1fill metal2 - rm1 metal2 poly_resist_stripes - obsm1 metal2 - m2c metal2 metal3 via2arrow - metal2 metal3 - m2fill metal3 - rm2 metal3 poly_resist_stripes - obsm2 metal3 - m3c metal3 metal4 via3alt - metal3 metal4 - m3fill metal4 - rm3 metal4 poly_resist_stripes - obsm3 metal4 - mimcap metal3 mems - mimcc metal3 contact_X'es mems - mimcap2 metal4 mems - mim2cc metal4 contact_X'es mems - via3 metal4 metal5 via4 - metal4 metal5 - m4fill metal5 - rm4 metal5 poly_resist_stripes - obsm4 metal5 - via4 metal5 metal6 via5 - metal5 metal6 - m5fill metal6 - rm5 metal6 poly_resist_stripes - obsm5 metal6 - mrdlc metal6 metal7 via6 - metalrdl metal7 - obsmrdl metal7 - ubm metal8 - pi2 metal7 metal8 via7 - - glass overglass - mrp1 poly_resist poly_resist_stripes - xhrpoly poly_resist silicide_block - uhrpoly poly_resist - ndiffres ndiffusion ndop_stripes - pdiffres pdiffusion pdop_stripes - mvndiffres ndiffusion hvndiff_mask ndop_stripes - mvpdiffres pdiffusion hvpdiff_mask pdop_stripes - comment comment - error_p error_waffle - error_s error_waffle - error_ps error_waffle - fillblock cwell - fillblock4 cwell - - obswell cwell - obsactive implant4 - - padl metal6 via6 overglass - - magnet substrate_field_implant - rotate via3alt - fence via5 -end - -#----------------------------------------------------- -# Special paint/erase rules -#----------------------------------------------------- - -compose - compose nfet poly ndiff - compose pfet poly pdiff - compose var poly nsd - - compose mvnfet poly mvndiff - compose mvpfet poly mvpdiff - compose mvvar poly mvnsd - - paint obsmcon locali via1 - paint obsmcon obsm1 obsli,obsm1 - - paint ndc nwell pdc - paint nfet nwell pfet - paint scnfet nwell scpfet - paint ndiff nwell pdiff - paint psd nwell nsd - paint psc nwell nsc - paint npd nwell ppu - - paint pdc pwell ndc - paint pfet pwell nfet - paint scpfet pwell scnfet - paint pdiff pwell ndiff - paint nsd pwell psd - paint nsc pwell psc - paint ppu pwell npd - - paint pdc coreli pdc - paint ndc coreli ndc - paint pc coreli pc - paint nsc coreli nsc - paint psc coreli psc - paint viali coreli viali - - paint coreli pdc pdc - paint coreli ndc ndc - paint coreli pc pc - paint coreli nsc nsc - paint coreli psc psc - paint coreli viali viali - - paint m4 obsm4 m4 - paint m5 obsm5 m5 -end - -#----------------------------------------------------- -# Electrical connectivity -#----------------------------------------------------- - -connect - *nwell,*nsd,*mvnsd,dnwell,pnp *nwell,*nsd,*mvnsd,dnwell,pnp - pwell,*psd,*mvpsd,npn pwell,*psd,*mvpsd,npn - *li,coreli,lifill *li,coreli,lifill - *m1,m1fill,obsmcon *m1,m1fill,obsmcon - *m2,m2fill *m2,m2fill - *m3,m3fill *m3,m3fill - *m4,m4fill *m4,m4fill - *m5,m5fill *m5,m5fill - *mimcap *mimcap - *mimcap2 *mimcap2 - allnactivenonfet allnactivenonfet - allpactivenonfet allpactivenonfet - *poly,xpc,allfets,polyfill *poly,xpc,allfets,polyfill - # RDL connects to m5 (i.e., padl) through glass cut - *mrdl *mrdl - glass metrdl -end - -#----------------------------------------------------- -# CIF/GDS output layer definitions -#----------------------------------------------------- -# NOTE: All values in this section MUST be multiples of 25 -# or else magic will scale below the allowed layout grid size - -cifoutput - -#---------------------------------------------------------------- -style gdsii -# NOTE: This section is used for actual GDS output -#---------------------------------------------------------------- - scalefactor 10 nanometers - options calma-permissive-labels - gridlimit 5 - -#---------------------------------------------------------------- -# Create a temp layer from the cell bounding box for use in -# generating ID layers. Note that "boundary", unlike "bbox", -# requires the FIXED_BBOX property (abutment box) in the cell. -#---------------------------------------------------------------- - templayer CELLBOUND - boundary - -#---------------------------------------------------------------- -# BOUND -#---------------------------------------------------------------- - layer BOUND CELLBOUND - calma 235 4 - -#---------------------------------------------------------------- -# DNWELL -#---------------------------------------------------------------- - - layer DNWELL dnwell,npn - calma 64 18 - - layer PWRES rpw - and dnwell - calma 64 13 - -#---------------------------------------------------------------- -# SUBCUT -#---------------------------------------------------------------- - - layer SUBCUT isosub - calma 81 53 - -#---------------------------------------------------------------- -# NWELL -#---------------------------------------------------------------- - - layer NWELL allnwell - bloat-all rpw dnwell - and-not rpw,pwell - calma 64 20 - - layer WELLTXT - labels allnwell noport - calma 64 5 - - layer WELLPIN - labels allnwell port - calma 64 16 - -#---------------------------------------------------------------- -# SUB (text/port only) -#---------------------------------------------------------------- - - layer SUBTXT - labels pwell noport - calma 64 59 - - layer SUBPIN - labels pwell port - calma 122 16 - -#---------------------------------------------------------------- -# DIFF -#---------------------------------------------------------------- - - layer DIFF allnactivenontap,allpactivenontap,allactiveres - calma 65 20 - - layer DIFFTXT - labels allnactivenontap,allpactivenontap noport - calma 65 6 - - layer DIFFPIN - labels allnactivenontap,allpactivenontap port - calma 65 16 - -#---------------------------------------------------------------- -# TAP -#---------------------------------------------------------------- - - layer TAP allnactivetap,allpactivetap - labels allnactivetap,allpactivetap port - calma 65 44 - - layer TAPTXT - labels allnactivetap,allpactivetap noport - calma 65 5 - -#---------------------------------------------------------------- -# FOM -#---------------------------------------------------------------- - - layer FOMFILL fomfill - labels fomfill - calma 23 28 - -#---------------------------------------------------------------- -# PSDM, NSDM (PPLUS, NPLUS implants) -#---------------------------------------------------------------- - - templayer basePSDM pdiffres,mvpdiffres - grow 15 - or xhrpoly,uhrpoly,xpc - grow 110 - bloat-or allpactivetap * 125 allnactivenontap 0 - bloat-or allpactivenontap * 125 allnactivetap 0 - - templayer baseNSDM ndiffres,mvndiffres - grow 125 - bloat-or allnactivetap * 125 allpactivenontap 0 - bloat-or allnactivenontap * 125 allpactivetap 0 - - templayer extendPSDM basePSDM - bridge 380 380 - and-not baseNSDM - - layer PSDM basePSDM,extendPSDM - grow 185 - shrink 185 - close 265000 - mask-hints PSDM - calma 94 20 - - templayer extendNSDM baseNSDM - bridge 380 380 - and-not basePSDM - - layer NSDM baseNSDM,extendNSDM - grow 185 - shrink 185 - close 265000 - mask-hints NSDM - calma 93 44 - -#---------------------------------------------------------------- -# LVID -#---------------------------------------------------------------- - - layer LVID nnfet - grow 100 - calma 81 60 - -#---------------------------------------------------------------- -# LVTN -#---------------------------------------------------------------- - - layer LVTN pfetlvt,nfetlvt,mvvar,mvnnfet,nnfet,nsonos,*pdiodelvt,*ndiodelvt,*nndiode - grow 180 - bridge 380 380 - grow 185 - shrink 185 - close 265000 - mask-hints LVTN - calma 125 44 - -#---------------------------------------------------------------- -# HVTR -#---------------------------------------------------------------- - - layer HVTR pfetmvt - grow 180 - bridge 380 380 - grow 185 - shrink 185 - close 265000 - calma 18 20 - -#---------------------------------------------------------------- -# HVTP -#---------------------------------------------------------------- - - layer HVTP scpfethvt,ppu,pfethvt,varhvt,*pdiodehvt - grow 180 - bridge 380 380 - grow 185 - shrink 185 - close 265000 - mask-hints HVTP - calma 78 44 - -#---------------------------------------------------------------- -# SONOS -#---------------------------------------------------------------- - - layer SONOS nsonos - grow 100 - grow-min 410 - bridge 500 410 - grow 250 - shrink 250 - calma 80 20 - -#---------------------------------------------------------------- -# SONOS requires COREID around area (areaid.ce). Also, the -# coreli layer indicates a cell needing COREID. Also, devices -# npd, npass, and ppu indicate a COREID cell. -#---------------------------------------------------------------- - - layer COREID - bloat-all nsonos,coreli,ppu,npd,npass,corepvar,corenvar CELLBOUND - mask-hints COREID - calma 81 2 - -#---------------------------------------------------------------- -# STDCELL applies to all cells containing scnfet or scpfet. -#---------------------------------------------------------------- - - layer STDCELL scnfet - bloat-all scpfet,scpfethvt,scnfet CELLBOUND - mask-hints STDCELL - calma 81 4 - -#---------------------------------------------------------------- -# ESDID is a marker layer for ESD devices in the padframe I/O. -#---------------------------------------------------------------- - - layer ESDID - bloat-all mvnfetesd *mvndiff,*poly - bloat-all mvpfetesd *mvpdiff,*poly - grow 100 - mask-hints ESDID - calma 81 19 - -#---------------------------------------------------------------- -# NPNID and PNPID apply to bipolar transistors -#---------------------------------------------------------------- - - layer NPNID - bloat-all npn dnwell - mask-hints NPNID - calma 82 20 - - templayer pnparea pnp - grow 400 - - layer PNPID - bloat-all pnparea *psd - or pnparea - mask-hints PNPID - calma 82 44 - -#---------------------------------------------------------------- -# RPM -#---------------------------------------------------------------- - - layer RPM - bloat-all xhrpoly xpc - grow 200 - grow-min 1270 - grow 420 - shrink 420 - calma 86 20 - -#---------------------------------------------------------------- -# URPM (2kOhms/sq. poly implant) -#---------------------------------------------------------------- - - layer URPM - bloat-all uhrpoly xpc - grow 200 - grow-min 1270 - grow 420 - shrink 420 - calma 79 20 - -#---------------------------------------------------------------- -# LDNTM (Tip implant for SONOS FETs) -#---------------------------------------------------------------- - - layer LDNTM - bloat-all nsonos *ndiff - grow 185 - grow 345 - shrink 345 - calma 11 44 - -#---------------------------------------------------------------- -# HVNTM (Tip implant for MV ndiff devices) -#---------------------------------------------------------------- - - templayer hvntm_block *mvpsd - grow 185 - - layer HVNTM - bloat-all mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,mvrdn,*nndiode *mvndiff - bloat-all mvvaractor *mvnsd - and-not hvntm_block - grow 185 - grow 345 - shrink 345 - and-not hvntm_block - mask-hints HVNTM - calma 125 20 - -#---------------------------------------------------------------- -# POLY -#---------------------------------------------------------------- - - layer POLY allpoly - calma 66 20 - - layer POLYTXT - labels allpoly noport - calma 66 5 - - layer POLYPIN - labels allpoly port - calma 66 16 - - layer POLYFILL polyfill - labels polyfill - calma 28 28 - -#---------------------------------------------------------------- -# HVI (includes rules NWELL 8-11 and DIFFTAP 14-26) -#---------------------------------------------------------------- - - templayer thkox_area alldiffmv,mvvar - grow 185 - bloat-all alldiffmv nwell - grow 345 - shrink 345 - - templayer large_ptap_mv thkox_area - shrink 420 - grow 420 - - templayer small_ptap_mv thkox_area - and-not large_ptap_mv - # (HVI min width rule is 0.6 but CNTM min width rule is 0.84um) - grow-min 840 - - layer HVI thkox_area,small_ptap_mv - bridge 700 600 - grow 345 - shrink 345 - mask-hints HVI - calma 75 20 - -#---------------------------------------------------------------- -# CONT (LICON) -#---------------------------------------------------------------- - - layer CONT allcont - squares-grid 0 170 170 - calma 66 44 - - # Contact for pres is different than other LICON contacts - # See rules LICON 1b, 1c (width/length) and 2b (spacing) - templayer xpc_horiz xpc - shrink 1007 - grow 1007 - - layer CONT xpc - and-not xpc_horiz - # Force long edge vertical for contacts narrower than 2um - # Minimum space is 350 but 520 satisfies no. of contacts rule - slots 80 190 520 80 2000 350 - calma 66 44 - - layer CONT xpc - and xpc_horiz - # Force long edge vertical for contacts wider than 2um - # Minimum space is 350 but 520 satisfies no. of contacts rule - slots 80 2000 350 80 190 520 - calma 66 44 - -#---------------------------------------------------------------- -# NPC (Nitride poly cut) -# surrounds CONT (LICON) on poly only (i.e., pc) -#---------------------------------------------------------------- - - # Avoids a common case of NPC bridges too close to other LICON shapes. - templayer diffcutarea pdc,ndc,psc,nsc,mvpdc,mvndc,mvpsc,mvnsc - grow 90 - - layer NPC pc - squares-grid 0 170 170 - grow 100 - bridge 270 270 - and-not diffcutarea - bridge 270 270 - grow 130 - shrink 130 - mask-hints NPC - calma 95 20 - - # NPC is also generated on xhrpoly and uhrpoly resistors - - layer NPC xpc,xhrpoly,uhrpoly - # xpc surrounds precision_resistor by 0.095um - grow 95 - grow 130 - shrink 130 - calma 95 20 - -#---------------------------------------------------------------- -# Device markers -#---------------------------------------------------------------- - - layer DIFFRES rdn,mvrdn,rdp,mvrdp - calma 65 13 - - layer POLYRES mrp1 - calma 66 13 - - # POLYSHORT is a poly layer resistor like rli, rm1, etc., for metal layers - layer POLYSHORT rmp - calma 66 15 - - # POLYRES extends to edge of contact cut - layer POLYRES xhrpoly,uhrpoly - grow 60 - and xpc - or xhrpoly,uhrpoly - calma 66 13 - - layer DIODE *pdi,*ndi,*nndi,*mvpdi,*mvndi,*pdilvt,*pdihvt,*ndilvt - # To be done: Expand to include anode, cathode, and guard ring - calma 81 23 - -#---------------------------------------------------------------- -# LI -#---------------------------------------------------------------- - layer LI allli - calma 67 20 - - layer LITXT - labels *locali,coreli noport - calma 67 5 - - layer LIPIN - labels *locali,coreli port - calma 67 16 - - layer LIRES rli - labels rli - calma 67 13 - - layer LIFILL lifill - labels lifill - calma 56 28 - -#---------------------------------------------------------------- -# MCON -#---------------------------------------------------------------- - layer MCON mcon - squares-grid 0 170 190 - calma 67 44 - -#---------------------------------------------------------------- -# MET1 -#---------------------------------------------------------------- - layer MET1 allm1 - calma 68 20 - - layer MET1TXT - labels allm1 noport - calma 68 5 - - layer MET1PIN - labels allm1 port - calma 68 16 - - layer MET1RES rm1 - labels rm1 - calma 68 13 - - layer MET1FILL m1fill - labels m1fill - calma 36 28 - -#---------------------------------------------------------------- -# VIA1 -#---------------------------------------------------------------- - layer VIA1 via1 - squares-grid 55 150 170 - calma 68 44 - -#---------------------------------------------------------------- -# MET2 -#---------------------------------------------------------------- - layer MET2 allm2 - calma 69 20 - - layer MET2TXT - labels allm2 noport - calma 69 5 - - layer MET2PIN - labels allm2 port - calma 69 16 - - layer MET2RES rm2 - labels rm2 - calma 69 13 - - layer MET2FILL m2fill - labels m2fill - calma 41 28 - -#---------------------------------------------------------------- -# VIA2 -#---------------------------------------------------------------- - layer VIA2 via2 - squares-grid 40 200 200 - calma 69 44 - -#---------------------------------------------------------------- -# MET3 -#---------------------------------------------------------------- - layer MET3 allm3 - calma 70 20 - - layer MET3TXT - labels allm3 noport - calma 70 5 - - layer MET3PIN - labels allm3 port - calma 70 16 - - layer MET3RES rm3 - labels rm3 - calma 70 13 - - layer MET3FILL m3fill - labels m3fill - calma 34 28 - -#---------------------------------------------------------------- -# VIA3 -#---------------------------------------------------------------- - layer VIA3 via3 - or mimcc - squares-grid 60 200 200 - calma 70 44 - -#---------------------------------------------------------------- -# MET4 -#---------------------------------------------------------------- - layer MET4 allm4 - calma 71 20 - - layer MET4TXT - labels allm4 noport - calma 71 5 - - layer MET4PIN - labels allm4 port - calma 71 16 - - layer MET4RES rm4 - labels rm4 - calma 71 13 - - layer MET4FILL m4fill - labels m4fill - calma 51 28 - -#---------------------------------------------------------------- -# VIA4 -#---------------------------------------------------------------- - layer VIA4 via4 - or mim2cc - squares-grid 190 800 800 - calma 71 44 - -#---------------------------------------------------------------- -# MET5 -#---------------------------------------------------------------- - layer MET5 allm5,m5fill - calma 72 20 - - layer MET5TXT - labels allm5 noport - calma 72 5 - - layer MET5PIN - labels allm5 port - calma 72 16 - - layer MET5RES rm5 - labels rm5 - calma 72 13 - - layer MET5FILL m5fill - labels m5fill - calma 59 28 - - -#---------------------------------------------------------------- -# RDL -#---------------------------------------------------------------- - layer RDL *metrdl - calma 74 20 - - layer RDLTXT - labels *metrdl noport - calma 74 5 - - layer RDLPIN - labels *metrdl port - calma 74 16 - - layer PI1 *metrdl - and padl,glass - # Test only---needs GDS layer number - - layer UBM *metrdl - shrink 50000 - grow 40000 - # Test only---needs GDS layer number - - layer PI2 *metrdl - shrink 50000 - grow 25000 - # Test only---needs GDS layer number - - -#---------------------------------------------------------------- -# GLASS -#---------------------------------------------------------------- - layer GLASS glass - calma 76 20 - -#---------------------------------------------------------------- -# CAPM -#---------------------------------------------------------------- - layer CAPM *mimcap - labels mimcap - calma 89 44 - - layer CAPM2 *mimcap2 - labels mimcap2 - calma 97 44 - -#---------------------------------------------------------------- -# Chip top level marker for DRC latchup rules to check 15um -# distance to taps (otherwise 6um is used) -#---------------------------------------------------------------- - - layer LOWTAPDENSITY - bbox top - # Clear 200um for pads + 50um for required high tap density - # in critical area. - shrink 250000 - calma 81 14 - -#---------------------------------------------------------------- -# FILLBLOCK -#---------------------------------------------------------------- - layer FILLOBSFOM obsactive - calma 22 24 - - layer FILLOBSM1 fillblock,fillblock4 - calma 62 24 - - layer FILLOBSM2 fillblock,fillblock4 - calma 105 52 - - layer FILLOBSM3 fillblock,fillblock4 - calma 107 24 - - layer FILLOBSM4 fillblock,fillblock4 - calma 112 4 - - render DNWELL cwell -0.1 0.1 - render NWELL nwell 0.0 0.2062 - render DIFF ndiffusion 0.2062 0.12 - render TAP pdiffusion 0.2062 0.12 - render POLY polysilicon 0.3262 0.18 - render CONT via 0.5062 0.43 - render LI metal1 0.9361 0.10 - render MCON via 1.0361 0.34 - render MET1 metal2 1.3761 0.36 - render VIA1 via 1.7361 0.27 - render MET2 metal3 2.0061 0.36 - render VIA2 via 2.3661 0.42 - render MET3 metal4 2.7861 0.845 - render VIA3 via 3.6311 0.39 - render MET4 metal5 4.0211 0.845 - render VIA4 via 4.8661 0.505 - render MET5 metal6 5.3711 1.26 - render CAPM metal8 2.4661 0.2 - render CAPM2 metal9 3.7311 0.2 - render RDL metal7 11.8834 4.0 - -#---------------------------------------------------------------- -style drc -#---------------------------------------------------------------- -# NOTE: This style is used for DRC only, not for GDS output -#---------------------------------------------------------------- - scalefactor 10 nanometers - options calma-permissive-labels - - # Ensure nwell overlaps dnwell at least 0.4um outside and 1.03um inside - templayer dnwell_shrink dnwell - shrink 1030 - - templayer nwell_missing dnwell - grow 400 - and-not dnwell_shrink - and-not nwell - - templayer pwell_in_dnwell dnwell - and-not nwell - - # SONOS nFET devices must be in deep nwell - templayer dnwell_missing nsonos - and-not dnwell - - # SONOS nFET devices must be in cell with abutment box - templayer abutment_box - boundary - - templayer bbox_missing nsonos - and-not abutment_box - - # Make sure nwell covers varactor poly - templayer var_poly_no_nwell - bloat-all varactor,mvvaractor *poly - grow 150 - and-not nwell - - # Define MiM cap bottom plate for spacing rule - templayer mim_bottom - bloat-all *mimcap *metal3 - - # Define MiM2 cap bottom plate for spacing rule - templayer mim2_bottom - bloat-all *mimcap2 *metal4 - - # Define areas where mim2cc is inside the boundary of mimcc - # by more than the contact surround - templayer mim2_contact_overlap - bloat-all *mimcap2 mimcc - shrink 60 - and-not *mimcap2 - - # Note that metal fill is performed by the foundry and so is not - # an option for a cifoutput style. - - # Check latchup rule (15um minimum from tap LICON center to any - # non-tap diffusion. Note that to count as a tap, the diffusion - # must be contacted to LI - - templayer ptap_reach psc,mvpsc - and-not dnwell - # grow total is 15um. grow in 0.84um increments to ensure that - # no nwell ring is crossed - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 635 - and-not nwell,dnwell - - templayer ptap_missing *ndiff,*mvndiff - and-not dnwell - and-not ptap_reach - - templayer ntap_reach nsc,mvnsc - # grow total is 15um. grow in 1.27um increments to ensure that - # no nwell ring is crossed. There is no difference between - # ntaps in and out of deep nwell. - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 945 - and nwell,pnp - - templayer ntap_missing *pdiff,*mvpdiff - and-not pwell_in_dnwell - and-not ntap_reach - - templayer dptap_reach psc,mvpsc - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 635 - and-not nwell - and dnwell - - templayer dptap_missing *ndiff,*mvndiff - and dnwell - and-not dptap_reach - - templayer pdiff_crosses_dnwell dnwell - grow 20 - and-not dnwell - and allpdifflv,allpdiffmv - - # MV nwell must be 2um from any other nwell - templayer mvnwell - bloat-all alldiffmv nwell - grow-min 840 - bridge 700 600 - - # Simple spacing checks to lvnwell must use CIF-DRC rule - # Note that HVI may *abut* lvnwell; this can only be handled - # with mask-hints layers. - - templayer drawn_hvi - mask-hints HVI - - templayer allmvdiffnowell *mvndiff,*mvpsd - and-not drawn_hvi - - templayer nwell_or_hvi nwell,drawn_hvi - - templayer lvnwell nwell - and-not mvnwell - - templayer nwell_with_tap - bloat-all nsc,mvnsc nwell,pnp - - templayer nwell_missing_tap nwell,pnp - and-not nwell_with_tap - - templayer tap_with_licon - bloat-all allpactivetap psd,mvpsd - bloat-all allnactivetap nsd,mvnsd - - templayer tap_missing_licon allnactivetap,allpactivetap - and-not tap_with_licon - - # Make sure varactor nwell contains no P diffusion - templayer pdiff_in_varactor_well - bloat-all varactor,mvvaractor nwell - and allpactive - - # HVNTM spacing requires recreating HVNTM - templayer hvntm_block *mvpsd - grow 185 - - templayer hvntm_generate - bloat-all mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,mvrdn,*nndiode *mvndiff - bloat-all mvvaractor *mvnsd - and-not hvntm_block - grow 185 - grow 345 - shrink 345 - and-not hvntm_block - - # RPM spacing checks require recreating RPM - templayer rpm_generate - bloat-all xhrpoly,uhrpoly xpc - grow 200 - grow-min 1270 - grow 420 - shrink 420 - - # Check distance RPM to NSDM - templayer rpm_nsd_check rpm_generate - grow 325 - and allndifflv,allndiffmv - - # Check distance RPM to (unrelated) POLY - templayer rpm_poly_check rpm_generate - grow 200 - and-not xhrpoly,uhrpoly,xpc - and allpoly - - # Check distance RPM to HVNTM - templayer rpm_hvntm_check rpm_generate - grow 385 - and allndiffmvnontap - - templayer m1_small_hole allm1,obsm1,obsmcon - close 140000 - - templayer m1_hole_empty m1_small_hole - and-not allm1,obsm1,obsmcon - - templayer m2_small_hole allm2,obsm2 - close 140000 - - templayer m2_hole_empty m2_small_hole - and-not allm2,obsm2 - - templayer m1_huge allm1 - shrink 1500 - grow 1500 - - templayer m1_large_halo m1_huge - grow 280 - and-not m1_huge - and allm1 - - templayer m2_huge allm2 - shrink 1500 - grow 1500 - - templayer m2_large_halo m2_huge - grow 280 - and-not m2_huge - and allm2 - - templayer m3_huge allm3 - shrink 1500 - grow 1500 - - templayer m3_large_halo m3_huge - grow 400 - and-not m3_huge - and allm3 - - templayer m4_huge allm4 - shrink 1500 - grow 1500 - - templayer m4_large_halo m4_huge - grow 400 - and-not m4_huge - and allm4 - - -#---------------------------------------------------------------- -style density -#---------------------------------------------------------------- -# Style used by scripts to check for fill density -#---------------------------------------------------------------- - scalefactor 10 nanometers - options calma-permissive-labels - gridlimit 5 - - templayer fom_all alldiff,fomfill - - templayer poly_all allpoly,polyfill - - templayer li_all allli,lifill - - templayer m1_all allm1,m1fill - - templayer m2_all allm2,m2fill - - templayer m3_all allm3,m3fill - - templayer m4_all allm4,m4fill - - templayer m5_all allm5,m5fill - -#---------------------------------------------------------------- -style wafflefill variants (),(tiled) -#---------------------------------------------------------------- -# Style used by scripts for automatically generating fill layers -# NOTE: Be sure to generate output on flattened layout. -#---------------------------------------------------------------- - scalefactor 10 nanometers - options calma-permissive-labels - gridlimit 5 - -#---------------------------------------------------------------- -# Generate and retain a layer representing the bounding box. -# -# For variant (): -# The bounding box is the full extent of geometry on the top level -# cell. -# -# For variant (tiled): -# Use with a script that breaks layout into flattened tiles and runs -# fill individually on each. The tiles should be larger than the -# step size, and each should draw a layer "comment" the size of the -# step box. -#---------------------------------------------------------------- - - variants () - templayer topbox - bbox top - - variants (tiled) - templayer topbox comment - # Each tile imposes the full keepout distance rule of - # 3um on all sides. - shrink 1500 - - variants * - -#---------------------------------------------------------------- -# Generate guard-band around nwells to keep FOM from crossing -# Spacing from LV nwell = Diff/Tap 9 = 0.34um -# Spacing from HV nwell = Diff/Tap 18 = 0.43um (= 0.18 + 0.25) -# Enclosure by nwell = Diff/Tap 8 = 0.18um -#---------------------------------------------------------------- - - templayer mvnwell - bloat-all alldiffmv nwell - - templayer lvnwell allnwell - and-not mvnwell - - templayer well_shrink mvnwell - shrink 250 - or lvnwell - shrink 180 - templayer well_guardband allnwell - grow 340 - and-not well_shrink - -#--------------------------------------------------- -# Diffusion and poly keep-out areas -#--------------------------------------------------- - templayer obstruct_fom alldiff,allpoly,fomfill,polyfill,obsactive - or rpw,pnp,npn - grow 500 - or well_guardband - - templayer obstruct_poly alldiff,allpoly,fomfill,polyfill,obsactive - or rpw,pnp,npn - grow 1000 - -#--------------------------------------------------- -# FOM and POLY fill -#--------------------------------------------------- - templayer fomfill_pass1 topbox - # slots 0 4080 1320 0 4080 1320 1360 0 - slots 0 4080 1600 0 4080 1600 1360 0 - and-not obstruct_fom - and topbox - shrink 2035 - grow 2035 - -#--------------------------------------------------- - - templayer obstruct_poly_pass1 fomfill_pass1 - grow 300 - or obstruct_poly - templayer polyfill_pass1 topbox - slots 0 720 360 0 720 360 240 0 - and-not obstruct_poly_pass1 - and topbox - shrink 355 - grow 355 - -#--------------------------------------------------- - - templayer obstruct_fom_pass2 fomfill_pass1 - grow 1290 - or polyfill_pass1 - grow 300 - or obstruct_fom - templayer fomfill_pass2 topbox - slots 0 2500 1320 0 2500 1320 1360 0 - and-not obstruct_fom_pass2 - and topbox - shrink 1245 - grow 1245 - -#--------------------------------------------------- - - templayer obstruct_poly_coarse polyfill_pass1 - grow 60 - or fomfill_pass1,fomfill_pass2 - grow 300 - or obstruct_poly - templayer polyfill_coarse topbox - slots 0 720 360 0 720 360 240 120 - and-not obstruct_poly_coarse - and topbox - shrink 355 - grow 355 - -#--------------------------------------------------- - templayer obstruct_poly_medium polyfill_pass1,polyfill_coarse - grow 60 - or fomfill_pass1,fomfill_pass2 - grow 300 - or obstruct_poly - templayer polyfill_medium topbox - slots 0 540 360 0 540 360 240 100 - and-not obstruct_poly_medium - and topbox - shrink 265 - grow 265 - -#--------------------------------------------------- - templayer obstruct_poly_fine polyfill_pass1,polyfill_coarse,polyfill_medium - grow 60 - or fomfill_pass1,fomfill_pass2 - grow 300 - or obstruct_poly - templayer polyfill_fine topbox - slots 0 480 360 0 480 360 240 200 - and-not obstruct_poly_fine - and topbox - shrink 235 - grow 235 - -#--------------------------------------------------- - - templayer obstruct_fom_coarse fomfill_pass1,fomfill_pass2 - grow 1290 - or polyfill_pass1,polyfill_coarse,polyfill_medium,polyfill_fine - grow 300 - or obstruct_fom - templayer fomfill_coarse topbox - slots 0 1500 1320 0 1500 1320 1360 0 - and-not obstruct_fom_coarse - and topbox - shrink 745 - grow 745 - -#--------------------------------------------------- - - templayer obstruct_fom_fine fomfill_pass1,fomfill_pass2,fomfill_coarse - grow 1290 - or polyfill_pass1,polyfill_coarse,polyfill_medium,polyfill_fine - grow 300 - or obstruct_fom - templayer fomfill_fine topbox - slots 0 500 400 0 500 400 160 0 - and-not obstruct_fom_fine - and topbox - shrink 245 - grow 245 - -#--------------------------------------------------- - layer FOMFILL fomfill_pass1 - or fomfill_pass2 - or fomfill_coarse - or fomfill_fine - calma 23 28 - - layer POLYFILL polyfill_pass1 - or polyfill_coarse - or polyfill_medium - or polyfill_fine - calma 28 28 - -#--------------------------------------------------------- -# LI fill -# Note requirement that LI fill may not overlap (non-fill) -# diff or poly. -#--------------------------------------------------------- - - templayer obstruct_li_coarse allli,allpad,obsli,lifill,fillblock,fillblock4 - grow 2800 - or alldiff,allpoly - grow 200 - templayer lifill_coarse topbox - # slots 0 3000 650 0 3000 650 700 0 - slots 0 3000 900 0 3000 900 700 0 - and-not obstruct_li_coarse - and topbox - shrink 1495 - grow 1495 - - templayer obstruct_li_medium allli,allpad,obsli,lifill,fillblock,fillblock4 - grow 2500 - or lifill_coarse - grow 300 - or alldiff,allpoly - grow 200 - templayer lifill_medium topbox - slots 0 1500 500 0 1500 500 700 0 - and-not obstruct_li_medium - and topbox - shrink 745 - grow 745 - - templayer obstruct_li_fine allli,allpad,obsli,lifill,fillblock,fillblock4 - or lifill_coarse,lifill_medium - grow 300 - or alldiff,allpoly - grow 200 - templayer lifill_fine topbox - slots 0 580 500 0 580 500 700 0 - and-not obstruct_li_fine - and topbox - shrink 285 - grow 285 - - layer LIFILL lifill_coarse - or lifill_medium - or lifill_fine - calma 56 28 - -#--------------------------------------------------- -# MET1 fill -#--------------------------------------------------- - - templayer obstruct_m1_coarse allm1,allpad,obsm1,m1fill,fillblock,fillblock4 - grow 3000 - templayer met1fill_coarse topbox - # slots 0 2000 200 0 2000 200 700 0 - slots 0 2000 800 0 2000 800 700 350 - and-not obstruct_m1_coarse - and topbox - shrink 995 - grow 995 - - templayer obstruct_m1_medium allm1,allpad,obsm1,m1fill,fillblock,fillblock4 - grow 2800 - or met1fill_coarse - grow 200 - templayer met1fill_medium topbox - slots 0 1000 200 0 1000 200 700 0 - and-not obstruct_m1_medium - and topbox - shrink 495 - grow 495 - - templayer obstruct_m1_fine allm1,allpad,obsm1,m1fill,fillblock,fillblock4 - grow 300 - or met1fill_coarse,met1fill_medium - grow 200 - templayer met1fill_fine topbox - slots 0 580 200 0 580 200 700 0 - and-not obstruct_m1_fine - and topbox - shrink 285 - grow 285 - - templayer obstruct_m1_veryfine allm1,allpad,obsm1,m1fill,fillblock,fillblock4 - grow 100 - or met1fill_coarse,met1fill_medium,met1fill_fine - grow 200 - templayer met1fill_veryfine topbox - slots 0 300 200 0 300 200 100 50 - and-not obstruct_m1_veryfine - and topbox - shrink 145 - grow 145 - - layer MET1FILL met1fill_coarse - or met1fill_medium - or met1fill_fine - or met1fill_veryfine - calma 36 28 - -#--------------------------------------------------- -# MET2 fill -#--------------------------------------------------- - templayer obstruct_m2 allm2,allpad,obsm2,m2fill,fillblock,fillblock4 - grow 3000 - templayer met2fill_coarse topbox - # slots 0 2000 200 0 2000 200 700 350 - slots 0 2000 800 0 2000 800 700 350 - and-not obstruct_m2 - and topbox - shrink 995 - grow 995 - - templayer obstruct_m2_medium allm2,allpad,obsm2,m2fill,fillblock,fillblock4 - grow 2800 - or met2fill_coarse - grow 200 - templayer met2fill_medium topbox - slots 0 1000 200 0 1000 200 700 350 - and-not obstruct_m2_medium - and topbox - shrink 495 - grow 495 - - templayer obstruct_m2_fine allm2,allpad,obsm2,m2fill,fillblock,fillblock4 - grow 300 - or met2fill_coarse,met2fill_medium - grow 200 - templayer met2fill_fine topbox - slots 0 580 200 0 580 200 700 350 - and-not obstruct_m2_fine - and topbox - shrink 285 - grow 285 - - templayer obstruct_m2_veryfine allm2,allpad,obsm2,m2fill,fillblock,fillblock4 - grow 100 - or met2fill_coarse,met2fill_medium,met2fill_fine - grow 200 - templayer met2fill_veryfine topbox - slots 0 300 200 0 300 200 100 100 - and-not obstruct_m2_veryfine - and topbox - shrink 145 - grow 145 - - layer MET2FILL met2fill_coarse - or met2fill_medium - or met2fill_fine - or met2fill_veryfine - calma 41 28 - -#--------------------------------------------------- -# MET3 fill -#--------------------------------------------------- - templayer obstruct_m3 allm3,allpad,obsm3,m3fill,fillblock,fillblock4 - grow 3000 - templayer met3fill_coarse topbox - # slots 0 2000 300 0 2000 300 700 700 - slots 0 2000 800 0 2000 800 700 350 - and-not obstruct_m3 - and topbox - shrink 995 - grow 995 - - templayer obstruct_m3_medium allm3,allpad,obsm3,m3fill,fillblock,fillblock4 - grow 2700 - or met3fill_coarse - grow 300 - templayer met3fill_medium topbox - slots 0 1000 300 0 1000 300 700 700 - and-not obstruct_m3_medium - and topbox - shrink 495 - grow 495 - - templayer obstruct_m3_fine allm3,allpad,obsm3,m3fill,fillblock,fillblock4 - grow 200 - or met3fill_coarse,met3fill_medium - grow 300 - templayer met3fill_fine topbox - slots 0 580 300 0 580 300 700 700 - and-not obstruct_m3_fine - and topbox - shrink 285 - grow 285 - - templayer obstruct_m3_veryfine allm3,allpad,obsm3,m3fill,fillblock,fillblock4 - # Note: Adding 0.1 to waffle rule to clear wide spacing rule - grow 100 - or met3fill_coarse,met3fill_medium,met3fill_fine - grow 300 - templayer met3fill_veryfine topbox - slots 0 400 300 0 400 300 150 200 - and-not obstruct_m3_veryfine - and topbox - shrink 195 - grow 195 - - layer MET3FILL met3fill_coarse - or met3fill_medium - or met3fill_fine - or met3fill_veryfine - calma 34 28 - -#--------------------------------------------------- -# MET4 fill -#--------------------------------------------------- - templayer obstruct_m4 allm4,allpad,obsm4,m4fill,fillblock,fillblock4 - grow 3000 - templayer met4fill_coarse topbox - # slots 0 2000 300 0 2000 300 700 1050 - slots 0 2000 800 0 2000 800 700 350 - and-not obstruct_m4 - and topbox - shrink 995 - grow 995 - - templayer obstruct_m4_medium allm4,allpad,obsm4,m4fill,fillblock,fillblock4 - grow 2700 - or met4fill_coarse - grow 300 - templayer met4fill_medium topbox - slots 0 1000 300 0 1000 300 700 1050 - and-not obstruct_m4_medium - and topbox - shrink 495 - grow 495 - - templayer obstruct_m4_fine allm4,allpad,obsm4,m4fill,fillblock,fillblock4 - grow 200 - or met4fill_coarse,met4fill_medium - grow 300 - templayer met4fill_fine topbox - slots 0 580 300 0 580 300 700 1050 - and-not obstruct_m4_fine - and topbox - shrink 285 - grow 285 - - templayer obstruct_m4_veryfine allm4,allpad,obsm4,m4fill,fillblock,fillblock4 - # Note: Adding 0.1 to waffle rule to clear wide spacing rule - grow 100 - or met4fill_coarse,met4fill_medium,met4fill_fine - grow 300 - templayer met4fill_veryfine topbox - slots 0 400 300 0 400 300 150 300 - and-not obstruct_m4_veryfine - and topbox - shrink 195 - grow 195 - - layer MET4FILL met4fill_coarse - or met4fill_medium - or met4fill_fine - or met4fill_veryfine - calma 51 28 - -#--------------------------------------------------- -# MET5 fill -#--------------------------------------------------- - templayer obstruct_m5 allm5,allpad,obsm5,m5fill,fillblock - grow 3000 - templayer met5fill_coarse topbox - slots 0 5000 1600 0 5000 1600 1000 100 - and-not obstruct_m5 - and topbox - shrink 2495 - grow 2495 - - templayer obstruct_m5_medium allm5,allpad,obsm5,m5fill,fillblock - grow 1400 - or met5fill_coarse - grow 1600 - templayer met5fill_medium topbox - slots 0 3000 1600 0 3000 1600 1000 100 - and-not obstruct_m5_medium - and topbox - shrink 1495 - grow 1495 - - layer MET5FILL met5fill_coarse - or met5fill_medium - calma 59 28 - -end - -#----------------------------------------------------------------------- -cifinput -#----------------------------------------------------------------------- -# NOTE: All values in this section MUST be multiples of 25 -# or else magic will scale below the allowed layout grid size -#----------------------------------------------------------------------- - -style sky130 variants (vendor),() - scalefactor 10 nanometers - gridlimit 5 - - options ignore-unknown-layer-labels no-reconnect-labels - - ignore NPC - ignore SEALID - ignore CAPID - ignore LDNTM - ignore HVNTM - ignore POLYMOD - ignore LOWTAPDENSITY - ignore FILLOBSPOLY - ignore OUTLINE - - layer pnp NWELL,WELLTXT,WELLPIN - and PNPID - labels NWELL - variants (vendor) - labels WELLTXT port - variants () - labels WELLTXT text - variants * - labels WELLPIN port - - layer nwell NWELL,WELLTXT,WELLPIN - and-not PNPID - labels NWELL - variants (vendor) - labels WELLTXT port - variants () - labels WELLTXT text - variants * - labels WELLPIN port - - templayer nwellarea NWELL - copyup nwelcheck - - # Copy nwell areas up for diffusion checks - templayer xnwelcheck nwelcheck - copyup nwelcheck - - templayer hvarea HVI - copyup hvcheck - - # Copy high-voltage (HVI) areas up for diffusion checks - templayer xhvcheck hvcheck - copyup hvcheck - - # Always draw pwell under p-tap and n-diff. This is not always - # necessary but works better with deep nwell for correct extraction. - layer pwell TAP,DIFF - and-not NWELL,nwelcheck - grow 130 - or SUBTXT,SUBPIN - grow 420 - shrink 420 - variants (vendor) - labels SUBTXT port - variants () - labels SUBTXT text - variants * - labels SUBPIN port - - layer dnwell DNWELL - labels DNWELL - - layer isosub SUBCUT - labels SUBCUT - - layer npn DNWELL - and-not NWELL,nwelcheck - and NPNID - - layer rpw PWRES - and DNWELL - labels PWRES - - templayer ndiffarea DIFF,DIFFTXT,DIFFPIN,barediff - and-not POLY - and-not NWELL,nwelcheck - and-not PSDM - and-not DIODE - and-not DIFFRES - and-not HVI,hvcheck - and NSDM - and-not CORELI - copyup ndifcheck - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer ndiff ndiffarea - - # Copy ndiff areas up for contact checks - templayer xndifcheck ndifcheck - copyup ndifcheck - - templayer mvndiffarea DIFF,DIFFTXT,DIFFPIN,barediff - and-not POLY - and-not NWELL,nwelcheck - and-not PSDM - and-not DIODE - and-not DIFFRES - and HVI,hvcheck - and NSDM - copyup ndifcheck - labels DIFF - labels DIFFTXT text - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer mvndiff mvndiffarea - - # Copy ndiff areas up for contact checks - templayer mvxndifcheck mvndifcheck - copyup mvndifcheck - - layer ndiode DIFF,barediff - and NSDM - and DIODE - and-not NWELL,nwelcheck - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and-not LVTN - labels DIFF - - layer ndiodelvt DIFF,barediff - and NSDM - and DIODE - and-not NWELL,nwelcheck - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and LVTN - labels DIFF - - templayer ndiodearea DIODE - and NSDM - and-not HVI,hvcheck - and-not NWELL,nwelcheck - copyup DIODE,NSDM - - layer ndiffres DIFFRES - and NSDM - and-not HVI,hvcheck - labels DIFF - - templayer pdiffarea DIFF,DIFFTXT,DIFFPIN,barediff - and-not POLY - and NWELL,nwelcheck - and-not NSDM - and-not DIODE - and-not HVI,hvcheck - and PSDM - copyup pdifcheck - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer pdiff pdiffarea - - layer mvndiode DIFF,barediff - and NSDM - and DIODE - and HVI,hvcheck - and-not POLY - and-not PSDM - and-not LVTN - labels DIFF - - layer nndiode DIFF,barediff - and NSDM - and DIODE - and HVI,hvcheck - and-not POLY - and-not PSDM - and LVTN - labels DIFF - - templayer mvndiodearea DIODE - and NSDM - and HVI,hvcheck - and-not NWELL,nwelcheck - copyup DIODE,NSDM - - layer mvndiffres DIFFRES - and NSDM - and HVI,hvcheck - labels DIFF - - templayer mvpdiffarea DIFF,DIFFTXT,DIFFPIN,barediff - and-not POLY - and NWELL,nwelcheck - and-not NSDM - and HVI,hvcheck - and-not DIODE - and-not DIFFRES - and PSDM - copyup mvpdifcheck - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer mvpdiff mvpdiffarea - - # Copy pdiff areas up for contact checks - templayer xpdifcheck pdifcheck - copyup pdifcheck - - layer pdiode DIFF,barediff - and PSDM - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not LVTN - and-not HVTP - and DIODE - labels DIFF - - layer pdiodelvt DIFF,barediff - and PSDM - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and LVTN - and-not HVTP - and DIODE - labels DIFF - - layer pdiodehvt DIFF,barediff - and PSDM - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not LVTN - and HVTP - and DIODE - labels DIFF - - templayer pdiodearea DIODE - and PSDM - and-not HVI,hvcheck - copyup DIODE,PSDM - - # Define pfet areas as known pdiff, regardless of the presence of a well. - - templayer pfetarea DIFF,barediff - and POLY - or baretrans - and-not NSDM - and-not HVI,hvcheck - - layer pfet pfetarea - and-not LVTN - and-not HVTP - and-not STDCELL - and-not COREID - labels DIFF - - layer scpfet pfetarea - and-not LVTN - and-not HVTP - and STDCELL - and-not COREID - labels DIFF - - layer scpfethvt pfetarea - and-not LVTN - and HVTP - and STDCELL - labels DIFF - - layer ppu pfetarea - and-not LVTN - and HVTP - and COREID - # Shrink-grow operation eliminates the smaller parasitie device - # shrink 70 - # grow 70 - labels DIFF - - layer pfetlvt pfetarea - and LVTN - labels DIFF - - layer pfetmvt pfetarea - and HVTR - labels DIFF - - layer pfethvt pfetarea - and HVTP - and-not STDCELL - and-not COREID - labels DIFF - - # Always force nwell under pfet (nwell encloses pdiff by 0.18) - layer nwell pfetarea - and-not COREID - grow 180 - - # Copy mvpdiff areas up for contact checks - templayer mvxpdifcheck mvpdifcheck - copyup mvpdifcheck - - layer mvpdiode DIFF,barediff - and PSDM - and-not POLY - and-not NSDM - and HVI,hvcheck - and DIODE - labels DIFF - - templayer mvpdiodearea DIODE - and PSDM - and HVI,hvcheck - copyup DIODE,PSDM - - # Define pfet areas as known pdiff, - # regardless of the presence of a - # well. - - templayer mvpfetarea DIFF,barediff - and POLY - or baretrans - and-not NSDM - and HVI,hvcheck - - layer mvpfet mvpfetarea - and-not ESDID - labels DIFF - - layer mvpfetesd mvpfetarea - and ESDID - labels DIFF - - layer pdiff DIFF,DIFFTXT,DIFFPIN,barediff - and-not NSDM - and-not POLY - and-not HVI,hvcheck - and-not DIODE - and-not DIFFRES - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer pdiffres DIFFRES - and PSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - labels DIFF - - layer nfet DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not HVI,hvcheck - and-not LVTN - and-not SONOS - and-not STDCELL - and-not COREID - labels DIFF - - layer scnfet DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not NWELL,nwelcheck - and-not HVI,hvcheck - and-not LVTN - and-not SONOS - and STDCELL - labels DIFF - - layer npass DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not NWELL,nwelcheck - and COREID - labels DIFF - - layer npd DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not NWELL,nwelcheck - and COREID - # Shrink-grow operation eliminates the smaller npass device - shrink 70 - grow 70 - labels DIFF - - # Devices abutting tap under gate are officially npd, not npass - layer npd TAP - grow 100 - and DIFF - and POLY - and-not PSDM - and NSDM - and-not NWELL,nwelcheck - and COREID - labels DIFF - - layer nfetlvt DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not HVI,hvcheck - and LVTN - and-not SONOS - labels DIFF - - layer nsonos DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not HVI,hvcheck - and LVTN - and SONOS - labels DIFF - - templayer nsdarea TAP - and NSDM - and NWELL,nwelcheck - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and-not CORELI - copyup nsubcheck - - layer nsd nsdarea - labels TAP - - layer nsd TAP,TAPTXT - and NSDM - and-not POLY - and-not HVI,hvcheck - labels TAP - labels TAPTXT text - - layer corenvar TAP - and NSDM - and POLY - and COREID - labels TAP - - templayer nsdexpand nsdarea - grow 500 - - # Copy nsub areas up for contact checks - templayer xnsubcheck nsubcheck - copyup nsubcheck - - templayer psdarea TAP - and PSDM - and-not NWELL,nwelcheck - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not pfetexpand - copyup psubcheck - - layer psd psdarea - labels TAP - - layer psd TAP - and PSDM - and-not POLY - and-not HVI,hvcheck - labels TAP - labels TAPTXT text - - layer corepvar TAP - and PSDM - and POLY - and COREID - labels TAP - - templayer psdexpand psdarea - grow 500 - - layer mvpdiff DIFF,DIFFTXT,DIFFPIN,barediff - and-not NSDM - and-not POLY - and HVI,hvcheck - and mvpfetexpand - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer mvpdiffres DIFFRES - and PSDM - and NWELL,nwelcheck - and HVI,hvcheck - and-not mvrdpioedge - labels DIFF - - templayer mvnfetarea DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not LVTN - and HVI,hvcheck - grow 350 - - templayer mvnnfetarea DIFF,TAP,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and LVTN - and HVI,hvcheck - and-not mvnfetarea - - layer mvnfetesd DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and HVI,hvcheck - and ESDID - and-not mvnnfetarea - labels DIFF - - layer mvnfet DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and HVI,hvcheck - and-not ESDID - and-not mvnnfetarea - labels DIFF - - layer nnfet mvnnfetarea - and LVID - labels DIFF - - layer mvnnfet mvnnfetarea - and-not LVID - labels DIFF - - templayer mvnsdarea TAP - and NSDM - and NWELL,nwelcheck - and-not POLY - and-not PSDM - and HVI,hvcheck - copyup mvnsubcheck - - layer mvnsd mvnsdarea - labels TAP - - layer mvnsd TAP,TAPTXT - and NSDM - and HVI,hvcheck - labels TAP - labels TAPTXT text - - templayer mvnsdexpand mvnsdarea - grow 500 - - # Copy nsub areas up for contact checks - templayer mvxnsubcheck mvnsubcheck - copyup mvnsubcheck - - templayer mvpsdarea DIFF,barediff - and PSDM - and-not NWELL,nwelcheck - and-not POLY - and-not NSDM - and HVI,hvcheck - and-not mvpfetexpand - copyup mvpsubcheck - - layer mvpsd mvpsdarea - labels DIFF - - layer mvpsd TAP,TAPTXT - and PSDM - and HVI,hvcheck - labels TAP - labels TAPTXT text - - templayer mvpsdexpand mvpsdarea - grow 500 - - # Copy psub areas up for contact checks - templayer xpsubcheck psubcheck - copyup psubcheck - - templayer mvxpsubcheck mvpsubcheck - copyup mvpsubcheck - - layer psd TAP - and-not PSDM - and-not NSDM - and-not POLY - and-not HVI,hvcheck - and-not pfetexpand - and psdexpand - - layer nsd TAP - and-not PSDM - and-not NSDM - and-not POLY - and-not HVI,hvcheck - and nsdexpand - - layer mvpsd TAP - and-not PSDM - and-not NSDM - and-not POLY - and HVI,hvcheck - and-not mvpfetexpand - and mvpsdexpand - - layer mvnsd TAP - and-not PSDM - and-not NSDM - and-not POLY - and HVI,hvcheck - and mvnsdexpand - - templayer hresarea POLY - and RPM - grow 3000 - - templayer uresarea POLY - and URPM - grow 3000 - - templayer diffresarea DIFFRES - and-not HVI,hvcheck - grow 3000 - - templayer mvdiffresarea DIFFRES - and HVI,hvcheck - grow 3000 - - templayer resarea diffresarea,mvdiffresarea,hresarea,uresarea - - layer pfet POLY - and DIFF - and diffresarea - and-not NSDM - and-not STDCELL - - layer scpfet POLY - and DIFF - and diffresarea - and-not HVTP - and-not NSDM - and STDCELL - - layer scpfethvt POLY - and DIFF - and diffresarea - and HVTP - and-not NSDM - and STDCELL - - templayer xpolyterm RPM,URPM - and POLY - and-not POLYRES - # add back the 0.06um contact surround in the direction of the resistor - grow 60 - and POLY - - layer xpc xpolyterm - - templayer polyarea POLY,POLYTXT,POLYPIN - and-not POLYRES - and-not POLYSHORT - and-not DIFF - and-not TAP - and-not RPM - and-not URPM - copyup polycheck - - layer poly polyarea - labels POLY - variants (vendor) - labels POLYTXT port - variants () - labels POLYTXT text - variants * - labels POLYPIN port - - # Copy (non-resistor) poly areas up for contact checks - templayer xpolycheck polycheck - copyup polycheck - - layer mrp1 POLY - and POLYRES - and-not RPM - and-not URPM - labels POLY - - layer rmp POLY - and POLYSHORT - labels POLY - - layer xhrpoly POLY - and POLYRES - and RPM - and-not URPM - and PSDM - and NPC - and-not xpolyterm - labels POLY - - layer uhrpoly POLY - and POLYRES - and URPM - and-not RPM - and NPC - and-not xpolyterm - labels POLY - - templayer ndcbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and-not NWELL,nwelcheck - and-not HVI,hvcheck - - layer ndc ndcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndcbase - labels CONT - - templayer nscbase CONT - or barecont - and LI - or licont - and DIFF,TAP - and NSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - - layer nsc nscbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or nscbase - labels CONT - - templayer pdcbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - - layer pdc pdcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdcbase - labels CONT - - templayer pdcnowell CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and pfetexpand - and-not HVI,hvcheck - - layer pdc pdcnowell - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdcnowell - labels CONT - - templayer pscbase CONT - or barecont - and LI - or licont - and DIFF,TAP - and PSDM - and-not NWELL,nwelcheck - and-not pfetexpand - and-not HVI,hvcheck - - layer psc pscbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pscbase - labels CONT - - templayer pcbase CONT - or barecont - and LI - or licont - and POLY - and-not DIFF - and-not RPM,URPM - - layer pc pcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pcbase - labels CONT - - templayer ndicbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and DIODE - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and-not LVTN - - layer ndic ndicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndicbase - labels CONT - - templayer ndilvtcbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and DIODE - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and LVTN - - layer ndilvtc ndilvtcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndilvtcbase - labels CONT - - templayer pdicbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and DIODE - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not LVTN - and-not HVTP - - layer pdic pdicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdicbase - labels CONT - - templayer pdilvtcbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and DIODE - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and LVTN - and-not HVTP - - layer pdilvtc pdilvtcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdilvtcbase - labels CONT - - templayer pdihvtcbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and DIODE - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not LVTN - and HVTP - - layer pdihvtc pdihvtcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdihvtcbase - labels CONT - - templayer mvndcbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and-not NWELL,nwelcheck - and HVI,hvcheck - - layer mvndc mvndcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvndcbase - labels CONT - - templayer mvnscbase CONT - or barecont - and LI - or licont - and DIFF,TAP - and NSDM - and NWELL,nwelcheck - and HVI,hvcheck - - layer mvnsc mvnscbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvnscbase - labels CONT - - templayer mvpdcbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and NWELL,nwelcheck - and HVI,hvcheck - - layer mvpdc mvpdcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdcbase - labels CONT - - templayer mvpdcnowell CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and mvpfetexpand - and MET1 - and HVI,hvcheck - - layer mvpdc mvpdcnowell - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdcnowell - labels CONT - - templayer mvpscbase CONT - or barecont - and LI - or licont - and DIFF,TAP - and PSDM - and-not NWELL,nwelcheck - and-not mvpfetexpand - and HVI,hvcheck - - layer mvpsc mvpscbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpscbase - labels CONT - - templayer mvndicbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and DIODE - and-not POLY - and-not PSDM - and-not LVTN - and HVI,hvcheck - - layer mvndic mvndicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvndicbase - labels CONT - - templayer nndicbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and DIODE - and-not POLY - and-not PSDM - and LVTN - and HVI,hvcheck - - layer nndic nndicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or nndicbase - labels CONT - - templayer mvpdicbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and DIODE - and-not POLY - and-not NSDM - and HVI,hvcheck - - layer mvpdic mvpdicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdicbase - labels CONT - - layer fomfill FOMFILL - labels FOMFILL - - layer polyfill POLYFILL - labels POLYFILL - - layer coreli LI,LITXT,LIPIN - and-not LIRES,LISHORT - and COREID - labels LI - variants (vendor) - labels LITXT port - variants () - labels LITXT text - variants * - labels LIPIN port - - layer locali LI,LITXT,LIPIN - and-not LIRES,LISHORT - and-not COREID - labels LI - variants (vendor) - labels LITXT port - variants () - labels LITXT text - variants * - labels LIPIN port - - layer rli LI - and LIRES,LISHORT - labels LIRES,LISHORT - - layer lifill LIFILL - labels LIFILL - - layer mcon MCON - grow 95 - shrink 95 - shrink 85 - grow 85 - or MCON - labels MCON - - layer m1 MET1,MET1TXT,MET1PIN - and-not MET1RES,MET1SHORT - labels MET1 - variants (vendor) - labels MET1TXT port - variants () - labels MET1TXT text - variants * - labels MET1PIN port - - layer rm1 MET1 - and MET1RES,MET1SHORT - labels MET1RES,MET1SHORT - - layer m1fill MET1FILL - labels MET1FILL - - layer mimcap MET3 - and CAPM - labels CAPM - - layer mimcc VIA3 - and CAPM - grow 60 - grow 40 - shrink 40 - labels CAPM - - layer mimcap2 MET4 - and CAPM2 - labels CAPM2 - - layer mim2cc VIA4 - and CAPM2 - grow 190 - grow 210 - shrink 210 - labels CAPM2 - - - templayer m2cbase VIA1 - and-not COREID - grow 5 - or VIA1 - grow 50 - - layer m2c m2cbase - grow 30 - shrink 30 - shrink 130 - grow 130 - or m2cbase - - layer m2 MET2,MET2TXT,MET2PIN - and-not MET2RES,MET2SHORT - labels MET2 - variants (vendor) - labels MET2TXT port - variants () - labels MET2TXT text - variants * - labels MET2PIN port - - layer rm2 MET2 - and MET2RES,MET2SHORT - labels MET2RES,MET2SHORT - - layer m2fill MET2FILL - labels MET2FILL - - templayer m3cbase VIA2 - grow 40 - - layer m3c m3cbase - grow 60 - shrink 60 - shrink 140 - grow 140 - or m3cbase - - layer m3 MET3,MET3TXT,MET3PIN - and-not MET3RES,MET3SHORT - labels MET3 - variants (vendor) - labels MET3TXT port - variants () - labels MET3TXT text - variants * - labels MET3PIN port - - layer rm3 MET3 - and MET3RES,MET3SHORT - labels MET3RES,MET3SHORT - - layer m3fill MET3FILL - labels MET3FILL - - - templayer via3base VIA3 - and-not CAPM - grow 60 - - layer via3 via3base - grow 40 - shrink 40 - shrink 160 - grow 160 - or via3base - - layer m4 MET4,MET4TXT,MET4PIN - and-not MET4RES,MET4SHORT - labels MET4 - variants (vendor) - labels MET4TXT port - variants () - labels MET4TXT text - variants * - labels MET4PIN port - - layer rm4 MET4 - and MET4RES,MET4SHORT - labels MET4RES,MET4SHORT - - layer m4fill MET4FILL - labels MET4FILL - - layer m5 MET5,MET5TXT,MET5PIN - and-not MET5RES,MET5SHORT - labels MET5 - variants (vendor) - labels MET5TXT port - variants () - labels MET5TXT text - variants * - labels MET5PIN port - - layer rm5 MET5 - and MET5RES,MET5SHORT - labels MET5RES,MET5SHORT - - layer m5fill MET5FILL - labels MET5FILL - - templayer via4base VIA4 - and-not CAPM2 - grow 190 - - layer via4 via4base - grow 210 - shrink 210 - shrink 590 - grow 590 - or via4base - - layer metrdl RDL,RDLTXT,RDLPIN - labels RDL - variants (vendor) - labels RDLTXT port - variants () - labels RDLTXT text - variants * - labels RDLPIN port - - # Find diffusion not covered in - # NSDM or PSDM and pull it into - # the next layer up - - templayer gentrans DIFF - and-not PSDM - and-not NSDM - and POLY - copyup baretrans - - templayer gendiff DIFF,TAP - and-not PSDM - and-not NSDM - and-not POLY - and-not COREID - copyup barediff - - # Handle contacts found by copyup - - templayer ndiccopy CONT - and LI - and DIODE - and NSDM - and-not HVI,hvcheck - - layer ndic ndiccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndiccopy - labels CONT - - templayer mvndiccopy CONT - and LI - and DIODE - and NSDM - and HVI,hvcheck - - layer mvndic mvndiccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvndiccopy - labels CONT - - templayer pdiccopy CONT - and LI - and DIODE - and PSDM - and-not HVI,hvcheck - - layer pdic pdiccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdiccopy - labels CONT - - templayer mvpdiccopy CONT - and LI - and DIODE - and PSDM - and HVI,hvcheck - - layer mvpdic mvpdiccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdiccopy - labels CONT - - templayer ndccopy CONT - and ndifcheck - - layer ndc ndccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndccopy - labels CONT - - templayer mvndccopy CONT - and mvndifcheck - - layer mvndc mvndccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvndccopy - labels CONT - - templayer pdccopy CONT - and pdifcheck - - layer pdc pdccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdccopy - labels CONT - - templayer mvpdccopy CONT - and mvpdifcheck - - layer mvpdc mvpdccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdccopy - labels CONT - - templayer pccopy CONT - and polycheck - - layer pc pccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or pccopy - labels CONT - - templayer nsccopy CONT - and nsubcheck - - layer nsc nsccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or nsccopy - labels CONT - - templayer mvnsccopy CONT - and mvnsubcheck - - layer mvnsc mvnsccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvnsccopy - labels CONT - - templayer psccopy CONT - and psubcheck - - layer psc psccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or psccopy - labels CONT - - templayer mvpsccopy CONT - and mvpsubcheck - - layer mvpsc mvpsccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpsccopy - labels CONT - - # Find contacts not covered in - # metal and pull them into the - # next layer up - - templayer gencont CONT - and LI - and-not DIFF,TAP - and-not POLY - and-not DIODE - and-not nsubcheck - and-not psubcheck - and-not mvnsubcheck - and-not mvpsubcheck - and-not CORELI - copyup barelicont - - templayer barecont CONT - and-not LI - and-not nsubcheck - and-not psubcheck - and-not mvnsubcheck - and-not mvpsubcheck - and-not CORELI - copyup barecont - - layer glass GLASS,PADTXT,PADPIN - labels GLASS - variants (vendor) - labels PADTXT port - variants () - labels PADTXT text - variants * - labels PADPIN port - - templayer boundary BOUND,STDCELL,PADCELL - boundary - - layer comment LVSTEXT - labels LVSTEXT text - - layer comment TTEXT - labels TTEXT text - - layer fillblock FILLOBSM1,FILLOBSM2,FILLOBSM3,FILLOBSM4 - labels FILLOBSM1,FILLOBSM2,FILLOBSM3,FILLOBSM4 - - layer obsactive FILLOBSFOM - -# MOS Varactor - - layer var POLY - and TAP - and NSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - and-not HVTP - # NOTE: Else forms a varactor that is not in the vendor netlist. - and-not COREID - labels POLY - - layer varhvt POLY - and TAP - and NSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - and HVTP - labels POLY - - layer mvvar POLY - and TAP - and NSDM - and NWELL,nwelcheck - and HVI,hvcheck - labels POLY - - calma NWELL 64 20 - calma DIFF 65 20 - calma DNWELL 64 18 - calma SUBCUT 81 53 - calma PWRES 64 13 - calma TAP 65 44 - # LVTN - calma LVTN 125 44 - # HVTR - calma HVTR 18 20 - # HVTP - calma HVTP 78 44 - # SONOS (TUNM) - calma SONOS 80 20 - # NSDM (NPLUS) - calma NSDM 93 44 - # PSDM (PPLUS) - calma PSDM 94 20 - # HVI (THKOX) - calma HVI 75 20 - # NPC - calma NPC 95 20 - # P+ POLY MASK - calma RPM 86 20 - calma URPM 79 20 - calma LDNTM 11 44 - calma HVNTM 125 20 - # Poly resistor ID mark - calma POLYRES 66 13 - # Diffusion resistor ID mark - calma DIFFRES 65 13 - calma POLY 66 20 - calma POLYMOD 66 83 - # 3.3V native FET ID mark - calma LVID 81 60 - # Diode ID mark - calma DIODE 81 23 - # Bipolar NPN mark - calma NPNID 82 20 - # Bipolar PNP mark - calma PNPID 82 44 - # Capacitor ID - calma CAPID 82 64 - # Core area ID mark - calma COREID 81 2 - # Standard cell ID mark - calma STDCELL 81 4 - # Padframe cell ID mark - calma PADCELL 81 3 - # Seal ring ID mark - calma SEALID 81 1 - # Low tap density ID mark - calma LOWTAPDENSITY 81 14 - # ESD area ID - calma ESDID 81 19 - calma OUTLINE 236 0 - - # LICON - calma CONT 66 44 - calma LI 67 20 - calma MCON 67 44 - - calma MET1 68 20 - calma VIA1 68 44 - calma MET2 69 20 - calma VIA2 69 44 - calma MET3 70 20 - calma VIA3 70 44 - calma MET4 71 20 - calma VIA4 71 44 - calma MET5 72 20 - calma RDL 74 20 - calma GLASS 76 20 - - calma SUBTXT 64 59 - calma PADTXT 76 5 - calma DIFFTXT 65 6 - calma TAPTXT 65 5 - calma WELLTXT 64 5 - calma LITXT 67 5 - calma POLYTXT 66 5 - calma MET1TXT 68 5 - calma MET2TXT 69 5 - calma MET3TXT 70 5 - calma MET4TXT 71 5 - calma MET5TXT 72 5 - calma RDLTXT 74 5 - - calma LIRES 67 13 - calma MET1RES 68 13 - calma MET2RES 69 13 - calma MET3RES 70 13 - calma MET4RES 71 13 - calma MET5RES 72 13 - - calma LIFILL 56 28 - calma MET1FILL 36 28 - calma MET2FILL 41 28 - calma MET3FILL 34 28 - calma MET4FILL 51 28 - calma MET5FILL 59 28 - - calma POLYSHORT 66 15 - calma LISHORT 67 15 - calma MET1SHORT 68 15 - calma MET2SHORT 69 15 - calma MET3SHORT 70 15 - calma MET4SHORT 71 15 - calma MET5SHORT 72 15 - - calma SUBPIN 122 16 - calma PADPIN 76 16 - calma DIFFPIN 65 16 - calma POLYPIN 66 16 - calma WELLPIN 64 16 - calma LIPIN 67 16 - calma MET1PIN 68 16 - calma MET2PIN 69 16 - calma MET3PIN 70 16 - calma MET4PIN 71 16 - calma MET5PIN 72 16 - calma RDLPIN 74 16 - - calma BOUND 235 4 - - calma LVSTEXT 83 44 - - calma CAPM 89 44 - calma CAPM2 97 44 - - calma FILLOBSM1 62 24 - calma FILLOBSM2 105 52 - calma FILLOBSM3 107 24 - calma FILLOBSM4 112 4 - calma FILLOBSFOM 22 24 - calma FILLOBSPOLY 33 24 - - calma FOMFILL 23 28 - calma POLYFILL 28 28 - calma LIFILL 56 28 - calma MET1FILL 36 28 - calma MET2FILL 41 28 - calma MET3FILL 34 28 - calma MET4FILL 51 28 - calma MET5FILL 59 28 - -#----------------------------------------------------------------------- - -style rdlimport - # This style is for reading shapes generated with the RDL layers - - scalefactor 10 nanometers - gridlimit 5 - - options ignore-unknown-layer-labels no-reconnect-labels - - layer mrdl RDL - layer mrdlc RDLC - - calma RDL 10 0 - calma RDLC 20 0 - -end - -#----------------------------------------------------- -# Digital flow maze router cost parameters -#----------------------------------------------------- - -mzrouter -end - -#----------------------------------------------------- -# Vendor DRC rules -#----------------------------------------------------- - -drc - - style drc variants (fast),(full),(routing) - scalefactor 10 - cifstyle drc - - variants (fast),(full) - -#----------------------------- -# DNWELL -#----------------------------- - - width dnwell 3000 "Deep N-well width < %d (dnwell.2)" - spacing dnwell dnwell 6300 touching_ok "Deep N-well spacing < %d (dnwell.3)" - spacing allnwell dnwell 4500 surround_ok \ - "Deep N-well spacing to N-well < %d (nwell.7)" - - variants (full) - cifmaxwidth nwell_missing 0 bend_illegal \ - "N-well overlap of Deep N-well < 0.4um outside, 1.03um inside (nwell.5a, 7)" - cifmaxwidth dnwell_missing 0 bend_illegal \ - "SONOS nFET must be in Deep N-well (tunm.6a)" - - cifmaxwidth pdiff_crosses_dnwell 0 bend_illegal \ - "P+ diff cannot straddle Deep N-well (dnwell.5)" - variants (fast),(full) - -#----------------------------- -# NWELL -#----------------------------- - - width allnwell 840 "N-well width < %d (nwell.1)" - spacing allnwell allnwell 1270 touching_ok "N-well spacing < %d (nwell.2a)" - - variants (full) - cifmaxwidth nwell_missing_tap 0 bend_illegal \ - "All nwells must contain metal-connected N+ taps (nwell.4)" - - cifspacing mvnwell lvnwell 2000 touching_illegal \ - "Spacing of HV nwell to LV nwell < 2.0um (nwell.8)" - cifspacing mvnwell mvnwell 2000 touching_ok \ - "Spacing of HV nwell to HV nwell < 2.0um (nwell.8)" - variants (fast),(full) - -#----------------------------- -# DIFF -#----------------------------- - - width *ndiff,nfet,scnfet,npd,npass,*nsd,*ndiode,ndiffres,*pdiff,pfet,scpfet,scpfethvt,ppu,*psd,*pdiode,pdiffres,fomfill \ - 150 "Diffusion width < %d (diff/tap.1)" - width *mvndiff,mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,*nndiode,mvndiffres,*mvpdiff,mvpfet,mvpfetesd,*mvpdiode,mvpdiffres 290 \ - "MV Diffusion width < %d (diff/tap.14)" - - width *mvnsd,*mvpsd 150 "MV Tap width < %d (diff/tap.1)" - extend *mvpsd *mvndiff 700 "MV Butting tap length < %d (diff/tap.16)" - extend *mvnsd *mvpdiff 700 "MV Butting tap length < %d (diff/tap.16)" - extend *psd *ndiff 290 "Butting tap length < %d (diff/tap.4)" - extend *nsd *pdiff 290 "Butting tap length < %d (diff/tap.4)" - width mvpdiffres 150 "MV P-Diffusion resistor width < %d (diff/tap.14a)" - spacing alldifflv,var,varhvt,fomfill alldifflv,var,varhvt,fomfill 270 touching_ok \ - "Diffusion spacing < %d (diff/tap.3)" - spacing alldiffmvnontap,mvvar alldiffmvnontap,mvvar 300 touching_ok \ - "MV Diffusion spacing < %d (diff/tap.15a)" - spacing alldiffmv *mvnsd,*mvpsd 270 touching_ok \ - "MV Diffusion to MV tap spacing < %d (diff/tap.3)" - spacing *mvndiff,mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,*nndiode,mvndiffres,mvvar *mvpsd 370 \ - touching_ok "MV P-Diffusion to MV N-tap spacing < %d (diff/tap.15b)" - spacing *mvnsd,*mvpdiff,mvpfet,mvpfetesd,mvvar,*mvpdiode *mvpsd,*psd 760 touching_illegal \ - "MV Diffusion in N-well to P-tap spacing < %d (diff/tap.20 + diff/tap.17,19)" - spacing *ndiff,*ndiode,nfet allnwell 340 touching_illegal \ - "N-Diffusion spacing to N-well < %d (diff/tap.9)" - spacing *mvndiff,*mvndiode,mvnfet,mvnnfet,nnfet allnwell 340 touching_illegal \ - "N-Diffusion spacing to N-well < %d (diff/tap.9)" - spacing *psd allnwell 130 touching_illegal \ - "P-tap spacing to N-well < %d (diff/tap.11)" - spacing *mvpsd allnwell 130 touching_illegal \ - "P-tap spacing to N-well < %d (diff/tap.11)" - surround *nsd allnwell 180 absence_illegal \ - "N-well overlap of N-tap < %d (diff/tap.10)" - surround *mvnsd allnwell 330 absence_illegal \ - "N-well overlap of MV N-tap < %d (diff/tap.19)" - surround *pdiff,*pdiode,pfet,scpfet,ppu allnwell 180 absence_illegal \ - "N-well overlap of P-Diffusion < %d (diff/tap.8)" - surround *mvpdiff,*mvpdiode,mvpfet,mvpfetesd allnwell 330 absence_illegal \ - "N-well overlap of P-Diffusion < %d (diff/tap.17)" - surround mvvar allnwell 560 absence_illegal \ - "N-well overlap of MV varactor < %d (lvtn.10 + lvtn.4b)" - spacing *mvndiode *mvndiode 1070 touching_ok \ - "MV N-diode spacing < %d (hvntm.2 + 2 * hvntm.3)" - -variants (full) - cifspacing allmvdiffnowell lvnwell 825 touching_illegal \ - "MV diffusion to LV nwell spacing < %d (hvi.5 + nsd/psd.5)" - cifspacing nwell_or_hvi nwell_or_hvi 700 touching_ok \ - "HVI to HVI or LV nwell spacing < %d (hvi.5)" -variants (fast),(full) - - spacing allnfets allpactivenonfet 270 touching_illegal \ - "nFET cannot abut P-diffusion (diff/tap.3)" - spacing allpfets allnactivenonfet 270 touching_illegal \ - "pFET cannot abut N-diffusion (diff/tap.3)" - - # Butting junction rules - edge4way (*psd)/a ~(*ndiff,*psd)/a 125 ~(*ndiff)/a (*ndiff)/a 125 \ - "N-Diffusion to P-tap spacing < %d across butted junction (psd.5b)" - edge4way (*ndiff)/a ~(*ndiff,*psd)/a 125 ~(*psd)/a (*psd)/a 125 \ - "N-Diffusion to P-tap spacing < %d across butted junction (psd.5a)" - edge4way (*nsd)/a ~(*pdiff,*nsd)/a 125 ~(*pdiff)/a (*pdiff)/a 125 \ - "P-Diffusion to N-tap spacing < %d across butted junction (nsd.5b)" - edge4way (*pdiff)/a ~(*pdiff,*nsd)/a 125 ~(*nsd)/a (*nsd)/a 125 \ - "P-Diffusion to N-tap spacing < %d across butted junction (nsd.5a)" - - edge4way (*mvpsd)/a ~(*mvndiff,*mvpsd)/a 125 ~(*mvndiff)/a (*mvndiff)/a 125 \ - "MV N-Diffusion to MV P-tap spacing < %d across butted junction (psd.5b)" - edge4way (*mvndiff)/a ~(*mvndiff,*mvpsd)/a 125 ~(*mvpsd)/a (*mvpsd)/a 125 \ - "MV N-Diffusion to MV P-tap spacing < %d across butted junction (psd.5a)" - edge4way (*mvnsd)/a ~(*mvpdiff,*mvnsd)/a 125 ~(*mvpdiff)/a (*mvpdiff)/a 125 \ - "MV P-Diffusion to MV N-tap spacing < %d across butted junction (nsd.5b)" - edge4way (*mvpdiff)/a ~(*mvpdiff,*mvnsd)/a 125 ~(*mvnsd)/a (*mvnsd)/a 125 \ - "MV P-Diffusion to MV N-tap spacing < %d across butted junction (nsd.5a)" - - # Sandwiched butting junction restrictions - edge4way (*pdiff)/a (*nsd)/a 400 ~(*pdiff)/a 0 0 "NSDM width < %d (diff/tap.5)" - edge4way (*ndiff)/a (*psd)/a 400 ~(*ndiff)/a 0 0 "PSDM width < %d (diff/tap.5)" - - area *nsd,*mvnsd 70110 150 "N-tap minimum area < 0.07011um^2 (nsd.10b)" - area *psd,*mvpsd 70110 150 "P-tap minimum area < 0.07011um^2 (psd.10b)" - - angles allactive 90 "Only 90 degree angles permitted on diff and tap (x.2)" - - variants (full) - cifmaxwidth tap_missing_licon 0 bend_illegal "All taps must be contacted (licon.16)" - - # Latchup rules - cifmaxwidth ptap_missing 0 bend_illegal \ - "N-diff distance to P-tap must be < 15.0um (LU.2)" - cifmaxwidth dptap_missing 0 bend_illegal \ - "N-diff distance to P-tap in deep nwell.must be < 15.0um (LU.2.1)" - cifmaxwidth ntap_missing 0 bend_illegal \ - "P-diff distance to N-tap must be < 15.0um (LU.3)" - - variants (fast),(full) - -#----------------------------- -# POLY -#----------------------------- - - width allpoly,polyfill 150 "poly width < %d (poly.1a)" - spacing allpoly,polyfill allpoly,polyfill 210 touching_ok "poly spacing < %d (poly.2)" - - spacing allpolynonfet,polyfill \ - *ndiff,*mvndiff,*ndiode,*nndiode,ndiffres,*ndiodelvt,*pdiff,*mvpdiff,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt \ - 75 corner_ok allfets \ - "poly spacing to Diffusion < %d (poly.4)" - spacing npres *nsd 480 touching_illegal \ - "poly resistor spacing to N-tap < %d (poly.9)" - overhang *ndiff,rndiff nfet,scnfet,npd,npass 250 "N-Diffusion overhang of nFET < %d (poly.7)" - overhang *mvndiff,mvrndiff mvnfet,mvnnfet,nnfet 250 \ - "N-Diffusion overhang of nFET < %d (poly.7)" - overhang *pdiff,rpdiff pfet,scpfet,ppu 250 "P-Diffusion overhang of pmos < %d (poly.7)" - overhang *mvpdiff,mvrpdiff mvpfet,mvpfetesd 250 "P-Diffusion overhang of pmos < %d (poly.7)" - overhang *poly allfetsstd,allfetsspecial 130 "poly overhang of transistor < %d (poly.8)" - overhang *poly allfetscore 110 "poly overhang of SRAM core transistor < %d (poly.8)" - rect_only allfets "No bends in transistors (poly.11)" - rect_only xhrpoly,uhrpoly "No bends in poly resistors (poly.11)" - extend xpc/a xhrpoly,uhrpoly 2160 \ - "poly contact extends poly resistor by < %d (licon.1c + li.5)" - spacing xhrpoly,uhrpoly,xpc xhrpoly,uhrpoly,xpc 1240 touching_illegal \ - "Distance between precision resistors < %d (rpm.2 + 2 * rpm.3)" - - variants (fast) - - spacing xhrpoly,uhrpoly,xpc allndifflv,allndiffmv 525 touching_illegal \ - "Distance from precision resistor to N+ diffusion < %d (rpm.3 + rpm.6 + nsd.5a)" - spacing xhrpoly,uhrpoly,xpc *poly 400 touching_illegal \ - "Distance from precision resistor to unrelated poly < %d (rpm.3 + rpm.7)" - spacing xhrpoly,uhrpoly,xpc allndiffmvnontap 585 touching_illegal \ - "Distance from precision resistor to MV N+ device < %d (rpm.3 + rpm.9 + hvntm.3)" - - # Minimum width requirement means actual spacing from res to ndiff has to be - # constructed from mask rules. These supercede the simpler checks. - - variants (full) - - cifmaxwidth rpm_nsd_check 0 bend_illegal \ - "Distance from precision resistor to N+ diffusion < 0.525um (rpm.3 + rpm.6 + nsd.5a)" - cifmaxwidth rpm_poly_check 0 bend_illegal \ - "Distance from precision resistor to unrelated poly < 0.4um (rpm.3 + rpm.7)" - cifmaxwidth rpm_hvntm_check 0 bend_illegal \ - "Distance from precision resistor to MV N+ device < 0.585um (rpm.3 + rpm.9 + hvntm.3)" - - variants (fast),(full) - - angles allpoly,polyfill 90 "Only 90 degree angles permitted on poly (x.2)" - -#-------------------------------------------------------------------- -# HVTP -#-------------------------------------------------------------------- - - spacing pfethvt,pdiodehvt,varactorhvt pfet,ppu,scpfet,mvpfet,mvpfetesd,pfetlvt,pfetmvt \ - 360 touching_illegal \ - "Min. spacing between pFET and HVTP < %d (hvtp.4)" - - spacing pfethvt,pdiodehvt,varactorhvt varactor 360 touching_illegal \ - "Min. spacing between varactor and HVTP < %d (hvtp.4 + varac.3)" - -#-------------------------------------------------------------------- -# LVTN -#-------------------------------------------------------------------- - - spacing pfetlvt,nfetlvt,pdiodelvt,ndiodelvt \ - allfetsnolvt 360 touching_illegal \ - "Min. spacing between FET and LVTN < %d (lvtn.3a)" - - spacing pfetlvt,nfetlvt,pdiodelvt,ndiodelvt scpfethvt,pfethvt,pdiodehvt,varactorhvt \ - 740 touching_illegal \ - "Min. spacing between LVTN and HVTP < %d (lvtn.9)" - - # Spacing across S/D direction requires edge rule - edge4way allfetsnolvt allactivenonfet 415 \ - ~(pfetlvt,nfetlvt,pdiodelvt,ndiodelvt)/a allfetsnolvt 415 \ - "Min. spacing between FET and LVTN in S/D direction < %d (lvtn.3b)" - -#-------------------------------------------------------------------- -# NPC (Nitride poly Cut) -#-------------------------------------------------------------------- - -# Layer NPC is defined automatically around poly contacts (grow 0.1um) - -#-------------------------------------------------------------------- -# CONT (LICON, contact between poly/diff and LI) -#-------------------------------------------------------------------- - - width ndc/li 170 "N-diffusion contact width < %d (licon.1)" - width nsc/li 170 "N-tap contact width < %d (licon.1)" - width pdc/li 170 "P-diffusion contact width < %d (licon.1)" - width psc/li 170 "P-tap contact width < %d (licon.1)" - width ndic/li 170 "N-diode contact width < %d (licon.1)" - width pdic/li 170 "P-diode contact width < %d (licon.1)" - width pc/li 170 "poly contact width < %d (licon.1)" - - width xpc/li 350 "poly resistor contact width < %d (licon.1b + 2 * li.5)" - area xpc/li 700000 350 "poly resistor contact length < 2.0um (licon.1c)" - area allli,*obsli 56100 170 "Local interconnect minimum area < %a (li.6)" - - width mvndc/li 170 "N-diffusion contact width < %d (licon.1)" - width mvnsc/li 170 "N-tap contact width < %d (licon.1)" - width mvpdc/li 170 "P-diffusion contact width < %d (licon.1)" - width mvpsc/li 170 "P-tap contact width < %d (licon.1)" - width mvndic/li 170 "N-diode contact width < %d (licon.1)" - width mvpdic/li 170 "P-diode contact width < %d (licon.1)" - - spacing allpdiffcont allndiffcont 170 touching_illegal \ - "Diffusion contact spacing < %d (licon.2)" - spacing allndiffcont allndiffcont 170 touching_ok \ - "Diffusion contact spacing < %d (licon.2)" - spacing allpdiffcont allpdiffcont 170 touching_ok \ - "Diffusion contact spacing < %d (licon.2)" - spacing pc pc 170 touching_ok "Poly1 contact spacing < %d (licon.2)" - - spacing pc alldiff 190 touching_illegal \ - "poly contact spacing to diffusion < %d (licon.14)" - spacing pc allpdifflv,allpdiffmv 235 touching_illegal \ - "poly contact spacing to P-diffusion < %d (licon.9 + psdm.5a)" - - spacing ndc,pdc nfet,nfetlvt,pfet,pfethvt,pfetlvt,pfetmvt 55 touching_illegal \ - "Diffusion contact to gate < %d (licon.11)" - spacing ndc,pdc scnfet,scpfet,scpfethvt 50 touching_illegal \ - "Diffusion contact to standard cell gate < %d (licon.11)" - spacing ndc,pdc npd,npass,ppu 40 touching_illegal \ - "Diffusion contact to SRAM gate < %d (licon.11)" - spacing mvndc,mvpdc mvnfet,mvnfetesd,mvnnfet,nnfet,mvpfet,mvpfetesd 55 touching_illegal \ - "Diffusion contact to gate < %d (licon.11)" - spacing nsc varactor,varhvt 250 touching_illegal \ - "Diffusion contact to varactor gate < %d (licon.10)" - spacing mvnsc mvvar 250 touching_illegal \ - "Diffusion contact to varactor gate < %d (licon.10)" - - surround ndc/a *ndiff,nfet,scnfet,npd,npass,nfetlvt,rnd 40 absence_illegal \ - "N-diffusion overlap of N-diffusion contact < %d (licon.5a)" - surround pdc/a *pdiff,pfet,scpfet,scpfethvt,ppu,pfethvt,pfetmvt,pfetlvt,rpd \ - 40 absence_illegal \ - "P-diffusion overlap of P-diffusion contact < %d (licon.5a)" - surround ndic/a *ndi 40 absence_illegal \ - "N-diode overlap of N-diode contact < %d (licon.5a)" - surround pdic/a *pdi 40 absence_illegal \ - "P-diode overlap of N-diode contact < %d (licon.5a)" - - spacing psc/a allnactivenontap 60 touching_illegal \ - "Min. space between P-tap contact and butting N diffusion < %d (licon.5b)" - spacing nsc/a allpactivenontap 60 touching_illegal \ - "Min. space between N-tap contact and butting P diffusion < %d (licon.5b)" - - surround ndc/a *ndiff,nfet,scnfet,npd,npass,nfetlvt,rnd 60 directional \ - "N-diffusion overlap of N-diffusion contact < %d in one direction (licon.5c)" - surround pdc/a *pdiff,pfet,scpfet,scpfethvt,ppu,pfethvt,pfetmvt,pfetlvt,rpd \ - 60 directional \ - "P-diffusion overlap of P-diffusion contact < %d in one direction (licon.5c)" - surround ndic/a *ndi 60 directional \ - "N-diode overlap of N-diode contact < %d in one direction (licon.5c)" - surround pdic/a *pdi 60 directional \ - "P-diode overlap of N-diode contact < %d in one direction (licon.5c)" - - surround nsc/a *nsd 120 directional \ - "N-tap overlap of N-tap contact < %d in one direction (licon.7)" - surround psc/a *psd 120 directional \ - "P-tap overlap of P-tap contact < %d in one direction (licon.7)" - - surround mvndc/a *mvndiff,mvnfet,mvnfetesd,mvrnd 40 absence_illegal \ - "N-diffusion overlap of N-diffusion contact < %d (licon.5a)" - surround mvpdc/a *mvpdiff,mvpfet,mvpfetesd,mvrpd 40 absence_illegal \ - "P-diffusion overlap of P-diffusion contact < %d (licon.5a)" - surround mvndic/a *mvndi 40 absence_illegal \ - "N-diode overlap of N-diode contact < %d (licon.5a)" - surround mvpdic/a *mvpdi 40 absence_illegal \ - "P-diode overlap of N-diode contact < %d (licon.5a)" - - spacing mvpsc/a allndiffmvnontap 60 touching_illegal \ - "Min. space between P-tap contact and butting N diffusion < %d (licon.5b)" - spacing mvnsc/a allpdiffmvnontap 60 touching_illegal \ - "Min. space between N-tap contact and butting P diffusion < %d (licon.5b)" - - surround mvndc/a *mvndiff,mvnfet,mvnfetesd,mvrnd 60 directional \ - "N-diffusion overlap of N-diffusion contact < %d in one direction (licon.5c)" - surround mvpdc/a *mvpdiff,mvpfet,mvpfetesd,mvrpd 60 directional \ - "P-diffusion overlap of P-diffusion contact < %d in one direction (licon.5c)" - surround mvndic/a *mvndi 60 directional \ - "N-diode overlap of N-diode contact < %d in one direction (licon.5c)" - surround mvpdic/a *mvpdi 60 directional \ - "P-diode overlap of N-diode contact < %d in one direction (licon.5c)" - - surround mvnsc/a *mvnsd 120 directional \ - "N-tap overlap of N-tap contact < %d in one direction (licon.7)" - surround mvpsc/a *mvpsd 120 directional \ - "P-tap overlap of P-tap contact < %d in one direction (licon.7)" - - surround pc/a *poly,mrp1,xhrpoly,uhrpoly 50 absence_illegal \ - "poly overlap of poly contact < %d (licon.8)" - surround pc/a *poly,mrp1,xhrpoly,uhrpoly 80 directional \ - "poly overlap of poly contact < %d in one direction (licon.8a)" - - exact_overlap (allcont)/a - -#------------------------------------------------------------- -# LI - Local interconnect layer -#------------------------------------------------------------- - -variants * - - width *li 170 "Local interconnect width < %d (li.1)" - width rli 290 "Local interconnect width < %d (li.7)" - - spacing *locali,rli *locali,rli,*obsli 170 touching_ok \ - "Local interconnect spacing < %d (li.3)" - - # Local interconnect in core (SRAM) cells has more relaxed rules. There are - # no special layers for the contacts in core cells, so they must be included - # in the rule. - width coreli,pc,ndc,nsc,pdc,psc,allli,*obsli 140 \ - "Core local interconnect width < %d (li.c1)" - - spacing coreli,pc,ndc,nsc,pdc,psc,mcon allli,*obsli 140 touching_ok \ - "Core local interconnect spacing < %d (li.c2)" - - surround pc/li *li,coreli 80 directional \ - "Local interconnect overlap of poly contact < %d in one direction (li.5)" - - surround ndc/li,nsc/li,pdc/li,psc/li,ndic/li,pdic/li,mvndc/li,mvnsc/li,mvpdc/li,mvpsc/li,mvndic/li,mvpdic/li \ - *li,rli,coreli 80 directional \ - "Local interconnect overlap of diffusion contact < %d in one direction (li.5)" - - area allli,*obsli,coreli 56100 170 "Local interconnect minimum area < %a (li.6)" - - angles *locali,rli 90 "Only 90 degree angles permitted on local interconnect (x.2)" - angles coreli 45 \ - "Only 45 degree angles permitted on local interconnect in SRAM cell (x.2)" - -#------------------------------------------------------------- -# MCON - Contact between local interconnect and metal1 -#------------------------------------------------------------- - - width mcon/m1 170 "mcon.width < %d (mcon.1)" - spacing mcon/m1 mcon/m1,obsmcon/m1 190 touching_ok "mcon.spacing < %d (mcon.2)" - - exact_overlap mcon/li - -#------------------------------------------------------------- -# METAL1 - -#------------------------------------------------------------- - - width *m1,rm1 140 "Metal1 width < %d (met1.1)" - spacing allm1,m1fill allm1,*obsm1,m1fill 140 touching_ok "Metal1 spacing < %d (met1.2)" - area allm1,*obsm1 83000 140 "Metal1 minimum area < %a (met1.6)" - - surround mcon/m1 *met1 30 absence_illegal \ - "Metal1 overlap of local interconnect contact < %d (met1.4)" - surround mcon/m1 *met1 60 directional \ - "Metal1 overlap of local interconnect contact < %d in one direction (met1.5)" - - angles allm1,m1fill 45 "Only 45 and 90 degree angles permitted on metal1 (x.3a)" - -variants (fast),(full) - widespacing allm1 3005 allm1,*obsm1,m1fill 280 touching_ok \ - "Metal1 > 3um spacing to unrelated m1 < %d (met1.3b)" - widespacing *obsm1 3005 allm1 280 touching_ok \ - "Metal1 > 3um spacing to unrelated m1 < %d (met1.3b)" - -variants (full) - cifmaxwidth m1_hole_empty 0 bend_illegal \ - "Min area of metal1 holes > 0.14um^2 (met1.7)" - - cifspacing m1_large_halo m1_large_halo 280 touching_ok \ - "Spacing of metal1 features attached to and within 0.28um of large metal1 < %d (met1.3a)" -variants * - -#-------------------------------------------------- -# VIA1 -#-------------------------------------------------- - - width v1/m1 260 "Via1 width < %d (via.1a + 2 * via.4a)" - spacing v1 v1 60 touching_ok "Via1 spacing < %d (via.2 - 2 * via.4a)" - surround v1/m1 *m1,rm1 30 directional \ - "Metal1 overlap of Via1 < %d in one direction (via.5a - via.4a)" - surround v1/m2 *m2,rm2 30 directional \ - "Metal2 overlap of Via1 < %d in one direction (met2.5 - met2.4)" - - exact_overlap v1/m1 - -#-------------------------------------------------- -# METAL2 - -#-------------------------------------------------- - - width allm2,m2fill 140 "Metal2 width < %d (met2.1)" - spacing allm2 allm2,obsm2,m2fill 140 touching_ok "Metal2 spacing < %d (met2.2)" - area allm2,obsm2 67600 140 "Metal2 minimum area < %a (met2.6)" - - angles allm2 45 "Only 45 and 90 degree angles permitted on metal2 (x.3a)" - -variants (fast),(full) - widespacing allm2 3005 allm2,obsm2,m2fill 280 touching_ok \ - "Metal2 > 3um spacing to unrelated m2 < %d (met2.3b)" - widespacing obsm2 3005 allm2 280 touching_ok \ - "Metal2 > 3um spacing to unrelated m2 < %d (met2.3b)" - -variants (full) - cifmaxwidth m2_hole_empty 0 bend_illegal \ - "Min area of metal2 holes > 0.14um^2 (met2.7)" - - cifspacing m2_large_halo m2_large_halo 280 touching_ok \ - "Spacing of metal2 features attached to and within 0.28um of large metal2 < %d (met2.3a)" -variants * - -#-------------------------------------------------- -# VIA2 -#-------------------------------------------------- - - width v2/m2 280 "via2 width < %d (via2.1a + 2 * via2.4)" - - spacing v2 v2 120 touching_ok "via2 spacing < %d (via2.2 - 2 * via2.4)" - - surround v2/m2 *m2,rm2 45 directional \ - "Metal2 overlap of via2 < %d in one direction (via2.4a - via2.4)" - surround v2/m3 *m3,rm3 25 absence_illegal "Metal3 overlap of via2 < %d (met3.4)" - - exact_overlap v2/m2 - -#-------------------------------------------------- -# METAL3 - -#-------------------------------------------------- - - width allm3,m3fill 300 "Metal3 width < %d (met3.1)" - spacing allm3 allm3,obsm3,m3fill 300 touching_ok "Metal3 spacing < %d (met3.2)" - area allm3,obsm3 240000 300 "Metal3 minimum area < %a (met3.6)" - - angles allm3 45 "Only 45 and 90 degree angles permitted on metal3 (x.3a)" - -variants (fast),(full) - widespacing allm3,m3fill 3005 allm3,obsm3 400 touching_ok \ - "Metal3 > 3um spacing to unrelated m3 < %d (met3.3d)" - widespacing obsm3 3005 allm3 400 touching_ok \ - "Metal3 > 3um spacing to unrelated m3 < %d (met3.3d)" -variants (full) - cifspacing m3_large_halo m3_large_halo 400 touching_ok \ - "Spacing of metal3 features attached to and within 0.40um of large metal3 < %d (met3.3c)" -variants * - - -#-------------------------------------------------- -# VIA3 - Requires METAL5 Module -#-------------------------------------------------- - - width v3/m3 320 "via3 width < %d (via3.1 + 2 * via3.4)" - spacing v3 v3 80 touching_ok "via3 spacing < %d (via3.2 - 2 * via3.4)" - surround v3/m3 *m3,rm3 30 directional \ - "Metal3 overlap of via3 in one direction < %d (via3.5 - via3.4)" - surround v3/m4 *m4,rm4 5 absence_illegal \ - "Metal4 overlap of via3 < %d (met4.3 - via3.4)" - - exact_overlap v3/m3 - -#----------------------------- -# METAL4 - METAL4 Module -#----------------------------- - -variants * - - width allm4,m4fill 300 "Metal4 width < %d (met4.1)" - spacing allm4 allm4,obsm4,m4fill 300 touching_ok "Metal4 spacing < %d (met4.2)" - area allm4,obsm4 240000 300 "Metal4 minimum area < %a (met4.4a)" - - angles allm4 45 "Only 45 and 90 degree angles permitted on metal4 (x.3a)" - -variants (fast),(full) - widespacing allm4,m4fill 3005 allm4,obsm4 400 touching_ok \ - "Metal4 > 3um spacing to unrelated m4 < %d (met4.5b)" - widespacing obsm4 3005 allm4 400 touching_ok \ - "Metal4 > 3um spacing to unrelated m4 < %d (met4.5b)" -variants (full) - cifspacing m4_large_halo m4_large_halo 400 touching_ok \ - "Spacing of metal4 features attached to and within 0.40um of large metal4 < %d (met4.5a)" -variants * - -#-------------------------------------------------- -# VIA4 - Requires METAL5 Module -#-------------------------------------------------- - - width v4/m4 1180 "via4 width < %d (via4.1 + 2 * via4.4)" - spacing v4 v4 420 touching_ok "via4 spacing < %d (via4.2 - 2 * via4.4)" - surround v4/m5 *m5,rm5 120 absence_illegal \ - "Metal5 overlap of via4 < %d (met5.3 - via4.4)" - - exact_overlap v4/m4 - -#----------------------------- -# METAL5 - METAL5 Module -#----------------------------- - - width allm5,m5fill 1600 "Metal5 width < %d (met5.1)" - spacing allm5 allm5,obsm5,m5fill 1600 touching_ok "Metal5 spacing < %d (met5.2)" - area allm5,obsm5 4000000 1600 "Metal5 minimum area < %a (met5.4)" - - angles allm5 45 "Only 45 and 90 degree angles permitted on metal5 (x.3a)" - - - -variants (full) - - width metrdl 10000 "RDL width < %d (rdl.1)" - spacing metrdl metrdl 10000 touching_ok "RDL spacing < %d (rdl.2)" - surround glass metrdl 10750 absence_ok "RDL must surround glass cut by %d (rdl.3)" - spacing padl metrdl 19660 surround_ok "RDL spacing to unrelated pad < %d (rdl.6)" - -variants (fast),(full) - - -#-------------------------------------------------- -# NMOS, PMOS -#-------------------------------------------------- - - edge4way *poly allfetsstd 420 allfets 0 0 \ - "Transistor width < %d (diff/tap.2)" - edge4way *poly allfetsspecial 360 allfets 0 0 \ - "Transistor in standard cell width < %d (diff/tap.2)" - edge4way *poly npass,npd,nsonos 210 allfets 0 0 \ - "N-Transistor in SRAM core width < %d (diff/tap.2)" - edge4way *poly ppu 140 allfets 0 0 \ - "P-Transistor in SRAM core width < %d (diff/tap.2)" - - # Except: Note that standard cells allow transistor width minimum 0.36um - width pfetlvt 350 "LVT PMOS gate length < %d (poly.1b)" - - spacing allpolynonfet,polyfill *nsd 55 corner_ok var,varhvt,corenvar \ - "poly spacing to diffusion tap < %d (poly.5)" - spacing allpolynonfet,polyfill *psd 55 corner_ok corepvar \ - "poly spacing to diffusion tap < %d (poly.5)" - spacing allpolynonfet,polyfill *mvnsd 55 corner_ok mvvar \ - "poly spacing to diffusion tap < %d (poly.5)" - spacing allpolynonfet,polyfill *mvpsd 55 touching_illegal \ - "poly spacing to diffusion tap < %d (poly.5)" - - edge4way *psd *ndiff 300 ~(nfet,npass,npd,scnfet,nfetlvt,nsonos)/a *psd 300 \ - "Butting P-tap spacing to NMOS gate < %d (poly.6)" - edge4way *nsd *pdiff 300 ~(pfet,ppu,scpfet,scpfethvt,pfetlvt,pfetmvt)/a *nsd 300 \ - "Butting N-tap spacing to PMOS gate < %d (poly.6)" - edge4way *mvpsd *mvndiff 300 ~(mvnfet,mvnfetesd,mvnnfet,nnfet)/a *mvpsd 300 \ - "Butting MV P-tap spacing to MV NMOS gate < %d (poly.6)" - edge4way *mvnsd *mvpdiff 300 ~(mvpfet,mvpfetesd)/a *mvnsd 300 \ - "Butting MV N-tap spacing to MV PMOS gate < %d (poly.6)" - - # No LV FETs in HV diff - spacing pfet,scpfet,scpfethvt,ppu,pfetlvt,pfetmvt,pfethvt,*pdiff *mvpdiff 360 touching_illegal \ - "LV P-diffusion to MV P-diffusion < %d (diff/tap.23 + diff/tap.22)" - - spacing nfet,scnfet,npd,npass,nfetlvt,varactor,varhvt,*ndiff *mvndiff 360 touching_illegal \ - "LV N-diffusion to MV N-diffusion < %d (diff/tap.23 + diff/tap.22)" - - # No HV FETs in LV diff - spacing mvpfet,mvpfetesd,*mvpdiff *pdiff 360 touching_illegal \ - "MV P-diffusion to LV P-diffusion < %d (diff/tap.23 + diff/tap.22)" - - spacing mvnfet,mvnfetesd,mvvaractor,*mvndiff *ndiff 360 touching_illegal \ - "MV N-diffusion to LV N-diffusion < %d (diff/tap.23 + diff/tap.22)" - - # Minimum length of MV FETs. Note that this is larger than the minimum - # width (0.29um), so an edge rule is required - - edge4way mvndiff mvnfet,mvnfetesd 500 mvnfet,mvnfetesd 0 0 \ - "MV NMOS minimum length < %d (poly.13)" - - edge4way mvnsd mvvaractor 500 mvvaractor 0 0 \ - "MV Varactor minimum length < %d (poly.13)" - - edge4way mvpdiff mvpfet,mvpfetesd 500 mvpfet,mvpfetesd 0 0 \ - "MV PMOS minimum length < %d (poly.13)" - -#-------------------------------------------------- -# mrp1 (N+ poly resistor) -#-------------------------------------------------- - - width mrp1 330 "mrp1 resistor width < %d (poly.3)" - -#-------------------------------------------------- -# xhrpoly (P+ poly resistor) -# uhrpoly (P+ poly resistor, 2kOhm/sq) -#-------------------------------------------------- - - # NOTE: u/xhrpoly resistor requires discrete widths 0.35, 0.69, ... up to 1.27. - width xhrpoly 350 "xhrpoly resistor width < %d (P+ poly.1a)" - width uhrpoly 350 "uhrpoly resistor width < %d (P+ poly.1a)" - - spacing xhrpoly,uhrpoly,xpc alldiff 480 touching_illegal \ - "xhrpoly/uhrpoly resistor spacing to diffusion < %d (poly.9)" - - spacing mrp1,xhrpoly,uhrpoly,xpc allfets 480 touching_illegal \ - "Poly resistor spacing to poly < %d (poly.9)" - - spacing xhrpoly,uhrpoly,xpc *poly 480 touching_illegal \ - "Poly resistor spacing to poly < %d (poly.9)" - - spacing mrp1 *poly 480 touching_ok \ - "Poly resistor spacing to poly < %d (poly.9)" - - spacing mrp1,xhrpoly,uhrpoly,xpc alldiff 480 touching_illegal \ - "Poly resistor spacing to diffusion < %d (poly.9)" - -#------------------------------------ -# nsonos -#------------------------------------ - -variants (full) - cifmaxwidth bbox_missing 0 bend_illegal \ - "SONOS transistor must be in cell with abutment box (tunm.8)" -variants (fast),(full) - -#------------------------------------ -# MOS Varactor device rules -#------------------------------------ - - overhang *nsd var,varhvt 250 \ - "N-Tap overhang of Varactor < %d (var.4)" - - overhang *mvnsd mvvar 250 \ - "N-Tap overhang of Varactor < %d (var.4)" - - width var,varhvt,mvvar 180 "Varactor length < %d (var.1)" - extend var,varhvt,mvvar *poly 1000 "Varactor width < %d (var.2)" - -variants (full) - cifmaxwidth var_poly_no_nwell 0 bend_illegal \ - "N-well overlap of varactor poly < 0.15um (varac.5)" - - cifmaxwidth pdiff_in_varactor_well 0 bend_illegal \ - "Varactor N-well must not contain P+ diffusion (varac.7)" -variants (fast),(full) - -#----------------------------------------------------------- -# MiM CAP (CAPM) - -#----------------------------------------------------------- - - width *mimcap 1000 "MiM cap width < %d (capm.1)" - spacing *mimcap *mimcap 840 touching_ok "MiM cap spacing < %d (capm.2a)" - spacing *mimcap via3/m3 80 touching_illegal \ - "MiM cap spacing to via3 < %d (capm.5 - via3.4)" - surround *mimcc *mimcap 80 absence_illegal \ - "MiM cap must surround MiM cap contact by %d (capm.4 - via3.4)" - rect_only *mimcap "MiM cap must be rectangular (capm.7) - - surround *mimcap *metal3/m3 140 absence_illegal \ - "Metal3 must surround MiM cap by %d (capm.3)" - spacing via2 *mimcap 100 touching_illegal \ - "MiM cap spacing to via2 < %d (capm.8 - via2.4)" - spacing *mimcap *metal3/m3 500 surround_ok \ - "MiM cap spacing to unrelated metal3 < %d (capm.11)" - -variants (full) - cifspacing mim_bottom mim_bottom 1200 touching_ok \ - "MiM cap bottom plate spacing < %d (capm.2b)" -variants (fast),(full) - - # MiM cap contact rules (VIA3) - - width mimcc/c1 320 "MiM cap contact width < %d (via3.1 + 2 * via3.4)" - spacing mimcc mimcc 80 touching_ok "MiM cap contact spacing < %d (via3.2 - 2 * via3.4)" - surround mimcc/m4 *m4 5 directional \ - "Metal4 overlap of MiM cap contact in one direction < %d (met4.3 - via3.4)" - exact_overlap mimcc/c1 - - width *mimcap2 1000 "MiM2 cap width < %d (cap2m.1)" - spacing *mimcap2 *mimcap2 840 touching_ok "MiM2 cap spacing < %d (cap2m.2a)" - spacing *mimcap2 via4/m4 10 touching_illegal \ - "MiM2 cap spacing to via4 < %d (cap2m.5 - via4.4)" - surround *mim2cc *mimcap2 10 absence_illegal \ - "MiM2 cap must surround MiM cap 2 contact by %d (cap2m.4 - via4.4)" - rect_only *mimcap2 "MiM2 cap must be rectangular (cap2m.7) - - surround *mimcap2 *metal4/m4 140 absence_illegal \ - "Metal4 must surround MiM2 cap by %d (cap2m.3)" - spacing via3 *mimcap2 80 touching_illegal \ - "MiM2 cap spacing to via3 < %d (cap2m.8 - via3.4)" - spacing *mimcap2 *metal4/m4 500 surround_ok \ - "MiM2 cap spacing to unrelated metal4 < %d (cap2m.11)" - -variants (full) - cifmaxwidth mim2_contact_overlap 0 bend_illegal \ - "MiM2 cap contact must not cross MiM cap contact (cap2m.8)" - - cifspacing mim2_bottom mim2_bottom 1200 touching_ok \ - "MiM2 cap bottom plate spacing < %d (cap2m.2b)" -variants (fast),(full) - - # MiM cap contact rules (VIA4) - - width mim2cc/c2 1180 "MiM2 cap contact width < %d (via4.1 + 2 * via4.4)" - spacing mim2cc mim2cc 420 touching_ok \ - "MiM2 cap contact spacing < %d (via4.2 - 2 * via4.4)" - surround mim2cc/m5 *m5 120 absence_illegal \ - "Metal5 overlap of MiM2 cap contact < %d (met5.3 - via4.4)" - exact_overlap mim2cc/c2 - - -#---------------------------- -# HVNTM -#---------------------------- -variants (full) - cifspacing hvntm_generate hvntm_generate 700 touching_ok \ - "HVNTM spacing < %d (hvntm.2)" -variants (fast),(full) - -#---------------------------- -# End DRC style -#---------------------------- - -end - -#---------------------------- -# LEF format definitions -#---------------------------- - -lef - - masterslice pwell pwell PWELL substrate - masterslice nwell nwell NWELL - - routing li li1 LI1 LI li - - routing m1 met1 MET1 m1 - routing m2 met2 MET2 m2 - routing m3 met3 MET3 m3 - routing m4 met4 MET4 m4 - routing m5 met5 MET5 m5 - routing mrdl met6 MET6 m6 MRDL METRDL - - cut mcon mcon MCON Mcon - cut m2c via via1 VIA VIA1 cont2 via12 - cut m3c via2 VIA2 cont3 via23 - cut via3 via3 VIA3 cont4 via34 - cut via4 via4 VIA4 cont5 via45 - - obs obsli li1 - obs obsm1 met1 - obs obsm2 met2 - obs obsm3 met3 - - obs obsm4 met4 - obs obsm5 met5 - obs obsmrdl met6 - - # NOTE: obsmcon only used with li1, not obsli. - obs obsmcon mcon - - # Vias on obstruction layers should be ignored, so cast to obstruction metal. - obs obsm1 via - obs obsm2 via2 - obs obsm3 via3 - obs obsm4 via4 - -end - -#----------------------------------------------------- -# Device and Parasitic extraction -#----------------------------------------------------- - - -extract - style ngspice variants (),(orig),(si) - cscale 1 - # NOTE: SkyWater SPICE libraries use .option scale 1E6 so all - # dimensions must be in units of microns in the extract file. - # Use extract style "ngspice(si)" to override this and produce - # a file with SI units for length/area. - - variants (),(orig) - lambda 1E6 - variants (si) - lambda 1.0 - variants * - - units microns - step 7 - sidehalo 2 - - # NOTE: MiM cap layers have been purposely put out of order, - # may want to reconsider. - - planeorder dwell 0 - planeorder well 1 - planeorder active 2 - planeorder locali 3 - planeorder metal1 4 - planeorder metal2 5 - planeorder metal3 6 - planeorder metal4 7 - planeorder metal5 8 - planeorder metali 9 - planeorder block 10 - planeorder comment 11 - planeorder cap1 12 - planeorder cap2 13 - - height dnwell -0.1 0.1 - height nwell,pwell 0.0 0.2062 - height alldiff 0.2062 0.12 - height fomfill 0.2062 0.12 - height allpoly 0.3262 0.18 - height polyfill 0.3262 0.18 - height alldiffcont 0.3262 0.61 - height pc 0.5062 0.43 - height allli 0.9361 0.10 - height mcon 1.0361 0.34 - height allm1 1.3761 0.36 - height m1fill 1.3761 0.36 - height v1 1.7361 0.27 - height allm2 2.0061 0.36 - height m2fill 1.3761 0.36 - height v2 2.3661 0.42 - height allm3 2.7861 0.845 - height m3fill 1.3761 0.36 - height v3 3.6311 0.39 - height allm4 4.0211 0.845 - height m4fill 1.3761 0.36 - height v4 4.8661 0.505 - height allm5 5.3711 1.26 - height m5fill 1.3761 0.36 - height mimcap 2.4661 0.2 - height mimcap2 3.7311 0.2 - height mimcc 2.6661 0.12 - height mim2cc 3.9311 0.09 - height mrdlc 6.6311 0.63 - height mrdl 7.2611 3.0 - - # Antenna check parameters - # Note that checks w/diode diffusion are not modeled - model partial - antenna poly sidewall 50 none - antenna allcont surface 3 none - antenna li sidewall 75 0 450 - antenna mcon surface 3 0 18 - antenna m1,m2,m3 sidewall 400 2600 400 - antenna v1 surface 3 0 18 - antenna v2 surface 6 0 36 - antenna m4,m5 sidewall 400 2600 400 - antenna v3,v4 surface 6 0 36 - - tiedown alldiffnonfet - - substrate *ppdiff,*mvppdiff,space/w,pwell well $SUB -dnwell,isosub - -# Resistances are in milliohms per square -# Optional 3rd argument is the corner adjustment fraction -# Device values come from trtc.cor (typical corner) - resist (dnwell)/dwell 2200000 - resist (pwell)/well 3050000 - resist (nwell)/well 1700000 - resist (rpw)/well 3050000 0.5 - resist (*ndiff,nsd)/active 120000 - resist (*pdiff,*psd)/active 197000 - resist (*mvndiff,mvnsd)/active 114000 - resist (*mvpdiff,*mvpsd)/active 191000 - - resist ndiffres/active 120000 0.5 - resist pdiffres/active 197000 0.5 - resist mvndiffres/active 114000 0.5 - resist mvpdiffres/active 191000 0.5 - resist mrp1/active 48200 0.5 - resist xhrpoly/active 319800 0.5 - resist uhrpoly/active 2000000 0.5 - - resist (allpolynonres)/active 48200 - resist rmp/active 48200 - - resist (allli)/locali 12200 - resist (allm1)/metal1 125 - resist (allm2)/metal2 125 - resist (allm3)/metal3 47 - resist (allm4)/metal4 47 - resist (allm5)/metal5 29 - resist mrdl/metali 5 - - # These types should not be considered as electrical nodes - resist blocktypes None - resist obstypes None - resist idtypes None - resist comment None - - contact ndc,nsc 15000 - contact pdc,psc 15000 - contact mvndc,mvnsc 15000 - contact mvpdc,mvpsc 15000 - contact pc 15000 - contact mcon 152000 - contact m2c 4500 - contact m3c 3410 - contact mimcc 4500 - contact mim2cc 3410 - contact via3 3410 - contact via4 380 - contact mrdlc 6 - -#------------------------------------------------------------------------- -# Parasitic capacitance values: Use document (...) -#------------------------------------------------------------------------- -# This uses the new "default" definitions that determine the intervening -# planes from the planeorder stack, take care of the reflexive sideoverlap -# definitions, and generally clean up the section and make it more readable. -# -# Also uses "units microns" statement. All values are taken from the -# document PEX/xRC/cap_models. Fringe capacitance values are approximated. -# Units are aF/um^2 for area caps and aF/um for perimeter and sidewall caps. -#------------------------------------------------------------------------- -# Remember that device capacitances to substrate are taken care of by the -# models. Thus, active and poly definitions ignore all "fet" types. -# fet types are excluded when computing parasitic capacitance to -# active from layers above them because poly is a shield; fet types are -# included for parasitics from layers above to poly. Resistor types -# should be removed from all parasitic capacitance calculations, or else -# they just create floating caps. Technically, the capacitance probably -# should be split between the two terminals. Unsure of the correct model. -#------------------------------------------------------------------------- - -#n-well -# NOTE: This value not found in PEX files -defaultareacap nwell well 120 - -#n-active -# Rely on device models to capture *ndiff area cap -# Do not extract parasitics from resistors -# defaultareacap allnactivenonfet active 790 -# defaultperimeter allnactivenonfet active 280 - -#p-active -# Rely on device models to capture *pdiff area cap -# Do not extract parasitics from resistors -# defaultareacap allpactivenonfet active 810 -# defaultperimeter allpactivenonfet active 300 - -#poly -# Do not extract parasitics from resistors -# defaultsidewall allpolynonfet active 22 -# defaultareacap allpolynonfet active 106 -# defaultperimeter allpolynonfet active 57 - - defaultsidewall *poly active 23 - defaultareacap *poly active nwell,obswell,pwell well 106 - defaultperimeter *poly active nwell,obswell,pwell well 55 - -#locali - defaultsidewall allli locali 33 - defaultareacap allli locali nwell,obswell,pwell well 37 - defaultperimeter allli locali nwell,obswell,pwell well 55 - defaultoverlap allli locali nwell well 37 - -#locali->diff - defaultoverlap allli locali allactivenonfet active 37 - defaultsideoverlap allli locali allactivenonfet active 55 - -#locali->poly - defaultoverlap allli locali allpolynonres active 94 - defaultsideoverlap allli locali allpolynonres active 52 - defaultsideoverlap *poly active allli locali 25 - -#metal1 - defaultsidewall allm1 metal1 45 - defaultareacap allm1 metal1 nwell,obswell,pwell well 26 - defaultperimeter allm1 metal1 nwell,obswell,pwell well 41 - defaultoverlap allm1 metal1 nwell well 26 - -#metal1->diff - defaultoverlap allm1 metal1 allactivenonfet active 26 - defaultsideoverlap allm1 metal1 allactivenonfet active 41 - -#metal1->poly - defaultoverlap allm1 metal1 allpolynonres active 45 - defaultsideoverlap allm1 metal1 allpolynonres active 47 - defaultsideoverlap *poly active allm1 metal1 17 - -#metal1->locali - defaultoverlap allm1 metal1 allli locali 114 - defaultsideoverlap allm1 metal1 allli locali 59 - defaultsideoverlap allli locali allm1 metal1 35 - -#metal2 - defaultsidewall allm2 metal2 50 - defaultareacap allm2 metal2 nwell,obswell,pwell well 17 - defaultperimeter allm2 metal2 nwell,obswell,pwell well 41 - defaultoverlap allm2 metal2 nwell well 38 - -#metal2->diff - defaultoverlap allm2 metal2 allactivenonfet active 17 - defaultsideoverlap allm2 metal2 allactivenonfet active 41 - -#metal2->poly - defaultoverlap allm2 metal2 allpolynonres active 24 - defaultsideoverlap allm2 metal2 allpolynonres active 41 - defaultsideoverlap *poly active allm2 metal2 11 - -#metal2->locali - defaultoverlap allm2 metal2 allli locali 38 - defaultsideoverlap allm2 metal2 allli locali 46 - defaultsideoverlap allli locali allm2 metal2 22 - -#metal2->metal1 - defaultoverlap allm2 metal2 allm1 metal1 134 - defaultsideoverlap allm2 metal2 allm1 metal1 67 - defaultsideoverlap allm1 metal1 allm2 metal2 48 - -#metal3 - defaultsidewall allm3 metal3 63 - defaultoverlap allm3 metal3 nwell well 12 - defaultareacap allm3 metal3 nwell,obswell,pwell well 12 - defaultperimeter allm3 metal3 nwell,obswell,pwell well 41 - -#metal3->diff - defaultoverlap allm3 metal3 allactive active 12 - defaultsideoverlap allm3 metal3 allactive active 41 - -#metal3->poly - defaultoverlap allm3 metal3 allpolynonres active 16 - defaultsideoverlap allm3 metal3 allpolynonres active 44 - defaultsideoverlap *poly active allm3 metal3 9 - -#metal3->locali - defaultoverlap allm3 metal3 allli locali 21 - defaultsideoverlap allm3 metal3 allli locali 47 - defaultsideoverlap allli locali allm3 metal3 15 - -#metal3->metal1 - defaultoverlap allm3 metal3 allm1 metal1 35 - defaultsideoverlap allm3 metal3 allm1 metal1 55 - defaultsideoverlap allm1 metal1 allm3 metal3 27 - -#metal3->metal2 - defaultoverlap allm3 metal3 allm2 metal2 86 - defaultsideoverlap allm3 metal3 allm2 metal2 70 - defaultsideoverlap allm2 metal2 allm3 metal3 44 - -#metal4 - defaultsidewall allm4 metal4 67 -# defaultareacap alltopm metal4 well 6 - areacap allm4/m4 8 - defaultoverlap allm4 metal4 nwell well 8 - defaultperimeter allm4 metal4 well 37 - -#metal4->diff - defaultoverlap allm4 metal4 allactivenonfet active 8 - defaultsideoverlap allm4 metal4 allactivenonfet active 37 - -#metal4->poly - defaultoverlap allm4 metal4 allpolynonres active 10 - defaultsideoverlap allm4 metal4 allpolynonres active 38 - defaultsideoverlap *poly active allm4 metal4 6 - -#metal4->locali - defaultoverlap allm4 metal4 allli locali 12 - defaultsideoverlap allm4 metal4 allli locali 40 - defaultsideoverlap allli locali allm4 metal4 10 - -#metal4->metal1 - defaultoverlap allm4 metal4 allm1 metal1 15 - defaultsideoverlap allm4 metal4 allm1 metal1 43 - defaultsideoverlap allm1 metal1 allm4 metal4 16 - -#metal4->metal2 - defaultoverlap allm4 metal4 allm2 metal2 20 - defaultsideoverlap allm4 metal4 allm2 metal2 46 - defaultsideoverlap allm2 metal2 allm4 metal4 22 - -#metal4->metal3 - defaultoverlap allm4 metal4 allm3 metal3 84 - defaultsideoverlap allm4 metal4 allm3 metal3 71 - defaultsideoverlap allm3 metal3 allm4 metal4 43 - -#metal5 - defaultsidewall allm5 metal5 127 -# defaultareacap allm5 metal5 well 6 - areacap allm5/m5 6 - defaultoverlap allm5 metal5 nwell well 6 - defaultperimeter allm5 metal5 well 39 - -#metal5->diff - defaultoverlap allm5 metal5 allactivenonfet active 6 - defaultsideoverlap allm5 metal5 allactivenonfet active 39 - -#metal5->poly - defaultoverlap allm5 metal5 allpolynonres active 7 - defaultsideoverlap allm5 metal5 allpolynonres active 40 - defaultsideoverlap *poly active allm5 metal5 6 - -#metal5->locali - defaultoverlap allm5 metal5 allli locali 8 - defaultsideoverlap allm5 metal5 allli locali 41 - defaultsideoverlap allli locali allm5 metal5 8 - -#metal5->metal1 - defaultoverlap allm5 metal5 allm1 metal1 9 - defaultsideoverlap allm5 metal5 allm1 metal1 43 - defaultsideoverlap allm1 metal1 allm5 metal5 12 - -#metal5->metal2 - defaultoverlap allm5 metal5 allm2 metal2 11 - defaultsideoverlap allm5 metal5 allm2 metal2 46 - defaultsideoverlap allm2 metal2 allm5 metal5 16 - -#metal5->metal3 - defaultoverlap allm5 metal5 allm3 metal3 20 - defaultsideoverlap allm5 metal5 allm3 metal3 54 - defaultsideoverlap allm3 metal3 allm5 metal5 28 - -#metal5->metal4 - defaultoverlap allm5 metal5 allm4 metal4 68 - defaultsideoverlap allm5 metal5 allm4 metal4 83 - defaultsideoverlap allm4 metal4 allm5 metal5 47 - - -# Devices: Base models (not subcircuit wrappers) - -variants (),(si) - - device msubcircuit sky130_fd_pr__pfet_01v8 pfet,scpfet \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__special_pfet_pass ppu \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__pfet_01v8_lvt pfetlvt \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__pfet_01v8_mvt pfetmvt \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__pfet_01v8_hvt pfethvt,scpfethvt \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - - device msubcircuit sky130_fd_pr__nfet_01v8 nfet,scnfet \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__special_nfet_latch npd \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__special_nfet_latch npd \ - *ndiff,ndiffres *srampvar pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__special_nfet_pass npass \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__nfet_01v8_lvt nfetlvt \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_bs_flash__special_sonosfet_star nsonos \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device subcircuit sky130_fd_pr__cap_var_lvt varactor \ - *nndiff nwell error l=l w=w a1=as a2=ad p1=ps p2=pd - device subcircuit sky130_fd_pr__cap_var_hvt varhvt \ - *nndiff nwell error l=l w=w a1=as a2=ad p1=ps p2=pd - device subcircuit sky130_fd_pr__cap_var mvvaractor \ - *mvnndiff nwell error l=l w=w a1=as a2=ad p1=ps p2=pd - - # Bipolars - device msubcircuit sky130_fd_pr__npn_05v5_W1p00L1p00 npn *ndiff dnwell space/w \ - error +npn1p00 - device msubcircuit sky130_fd_pr__npn_05v5_W1p00L2p00 npn *ndiff dnwell space/w \ - error +npn2p00 - device msubcircuit sky130_fd_pr__npn_05v5 npn *ndiff dnwell space/w error a2=area - device msubcircuit sky130_fd_pr__pnp_05v5_W0p68L0p68 pnp *pdiff \ - pwell,space/w +pnp0p68 - device msubcircuit sky130_fd_pr__pnp_05v5_W3p40L3p40 pnp *pdiff \ - pwell,space/w +pnp3p40 - device msubcircuit sky130_fd_pr__pnp_05v5 pnp *pdiff pwell,space/w a2=area - device msubcircuit sky130_fd_pr__npn_11v0_W1p00L1p00 npn *mvndiff \ - dnwell space/w error +npn11p0 - device msubcircuit sky130_fd_pr__npn_11v0 npn *mvndiff dnwell space/w error a2=area - - # Ignore the extended-drain FET geometry that forms part of the high-voltage - # bipolar devices. - device msubcircuit Ignore mvnfet *mvndiff,mvndiffres dnwell pwell,space/w error +npn,pnp - device msubcircuit Ignore mvpfet *mvpdiff,mvpdiffres pwell,space/w nwell error +npn,pnp - - # Extended drain devices (must appear before the regular devices) - device msubcircuit sky130_fd_pr__nfet_20v0_nvt mvnnfet *mvndiff,mvndiffres \ - dnwell pwell,space/w error l=l w=w a1=as a2=ad p1=ps p2=pd - device msubcircuit sky130_fd_pr__nfet_20v0 mvnfet *mvndiff,mvndiffres \ - dnwell pwell,space/w error l=l w=w a1=as a2=ad p1=ps p2=pd - device msubcircuit sky130_fd_pr__pfet_20v0 mvpfet *mvpdiff,mvpdiffres \ - pwell,space/w nwell error l=l w=w a1=as a2=ad p1=ps p2=pd - - device msubcircuit sky130_fd_pr__pfet_g5v0d10v5 mvpfet \ - *mvpdiff,mvpdiffres *mvpdiff,mvpdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__nfet_g5v0d10v5 mvnfet \ - *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__nfet_05v0_nvt mvnnfet \ - *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__nfet_03v3_nvt nnfet \ - *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__esd_nfet_g5v0d10v5 mvnfetesd \ - *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__esd_pfet_g5v0d10v5 mvpfetesd \ - *mvpdiff,mvpdiffres *mvpdiff,mvpdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - - device resistor sky130_fd_pr__res_generic_l1 rli1 *li,coreli - device resistor sky130_fd_pr__res_generic_m1 rmetal1 *metal1 - device resistor sky130_fd_pr__res_generic_m2 rmetal2 *metal2 - device resistor sky130_fd_pr__res_generic_m3 rmetal3 *metal3 - device resistor sky130_fd_pr__res_generic_m4 rm4 *m4 - device resistor sky130_fd_pr__res_generic_m5 rm5 *m5 - - device rsubcircuit sky130_fd_pr__res_high_po_0p35 xhrpoly \ - xpc pwell,space/w error +res0p35 l=l - device rsubcircuit sky130_fd_pr__res_high_po_0p69 xhrpoly \ - xpc pwell,space/w error +res0p69 l=l - device rsubcircuit sky130_fd_pr__res_high_po_1p41 xhrpoly \ - xpc pwell,space/w error +res1p41 l=l - device rsubcircuit sky130_fd_pr__res_high_po_2p85 xhrpoly \ - xpc pwell,space/w error +res2p85 l=l - device rsubcircuit sky130_fd_pr__res_high_po_5p73 xhrpoly \ - xpc pwell,space/w error +res5p73 l=l - device rsubcircuit sky130_fd_pr__res_high_po xhrpoly \ - xpc pwell,space/w error l=l w=w - device rsubcircuit sky130_fd_pr__res_xhigh_po_0p35 uhrpoly \ - xpc pwell,space/w error +res0p35 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po_0p69 uhrpoly \ - xpc pwell,space/w error +res0p69 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po_1p41 uhrpoly \ - xpc pwell,space/w error +res1p41 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po_2p85 uhrpoly \ - xpc pwell,space/w error +res2p85 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po_5p73 uhrpoly \ - xpc pwell,space/w error +res5p73 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po uhrpoly \ - xpc pwell,space/w error l=l w=w - - device rsubcircuit sky130_fd_pr__res_generic_nd ndiffres \ - *ndiff pwell,space/w error l=l w=w - device rsubcircuit sky130_fd_pr__res_generic_pd pdiffres \ - *pdiff nwell error l=l w=w - device rsubcircuit sky130_fd_pr__res_iso_pw rpw \ - pwell dnwell error l=l w=w - device rsubcircuit sky130_fd_pr__res_generic_nd__hv mvndiffres \ - *mvndiff pwell,space/w error l=l w=w - device rsubcircuit sky130_fd_pr__res_generic_pd__hv mvpdiffres \ - *mvpdiff nwell error l=l w=w - - device resistor sky130_fd_pr__res_generic_po rmp *poly - device resistor sky130_fd_pr__res_generic_po mrp1 *poly - - device pdiode sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area p=pj - device pdiode sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area p=pj - device pdiode sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area p=pj - device pdiode sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area p=pj - - device ndiode sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area p=pj - device ndiode sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area p=pj - device ndiode sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area p=pj - device ndiode sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area p=pj - - device csubcircuit sky130_fd_pr__cap_mim_m3_1 *mimcap *m3 w=w l=l - device csubcircuit sky130_fd_pr__cap_mim_m3_2 *mimcap2 *m4 w=w l=l - - variants (orig) - - device mosfet sky130_fd_pr__pfet_01v8 scpfet,pfet pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__special_pfet_pass ppu pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__pfet_01v8_lvt pfetlvt pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__pfet_01v8_mvt pfetmvt pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__pfet_01v8_hvt scpfethvt,pfethvt pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__nfet_01v8 scnfet,nfet ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_pr__special_nfet_pass npass ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_pr__special_nfet_latch npd ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_pr__special_nfet_latch npd ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_pr__nfet_01v8_lvt nfetlvt ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_bs_flash__special_sonosfet_star nsonos ndiff,ndiffres,ndc \ - pwell,space/w - - # Note that corenvar, corepvar are not considered devices, and extract as - # parasitic capacitance instead (but cap values need to be added). - - # Extended drain devices (must appear before the regular devices) - device mosfet sky130_fd_pr__nfet_20v0_nvt mvnnfet *mvndiff,mvndiffres \ - dnwell pwell,space/w error - device mosfet sky130_fd_pr__nfet_20v0 mvnfet *mvndiff,mvndiffres \ - dnwell pwell,space/w error - device mosfet sky130_fd_pr__pfet_20v0 mvpfet *mvpdiff,mvpdiffres \ - pwell,space/w nwell error - - device mosfet sky130_fd_pr__pfet_g5v0d10v5 mvpfet mvpdiff,mvpdiffres,mvpdc nwell - device mosfet sky130_fd_pr__esd_pfet_g5v0d10v5 mvpfetesd mvpdiff,mvpdiffres,mvpdc nwell - device mosfet sky130_fd_pr__nfet_g5v0d10v5 mvnfet mvndiff,mvndiffres,mvndc pwell,space/w - device mosfet sky130_fd_pr__esd_nfet_g5v0d10v5 mvnfetesd mvndiff,mvndiffres,mvndc pwell,space/w - device mosfet sky130_fd_pr__nfet_05v0_nvt mvnnfet *mvndiff,mvndiffres pwell,space/w - device mosfet sky130_fd_pr__nfet_03v3_nvt nnfet *mvndiff,mvndiffres pwell,space/w - - # These devices always extract as subcircuits - device subcircuit sky130_fd_pr__cap_var_lvt varactor *nndiff nwell error l=l w=w - device subcircuit sky130_fd_pr__cap_var_hvt varhvt *nndiff nwell error l=l w=w - device subcircuit sky130_fd_pr__cap_var mvvaractor *mvnndiff nwell error l=l w=w - - device resistor sky130_fd_pr__res_generic_po rmp *poly - device resistor sky130_fd_pr__res_generic_l1 rli1 *li,coreli - device resistor sky130_fd_pr__res_generic_m1 rmetal1 *metal1 - device resistor sky130_fd_pr__res_generic_m2 rmetal2 *metal2 - device resistor sky130_fd_pr__res_generic_m3 rmetal3 *metal3 - device resistor sky130_fd_pr__res_generic_m4 rm4 *m4 - device resistor sky130_fd_pr__res_generic_m5 rm5 *m5 - - device resistor sky130_fd_pr__res_high_po_0p35 xhrpoly xpc +res0p35 - device resistor sky130_fd_pr__res_high_po_0p69 xhrpoly xpc +res0p69 - device resistor sky130_fd_pr__res_high_po_1p41 xhrpoly xpc +res1p41 - device resistor sky130_fd_pr__res_high_po_2p85 xhrpoly xpc +res2p85 - device resistor sky130_fd_pr__res_high_po_5p73 xhrpoly xpc +res5p73 - device resistor sky130_fd_pr__res_high_po xhrpoly xpc - device resistor sky130_fd_pr__res_xhigh_po_0p35 uhrpoly xpc +res0p35 - device resistor sky130_fd_pr__res_xhigh_po_0p69 uhrpoly xpc +res0p69 - device resistor sky130_fd_pr__res_xhigh_po_1p41 uhrpoly xpc +res1p41 - device resistor sky130_fd_pr__res_xhigh_po_2p85 uhrpoly xpc +res2p85 - device resistor sky130_fd_pr__res_xhigh_po_5p73 uhrpoly xpc +res5p73 - device resistor sky130_fd_pr__res_xhigh_po uhrpoly xpc - device resistor sky130_fd_pr__res_generic_po mrp1 *poly - device resistor sky130_fd_pr__res_generic_nd ndiffres *ndiff - device resistor sky130_fd_pr__res_generic_pd pdiffres *pdiff - device resistor mrdn_hv mvndiffres *mvndiff - device resistor mrdp_hv mvpdiffres *mvpdiff - device resistor sky130_fd_pr__res_iso_pw rpw pwell - - device ndiode sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area - device ndiode sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area - device ndiode sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area - device ndiode sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area - - device pdiode sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area - device pdiode sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area - device pdiode sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area - device pdiode sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area - - device bjt sky130_fd_pr__npn_05v5_W1p00L1p00 npn *ndiff dnwell space/w error +npn1p00 - device bjt sky130_fd_pr__npn_05v5_W1p00L2p00 npn *ndiff dnwell space/w error +npn2p00 - device bjt sky130_fd_pr__npn_05v5 npn *ndiff dnwell space/w error a2=area - device bjt sky130_fd_pr__pnp_05v5_W0p68L0p68 pnp *pdiff pwell,space/w +pnp0p68 - device bjt sky130_fd_pr__pnp_05v5_W3p40L3p40 pnp *pdiff pwell,space/w +pnp3p40 - device bjt sky130_fd_pr__pnp_05v5 pnp *pdiff pwell,space/w a2=area - device bjt sky130_fd_pr__npn_11v0_W1p00L1p00 npn *mvndiff dnwell space/w error +npn11p0 - device bjt sky130_fd_pr__npn_11v0 npn *mvndiff dnwell space/w error a2=area - - device capacitor sky130_fd_pr__cap_mim_m3_1 *mimcap *m3 1 - device capacitor sky130_fd_pr__cap_mim_m3_2 *mimcap2 *m4 1 - -end - -#----------------------------------------------------- -# Wiring tool definitions -#----------------------------------------------------- - -wiring - # All wiring values are in nanometers - scalefactor 10 - - contact mcon 170 li 0 0 m1 30 60 - contact v1 260 m1 0 30 m2 0 30 - contact v2 280 m2 0 45 m3 25 0 - contact v3 320 m3 0 30 m4 5 5 - contact v4 1180 m4 0 m5 120 - - contact pc 170 poly 50 80 li 0 80 - contact pdc 170 pdiff 40 60 li 0 80 - contact ndc 170 ndiff 40 60 li 0 80 - contact psc 170 psd 40 60 li 0 80 - contact nsc 170 nsd 40 60 li 0 80 - -end - -#----------------------------------------------------- -# Plain old router. . . -#----------------------------------------------------- - -router -end - -#------------------------------------------------------------ -# Plowing (restored in magic 8.2, need to fill this section) -#------------------------------------------------------------ - -plowing -end - -#----------------------------------------------------------------- -# No special plot layers defined (use default PNM color choices) -#----------------------------------------------------------------- - -plot - style pnm - default - draw fillblock no_color_at_all - draw fillblock4 no_color_at_all - draw fomfill no_color_at_all - draw polyfill no_color_at_all - draw m1fill no_color_at_all - draw m2fill no_color_at_all - draw m3fill no_color_at_all - draw m4fill no_color_at_all - draw m5fill no_color_at_all - draw nwell cwell -end -
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds index 305227c..7dcf3d0 100644 --- a/gds/user_analog_project_wrapper.gds +++ b/gds/user_analog_project_wrapper.gds Binary files differ
diff --git a/mag/sky130A.tech b/mag/sky130A.tech deleted file mode 100644 index be94895..0000000 --- a/mag/sky130A.tech +++ /dev/null
@@ -1,5388 +0,0 @@ -#------------------------------------------------------------------------ -# Copyright (c) 2020 R. Timothy Edwards -# Revisions: See below -# -# This file is an Open Source foundry process describing -# the SkyWater sky130 hybrid 0.18um / 0.13um fabrication -# process. The file may be distributed under the terms -# of the Apache 2.0 license agreement. -# -#------------------------------------------------------------------------ -tech - format 35 - sky130A -end - -version - version 1.0.204-0-ge27b678 - description "SkyWater SKY130: Open Source rules and DRC" - requires magic-8.3.111 -end - -#------------------------------------------------------------------------ -# Status 7/10/20: Rev 1 (alpha): -# First public release -# Status 8/14/20: Rev 2 (alpha): -# Started updating with new device/model naming convention -# Status 1/3/21: Taking out of beta and declaring an official release. -#------------------------------------------------------------------------ - -#------------------------------------------------------------------------ -# Supported device types -#------------------------------------------------------------------------ -# device name magic ID layer description -#------------------------------------------------------------------------ -# sky130_fd_pr__nfet_01v8 nfet standard nFET -# sky130_fd_pr__nfet_01v8 scnfet standard nFET in standard cell** -# sky130_fd_pr__special_nfet_latch npd special nFET in SRAM cell -# sky130_fd_pr__special_nfet_pass npass special nFET in SRAM cell -# sky130_fd_pr__nfet_01v8_lvt nfetlvt low Vt nFET -# sky130_fd_bs_flash__special_sonosfet_star nsonos SONOS nFET -# sky130_fd_pr__pfet_01v8 pfet standard pFET -# sky130_fd_pr__pfet_01v8 scpfet standard pFET in standard cell** -# sky130_fd_pr__special_pfet_pass ppu special pFET in SRAM cell -# sky130_fd_pr__pfet_01v8_lvt pfetlvt low Vt pFET -# sky130_fd_pr__pfet_01v8_mvt pfetmvt med Vt pFET -# sky130_fd_pr__pfet_01v8_hvt pfethvt high Vt pFET -# sky130_fd_pr__nfet_03v3_nvt nnfet native nFET -# sky130_fd_pr__pfet_g5v0d10v5 mvpfet thickox pFET -# sky130_fd_pr__nfet_g5v0d10v5 mvnfet thickox nFET -# sky130_fd_pr__nfet_01v8_nvt mvnnfet thickox native nFET -# sky130_fd_pr__diode_pw2nd_05v5 ndiode n+ diff diode -# sky130_fd_pr__diode_pw2nd_05v5_lvt ndiodelvt low Vt n+ diff diode -# sky130_fd_pr__diode_pw2nd_05v5_nvt nndiode diode with nndiff -# sky130_fd_pr__diode_pw2nd_11v0 mvndiode thickox n+ diff diode -# sky130_fd_pr__diode_pd2nw_05v5 pdiode p+ diff diode -# sky130_fd_pr__diode_pd2nw_05v5_lvt pdiodelvt low Vt p+ diff diode -# sky130_fd_pr__diode_pd2nw_05v5_hvt pdiodehvt high Vt p+ diff diode -# sky130_fd_pr__diode_pd2nw_11v0 mvpdiode thickox p+ diff diode -# sky130_fd_pr__npn_05v5 pbase NPN in deep nwell -# sky130_fd_pr__npn_11v0 pbase thick oxide gated NPN -# sky130_fd_pr__pnp_05v5 nbase PNP -# sky130_fd_pr__cap_mim_m3_1 mimcap MiM cap 1st plate -# sky130_fd_pr__cap_mim_m3_2 mimcap2 MiM cap 2nd plate -# sky130_fd_pr__res_generic_nd rdn n+ diff resistor -# sky130_fd_pr__res_generic_nd__hv mvrdn thickox n+ diff resistor -# sky130_fd_pr__res_generic_pd rdp p+ diff resistor -# sky130_fd_pr__res_generic_pd__nv mvrdp thickox p+ diff resistor -# sky130_fd_pr__res_generic_l1 rli local interconnect resistor -# sky130_fd_pr__res_generic_po npres n+ poly resistor -# sky130_fd_pr__res_high_po_* ppres (*) p+ poly resistor (300 Ohms/sq) -# sky130_fd_pr__res_xhigh_po_* xres (*) p+ poly resistor (2k Ohms/sq) -# sky130_fd_pr__cap_var_lvt varactor low Vt varactor -# sky130_fd_pr__cap_var_hvt varactorhvt high Vt varactor -# sky130_fd_pr__cap_var mvvaractor thickox varactor -# sky130_fd_pr__res_iso_pw rpw pwell resistor (in deep nwell) -# sky130_fd_pr__esd_nfet_g5v0d10v5 mvnfetesd ESD thickox nFET -# sky130_fd_pr__esd_pfet_g5v0d10v5 mvpfetesd ESD thickox pFET -# -# (*) Note that ppres may extract into some generic type called -# "sky130_fd_pr__res_xhigh_po", but only specific sizes of xhrpoly are -# allowed, and these are created from fixed layouts like the types below. -# -# (**) nFET and pFET in standard cells are the same as devices -# outside of the standard cell except for the DRC rule for -# FET to diffusion contact spacing (which is 0.05um, not 0.055um) -# -#------------------------------------------------------------- -# The following devices are not extracted but are represented -# only by script-generated subcells in the PDK. -#------------------------------------------------------------- -# sky130_fd_pr__esd_nfet_01v8 ESD nFET -# sky130_fd_pr__esd_nfet_05v0_nvt ESD native nFET -# sky130_fd_pr__special_nfet_pass_flash flash nFET device -# sky130_fd_pr__esd_rf_diode_pw2nd_11v0 ESD n+ diode -# sky130_fd_pr__esd_rf_diode_pd2nw_11v0 ESD p+ diode -# sky130_fd_pr__cap_vpp_* Vpp cap -# sky130_fd_pr__ind_* inductor -# sky130_fd_pr__fuse_m4 metal fuse device -#-------------------------------------------------------------- - -#----------------------------------------------------- -# Tile planes -#----------------------------------------------------- - -planes - dwell,dw - well,w - active,a - locali,li1,li - metal1,m1 - metal2,m2 - metal3,m3 - cap1,c1 - metal4,m4 - cap2,c2 - metal5,m5 - metali,mi - block,b - comment,c -end - -#----------------------------------------------------- -# Tile types -#----------------------------------------------------- - -types -# Deep nwell - dwell dnwell,dnw - dwell isosubstrate,isosub - -# Wells - well nwell,nw - well pwell,pw - well rpw,rpwell - -well obswell - well pbase,npn - well nbase,pnp - -# Transistors - active nmos,ntransistor,nfet - -active scnmos,scntransistor,scnfet - -active npd,npdfet,sramnfet - -active npass,npassfet,srampassfet - active pmos,ptransistor,pfet - -active scpmos,scptransistor,scpfet - -active scpmoshvt,scpfethvt - -active ppu,ppufet,srampfet - active nnmos,nntransistor,nnfet - active mvnmos,mvntransistor,mvnfet - active mvpmos,mvptransistor,mvpfet - active mvnnmos,mvnntransistor,mvnnfet - -active mvnmosesd,mvntransistoresd,mvnfetesd - -active mvpmosesd,mvptransistoresd,mvpfetesd - active varactor,varact,var - active mvvaractor,mvvaract,mvvar - - active pmoslvt,pfetlvt - active pmosmvt,pfetmvt - active pmoshvt,pfethvt - active nmoslvt,nfetlvt - active varactorhvt,varacthvt,varhvt - -active nsonos,sonos - -active sramnvar,corenvar,corenvaractor - -active srampvar,corepvar,corepvaractor - -# Diffusions - -active fomfill - active ndiff,ndiffusion,ndif - active pdiff,pdiffusion,pdif - active mvndiff,mvndiffusion,mvndif - active mvpdiff,mvpdiffusion,mvpdif - active ndiffc,ndcontact,ndc - active pdiffc,pdcontact,pdc - active mvndiffc,mvndcontact,mvndc - active mvpdiffc,mvpdcontact,mvpdc - active psubdiff,psubstratepdiff,ppdiff,ppd,psd,ptap - active nsubdiff,nsubstratendiff,nndiff,nnd,nsd,ntap - active mvpsubdiff,mvpsubstratepdiff,mvppdiff,mvppd,mvpsd,mvptap - active mvnsubdiff,mvnsubstratendiff,mvnndiff,mvnnd,mvnsd,mvntap - active psubdiffcont,psubstratepcontact,psc,ptapc - active nsubdiffcont,nsubstratencontact,nsc,ntapc - active mvpsubdiffcont,mvpsubstratepcontact,mvpsc,mvptapc - active mvnsubdiffcont,mvnsubstratencontact,mvnsc,mvntapc - -active obsactive - -active mvobsactive - -# Poly - active poly,p,polysilicon - active polycont,pc,pcontact,polycut,polyc - active xpolycontact,xpolyc,xpc - -active polyfill - -# Resistors - active npolyres,npres,mrp1 - active ppolyres,ppres,xhrpoly - active xpolyres,xpres,xres,uhrpoly - active ndiffres,rnd,rdn,rndiff - active pdiffres,rpd,rdp,rpdiff - active mvndiffres,mvrnd,mvrdn,mvrndiff - active mvpdiffres,mvrpd,mvrdp,mvrpdiff - active rmp - -# Diodes - active pdiode,pdi - active ndiode,ndi - active nndiode,nndi - active pdiodec,pdic - active ndiodec,ndic - active nndiodec,nndic - active mvpdiode,mvpdi - active mvndiode,mvndi - active mvpdiodec,mvpdic - active mvndiodec,mvndic - active pdiodelvt,pdilvt - active pdiodehvt,pdihvt - active ndiodelvt,ndilvt - active pdiodelvtc,pdilvtc - active pdiodehvtc,pdihvtc - active ndiodelvtc,ndilvtc - -# Local Interconnect - locali locali,li1,li - -locali corelocali,coreli1,coreli - locali rlocali,rli1,rli - locali viali,vial,mcon,m1c,v0 - -locali obsli1,obsli - -locali obsli1c,obsmcon - -locali lifill - -# Metal 1 - metal1 metal1,m1,met1 - metal1 rmetal1,rm1,rmet1 - metal1 via1,m2contact,m2cut,m2c,via,v,v1 - -metal1 obsm1 - metal1 padl - -metal1 m1fill - -# Metal 2 - metal2 metal2,m2,met2 - metal2 rmetal2,rm2,rmet2 - metal2 via2,m3contact,m3cut,m3c,v2 - -metal2 obsm2 - -metal2 m2fill - -# Metal 3 - metal3 metal3,m3,met3 - metal3 rmetal3,rm3,rmet3 - -metal3 obsm3 - metal3 via3,v3 - -metal3 m3fill - - cap1 mimcap,mim,capm - cap1 mimcapcontact,mimcapc,mimcc,capmc - -# Metal 4 - metal4 metal4,m4,met4 - metal4 rmetal4,rm4,rmet4 - -metal4 obsm4 - metal4 via4,v4 - -metal4 m4fill - - cap2 mimcap2,mim2,capm2 - cap2 mimcap2contact,mimcap2c,mim2cc,capm2c - -# Metal 5 - metal5 metal5,m5,met5 - metal5 rm5,rmetal5,rmet5 - -metal5 obsm5 - -metal5 m5fill - - metal5 mrdlcontact,mrdlc,pi1 - metali metalrdl,mrdl,metrdl,rdl - -metali obsmrdl - metali pi2 - block ubm - -# Miscellaneous - -block glass - -block fillblock,fillblock4 - comment comment - -comment obscomment -# fixed resistor width identifiers - -comment res0p35 - -comment res0p69 - -comment res1p41 - -comment res2p85 - -comment res5p73 -# fixed bipolar area identifiers - -comment pnp0p68 - -comment pnp3p40 - -comment npn1p00 - -comment npn2p00 - -comment npn11p0 - -end - -#----------------------------------------------------- -# Magic contact types -#----------------------------------------------------- - -contact - pc poly locali - ndc ndiff locali - pdc pdiff locali - nsc nsd locali - psc psd locali - ndic ndiode locali - ndilvtc ndiodelvt locali - nndic nndiode locali - pdic pdiode locali - pdilvtc pdiodelvt locali - pdihvtc pdiodehvt locali - xpc xpc locali - - mvndc mvndiff locali - mvpdc mvpdiff locali - mvnsc mvnsd locali - mvpsc mvpsd locali - mvndic mvndiode locali - mvpdic mvpdiode locali - - mcon locali metal1 - obsmcon obsli metal1 - - via1 metal1 metal2 - via2 metal2 metal3 - via3 metal3 metal4 - via4 metal4 metal5 - stackable - - # MiM cap contacts are not stackable! - mimcc mimcap metal4 - mim2cc mimcap2 metal5 - - padl m1 m2 m3 m4 m5 glass - - mrdlc metal5 mrdl - pi2 mrdl ubm -end - -#----------------------------------------------------- -# Layer aliases -#----------------------------------------------------- - -aliases - - allwellplane nwell - allnwell nwell,obswell,pnp - - allnfets nfet,npass,npd,scnfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nfetlvt,nsonos - allpfets pfet,ppu,scpfet,scpfethvt,mvpfet,mvpfetesd,pfethvt,pfetlvt,pfetmvt - allfets allnfets,allpfets,varactor,mvvaractor,varhvt,corenvar,corepvar - allfetsstd nfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nfetlvt,pfet,mvpfet,mvpfetesd,pfethvt,pfetlvt,pfetmvt - allfetsspecial scnfet,scpfet,scpfethvt - allfetscore npass,npd,nsonos,ppu,corenvar,corepvar - allfetsnolvt nfet,npass,npd,scnfet,mvnfet,mvnfetesd,mvnnfet,nnfet,nsonos,pfet,ppu,scpfet,scpfethvt,mvpfet,mvpfetesd,pfethvt,pfetmvt,varactor,mvvaractor,varhvt,corenvar - - allnactivenonfet *ndiff,*nsd,*ndiode,*nndiode,*mvndiff,*mvnsd,*mvndiode,*ndiodelvt - allnactive allnactivenonfet,allnfets - allnactivenontap *ndiff,*ndiode,*nndiode,*mvndiff,*mvndiode,*ndiodelvt,allnfets - allnactivetap *nsd,*mvnsd,var,varhvt,mvvar,corenvar - - allpactivenonfet *pdiff,*psd,*pdiode,*mvpdiff,*mvpsd,*mvpdiode,*pdiodelvt,*pdiodehvt - allpactive allpactivenonfet,allpfets - allpactivenontap *pdiff,*pdiode,*mvpdiff,*mvpdiode,*pdiodelvt,*pdiodehvt,allpfets - allpactivetap *psd,*mvpsd,corepvar - - allactivenonfet allnactivenonfet,allpactivenonfet - allactive allactivenonfet,allfets - - allactiveres ndiffres,pdiffres,mvndiffres,mvpdiffres - - allndifflv *ndif,*nsd,*ndiode,ndiffres,nfet,npass,npd,scnfet,nfetlvt,nsonos - allpdifflv *pdif,*psd,*pdiode,pdiffres,pfet,ppu,scpfet,scpfethvt,pfetlvt,pfetmvt,pfethvt - alldifflv allndifflv,allpdifflv - allndifflvnonfet *ndif,*nsd,*ndiode,*nndiode,ndiffres,*ndiodelvt - allpdifflvnonfet *pdif,*psd,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt - alldifflvnonfet allndifflvnonfet,allpdifflvnonfet - - allndiffmv *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnfetesd,mvnnfet,nnfet - allpdiffmv *mvpdif,*mvpsd,*mvpdiode,mvpdiffres,mvpfet,mvpfetesd - alldiffmv allndiffmv,allpdiffmv - allndiffmvnontap *mvndif,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnfetesd,mvnnfet,nnfet - allpdiffmvnontap *mvpdif,*mvpdiode,mvpdiffres,mvpfet,mvpfetesd - alldiffmvnontap allndiffmvnontap,allpdiffmvnontap - allndiffmvnonfet *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres - allpdiffmvnonfet *mvpdif,*mvpsd,*mvpdiode,mvpdiffres - alldiffmvnonfet allndiffmvnonfet,allpdiffmvnonfet - - alldiffnonfet alldifflvnonfet,alldiffmvnonfet - alldiff alldifflv,alldiffmv,fomfill - - allpolyres mrp1,xhrpoly,uhrpoly,rmp - allpolynonfet *poly,allpolyres,xpc - allpolynonres *poly,allfets,xpc - - allpoly allpolynonfet,allfets - allpolynoncap *poly,xpc,allfets,allpolyres - - allndiffcontlv ndc,nsc,ndic,nndic,ndilvtc - allpdiffcontlv pdc,psc,pdic,pdilvtc,pdihvtc - allndiffcontmv mvndc,mvnsc,mvndic - allpdiffcontmv mvpdc,mvpsc,mvpdic - allndiffcont allndiffcontlv,allndiffcontmv - allpdiffcont allpdiffcontlv,allpdiffcontmv - alldiffcontlv allndiffcontlv,allpdiffcontlv - alldiffcontmv allndiffcontmv,allpdiffcontmv - alldiffcont alldiffcontlv,alldiffcontmv - - allcont alldiffcont,pc - - allres allpolyres,allactiveres - - allli *locali,coreli,rli - allm1 *m1,rm1 - allm2 *m2,rm2 - allm3 *m3,rm3 - allm4 *m4,rm4 - allm5 *m5,rm5 - - allpad padl - - psub pwell - - obstypes obswell,obsactive,obsli,obsmcon,obsm1,obsm2,obsm3,obsm4,obsm5,obsmrdl,obscomment - idtypes res0p35,res0p69,res1p41,res2p85,res5p73,pnp0p68,pnp3p40,npn1p00,npn2p00,npn11p0 - blocktypes fillblock,fillblock4 - -end - -#----------------------------------------------------- -# Layer drawing styles -#----------------------------------------------------- - -styles - styletype mos - dnwell cwell - isosub subcircuit - nwell nwell - pwell pwell - rpwell pwell ptransistor_stripes - ndiff ndiffusion - fomfill ndiffusion - pdiff pdiffusion - nsd ndiff_in_nwell - psd pdiff_in_pwell - nfet ntransistor ntransistor_stripes - scnfet ntransistor ntransistor_stripes - npass ntransistor ntransistor_stripes - npd ntransistor ntransistor_stripes - pfet ptransistor ptransistor_stripes - scpfet ptransistor ptransistor_stripes - scpfethvt ptransistor ptransistor_stripes implant2 - ppu ptransistor ptransistor_stripes - var polysilicon ndiff_in_nwell - ndc ndiffusion metal1 contact_X'es - pdc pdiffusion metal1 contact_X'es - nsc ndiff_in_nwell metal1 contact_X'es - psc pdiff_in_pwell metal1 contact_X'es - corenvar polysilicon ndiff_in_nwell - corepvar polysilicon pdiff_in_pwell - - pnp nwell ntransistor_stripes - npn pwell ptransistor_stripes - - pfetlvt ptransistor ptransistor_stripes implant1 - pfetmvt ptransistor ptransistor_stripes implant3 - pfethvt ptransistor ptransistor_stripes implant2 - nfetlvt ntransistor ntransistor_stripes implant1 - nsonos ntransistor implant3 - varhvt polysilicon ndiff_in_nwell implant2 - nnfet ntransistor ndiff_in_nwell - - mvndiff ndiffusion hvndiff_mask - mvpdiff pdiffusion hvpdiff_mask - mvnsd ndiff_in_nwell hvndiff_mask - mvpsd pdiff_in_pwell hvpdiff_mask - mvnfet ntransistor ntransistor_stripes hvndiff_mask - mvnfetesd ntransistor ntransistor_stripes hvndiff_mask - mvnnfet ntransistor ndiff_in_nwell hvndiff_mask - mvpfet ptransistor ptransistor_stripes - mvpfetesd ptransistor ptransistor_stripes - mvvar polysilicon ndiff_in_nwell hvndiff_mask - mvndc ndiffusion metal1 contact_X'es hvndiff_mask - mvpdc pdiffusion metal1 contact_X'es hvpdiff_mask - mvnsc ndiff_in_nwell metal1 contact_X'es hvndiff_mask - mvpsc pdiff_in_pwell metal1 contact_X'es hvpdiff_mask - - poly polysilicon - polyfill polysilicon - pc polysilicon metal1 contact_X'es - npolyres polysilicon silicide_block nselect2 - ppolyres polysilicon silicide_block pselect2 - xpc polysilicon pselect2 metal1 contact_X'es - rmp polysilicon poly_resist_stripes - - res0p35 implant1 - res0p69 implant1 - res1p41 implant1 - res2p85 implant1 - res5p73 implant1 - pnp0p68 implant1 - pnp3p40 implant1 - npn1p00 implant1 - npn2p00 implant1 - npn11p0 implant1 - - pdiode pdiffusion pselect2 - ndiode ndiffusion nselect2 - pdiodec pdiffusion pselect2 metal1 contact_X'es - ndiodec ndiffusion nselect2 metal1 contact_X'es - - nndiode ndiffusion nselect2 implant3 - ndiodelvt ndiffusion nselect2 implant1 - pdiodelvt pdiffusion pselect2 implant1 - pdiodehvt pdiffusion pselect2 implant2 - pdilvtc pdiffusion pselect2 implant1 metal1 contact_X'es - pdihvtc pdiffusion pselect2 implant2 metal1 contact_X'es - ndilvtc ndiffusion nselect2 implant1 metal1 contact_X'es - - mvpdiode pdiffusion pselect2 hvpdiff_mask - mvndiode ndiffusion nselect2 hvndiff_mask - mvpdiodec pdiffusion pselect2 metal1 contact_X'es hvpdiff_mask - mvndiodec ndiffusion nselect2 metal1 contact_X'es hvndiff_mask - nndiodec ndiff_in_nwell nselect2 metal1 contact_X'es hvndiff_mask - - locali metal1 - lifill metal1 - coreli metal1 - rli metal1 poly_resist_stripes - mcon metal1 metal2 via1arrow - obsli metal1 - obsmcon metal1 metal2 via1arrow - - metal1 metal2 - m1fill metal2 - rm1 metal2 poly_resist_stripes - obsm1 metal2 - m2c metal2 metal3 via2arrow - metal2 metal3 - m2fill metal3 - rm2 metal3 poly_resist_stripes - obsm2 metal3 - m3c metal3 metal4 via3alt - metal3 metal4 - m3fill metal4 - rm3 metal4 poly_resist_stripes - obsm3 metal4 - mimcap metal3 mems - mimcc metal3 contact_X'es mems - mimcap2 metal4 mems - mim2cc metal4 contact_X'es mems - via3 metal4 metal5 via4 - metal4 metal5 - m4fill metal5 - rm4 metal5 poly_resist_stripes - obsm4 metal5 - via4 metal5 metal6 via5 - metal5 metal6 - m5fill metal6 - rm5 metal6 poly_resist_stripes - obsm5 metal6 - mrdlc metal6 metal7 via6 - metalrdl metal7 - obsmrdl metal7 - ubm metal8 - pi2 metal7 metal8 via7 - - glass overglass - mrp1 poly_resist poly_resist_stripes - xhrpoly poly_resist silicide_block - uhrpoly poly_resist - ndiffres ndiffusion ndop_stripes - pdiffres pdiffusion pdop_stripes - mvndiffres ndiffusion hvndiff_mask ndop_stripes - mvpdiffres pdiffusion hvpdiff_mask pdop_stripes - comment comment - error_p error_waffle - error_s error_waffle - error_ps error_waffle - fillblock cwell - fillblock4 cwell - - obswell cwell - obsactive implant4 - - padl metal6 via6 overglass - - magnet substrate_field_implant - rotate via3alt - fence via5 -end - -#----------------------------------------------------- -# Special paint/erase rules -#----------------------------------------------------- - -compose - compose nfet poly ndiff - compose pfet poly pdiff - compose var poly nsd - - compose mvnfet poly mvndiff - compose mvpfet poly mvpdiff - compose mvvar poly mvnsd - - paint obsmcon locali via1 - paint obsmcon obsm1 obsli,obsm1 - - paint ndc nwell pdc - paint nfet nwell pfet - paint scnfet nwell scpfet - paint ndiff nwell pdiff - paint psd nwell nsd - paint psc nwell nsc - paint npd nwell ppu - - paint pdc pwell ndc - paint pfet pwell nfet - paint scpfet pwell scnfet - paint pdiff pwell ndiff - paint nsd pwell psd - paint nsc pwell psc - paint ppu pwell npd - - paint pdc coreli pdc - paint ndc coreli ndc - paint pc coreli pc - paint nsc coreli nsc - paint psc coreli psc - paint viali coreli viali - - paint coreli pdc pdc - paint coreli ndc ndc - paint coreli pc pc - paint coreli nsc nsc - paint coreli psc psc - paint coreli viali viali - - paint m4 obsm4 m4 - paint m5 obsm5 m5 -end - -#----------------------------------------------------- -# Electrical connectivity -#----------------------------------------------------- - -connect - *nwell,*nsd,*mvnsd,dnwell,pnp *nwell,*nsd,*mvnsd,dnwell,pnp - pwell,*psd,*mvpsd,npn pwell,*psd,*mvpsd,npn - *li,coreli,lifill *li,coreli,lifill - *m1,m1fill,obsmcon *m1,m1fill,obsmcon - *m2,m2fill *m2,m2fill - *m3,m3fill *m3,m3fill - *m4,m4fill *m4,m4fill - *m5,m5fill *m5,m5fill - *mimcap *mimcap - *mimcap2 *mimcap2 - allnactivenonfet allnactivenonfet - allpactivenonfet allpactivenonfet - *poly,xpc,allfets,polyfill *poly,xpc,allfets,polyfill - # RDL connects to m5 (i.e., padl) through glass cut - *mrdl *mrdl - glass metrdl -end - -#----------------------------------------------------- -# CIF/GDS output layer definitions -#----------------------------------------------------- -# NOTE: All values in this section MUST be multiples of 25 -# or else magic will scale below the allowed layout grid size - -cifoutput - -#---------------------------------------------------------------- -style gdsii -# NOTE: This section is used for actual GDS output -#---------------------------------------------------------------- - scalefactor 10 nanometers - options calma-permissive-labels - gridlimit 5 - -#---------------------------------------------------------------- -# Create a temp layer from the cell bounding box for use in -# generating ID layers. Note that "boundary", unlike "bbox", -# requires the FIXED_BBOX property (abutment box) in the cell. -#---------------------------------------------------------------- - templayer CELLBOUND - boundary - -#---------------------------------------------------------------- -# BOUND -#---------------------------------------------------------------- - layer BOUND CELLBOUND - calma 235 4 - -#---------------------------------------------------------------- -# DNWELL -#---------------------------------------------------------------- - - layer DNWELL dnwell,npn - calma 64 18 - - layer PWRES rpw - and dnwell - calma 64 13 - -#---------------------------------------------------------------- -# SUBCUT -#---------------------------------------------------------------- - - layer SUBCUT isosub - calma 81 53 - -#---------------------------------------------------------------- -# NWELL -#---------------------------------------------------------------- - - layer NWELL allnwell - bloat-all rpw dnwell - and-not rpw,pwell - calma 64 20 - - layer WELLTXT - labels allnwell noport - calma 64 5 - - layer WELLPIN - labels allnwell port - calma 64 16 - -#---------------------------------------------------------------- -# SUB (text/port only) -#---------------------------------------------------------------- - - layer SUBTXT - labels pwell noport - calma 64 59 - - layer SUBPIN - labels pwell port - calma 122 16 - -#---------------------------------------------------------------- -# DIFF -#---------------------------------------------------------------- - - layer DIFF allnactivenontap,allpactivenontap,allactiveres - calma 65 20 - - layer DIFFTXT - labels allnactivenontap,allpactivenontap noport - calma 65 6 - - layer DIFFPIN - labels allnactivenontap,allpactivenontap port - calma 65 16 - -#---------------------------------------------------------------- -# TAP -#---------------------------------------------------------------- - - layer TAP allnactivetap,allpactivetap - labels allnactivetap,allpactivetap port - calma 65 44 - - layer TAPTXT - labels allnactivetap,allpactivetap noport - calma 65 5 - -#---------------------------------------------------------------- -# FOM -#---------------------------------------------------------------- - - layer FOMFILL fomfill - labels fomfill - calma 23 28 - -#---------------------------------------------------------------- -# PSDM, NSDM (PPLUS, NPLUS implants) -#---------------------------------------------------------------- - - templayer basePSDM pdiffres,mvpdiffres - grow 15 - or xhrpoly,uhrpoly,xpc - grow 110 - bloat-or allpactivetap * 125 allnactivenontap 0 - bloat-or allpactivenontap * 125 allnactivetap 0 - - templayer baseNSDM ndiffres,mvndiffres - grow 125 - bloat-or allnactivetap * 125 allpactivenontap 0 - bloat-or allnactivenontap * 125 allpactivetap 0 - - templayer extendPSDM basePSDM - bridge 380 380 - and-not baseNSDM - - layer PSDM basePSDM,extendPSDM - grow 185 - shrink 185 - close 265000 - mask-hints PSDM - calma 94 20 - - templayer extendNSDM baseNSDM - bridge 380 380 - and-not basePSDM - - layer NSDM baseNSDM,extendNSDM - grow 185 - shrink 185 - close 265000 - mask-hints NSDM - calma 93 44 - -#---------------------------------------------------------------- -# LVID -#---------------------------------------------------------------- - - layer LVID nnfet - grow 100 - calma 81 60 - -#---------------------------------------------------------------- -# LVTN -#---------------------------------------------------------------- - - layer LVTN pfetlvt,nfetlvt,mvvar,mvnnfet,nnfet,nsonos,*pdiodelvt,*ndiodelvt,*nndiode - grow 180 - bridge 380 380 - grow 185 - shrink 185 - close 265000 - mask-hints LVTN - calma 125 44 - -#---------------------------------------------------------------- -# HVTR -#---------------------------------------------------------------- - - layer HVTR pfetmvt - grow 180 - bridge 380 380 - grow 185 - shrink 185 - close 265000 - calma 18 20 - -#---------------------------------------------------------------- -# HVTP -#---------------------------------------------------------------- - - layer HVTP scpfethvt,ppu,pfethvt,varhvt,*pdiodehvt - grow 180 - bridge 380 380 - grow 185 - shrink 185 - close 265000 - mask-hints HVTP - calma 78 44 - -#---------------------------------------------------------------- -# SONOS -#---------------------------------------------------------------- - - layer SONOS nsonos - grow 100 - grow-min 410 - bridge 500 410 - grow 250 - shrink 250 - calma 80 20 - -#---------------------------------------------------------------- -# SONOS requires COREID around area (areaid.ce). Also, the -# coreli layer indicates a cell needing COREID. Also, devices -# npd, npass, and ppu indicate a COREID cell. -#---------------------------------------------------------------- - - layer COREID - bloat-all nsonos,coreli,ppu,npd,npass,corepvar,corenvar CELLBOUND - mask-hints COREID - calma 81 2 - -#---------------------------------------------------------------- -# STDCELL applies to all cells containing scnfet or scpfet. -#---------------------------------------------------------------- - - layer STDCELL scnfet - bloat-all scpfet,scpfethvt,scnfet CELLBOUND - mask-hints STDCELL - calma 81 4 - -#---------------------------------------------------------------- -# ESDID is a marker layer for ESD devices in the padframe I/O. -#---------------------------------------------------------------- - - layer ESDID - bloat-all mvnfetesd *mvndiff,*poly - bloat-all mvpfetesd *mvpdiff,*poly - grow 100 - mask-hints ESDID - calma 81 19 - -#---------------------------------------------------------------- -# NPNID and PNPID apply to bipolar transistors -#---------------------------------------------------------------- - - layer NPNID - bloat-all npn dnwell - mask-hints NPNID - calma 82 20 - - templayer pnparea pnp - grow 400 - - layer PNPID - bloat-all pnparea *psd - or pnparea - mask-hints PNPID - calma 82 44 - -#---------------------------------------------------------------- -# RPM -#---------------------------------------------------------------- - - layer RPM - bloat-all xhrpoly xpc - grow 200 - grow-min 1270 - grow 420 - shrink 420 - calma 86 20 - -#---------------------------------------------------------------- -# URPM (2kOhms/sq. poly implant) -#---------------------------------------------------------------- - - layer URPM - bloat-all uhrpoly xpc - grow 200 - grow-min 1270 - grow 420 - shrink 420 - calma 79 20 - -#---------------------------------------------------------------- -# LDNTM (Tip implant for SONOS FETs) -#---------------------------------------------------------------- - - layer LDNTM - bloat-all nsonos *ndiff - grow 185 - grow 345 - shrink 345 - calma 11 44 - -#---------------------------------------------------------------- -# HVNTM (Tip implant for MV ndiff devices) -#---------------------------------------------------------------- - - templayer hvntm_block *mvpsd - grow 185 - - layer HVNTM - bloat-all mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,mvrdn,*nndiode *mvndiff - bloat-all mvvaractor *mvnsd - and-not hvntm_block - grow 185 - grow 345 - shrink 345 - and-not hvntm_block - mask-hints HVNTM - calma 125 20 - -#---------------------------------------------------------------- -# POLY -#---------------------------------------------------------------- - - layer POLY allpoly - calma 66 20 - - layer POLYTXT - labels allpoly noport - calma 66 5 - - layer POLYPIN - labels allpoly port - calma 66 16 - - layer POLYFILL polyfill - labels polyfill - calma 28 28 - -#---------------------------------------------------------------- -# HVI (includes rules NWELL 8-11 and DIFFTAP 14-26) -#---------------------------------------------------------------- - - templayer thkox_area alldiffmv,mvvar - grow 185 - bloat-all alldiffmv nwell - grow 345 - shrink 345 - - templayer large_ptap_mv thkox_area - shrink 420 - grow 420 - - templayer small_ptap_mv thkox_area - and-not large_ptap_mv - # (HVI min width rule is 0.6 but CNTM min width rule is 0.84um) - grow-min 840 - - layer HVI thkox_area,small_ptap_mv - bridge 700 600 - grow 345 - shrink 345 - mask-hints HVI - calma 75 20 - -#---------------------------------------------------------------- -# CONT (LICON) -#---------------------------------------------------------------- - - layer CONT allcont - squares-grid 0 170 170 - calma 66 44 - - # Contact for pres is different than other LICON contacts - # See rules LICON 1b, 1c (width/length) and 2b (spacing) - templayer xpc_horiz xpc - shrink 1007 - grow 1007 - - layer CONT xpc - and-not xpc_horiz - # Force long edge vertical for contacts narrower than 2um - # Minimum space is 350 but 520 satisfies no. of contacts rule - slots 80 190 520 80 2000 350 - calma 66 44 - - layer CONT xpc - and xpc_horiz - # Force long edge vertical for contacts wider than 2um - # Minimum space is 350 but 520 satisfies no. of contacts rule - slots 80 2000 350 80 190 520 - calma 66 44 - -#---------------------------------------------------------------- -# NPC (Nitride poly cut) -# surrounds CONT (LICON) on poly only (i.e., pc) -#---------------------------------------------------------------- - - # Avoids a common case of NPC bridges too close to other LICON shapes. - templayer diffcutarea pdc,ndc,psc,nsc,mvpdc,mvndc,mvpsc,mvnsc - grow 90 - - layer NPC pc - squares-grid 0 170 170 - grow 100 - bridge 270 270 - and-not diffcutarea - bridge 270 270 - grow 130 - shrink 130 - mask-hints NPC - calma 95 20 - - # NPC is also generated on xhrpoly and uhrpoly resistors - - layer NPC xpc,xhrpoly,uhrpoly - # xpc surrounds precision_resistor by 0.095um - grow 95 - grow 130 - shrink 130 - calma 95 20 - -#---------------------------------------------------------------- -# Device markers -#---------------------------------------------------------------- - - layer DIFFRES rdn,mvrdn,rdp,mvrdp - calma 65 13 - - layer POLYRES mrp1 - calma 66 13 - - # POLYSHORT is a poly layer resistor like rli, rm1, etc., for metal layers - layer POLYSHORT rmp - calma 66 15 - - # POLYRES extends to edge of contact cut - layer POLYRES xhrpoly,uhrpoly - grow 60 - and xpc - or xhrpoly,uhrpoly - calma 66 13 - - layer DIODE *pdi,*ndi,*nndi,*mvpdi,*mvndi,*pdilvt,*pdihvt,*ndilvt - # To be done: Expand to include anode, cathode, and guard ring - calma 81 23 - -#---------------------------------------------------------------- -# LI -#---------------------------------------------------------------- - layer LI allli - calma 67 20 - - layer LITXT - labels *locali,coreli noport - calma 67 5 - - layer LIPIN - labels *locali,coreli port - calma 67 16 - - layer LIRES rli - labels rli - calma 67 13 - - layer LIFILL lifill - labels lifill - calma 56 28 - -#---------------------------------------------------------------- -# MCON -#---------------------------------------------------------------- - layer MCON mcon - squares-grid 0 170 190 - calma 67 44 - -#---------------------------------------------------------------- -# MET1 -#---------------------------------------------------------------- - layer MET1 allm1 - calma 68 20 - - layer MET1TXT - labels allm1 noport - calma 68 5 - - layer MET1PIN - labels allm1 port - calma 68 16 - - layer MET1RES rm1 - labels rm1 - calma 68 13 - - layer MET1FILL m1fill - labels m1fill - calma 36 28 - -#---------------------------------------------------------------- -# VIA1 -#---------------------------------------------------------------- - layer VIA1 via1 - squares-grid 55 150 170 - calma 68 44 - -#---------------------------------------------------------------- -# MET2 -#---------------------------------------------------------------- - layer MET2 allm2 - calma 69 20 - - layer MET2TXT - labels allm2 noport - calma 69 5 - - layer MET2PIN - labels allm2 port - calma 69 16 - - layer MET2RES rm2 - labels rm2 - calma 69 13 - - layer MET2FILL m2fill - labels m2fill - calma 41 28 - -#---------------------------------------------------------------- -# VIA2 -#---------------------------------------------------------------- - layer VIA2 via2 - squares-grid 40 200 200 - calma 69 44 - -#---------------------------------------------------------------- -# MET3 -#---------------------------------------------------------------- - layer MET3 allm3 - calma 70 20 - - layer MET3TXT - labels allm3 noport - calma 70 5 - - layer MET3PIN - labels allm3 port - calma 70 16 - - layer MET3RES rm3 - labels rm3 - calma 70 13 - - layer MET3FILL m3fill - labels m3fill - calma 34 28 - -#---------------------------------------------------------------- -# VIA3 -#---------------------------------------------------------------- - layer VIA3 via3 - or mimcc - squares-grid 60 200 200 - calma 70 44 - -#---------------------------------------------------------------- -# MET4 -#---------------------------------------------------------------- - layer MET4 allm4 - calma 71 20 - - layer MET4TXT - labels allm4 noport - calma 71 5 - - layer MET4PIN - labels allm4 port - calma 71 16 - - layer MET4RES rm4 - labels rm4 - calma 71 13 - - layer MET4FILL m4fill - labels m4fill - calma 51 28 - -#---------------------------------------------------------------- -# VIA4 -#---------------------------------------------------------------- - layer VIA4 via4 - or mim2cc - squares-grid 190 800 800 - calma 71 44 - -#---------------------------------------------------------------- -# MET5 -#---------------------------------------------------------------- - layer MET5 allm5,m5fill - calma 72 20 - - layer MET5TXT - labels allm5 noport - calma 72 5 - - layer MET5PIN - labels allm5 port - calma 72 16 - - layer MET5RES rm5 - labels rm5 - calma 72 13 - - layer MET5FILL m5fill - labels m5fill - calma 59 28 - - -#---------------------------------------------------------------- -# RDL -#---------------------------------------------------------------- - layer RDL *metrdl - calma 74 20 - - layer RDLTXT - labels *metrdl noport - calma 74 5 - - layer RDLPIN - labels *metrdl port - calma 74 16 - - layer PI1 *metrdl - and padl,glass - # Test only---needs GDS layer number - - layer UBM *metrdl - shrink 50000 - grow 40000 - # Test only---needs GDS layer number - - layer PI2 *metrdl - shrink 50000 - grow 25000 - # Test only---needs GDS layer number - - -#---------------------------------------------------------------- -# GLASS -#---------------------------------------------------------------- - layer GLASS glass - calma 76 20 - -#---------------------------------------------------------------- -# CAPM -#---------------------------------------------------------------- - layer CAPM *mimcap - labels mimcap - calma 89 44 - - layer CAPM2 *mimcap2 - labels mimcap2 - calma 97 44 - -#---------------------------------------------------------------- -# Chip top level marker for DRC latchup rules to check 15um -# distance to taps (otherwise 6um is used) -#---------------------------------------------------------------- - - layer LOWTAPDENSITY - bbox top - # Clear 200um for pads + 50um for required high tap density - # in critical area. - shrink 250000 - calma 81 14 - -#---------------------------------------------------------------- -# FILLBLOCK -#---------------------------------------------------------------- - layer FILLOBSFOM obsactive - calma 22 24 - - layer FILLOBSM1 fillblock,fillblock4 - calma 62 24 - - layer FILLOBSM2 fillblock,fillblock4 - calma 105 52 - - layer FILLOBSM3 fillblock,fillblock4 - calma 107 24 - - layer FILLOBSM4 fillblock,fillblock4 - calma 112 4 - - render DNWELL cwell -0.1 0.1 - render NWELL nwell 0.0 0.2062 - render DIFF ndiffusion 0.2062 0.12 - render TAP pdiffusion 0.2062 0.12 - render POLY polysilicon 0.3262 0.18 - render CONT via 0.5062 0.43 - render LI metal1 0.9361 0.10 - render MCON via 1.0361 0.34 - render MET1 metal2 1.3761 0.36 - render VIA1 via 1.7361 0.27 - render MET2 metal3 2.0061 0.36 - render VIA2 via 2.3661 0.42 - render MET3 metal4 2.7861 0.845 - render VIA3 via 3.6311 0.39 - render MET4 metal5 4.0211 0.845 - render VIA4 via 4.8661 0.505 - render MET5 metal6 5.3711 1.26 - render CAPM metal8 2.4661 0.2 - render CAPM2 metal9 3.7311 0.2 - render RDL metal7 11.8834 4.0 - -#---------------------------------------------------------------- -style drc -#---------------------------------------------------------------- -# NOTE: This style is used for DRC only, not for GDS output -#---------------------------------------------------------------- - scalefactor 10 nanometers - options calma-permissive-labels - - # Ensure nwell overlaps dnwell at least 0.4um outside and 1.03um inside - templayer dnwell_shrink dnwell - shrink 1030 - - templayer nwell_missing dnwell - grow 400 - and-not dnwell_shrink - and-not nwell - - templayer pwell_in_dnwell dnwell - and-not nwell - - # SONOS nFET devices must be in deep nwell - templayer dnwell_missing nsonos - and-not dnwell - - # SONOS nFET devices must be in cell with abutment box - templayer abutment_box - boundary - - templayer bbox_missing nsonos - and-not abutment_box - - # Make sure nwell covers varactor poly - templayer var_poly_no_nwell - bloat-all varactor,mvvaractor *poly - grow 150 - and-not nwell - - # Define MiM cap bottom plate for spacing rule - templayer mim_bottom - bloat-all *mimcap *metal3 - - # Define MiM2 cap bottom plate for spacing rule - templayer mim2_bottom - bloat-all *mimcap2 *metal4 - - # Define areas where mim2cc is inside the boundary of mimcc - # by more than the contact surround - templayer mim2_contact_overlap - bloat-all *mimcap2 mimcc - shrink 60 - and-not *mimcap2 - - # Note that metal fill is performed by the foundry and so is not - # an option for a cifoutput style. - - # Check latchup rule (15um minimum from tap LICON center to any - # non-tap diffusion. Note that to count as a tap, the diffusion - # must be contacted to LI - - templayer ptap_reach psc,mvpsc - and-not dnwell - # grow total is 15um. grow in 0.84um increments to ensure that - # no nwell ring is crossed - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 840 - and-not nwell,dnwell - grow 635 - and-not nwell,dnwell - - templayer ptap_missing *ndiff,*mvndiff - and-not dnwell - and-not ptap_reach - - templayer ntap_reach nsc,mvnsc - # grow total is 15um. grow in 1.27um increments to ensure that - # no nwell ring is crossed. There is no difference between - # ntaps in and out of deep nwell. - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 1270 - and nwell,pnp - grow 945 - and nwell,pnp - - templayer ntap_missing *pdiff,*mvpdiff - and-not pwell_in_dnwell - and-not ntap_reach - - templayer dptap_reach psc,mvpsc - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 840 - and-not nwell - and dnwell - grow 635 - and-not nwell - and dnwell - - templayer dptap_missing *ndiff,*mvndiff - and dnwell - and-not dptap_reach - - templayer pdiff_crosses_dnwell dnwell - grow 20 - and-not dnwell - and allpdifflv,allpdiffmv - - # MV nwell must be 2um from any other nwell - templayer mvnwell - bloat-all alldiffmv nwell - grow-min 840 - bridge 700 600 - - # Simple spacing checks to lvnwell must use CIF-DRC rule - # Note that HVI may *abut* lvnwell; this can only be handled - # with mask-hints layers. - - templayer drawn_hvi - mask-hints HVI - - templayer allmvdiffnowell *mvndiff,*mvpsd - and-not drawn_hvi - - templayer nwell_or_hvi nwell,drawn_hvi - - templayer lvnwell nwell - and-not mvnwell - - templayer nwell_with_tap - bloat-all nsc,mvnsc nwell,pnp - - templayer nwell_missing_tap nwell,pnp - and-not nwell_with_tap - - templayer tap_with_licon - bloat-all allpactivetap psd,mvpsd - bloat-all allnactivetap nsd,mvnsd - - templayer tap_missing_licon allnactivetap,allpactivetap - and-not tap_with_licon - - # Make sure varactor nwell contains no P diffusion - templayer pdiff_in_varactor_well - bloat-all varactor,mvvaractor nwell - and allpactive - - # HVNTM spacing requires recreating HVNTM - templayer hvntm_block *mvpsd - grow 185 - - templayer hvntm_generate - bloat-all mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,mvrdn,*nndiode *mvndiff - bloat-all mvvaractor *mvnsd - and-not hvntm_block - grow 185 - grow 345 - shrink 345 - and-not hvntm_block - - # RPM spacing checks require recreating RPM - templayer rpm_generate - bloat-all xhrpoly,uhrpoly xpc - grow 200 - grow-min 1270 - grow 420 - shrink 420 - - # Check distance RPM to NSDM - templayer rpm_nsd_check rpm_generate - grow 325 - and allndifflv,allndiffmv - - # Check distance RPM to (unrelated) POLY - templayer rpm_poly_check rpm_generate - grow 200 - and-not xhrpoly,uhrpoly,xpc - and allpoly - - # Check distance RPM to HVNTM - templayer rpm_hvntm_check rpm_generate - grow 385 - and allndiffmvnontap - - templayer m1_small_hole allm1,obsm1,obsmcon - close 140000 - - templayer m1_hole_empty m1_small_hole - and-not allm1,obsm1,obsmcon - - templayer m2_small_hole allm2,obsm2 - close 140000 - - templayer m2_hole_empty m2_small_hole - and-not allm2,obsm2 - - templayer m1_huge allm1 - shrink 1500 - grow 1500 - - templayer m1_large_halo m1_huge - grow 280 - and-not m1_huge - and allm1 - - templayer m2_huge allm2 - shrink 1500 - grow 1500 - - templayer m2_large_halo m2_huge - grow 280 - and-not m2_huge - and allm2 - - templayer m3_huge allm3 - shrink 1500 - grow 1500 - - templayer m3_large_halo m3_huge - grow 400 - and-not m3_huge - and allm3 - - templayer m4_huge allm4 - shrink 1500 - grow 1500 - - templayer m4_large_halo m4_huge - grow 400 - and-not m4_huge - and allm4 - - -#---------------------------------------------------------------- -style density -#---------------------------------------------------------------- -# Style used by scripts to check for fill density -#---------------------------------------------------------------- - scalefactor 10 nanometers - options calma-permissive-labels - gridlimit 5 - - templayer fom_all alldiff,fomfill - - templayer poly_all allpoly,polyfill - - templayer li_all allli,lifill - - templayer m1_all allm1,m1fill - - templayer m2_all allm2,m2fill - - templayer m3_all allm3,m3fill - - templayer m4_all allm4,m4fill - - templayer m5_all allm5,m5fill - -#---------------------------------------------------------------- -style wafflefill variants (),(tiled) -#---------------------------------------------------------------- -# Style used by scripts for automatically generating fill layers -# NOTE: Be sure to generate output on flattened layout. -#---------------------------------------------------------------- - scalefactor 10 nanometers - options calma-permissive-labels - gridlimit 5 - -#---------------------------------------------------------------- -# Generate and retain a layer representing the bounding box. -# -# For variant (): -# The bounding box is the full extent of geometry on the top level -# cell. -# -# For variant (tiled): -# Use with a script that breaks layout into flattened tiles and runs -# fill individually on each. The tiles should be larger than the -# step size, and each should draw a layer "comment" the size of the -# step box. -#---------------------------------------------------------------- - - variants () - templayer topbox - bbox top - - variants (tiled) - templayer topbox comment - # Each tile imposes the full keepout distance rule of - # 3um on all sides. - shrink 1500 - - variants * - -#---------------------------------------------------------------- -# Generate guard-band around nwells to keep FOM from crossing -# Spacing from LV nwell = Diff/Tap 9 = 0.34um -# Spacing from HV nwell = Diff/Tap 18 = 0.43um (= 0.18 + 0.25) -# Enclosure by nwell = Diff/Tap 8 = 0.18um -#---------------------------------------------------------------- - - templayer mvnwell - bloat-all alldiffmv nwell - - templayer lvnwell allnwell - and-not mvnwell - - templayer well_shrink mvnwell - shrink 250 - or lvnwell - shrink 180 - templayer well_guardband allnwell - grow 340 - and-not well_shrink - -#--------------------------------------------------- -# Diffusion and poly keep-out areas -#--------------------------------------------------- - templayer obstruct_fom alldiff,allpoly,fomfill,polyfill,obsactive - or rpw,pnp,npn - grow 500 - or well_guardband - - templayer obstruct_poly alldiff,allpoly,fomfill,polyfill,obsactive - or rpw,pnp,npn - grow 1000 - -#--------------------------------------------------- -# FOM and POLY fill -#--------------------------------------------------- - templayer fomfill_pass1 topbox - # slots 0 4080 1320 0 4080 1320 1360 0 - slots 0 4080 1600 0 4080 1600 1360 0 - and-not obstruct_fom - and topbox - shrink 2035 - grow 2035 - -#--------------------------------------------------- - - templayer obstruct_poly_pass1 fomfill_pass1 - grow 300 - or obstruct_poly - templayer polyfill_pass1 topbox - slots 0 720 360 0 720 360 240 0 - and-not obstruct_poly_pass1 - and topbox - shrink 355 - grow 355 - -#--------------------------------------------------- - - templayer obstruct_fom_pass2 fomfill_pass1 - grow 1290 - or polyfill_pass1 - grow 300 - or obstruct_fom - templayer fomfill_pass2 topbox - slots 0 2500 1320 0 2500 1320 1360 0 - and-not obstruct_fom_pass2 - and topbox - shrink 1245 - grow 1245 - -#--------------------------------------------------- - - templayer obstruct_poly_coarse polyfill_pass1 - grow 60 - or fomfill_pass1,fomfill_pass2 - grow 300 - or obstruct_poly - templayer polyfill_coarse topbox - slots 0 720 360 0 720 360 240 120 - and-not obstruct_poly_coarse - and topbox - shrink 355 - grow 355 - -#--------------------------------------------------- - templayer obstruct_poly_medium polyfill_pass1,polyfill_coarse - grow 60 - or fomfill_pass1,fomfill_pass2 - grow 300 - or obstruct_poly - templayer polyfill_medium topbox - slots 0 540 360 0 540 360 240 100 - and-not obstruct_poly_medium - and topbox - shrink 265 - grow 265 - -#--------------------------------------------------- - templayer obstruct_poly_fine polyfill_pass1,polyfill_coarse,polyfill_medium - grow 60 - or fomfill_pass1,fomfill_pass2 - grow 300 - or obstruct_poly - templayer polyfill_fine topbox - slots 0 480 360 0 480 360 240 200 - and-not obstruct_poly_fine - and topbox - shrink 235 - grow 235 - -#--------------------------------------------------- - - templayer obstruct_fom_coarse fomfill_pass1,fomfill_pass2 - grow 1290 - or polyfill_pass1,polyfill_coarse,polyfill_medium,polyfill_fine - grow 300 - or obstruct_fom - templayer fomfill_coarse topbox - slots 0 1500 1320 0 1500 1320 1360 0 - and-not obstruct_fom_coarse - and topbox - shrink 745 - grow 745 - -#--------------------------------------------------- - - templayer obstruct_fom_fine fomfill_pass1,fomfill_pass2,fomfill_coarse - grow 1290 - or polyfill_pass1,polyfill_coarse,polyfill_medium,polyfill_fine - grow 300 - or obstruct_fom - templayer fomfill_fine topbox - slots 0 500 400 0 500 400 160 0 - and-not obstruct_fom_fine - and topbox - shrink 245 - grow 245 - -#--------------------------------------------------- - layer FOMFILL fomfill_pass1 - or fomfill_pass2 - or fomfill_coarse - or fomfill_fine - calma 23 28 - - layer POLYFILL polyfill_pass1 - or polyfill_coarse - or polyfill_medium - or polyfill_fine - calma 28 28 - -#--------------------------------------------------------- -# LI fill -# Note requirement that LI fill may not overlap (non-fill) -# diff or poly. -#--------------------------------------------------------- - - templayer obstruct_li_coarse allli,allpad,obsli,lifill,fillblock,fillblock4 - grow 2800 - or alldiff,allpoly - grow 200 - templayer lifill_coarse topbox - # slots 0 3000 650 0 3000 650 700 0 - slots 0 3000 900 0 3000 900 700 0 - and-not obstruct_li_coarse - and topbox - shrink 1495 - grow 1495 - - templayer obstruct_li_medium allli,allpad,obsli,lifill,fillblock,fillblock4 - grow 2500 - or lifill_coarse - grow 300 - or alldiff,allpoly - grow 200 - templayer lifill_medium topbox - slots 0 1500 500 0 1500 500 700 0 - and-not obstruct_li_medium - and topbox - shrink 745 - grow 745 - - templayer obstruct_li_fine allli,allpad,obsli,lifill,fillblock,fillblock4 - or lifill_coarse,lifill_medium - grow 300 - or alldiff,allpoly - grow 200 - templayer lifill_fine topbox - slots 0 580 500 0 580 500 700 0 - and-not obstruct_li_fine - and topbox - shrink 285 - grow 285 - - layer LIFILL lifill_coarse - or lifill_medium - or lifill_fine - calma 56 28 - -#--------------------------------------------------- -# MET1 fill -#--------------------------------------------------- - - templayer obstruct_m1_coarse allm1,allpad,obsm1,m1fill,fillblock,fillblock4 - grow 3000 - templayer met1fill_coarse topbox - # slots 0 2000 200 0 2000 200 700 0 - slots 0 2000 800 0 2000 800 700 350 - and-not obstruct_m1_coarse - and topbox - shrink 995 - grow 995 - - templayer obstruct_m1_medium allm1,allpad,obsm1,m1fill,fillblock,fillblock4 - grow 2800 - or met1fill_coarse - grow 200 - templayer met1fill_medium topbox - slots 0 1000 200 0 1000 200 700 0 - and-not obstruct_m1_medium - and topbox - shrink 495 - grow 495 - - templayer obstruct_m1_fine allm1,allpad,obsm1,m1fill,fillblock,fillblock4 - grow 300 - or met1fill_coarse,met1fill_medium - grow 200 - templayer met1fill_fine topbox - slots 0 580 200 0 580 200 700 0 - and-not obstruct_m1_fine - and topbox - shrink 285 - grow 285 - - templayer obstruct_m1_veryfine allm1,allpad,obsm1,m1fill,fillblock,fillblock4 - grow 100 - or met1fill_coarse,met1fill_medium,met1fill_fine - grow 200 - templayer met1fill_veryfine topbox - slots 0 300 200 0 300 200 100 50 - and-not obstruct_m1_veryfine - and topbox - shrink 145 - grow 145 - - layer MET1FILL met1fill_coarse - or met1fill_medium - or met1fill_fine - or met1fill_veryfine - calma 36 28 - -#--------------------------------------------------- -# MET2 fill -#--------------------------------------------------- - templayer obstruct_m2 allm2,allpad,obsm2,m2fill,fillblock,fillblock4 - grow 3000 - templayer met2fill_coarse topbox - # slots 0 2000 200 0 2000 200 700 350 - slots 0 2000 800 0 2000 800 700 350 - and-not obstruct_m2 - and topbox - shrink 995 - grow 995 - - templayer obstruct_m2_medium allm2,allpad,obsm2,m2fill,fillblock,fillblock4 - grow 2800 - or met2fill_coarse - grow 200 - templayer met2fill_medium topbox - slots 0 1000 200 0 1000 200 700 350 - and-not obstruct_m2_medium - and topbox - shrink 495 - grow 495 - - templayer obstruct_m2_fine allm2,allpad,obsm2,m2fill,fillblock,fillblock4 - grow 300 - or met2fill_coarse,met2fill_medium - grow 200 - templayer met2fill_fine topbox - slots 0 580 200 0 580 200 700 350 - and-not obstruct_m2_fine - and topbox - shrink 285 - grow 285 - - templayer obstruct_m2_veryfine allm2,allpad,obsm2,m2fill,fillblock,fillblock4 - grow 100 - or met2fill_coarse,met2fill_medium,met2fill_fine - grow 200 - templayer met2fill_veryfine topbox - slots 0 300 200 0 300 200 100 100 - and-not obstruct_m2_veryfine - and topbox - shrink 145 - grow 145 - - layer MET2FILL met2fill_coarse - or met2fill_medium - or met2fill_fine - or met2fill_veryfine - calma 41 28 - -#--------------------------------------------------- -# MET3 fill -#--------------------------------------------------- - templayer obstruct_m3 allm3,allpad,obsm3,m3fill,fillblock,fillblock4 - grow 3000 - templayer met3fill_coarse topbox - # slots 0 2000 300 0 2000 300 700 700 - slots 0 2000 800 0 2000 800 700 350 - and-not obstruct_m3 - and topbox - shrink 995 - grow 995 - - templayer obstruct_m3_medium allm3,allpad,obsm3,m3fill,fillblock,fillblock4 - grow 2700 - or met3fill_coarse - grow 300 - templayer met3fill_medium topbox - slots 0 1000 300 0 1000 300 700 700 - and-not obstruct_m3_medium - and topbox - shrink 495 - grow 495 - - templayer obstruct_m3_fine allm3,allpad,obsm3,m3fill,fillblock,fillblock4 - grow 200 - or met3fill_coarse,met3fill_medium - grow 300 - templayer met3fill_fine topbox - slots 0 580 300 0 580 300 700 700 - and-not obstruct_m3_fine - and topbox - shrink 285 - grow 285 - - templayer obstruct_m3_veryfine allm3,allpad,obsm3,m3fill,fillblock,fillblock4 - # Note: Adding 0.1 to waffle rule to clear wide spacing rule - grow 100 - or met3fill_coarse,met3fill_medium,met3fill_fine - grow 300 - templayer met3fill_veryfine topbox - slots 0 400 300 0 400 300 150 200 - and-not obstruct_m3_veryfine - and topbox - shrink 195 - grow 195 - - layer MET3FILL met3fill_coarse - or met3fill_medium - or met3fill_fine - or met3fill_veryfine - calma 34 28 - -#--------------------------------------------------- -# MET4 fill -#--------------------------------------------------- - templayer obstruct_m4 allm4,allpad,obsm4,m4fill,fillblock,fillblock4 - grow 3000 - templayer met4fill_coarse topbox - # slots 0 2000 300 0 2000 300 700 1050 - slots 0 2000 800 0 2000 800 700 350 - and-not obstruct_m4 - and topbox - shrink 995 - grow 995 - - templayer obstruct_m4_medium allm4,allpad,obsm4,m4fill,fillblock,fillblock4 - grow 2700 - or met4fill_coarse - grow 300 - templayer met4fill_medium topbox - slots 0 1000 300 0 1000 300 700 1050 - and-not obstruct_m4_medium - and topbox - shrink 495 - grow 495 - - templayer obstruct_m4_fine allm4,allpad,obsm4,m4fill,fillblock,fillblock4 - grow 200 - or met4fill_coarse,met4fill_medium - grow 300 - templayer met4fill_fine topbox - slots 0 580 300 0 580 300 700 1050 - and-not obstruct_m4_fine - and topbox - shrink 285 - grow 285 - - templayer obstruct_m4_veryfine allm4,allpad,obsm4,m4fill,fillblock,fillblock4 - # Note: Adding 0.1 to waffle rule to clear wide spacing rule - grow 100 - or met4fill_coarse,met4fill_medium,met4fill_fine - grow 300 - templayer met4fill_veryfine topbox - slots 0 400 300 0 400 300 150 300 - and-not obstruct_m4_veryfine - and topbox - shrink 195 - grow 195 - - layer MET4FILL met4fill_coarse - or met4fill_medium - or met4fill_fine - or met4fill_veryfine - calma 51 28 - -#--------------------------------------------------- -# MET5 fill -#--------------------------------------------------- - templayer obstruct_m5 allm5,allpad,obsm5,m5fill,fillblock - grow 3000 - templayer met5fill_coarse topbox - slots 0 5000 1600 0 5000 1600 1000 100 - and-not obstruct_m5 - and topbox - shrink 2495 - grow 2495 - - templayer obstruct_m5_medium allm5,allpad,obsm5,m5fill,fillblock - grow 1400 - or met5fill_coarse - grow 1600 - templayer met5fill_medium topbox - slots 0 3000 1600 0 3000 1600 1000 100 - and-not obstruct_m5_medium - and topbox - shrink 1495 - grow 1495 - - layer MET5FILL met5fill_coarse - or met5fill_medium - calma 59 28 - -end - -#----------------------------------------------------------------------- -cifinput -#----------------------------------------------------------------------- -# NOTE: All values in this section MUST be multiples of 25 -# or else magic will scale below the allowed layout grid size -#----------------------------------------------------------------------- - -style sky130 variants (vendor),() - scalefactor 10 nanometers - gridlimit 5 - - options ignore-unknown-layer-labels no-reconnect-labels - - ignore NPC - ignore SEALID - ignore CAPID - ignore LDNTM - ignore HVNTM - ignore POLYMOD - ignore LOWTAPDENSITY - ignore FILLOBSPOLY - ignore OUTLINE - - layer pnp NWELL,WELLTXT,WELLPIN - and PNPID - labels NWELL - variants (vendor) - labels WELLTXT port - variants () - labels WELLTXT text - variants * - labels WELLPIN port - - layer nwell NWELL,WELLTXT,WELLPIN - and-not PNPID - labels NWELL - variants (vendor) - labels WELLTXT port - variants () - labels WELLTXT text - variants * - labels WELLPIN port - - templayer nwellarea NWELL - copyup nwelcheck - - # Copy nwell areas up for diffusion checks - templayer xnwelcheck nwelcheck - copyup nwelcheck - - templayer hvarea HVI - copyup hvcheck - - # Copy high-voltage (HVI) areas up for diffusion checks - templayer xhvcheck hvcheck - copyup hvcheck - - # Always draw pwell under p-tap and n-diff. This is not always - # necessary but works better with deep nwell for correct extraction. - layer pwell TAP,DIFF - and-not NWELL,nwelcheck - grow 130 - or SUBTXT,SUBPIN - grow 420 - shrink 420 - variants (vendor) - labels SUBTXT port - variants () - labels SUBTXT text - variants * - labels SUBPIN port - - layer dnwell DNWELL - labels DNWELL - - layer isosub SUBCUT - labels SUBCUT - - layer npn DNWELL - and-not NWELL,nwelcheck - and NPNID - - layer rpw PWRES - and DNWELL - labels PWRES - - templayer ndiffarea DIFF,DIFFTXT,DIFFPIN,barediff - and-not POLY - and-not NWELL,nwelcheck - and-not PSDM - and-not DIODE - and-not DIFFRES - and-not HVI,hvcheck - and NSDM - and-not CORELI - copyup ndifcheck - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer ndiff ndiffarea - - # Copy ndiff areas up for contact checks - templayer xndifcheck ndifcheck - copyup ndifcheck - - templayer mvndiffarea DIFF,DIFFTXT,DIFFPIN,barediff - and-not POLY - and-not NWELL,nwelcheck - and-not PSDM - and-not DIODE - and-not DIFFRES - and HVI,hvcheck - and NSDM - copyup ndifcheck - labels DIFF - labels DIFFTXT text - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer mvndiff mvndiffarea - - # Copy ndiff areas up for contact checks - templayer mvxndifcheck mvndifcheck - copyup mvndifcheck - - layer ndiode DIFF,barediff - and NSDM - and DIODE - and-not NWELL,nwelcheck - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and-not LVTN - labels DIFF - - layer ndiodelvt DIFF,barediff - and NSDM - and DIODE - and-not NWELL,nwelcheck - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and LVTN - labels DIFF - - templayer ndiodearea DIODE - and NSDM - and-not HVI,hvcheck - and-not NWELL,nwelcheck - copyup DIODE,NSDM - - layer ndiffres DIFFRES - and NSDM - and-not HVI,hvcheck - labels DIFF - - templayer pdiffarea DIFF,DIFFTXT,DIFFPIN,barediff - and-not POLY - and NWELL,nwelcheck - and-not NSDM - and-not DIODE - and-not HVI,hvcheck - and PSDM - copyup pdifcheck - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer pdiff pdiffarea - - layer mvndiode DIFF,barediff - and NSDM - and DIODE - and HVI,hvcheck - and-not POLY - and-not PSDM - and-not LVTN - labels DIFF - - layer nndiode DIFF,barediff - and NSDM - and DIODE - and HVI,hvcheck - and-not POLY - and-not PSDM - and LVTN - labels DIFF - - templayer mvndiodearea DIODE - and NSDM - and HVI,hvcheck - and-not NWELL,nwelcheck - copyup DIODE,NSDM - - layer mvndiffres DIFFRES - and NSDM - and HVI,hvcheck - labels DIFF - - templayer mvpdiffarea DIFF,DIFFTXT,DIFFPIN,barediff - and-not POLY - and NWELL,nwelcheck - and-not NSDM - and HVI,hvcheck - and-not DIODE - and-not DIFFRES - and PSDM - copyup mvpdifcheck - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer mvpdiff mvpdiffarea - - # Copy pdiff areas up for contact checks - templayer xpdifcheck pdifcheck - copyup pdifcheck - - layer pdiode DIFF,barediff - and PSDM - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not LVTN - and-not HVTP - and DIODE - labels DIFF - - layer pdiodelvt DIFF,barediff - and PSDM - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and LVTN - and-not HVTP - and DIODE - labels DIFF - - layer pdiodehvt DIFF,barediff - and PSDM - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not LVTN - and HVTP - and DIODE - labels DIFF - - templayer pdiodearea DIODE - and PSDM - and-not HVI,hvcheck - copyup DIODE,PSDM - - # Define pfet areas as known pdiff, regardless of the presence of a well. - - templayer pfetarea DIFF,barediff - and POLY - or baretrans - and-not NSDM - and-not HVI,hvcheck - - layer pfet pfetarea - and-not LVTN - and-not HVTP - and-not STDCELL - and-not COREID - labels DIFF - - layer scpfet pfetarea - and-not LVTN - and-not HVTP - and STDCELL - and-not COREID - labels DIFF - - layer scpfethvt pfetarea - and-not LVTN - and HVTP - and STDCELL - labels DIFF - - layer ppu pfetarea - and-not LVTN - and HVTP - and COREID - # Shrink-grow operation eliminates the smaller parasitie device - # shrink 70 - # grow 70 - labels DIFF - - layer pfetlvt pfetarea - and LVTN - labels DIFF - - layer pfetmvt pfetarea - and HVTR - labels DIFF - - layer pfethvt pfetarea - and HVTP - and-not STDCELL - and-not COREID - labels DIFF - - # Always force nwell under pfet (nwell encloses pdiff by 0.18) - layer nwell pfetarea - and-not COREID - grow 180 - - # Copy mvpdiff areas up for contact checks - templayer mvxpdifcheck mvpdifcheck - copyup mvpdifcheck - - layer mvpdiode DIFF,barediff - and PSDM - and-not POLY - and-not NSDM - and HVI,hvcheck - and DIODE - labels DIFF - - templayer mvpdiodearea DIODE - and PSDM - and HVI,hvcheck - copyup DIODE,PSDM - - # Define pfet areas as known pdiff, - # regardless of the presence of a - # well. - - templayer mvpfetarea DIFF,barediff - and POLY - or baretrans - and-not NSDM - and HVI,hvcheck - - layer mvpfet mvpfetarea - and-not ESDID - labels DIFF - - layer mvpfetesd mvpfetarea - and ESDID - labels DIFF - - layer pdiff DIFF,DIFFTXT,DIFFPIN,barediff - and-not NSDM - and-not POLY - and-not HVI,hvcheck - and-not DIODE - and-not DIFFRES - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer pdiffres DIFFRES - and PSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - labels DIFF - - layer nfet DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not HVI,hvcheck - and-not LVTN - and-not SONOS - and-not STDCELL - and-not COREID - labels DIFF - - layer scnfet DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not NWELL,nwelcheck - and-not HVI,hvcheck - and-not LVTN - and-not SONOS - and STDCELL - labels DIFF - - layer npass DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not NWELL,nwelcheck - and COREID - labels DIFF - - layer npd DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not NWELL,nwelcheck - and COREID - # Shrink-grow operation eliminates the smaller npass device - shrink 70 - grow 70 - labels DIFF - - # Devices abutting tap under gate are officially npd, not npass - layer npd TAP - grow 100 - and DIFF - and POLY - and-not PSDM - and NSDM - and-not NWELL,nwelcheck - and COREID - labels DIFF - - layer nfetlvt DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not HVI,hvcheck - and LVTN - and-not SONOS - labels DIFF - - layer nsonos DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not HVI,hvcheck - and LVTN - and SONOS - labels DIFF - - templayer nsdarea TAP - and NSDM - and NWELL,nwelcheck - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and-not CORELI - copyup nsubcheck - - layer nsd nsdarea - labels TAP - - layer nsd TAP,TAPTXT - and NSDM - and-not POLY - and-not HVI,hvcheck - labels TAP - labels TAPTXT text - - layer corenvar TAP - and NSDM - and POLY - and COREID - labels TAP - - templayer nsdexpand nsdarea - grow 500 - - # Copy nsub areas up for contact checks - templayer xnsubcheck nsubcheck - copyup nsubcheck - - templayer psdarea TAP - and PSDM - and-not NWELL,nwelcheck - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not pfetexpand - copyup psubcheck - - layer psd psdarea - labels TAP - - layer psd TAP - and PSDM - and-not POLY - and-not HVI,hvcheck - labels TAP - labels TAPTXT text - - layer corepvar TAP - and PSDM - and POLY - and COREID - labels TAP - - templayer psdexpand psdarea - grow 500 - - layer mvpdiff DIFF,DIFFTXT,DIFFPIN,barediff - and-not NSDM - and-not POLY - and HVI,hvcheck - and mvpfetexpand - labels DIFF - variants (vendor) - labels DIFFTXT port - variants () - labels DIFFTXT text - variants * - labels DIFFPIN port - - layer mvpdiffres DIFFRES - and PSDM - and NWELL,nwelcheck - and HVI,hvcheck - and-not mvrdpioedge - labels DIFF - - templayer mvnfetarea DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and-not LVTN - and HVI,hvcheck - grow 350 - - templayer mvnnfetarea DIFF,TAP,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and LVTN - and HVI,hvcheck - and-not mvnfetarea - - layer mvnfetesd DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and HVI,hvcheck - and ESDID - and-not mvnnfetarea - labels DIFF - - layer mvnfet DIFF,barediff - and POLY - or baretrans - and-not PSDM - and NSDM - and HVI,hvcheck - and-not ESDID - and-not mvnnfetarea - labels DIFF - - layer nnfet mvnnfetarea - and LVID - labels DIFF - - layer mvnnfet mvnnfetarea - and-not LVID - labels DIFF - - templayer mvnsdarea TAP - and NSDM - and NWELL,nwelcheck - and-not POLY - and-not PSDM - and HVI,hvcheck - copyup mvnsubcheck - - layer mvnsd mvnsdarea - labels TAP - - layer mvnsd TAP,TAPTXT - and NSDM - and HVI,hvcheck - labels TAP - labels TAPTXT text - - templayer mvnsdexpand mvnsdarea - grow 500 - - # Copy nsub areas up for contact checks - templayer mvxnsubcheck mvnsubcheck - copyup mvnsubcheck - - templayer mvpsdarea DIFF,barediff - and PSDM - and-not NWELL,nwelcheck - and-not POLY - and-not NSDM - and HVI,hvcheck - and-not mvpfetexpand - copyup mvpsubcheck - - layer mvpsd mvpsdarea - labels DIFF - - layer mvpsd TAP,TAPTXT - and PSDM - and HVI,hvcheck - labels TAP - labels TAPTXT text - - templayer mvpsdexpand mvpsdarea - grow 500 - - # Copy psub areas up for contact checks - templayer xpsubcheck psubcheck - copyup psubcheck - - templayer mvxpsubcheck mvpsubcheck - copyup mvpsubcheck - - layer psd TAP - and-not PSDM - and-not NSDM - and-not POLY - and-not HVI,hvcheck - and-not pfetexpand - and psdexpand - - layer nsd TAP - and-not PSDM - and-not NSDM - and-not POLY - and-not HVI,hvcheck - and nsdexpand - - layer mvpsd TAP - and-not PSDM - and-not NSDM - and-not POLY - and HVI,hvcheck - and-not mvpfetexpand - and mvpsdexpand - - layer mvnsd TAP - and-not PSDM - and-not NSDM - and-not POLY - and HVI,hvcheck - and mvnsdexpand - - templayer hresarea POLY - and RPM - grow 3000 - - templayer uresarea POLY - and URPM - grow 3000 - - templayer diffresarea DIFFRES - and-not HVI,hvcheck - grow 3000 - - templayer mvdiffresarea DIFFRES - and HVI,hvcheck - grow 3000 - - templayer resarea diffresarea,mvdiffresarea,hresarea,uresarea - - layer pfet POLY - and DIFF - and diffresarea - and-not NSDM - and-not STDCELL - - layer scpfet POLY - and DIFF - and diffresarea - and-not HVTP - and-not NSDM - and STDCELL - - layer scpfethvt POLY - and DIFF - and diffresarea - and HVTP - and-not NSDM - and STDCELL - - templayer xpolyterm RPM,URPM - and POLY - and-not POLYRES - # add back the 0.06um contact surround in the direction of the resistor - grow 60 - and POLY - - layer xpc xpolyterm - - templayer polyarea POLY,POLYTXT,POLYPIN - and-not POLYRES - and-not POLYSHORT - and-not DIFF - and-not TAP - and-not RPM - and-not URPM - copyup polycheck - - layer poly polyarea - labels POLY - variants (vendor) - labels POLYTXT port - variants () - labels POLYTXT text - variants * - labels POLYPIN port - - # Copy (non-resistor) poly areas up for contact checks - templayer xpolycheck polycheck - copyup polycheck - - layer mrp1 POLY - and POLYRES - and-not RPM - and-not URPM - labels POLY - - layer rmp POLY - and POLYSHORT - labels POLY - - layer xhrpoly POLY - and POLYRES - and RPM - and-not URPM - and PSDM - and NPC - and-not xpolyterm - labels POLY - - layer uhrpoly POLY - and POLYRES - and URPM - and-not RPM - and NPC - and-not xpolyterm - labels POLY - - templayer ndcbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and-not NWELL,nwelcheck - and-not HVI,hvcheck - - layer ndc ndcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndcbase - labels CONT - - templayer nscbase CONT - or barecont - and LI - or licont - and DIFF,TAP - and NSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - - layer nsc nscbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or nscbase - labels CONT - - templayer pdcbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - - layer pdc pdcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdcbase - labels CONT - - templayer pdcnowell CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and pfetexpand - and-not HVI,hvcheck - - layer pdc pdcnowell - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdcnowell - labels CONT - - templayer pscbase CONT - or barecont - and LI - or licont - and DIFF,TAP - and PSDM - and-not NWELL,nwelcheck - and-not pfetexpand - and-not HVI,hvcheck - - layer psc pscbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pscbase - labels CONT - - templayer pcbase CONT - or barecont - and LI - or licont - and POLY - and-not DIFF - and-not RPM,URPM - - layer pc pcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pcbase - labels CONT - - templayer ndicbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and DIODE - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and-not LVTN - - layer ndic ndicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndicbase - labels CONT - - templayer ndilvtcbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and DIODE - and-not POLY - and-not PSDM - and-not HVI,hvcheck - and LVTN - - layer ndilvtc ndilvtcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndilvtcbase - labels CONT - - templayer pdicbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and DIODE - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not LVTN - and-not HVTP - - layer pdic pdicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdicbase - labels CONT - - templayer pdilvtcbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and DIODE - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and LVTN - and-not HVTP - - layer pdilvtc pdilvtcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdilvtcbase - labels CONT - - templayer pdihvtcbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and DIODE - and-not POLY - and-not NSDM - and-not HVI,hvcheck - and-not LVTN - and HVTP - - layer pdihvtc pdihvtcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdihvtcbase - labels CONT - - templayer mvndcbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and-not NWELL,nwelcheck - and HVI,hvcheck - - layer mvndc mvndcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvndcbase - labels CONT - - templayer mvnscbase CONT - or barecont - and LI - or licont - and DIFF,TAP - and NSDM - and NWELL,nwelcheck - and HVI,hvcheck - - layer mvnsc mvnscbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvnscbase - labels CONT - - templayer mvpdcbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and NWELL,nwelcheck - and HVI,hvcheck - - layer mvpdc mvpdcbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdcbase - labels CONT - - templayer mvpdcnowell CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and mvpfetexpand - and MET1 - and HVI,hvcheck - - layer mvpdc mvpdcnowell - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdcnowell - labels CONT - - templayer mvpscbase CONT - or barecont - and LI - or licont - and DIFF,TAP - and PSDM - and-not NWELL,nwelcheck - and-not mvpfetexpand - and HVI,hvcheck - - layer mvpsc mvpscbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpscbase - labels CONT - - templayer mvndicbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and DIODE - and-not POLY - and-not PSDM - and-not LVTN - and HVI,hvcheck - - layer mvndic mvndicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvndicbase - labels CONT - - templayer nndicbase CONT - or barecont - and LI - or licont - and DIFF - and NSDM - and DIODE - and-not POLY - and-not PSDM - and LVTN - and HVI,hvcheck - - layer nndic nndicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or nndicbase - labels CONT - - templayer mvpdicbase CONT - or barecont - and LI - or licont - and DIFF - and PSDM - and DIODE - and-not POLY - and-not NSDM - and HVI,hvcheck - - layer mvpdic mvpdicbase - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdicbase - labels CONT - - layer fomfill FOMFILL - labels FOMFILL - - layer polyfill POLYFILL - labels POLYFILL - - layer coreli LI,LITXT,LIPIN - and-not LIRES,LISHORT - and COREID - labels LI - variants (vendor) - labels LITXT port - variants () - labels LITXT text - variants * - labels LIPIN port - - layer locali LI,LITXT,LIPIN - and-not LIRES,LISHORT - and-not COREID - labels LI - variants (vendor) - labels LITXT port - variants () - labels LITXT text - variants * - labels LIPIN port - - layer rli LI - and LIRES,LISHORT - labels LIRES,LISHORT - - layer lifill LIFILL - labels LIFILL - - layer mcon MCON - grow 95 - shrink 95 - shrink 85 - grow 85 - or MCON - labels MCON - - layer m1 MET1,MET1TXT,MET1PIN - and-not MET1RES,MET1SHORT - labels MET1 - variants (vendor) - labels MET1TXT port - variants () - labels MET1TXT text - variants * - labels MET1PIN port - - layer rm1 MET1 - and MET1RES,MET1SHORT - labels MET1RES,MET1SHORT - - layer m1fill MET1FILL - labels MET1FILL - - layer mimcap MET3 - and CAPM - labels CAPM - - layer mimcc VIA3 - and CAPM - grow 60 - grow 40 - shrink 40 - labels CAPM - - layer mimcap2 MET4 - and CAPM2 - labels CAPM2 - - layer mim2cc VIA4 - and CAPM2 - grow 190 - grow 210 - shrink 210 - labels CAPM2 - - - templayer m2cbase VIA1 - and-not COREID - grow 5 - or VIA1 - grow 50 - - layer m2c m2cbase - grow 30 - shrink 30 - shrink 130 - grow 130 - or m2cbase - - layer m2 MET2,MET2TXT,MET2PIN - and-not MET2RES,MET2SHORT - labels MET2 - variants (vendor) - labels MET2TXT port - variants () - labels MET2TXT text - variants * - labels MET2PIN port - - layer rm2 MET2 - and MET2RES,MET2SHORT - labels MET2RES,MET2SHORT - - layer m2fill MET2FILL - labels MET2FILL - - templayer m3cbase VIA2 - grow 40 - - layer m3c m3cbase - grow 60 - shrink 60 - shrink 140 - grow 140 - or m3cbase - - layer m3 MET3,MET3TXT,MET3PIN - and-not MET3RES,MET3SHORT - labels MET3 - variants (vendor) - labels MET3TXT port - variants () - labels MET3TXT text - variants * - labels MET3PIN port - - layer rm3 MET3 - and MET3RES,MET3SHORT - labels MET3RES,MET3SHORT - - layer m3fill MET3FILL - labels MET3FILL - - - templayer via3base VIA3 - and-not CAPM - grow 60 - - layer via3 via3base - grow 40 - shrink 40 - shrink 160 - grow 160 - or via3base - - layer m4 MET4,MET4TXT,MET4PIN - and-not MET4RES,MET4SHORT - labels MET4 - variants (vendor) - labels MET4TXT port - variants () - labels MET4TXT text - variants * - labels MET4PIN port - - layer rm4 MET4 - and MET4RES,MET4SHORT - labels MET4RES,MET4SHORT - - layer m4fill MET4FILL - labels MET4FILL - - layer m5 MET5,MET5TXT,MET5PIN - and-not MET5RES,MET5SHORT - labels MET5 - variants (vendor) - labels MET5TXT port - variants () - labels MET5TXT text - variants * - labels MET5PIN port - - layer rm5 MET5 - and MET5RES,MET5SHORT - labels MET5RES,MET5SHORT - - layer m5fill MET5FILL - labels MET5FILL - - templayer via4base VIA4 - and-not CAPM2 - grow 190 - - layer via4 via4base - grow 210 - shrink 210 - shrink 590 - grow 590 - or via4base - - layer metrdl RDL,RDLTXT,RDLPIN - labels RDL - variants (vendor) - labels RDLTXT port - variants () - labels RDLTXT text - variants * - labels RDLPIN port - - # Find diffusion not covered in - # NSDM or PSDM and pull it into - # the next layer up - - templayer gentrans DIFF - and-not PSDM - and-not NSDM - and POLY - copyup baretrans - - templayer gendiff DIFF,TAP - and-not PSDM - and-not NSDM - and-not POLY - and-not COREID - copyup barediff - - # Handle contacts found by copyup - - templayer ndiccopy CONT - and LI - and DIODE - and NSDM - and-not HVI,hvcheck - - layer ndic ndiccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndiccopy - labels CONT - - templayer mvndiccopy CONT - and LI - and DIODE - and NSDM - and HVI,hvcheck - - layer mvndic mvndiccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvndiccopy - labels CONT - - templayer pdiccopy CONT - and LI - and DIODE - and PSDM - and-not HVI,hvcheck - - layer pdic pdiccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdiccopy - labels CONT - - templayer mvpdiccopy CONT - and LI - and DIODE - and PSDM - and HVI,hvcheck - - layer mvpdic mvpdiccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdiccopy - labels CONT - - templayer ndccopy CONT - and ndifcheck - - layer ndc ndccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or ndccopy - labels CONT - - templayer mvndccopy CONT - and mvndifcheck - - layer mvndc mvndccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvndccopy - labels CONT - - templayer pdccopy CONT - and pdifcheck - - layer pdc pdccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or pdccopy - labels CONT - - templayer mvpdccopy CONT - and mvpdifcheck - - layer mvpdc mvpdccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpdccopy - labels CONT - - templayer pccopy CONT - and polycheck - - layer pc pccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or pccopy - labels CONT - - templayer nsccopy CONT - and nsubcheck - - layer nsc nsccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or nsccopy - labels CONT - - templayer mvnsccopy CONT - and mvnsubcheck - - layer mvnsc mvnsccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvnsccopy - labels CONT - - templayer psccopy CONT - and psubcheck - - layer psc psccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or psccopy - labels CONT - - templayer mvpsccopy CONT - and mvpsubcheck - - layer mvpsc mvpsccopy - grow 85 - shrink 85 - shrink 85 - grow 85 - or mvpsccopy - labels CONT - - # Find contacts not covered in - # metal and pull them into the - # next layer up - - templayer gencont CONT - and LI - and-not DIFF,TAP - and-not POLY - and-not DIODE - and-not nsubcheck - and-not psubcheck - and-not mvnsubcheck - and-not mvpsubcheck - and-not CORELI - copyup barelicont - - templayer barecont CONT - and-not LI - and-not nsubcheck - and-not psubcheck - and-not mvnsubcheck - and-not mvpsubcheck - and-not CORELI - copyup barecont - - layer glass GLASS,PADTXT,PADPIN - labels GLASS - variants (vendor) - labels PADTXT port - variants () - labels PADTXT text - variants * - labels PADPIN port - - templayer boundary BOUND,STDCELL,PADCELL - boundary - - layer comment LVSTEXT - labels LVSTEXT text - - layer comment TTEXT - labels TTEXT text - - layer fillblock FILLOBSM1,FILLOBSM2,FILLOBSM3,FILLOBSM4 - labels FILLOBSM1,FILLOBSM2,FILLOBSM3,FILLOBSM4 - - layer obsactive FILLOBSFOM - -# MOS Varactor - - layer var POLY - and TAP - and NSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - and-not HVTP - # NOTE: Else forms a varactor that is not in the vendor netlist. - and-not COREID - labels POLY - - layer varhvt POLY - and TAP - and NSDM - and NWELL,nwelcheck - and-not HVI,hvcheck - and HVTP - labels POLY - - layer mvvar POLY - and TAP - and NSDM - and NWELL,nwelcheck - and HVI,hvcheck - labels POLY - - calma NWELL 64 20 - calma DIFF 65 20 - calma DNWELL 64 18 - calma SUBCUT 81 53 - calma PWRES 64 13 - calma TAP 65 44 - # LVTN - calma LVTN 125 44 - # HVTR - calma HVTR 18 20 - # HVTP - calma HVTP 78 44 - # SONOS (TUNM) - calma SONOS 80 20 - # NSDM (NPLUS) - calma NSDM 93 44 - # PSDM (PPLUS) - calma PSDM 94 20 - # HVI (THKOX) - calma HVI 75 20 - # NPC - calma NPC 95 20 - # P+ POLY MASK - calma RPM 86 20 - calma URPM 79 20 - calma LDNTM 11 44 - calma HVNTM 125 20 - # Poly resistor ID mark - calma POLYRES 66 13 - # Diffusion resistor ID mark - calma DIFFRES 65 13 - calma POLY 66 20 - calma POLYMOD 66 83 - # 3.3V native FET ID mark - calma LVID 81 60 - # Diode ID mark - calma DIODE 81 23 - # Bipolar NPN mark - calma NPNID 82 20 - # Bipolar PNP mark - calma PNPID 82 44 - # Capacitor ID - calma CAPID 82 64 - # Core area ID mark - calma COREID 81 2 - # Standard cell ID mark - calma STDCELL 81 4 - # Padframe cell ID mark - calma PADCELL 81 3 - # Seal ring ID mark - calma SEALID 81 1 - # Low tap density ID mark - calma LOWTAPDENSITY 81 14 - # ESD area ID - calma ESDID 81 19 - calma OUTLINE 236 0 - - # LICON - calma CONT 66 44 - calma LI 67 20 - calma MCON 67 44 - - calma MET1 68 20 - calma VIA1 68 44 - calma MET2 69 20 - calma VIA2 69 44 - calma MET3 70 20 - calma VIA3 70 44 - calma MET4 71 20 - calma VIA4 71 44 - calma MET5 72 20 - calma RDL 74 20 - calma GLASS 76 20 - - calma SUBTXT 64 59 - calma PADTXT 76 5 - calma DIFFTXT 65 6 - calma TAPTXT 65 5 - calma WELLTXT 64 5 - calma LITXT 67 5 - calma POLYTXT 66 5 - calma MET1TXT 68 5 - calma MET2TXT 69 5 - calma MET3TXT 70 5 - calma MET4TXT 71 5 - calma MET5TXT 72 5 - calma RDLTXT 74 5 - - calma LIRES 67 13 - calma MET1RES 68 13 - calma MET2RES 69 13 - calma MET3RES 70 13 - calma MET4RES 71 13 - calma MET5RES 72 13 - - calma LIFILL 56 28 - calma MET1FILL 36 28 - calma MET2FILL 41 28 - calma MET3FILL 34 28 - calma MET4FILL 51 28 - calma MET5FILL 59 28 - - calma POLYSHORT 66 15 - calma LISHORT 67 15 - calma MET1SHORT 68 15 - calma MET2SHORT 69 15 - calma MET3SHORT 70 15 - calma MET4SHORT 71 15 - calma MET5SHORT 72 15 - - calma SUBPIN 122 16 - calma PADPIN 76 16 - calma DIFFPIN 65 16 - calma POLYPIN 66 16 - calma WELLPIN 64 16 - calma LIPIN 67 16 - calma MET1PIN 68 16 - calma MET2PIN 69 16 - calma MET3PIN 70 16 - calma MET4PIN 71 16 - calma MET5PIN 72 16 - calma RDLPIN 74 16 - - calma BOUND 235 4 - - calma LVSTEXT 83 44 - - calma CAPM 89 44 - calma CAPM2 97 44 - - calma FILLOBSM1 62 24 - calma FILLOBSM2 105 52 - calma FILLOBSM3 107 24 - calma FILLOBSM4 112 4 - calma FILLOBSFOM 22 24 - calma FILLOBSPOLY 33 24 - - calma FOMFILL 23 28 - calma POLYFILL 28 28 - calma LIFILL 56 28 - calma MET1FILL 36 28 - calma MET2FILL 41 28 - calma MET3FILL 34 28 - calma MET4FILL 51 28 - calma MET5FILL 59 28 - -#----------------------------------------------------------------------- - -style rdlimport - # This style is for reading shapes generated with the RDL layers - - scalefactor 10 nanometers - gridlimit 5 - - options ignore-unknown-layer-labels no-reconnect-labels - - layer mrdl RDL - layer mrdlc RDLC - - calma RDL 10 0 - calma RDLC 20 0 - -end - -#----------------------------------------------------- -# Digital flow maze router cost parameters -#----------------------------------------------------- - -mzrouter -end - -#----------------------------------------------------- -# Vendor DRC rules -#----------------------------------------------------- - -drc - - style drc variants (fast),(full),(routing) - scalefactor 10 - cifstyle drc - - variants (fast),(full) - -#----------------------------- -# DNWELL -#----------------------------- - - width dnwell 3000 "Deep N-well width < %d (dnwell.2)" - spacing dnwell dnwell 6300 touching_ok "Deep N-well spacing < %d (dnwell.3)" - spacing allnwell dnwell 4500 surround_ok \ - "Deep N-well spacing to N-well < %d (nwell.7)" - - variants (full) - cifmaxwidth nwell_missing 0 bend_illegal \ - "N-well overlap of Deep N-well < 0.4um outside, 1.03um inside (nwell.5a, 7)" - cifmaxwidth dnwell_missing 0 bend_illegal \ - "SONOS nFET must be in Deep N-well (tunm.6a)" - - cifmaxwidth pdiff_crosses_dnwell 0 bend_illegal \ - "P+ diff cannot straddle Deep N-well (dnwell.5)" - variants (fast),(full) - -#----------------------------- -# NWELL -#----------------------------- - - width allnwell 840 "N-well width < %d (nwell.1)" - spacing allnwell allnwell 1270 touching_ok "N-well spacing < %d (nwell.2a)" - - variants (full) - cifmaxwidth nwell_missing_tap 0 bend_illegal \ - "All nwells must contain metal-connected N+ taps (nwell.4)" - - cifspacing mvnwell lvnwell 2000 touching_illegal \ - "Spacing of HV nwell to LV nwell < 2.0um (nwell.8)" - cifspacing mvnwell mvnwell 2000 touching_ok \ - "Spacing of HV nwell to HV nwell < 2.0um (nwell.8)" - variants (fast),(full) - -#----------------------------- -# DIFF -#----------------------------- - - width *ndiff,nfet,scnfet,npd,npass,*nsd,*ndiode,ndiffres,*pdiff,pfet,scpfet,scpfethvt,ppu,*psd,*pdiode,pdiffres,fomfill \ - 150 "Diffusion width < %d (diff/tap.1)" - width *mvndiff,mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,*nndiode,mvndiffres,*mvpdiff,mvpfet,mvpfetesd,*mvpdiode,mvpdiffres 290 \ - "MV Diffusion width < %d (diff/tap.14)" - - width *mvnsd,*mvpsd 150 "MV Tap width < %d (diff/tap.1)" - extend *mvpsd *mvndiff 700 "MV Butting tap length < %d (diff/tap.16)" - extend *mvnsd *mvpdiff 700 "MV Butting tap length < %d (diff/tap.16)" - extend *psd *ndiff 290 "Butting tap length < %d (diff/tap.4)" - extend *nsd *pdiff 290 "Butting tap length < %d (diff/tap.4)" - width mvpdiffres 150 "MV P-Diffusion resistor width < %d (diff/tap.14a)" - spacing alldifflv,var,varhvt,fomfill alldifflv,var,varhvt,fomfill 270 touching_ok \ - "Diffusion spacing < %d (diff/tap.3)" - spacing alldiffmvnontap,mvvar alldiffmvnontap,mvvar 300 touching_ok \ - "MV Diffusion spacing < %d (diff/tap.15a)" - spacing alldiffmv *mvnsd,*mvpsd 270 touching_ok \ - "MV Diffusion to MV tap spacing < %d (diff/tap.3)" - spacing *mvndiff,mvnfet,mvnfetesd,mvnnfet,nnfet,*mvndiode,*nndiode,mvndiffres,mvvar *mvpsd 370 \ - touching_ok "MV P-Diffusion to MV N-tap spacing < %d (diff/tap.15b)" - spacing *mvnsd,*mvpdiff,mvpfet,mvpfetesd,mvvar,*mvpdiode *mvpsd,*psd 760 touching_illegal \ - "MV Diffusion in N-well to P-tap spacing < %d (diff/tap.20 + diff/tap.17,19)" - spacing *ndiff,*ndiode,nfet allnwell 340 touching_illegal \ - "N-Diffusion spacing to N-well < %d (diff/tap.9)" - spacing *mvndiff,*mvndiode,mvnfet,mvnnfet,nnfet allnwell 340 touching_illegal \ - "N-Diffusion spacing to N-well < %d (diff/tap.9)" - spacing *psd allnwell 130 touching_illegal \ - "P-tap spacing to N-well < %d (diff/tap.11)" - spacing *mvpsd allnwell 130 touching_illegal \ - "P-tap spacing to N-well < %d (diff/tap.11)" - surround *nsd allnwell 180 absence_illegal \ - "N-well overlap of N-tap < %d (diff/tap.10)" - surround *mvnsd allnwell 330 absence_illegal \ - "N-well overlap of MV N-tap < %d (diff/tap.19)" - surround *pdiff,*pdiode,pfet,scpfet,ppu allnwell 180 absence_illegal \ - "N-well overlap of P-Diffusion < %d (diff/tap.8)" - surround *mvpdiff,*mvpdiode,mvpfet,mvpfetesd allnwell 330 absence_illegal \ - "N-well overlap of P-Diffusion < %d (diff/tap.17)" - surround mvvar allnwell 560 absence_illegal \ - "N-well overlap of MV varactor < %d (lvtn.10 + lvtn.4b)" - spacing *mvndiode *mvndiode 1070 touching_ok \ - "MV N-diode spacing < %d (hvntm.2 + 2 * hvntm.3)" - -variants (full) - cifspacing allmvdiffnowell lvnwell 825 touching_illegal \ - "MV diffusion to LV nwell spacing < %d (hvi.5 + nsd/psd.5)" - cifspacing nwell_or_hvi nwell_or_hvi 700 touching_ok \ - "HVI to HVI or LV nwell spacing < %d (hvi.5)" -variants (fast),(full) - - spacing allnfets allpactivenonfet 270 touching_illegal \ - "nFET cannot abut P-diffusion (diff/tap.3)" - spacing allpfets allnactivenonfet 270 touching_illegal \ - "pFET cannot abut N-diffusion (diff/tap.3)" - - # Butting junction rules - edge4way (*psd)/a ~(*ndiff,*psd)/a 125 ~(*ndiff)/a (*ndiff)/a 125 \ - "N-Diffusion to P-tap spacing < %d across butted junction (psd.5b)" - edge4way (*ndiff)/a ~(*ndiff,*psd)/a 125 ~(*psd)/a (*psd)/a 125 \ - "N-Diffusion to P-tap spacing < %d across butted junction (psd.5a)" - edge4way (*nsd)/a ~(*pdiff,*nsd)/a 125 ~(*pdiff)/a (*pdiff)/a 125 \ - "P-Diffusion to N-tap spacing < %d across butted junction (nsd.5b)" - edge4way (*pdiff)/a ~(*pdiff,*nsd)/a 125 ~(*nsd)/a (*nsd)/a 125 \ - "P-Diffusion to N-tap spacing < %d across butted junction (nsd.5a)" - - edge4way (*mvpsd)/a ~(*mvndiff,*mvpsd)/a 125 ~(*mvndiff)/a (*mvndiff)/a 125 \ - "MV N-Diffusion to MV P-tap spacing < %d across butted junction (psd.5b)" - edge4way (*mvndiff)/a ~(*mvndiff,*mvpsd)/a 125 ~(*mvpsd)/a (*mvpsd)/a 125 \ - "MV N-Diffusion to MV P-tap spacing < %d across butted junction (psd.5a)" - edge4way (*mvnsd)/a ~(*mvpdiff,*mvnsd)/a 125 ~(*mvpdiff)/a (*mvpdiff)/a 125 \ - "MV P-Diffusion to MV N-tap spacing < %d across butted junction (nsd.5b)" - edge4way (*mvpdiff)/a ~(*mvpdiff,*mvnsd)/a 125 ~(*mvnsd)/a (*mvnsd)/a 125 \ - "MV P-Diffusion to MV N-tap spacing < %d across butted junction (nsd.5a)" - - # Sandwiched butting junction restrictions - edge4way (*pdiff)/a (*nsd)/a 400 ~(*pdiff)/a 0 0 "NSDM width < %d (diff/tap.5)" - edge4way (*ndiff)/a (*psd)/a 400 ~(*ndiff)/a 0 0 "PSDM width < %d (diff/tap.5)" - - area *nsd,*mvnsd 70110 150 "N-tap minimum area < 0.07011um^2 (nsd.10b)" - area *psd,*mvpsd 70110 150 "P-tap minimum area < 0.07011um^2 (psd.10b)" - - angles allactive 90 "Only 90 degree angles permitted on diff and tap (x.2)" - - variants (full) - cifmaxwidth tap_missing_licon 0 bend_illegal "All taps must be contacted (licon.16)" - - # Latchup rules - cifmaxwidth ptap_missing 0 bend_illegal \ - "N-diff distance to P-tap must be < 15.0um (LU.2)" - cifmaxwidth dptap_missing 0 bend_illegal \ - "N-diff distance to P-tap in deep nwell.must be < 15.0um (LU.2.1)" - cifmaxwidth ntap_missing 0 bend_illegal \ - "P-diff distance to N-tap must be < 15.0um (LU.3)" - - variants (fast),(full) - -#----------------------------- -# POLY -#----------------------------- - - width allpoly,polyfill 150 "poly width < %d (poly.1a)" - spacing allpoly,polyfill allpoly,polyfill 210 touching_ok "poly spacing < %d (poly.2)" - - spacing allpolynonfet,polyfill \ - *ndiff,*mvndiff,*ndiode,*nndiode,ndiffres,*ndiodelvt,*pdiff,*mvpdiff,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt \ - 75 corner_ok allfets \ - "poly spacing to Diffusion < %d (poly.4)" - spacing npres *nsd 480 touching_illegal \ - "poly resistor spacing to N-tap < %d (poly.9)" - overhang *ndiff,rndiff nfet,scnfet,npd,npass 250 "N-Diffusion overhang of nFET < %d (poly.7)" - overhang *mvndiff,mvrndiff mvnfet,mvnnfet,nnfet 250 \ - "N-Diffusion overhang of nFET < %d (poly.7)" - overhang *pdiff,rpdiff pfet,scpfet,ppu 250 "P-Diffusion overhang of pmos < %d (poly.7)" - overhang *mvpdiff,mvrpdiff mvpfet,mvpfetesd 250 "P-Diffusion overhang of pmos < %d (poly.7)" - overhang *poly allfetsstd,allfetsspecial 130 "poly overhang of transistor < %d (poly.8)" - overhang *poly allfetscore 110 "poly overhang of SRAM core transistor < %d (poly.8)" - rect_only allfets "No bends in transistors (poly.11)" - rect_only xhrpoly,uhrpoly "No bends in poly resistors (poly.11)" - extend xpc/a xhrpoly,uhrpoly 2160 \ - "poly contact extends poly resistor by < %d (licon.1c + li.5)" - spacing xhrpoly,uhrpoly,xpc xhrpoly,uhrpoly,xpc 1240 touching_illegal \ - "Distance between precision resistors < %d (rpm.2 + 2 * rpm.3)" - - variants (fast) - - spacing xhrpoly,uhrpoly,xpc allndifflv,allndiffmv 525 touching_illegal \ - "Distance from precision resistor to N+ diffusion < %d (rpm.3 + rpm.6 + nsd.5a)" - spacing xhrpoly,uhrpoly,xpc *poly 400 touching_illegal \ - "Distance from precision resistor to unrelated poly < %d (rpm.3 + rpm.7)" - spacing xhrpoly,uhrpoly,xpc allndiffmvnontap 585 touching_illegal \ - "Distance from precision resistor to MV N+ device < %d (rpm.3 + rpm.9 + hvntm.3)" - - # Minimum width requirement means actual spacing from res to ndiff has to be - # constructed from mask rules. These supercede the simpler checks. - - variants (full) - - cifmaxwidth rpm_nsd_check 0 bend_illegal \ - "Distance from precision resistor to N+ diffusion < 0.525um (rpm.3 + rpm.6 + nsd.5a)" - cifmaxwidth rpm_poly_check 0 bend_illegal \ - "Distance from precision resistor to unrelated poly < 0.4um (rpm.3 + rpm.7)" - cifmaxwidth rpm_hvntm_check 0 bend_illegal \ - "Distance from precision resistor to MV N+ device < 0.585um (rpm.3 + rpm.9 + hvntm.3)" - - variants (fast),(full) - - angles allpoly,polyfill 90 "Only 90 degree angles permitted on poly (x.2)" - -#-------------------------------------------------------------------- -# HVTP -#-------------------------------------------------------------------- - - spacing pfethvt,pdiodehvt,varactorhvt pfet,ppu,scpfet,mvpfet,mvpfetesd,pfetlvt,pfetmvt \ - 360 touching_illegal \ - "Min. spacing between pFET and HVTP < %d (hvtp.4)" - - spacing pfethvt,pdiodehvt,varactorhvt varactor 360 touching_illegal \ - "Min. spacing between varactor and HVTP < %d (hvtp.4 + varac.3)" - -#-------------------------------------------------------------------- -# LVTN -#-------------------------------------------------------------------- - - spacing pfetlvt,nfetlvt,pdiodelvt,ndiodelvt \ - allfetsnolvt 360 touching_illegal \ - "Min. spacing between FET and LVTN < %d (lvtn.3a)" - - spacing pfetlvt,nfetlvt,pdiodelvt,ndiodelvt scpfethvt,pfethvt,pdiodehvt,varactorhvt \ - 740 touching_illegal \ - "Min. spacing between LVTN and HVTP < %d (lvtn.9)" - - # Spacing across S/D direction requires edge rule - edge4way allfetsnolvt allactivenonfet 415 \ - ~(pfetlvt,nfetlvt,pdiodelvt,ndiodelvt)/a allfetsnolvt 415 \ - "Min. spacing between FET and LVTN in S/D direction < %d (lvtn.3b)" - -#-------------------------------------------------------------------- -# NPC (Nitride poly Cut) -#-------------------------------------------------------------------- - -# Layer NPC is defined automatically around poly contacts (grow 0.1um) - -#-------------------------------------------------------------------- -# CONT (LICON, contact between poly/diff and LI) -#-------------------------------------------------------------------- - - width ndc/li 170 "N-diffusion contact width < %d (licon.1)" - width nsc/li 170 "N-tap contact width < %d (licon.1)" - width pdc/li 170 "P-diffusion contact width < %d (licon.1)" - width psc/li 170 "P-tap contact width < %d (licon.1)" - width ndic/li 170 "N-diode contact width < %d (licon.1)" - width pdic/li 170 "P-diode contact width < %d (licon.1)" - width pc/li 170 "poly contact width < %d (licon.1)" - - width xpc/li 350 "poly resistor contact width < %d (licon.1b + 2 * li.5)" - area xpc/li 700000 350 "poly resistor contact length < 2.0um (licon.1c)" - area allli,*obsli 56100 170 "Local interconnect minimum area < %a (li.6)" - - width mvndc/li 170 "N-diffusion contact width < %d (licon.1)" - width mvnsc/li 170 "N-tap contact width < %d (licon.1)" - width mvpdc/li 170 "P-diffusion contact width < %d (licon.1)" - width mvpsc/li 170 "P-tap contact width < %d (licon.1)" - width mvndic/li 170 "N-diode contact width < %d (licon.1)" - width mvpdic/li 170 "P-diode contact width < %d (licon.1)" - - spacing allpdiffcont allndiffcont 170 touching_illegal \ - "Diffusion contact spacing < %d (licon.2)" - spacing allndiffcont allndiffcont 170 touching_ok \ - "Diffusion contact spacing < %d (licon.2)" - spacing allpdiffcont allpdiffcont 170 touching_ok \ - "Diffusion contact spacing < %d (licon.2)" - spacing pc pc 170 touching_ok "Poly1 contact spacing < %d (licon.2)" - - spacing pc alldiff 190 touching_illegal \ - "poly contact spacing to diffusion < %d (licon.14)" - spacing pc allpdifflv,allpdiffmv 235 touching_illegal \ - "poly contact spacing to P-diffusion < %d (licon.9 + psdm.5a)" - - spacing ndc,pdc nfet,nfetlvt,pfet,pfethvt,pfetlvt,pfetmvt 55 touching_illegal \ - "Diffusion contact to gate < %d (licon.11)" - spacing ndc,pdc scnfet,scpfet,scpfethvt 50 touching_illegal \ - "Diffusion contact to standard cell gate < %d (licon.11)" - spacing ndc,pdc npd,npass,ppu 40 touching_illegal \ - "Diffusion contact to SRAM gate < %d (licon.11)" - spacing mvndc,mvpdc mvnfet,mvnfetesd,mvnnfet,nnfet,mvpfet,mvpfetesd 55 touching_illegal \ - "Diffusion contact to gate < %d (licon.11)" - spacing nsc varactor,varhvt 250 touching_illegal \ - "Diffusion contact to varactor gate < %d (licon.10)" - spacing mvnsc mvvar 250 touching_illegal \ - "Diffusion contact to varactor gate < %d (licon.10)" - - surround ndc/a *ndiff,nfet,scnfet,npd,npass,nfetlvt,rnd 40 absence_illegal \ - "N-diffusion overlap of N-diffusion contact < %d (licon.5a)" - surround pdc/a *pdiff,pfet,scpfet,scpfethvt,ppu,pfethvt,pfetmvt,pfetlvt,rpd \ - 40 absence_illegal \ - "P-diffusion overlap of P-diffusion contact < %d (licon.5a)" - surround ndic/a *ndi 40 absence_illegal \ - "N-diode overlap of N-diode contact < %d (licon.5a)" - surround pdic/a *pdi 40 absence_illegal \ - "P-diode overlap of N-diode contact < %d (licon.5a)" - - spacing psc/a allnactivenontap 60 touching_illegal \ - "Min. space between P-tap contact and butting N diffusion < %d (licon.5b)" - spacing nsc/a allpactivenontap 60 touching_illegal \ - "Min. space between N-tap contact and butting P diffusion < %d (licon.5b)" - - surround ndc/a *ndiff,nfet,scnfet,npd,npass,nfetlvt,rnd 60 directional \ - "N-diffusion overlap of N-diffusion contact < %d in one direction (licon.5c)" - surround pdc/a *pdiff,pfet,scpfet,scpfethvt,ppu,pfethvt,pfetmvt,pfetlvt,rpd \ - 60 directional \ - "P-diffusion overlap of P-diffusion contact < %d in one direction (licon.5c)" - surround ndic/a *ndi 60 directional \ - "N-diode overlap of N-diode contact < %d in one direction (licon.5c)" - surround pdic/a *pdi 60 directional \ - "P-diode overlap of N-diode contact < %d in one direction (licon.5c)" - - surround nsc/a *nsd 120 directional \ - "N-tap overlap of N-tap contact < %d in one direction (licon.7)" - surround psc/a *psd 120 directional \ - "P-tap overlap of P-tap contact < %d in one direction (licon.7)" - - surround mvndc/a *mvndiff,mvnfet,mvnfetesd,mvrnd 40 absence_illegal \ - "N-diffusion overlap of N-diffusion contact < %d (licon.5a)" - surround mvpdc/a *mvpdiff,mvpfet,mvpfetesd,mvrpd 40 absence_illegal \ - "P-diffusion overlap of P-diffusion contact < %d (licon.5a)" - surround mvndic/a *mvndi 40 absence_illegal \ - "N-diode overlap of N-diode contact < %d (licon.5a)" - surround mvpdic/a *mvpdi 40 absence_illegal \ - "P-diode overlap of N-diode contact < %d (licon.5a)" - - spacing mvpsc/a allndiffmvnontap 60 touching_illegal \ - "Min. space between P-tap contact and butting N diffusion < %d (licon.5b)" - spacing mvnsc/a allpdiffmvnontap 60 touching_illegal \ - "Min. space between N-tap contact and butting P diffusion < %d (licon.5b)" - - surround mvndc/a *mvndiff,mvnfet,mvnfetesd,mvrnd 60 directional \ - "N-diffusion overlap of N-diffusion contact < %d in one direction (licon.5c)" - surround mvpdc/a *mvpdiff,mvpfet,mvpfetesd,mvrpd 60 directional \ - "P-diffusion overlap of P-diffusion contact < %d in one direction (licon.5c)" - surround mvndic/a *mvndi 60 directional \ - "N-diode overlap of N-diode contact < %d in one direction (licon.5c)" - surround mvpdic/a *mvpdi 60 directional \ - "P-diode overlap of N-diode contact < %d in one direction (licon.5c)" - - surround mvnsc/a *mvnsd 120 directional \ - "N-tap overlap of N-tap contact < %d in one direction (licon.7)" - surround mvpsc/a *mvpsd 120 directional \ - "P-tap overlap of P-tap contact < %d in one direction (licon.7)" - - surround pc/a *poly,mrp1,xhrpoly,uhrpoly 50 absence_illegal \ - "poly overlap of poly contact < %d (licon.8)" - surround pc/a *poly,mrp1,xhrpoly,uhrpoly 80 directional \ - "poly overlap of poly contact < %d in one direction (licon.8a)" - - exact_overlap (allcont)/a - -#------------------------------------------------------------- -# LI - Local interconnect layer -#------------------------------------------------------------- - -variants * - - width *li 170 "Local interconnect width < %d (li.1)" - width rli 290 "Local interconnect width < %d (li.7)" - - spacing *locali,rli *locali,rli,*obsli 170 touching_ok \ - "Local interconnect spacing < %d (li.3)" - - # Local interconnect in core (SRAM) cells has more relaxed rules. There are - # no special layers for the contacts in core cells, so they must be included - # in the rule. - width coreli,pc,ndc,nsc,pdc,psc,allli,*obsli 140 \ - "Core local interconnect width < %d (li.c1)" - - spacing coreli,pc,ndc,nsc,pdc,psc,mcon allli,*obsli 140 touching_ok \ - "Core local interconnect spacing < %d (li.c2)" - - surround pc/li *li,coreli 80 directional \ - "Local interconnect overlap of poly contact < %d in one direction (li.5)" - - surround ndc/li,nsc/li,pdc/li,psc/li,ndic/li,pdic/li,mvndc/li,mvnsc/li,mvpdc/li,mvpsc/li,mvndic/li,mvpdic/li \ - *li,rli,coreli 80 directional \ - "Local interconnect overlap of diffusion contact < %d in one direction (li.5)" - - area allli,*obsli,coreli 56100 170 "Local interconnect minimum area < %a (li.6)" - - angles *locali,rli 90 "Only 90 degree angles permitted on local interconnect (x.2)" - angles coreli 45 \ - "Only 45 degree angles permitted on local interconnect in SRAM cell (x.2)" - -#------------------------------------------------------------- -# MCON - Contact between local interconnect and metal1 -#------------------------------------------------------------- - - width mcon/m1 170 "mcon.width < %d (mcon.1)" - spacing mcon/m1 mcon/m1,obsmcon/m1 190 touching_ok "mcon.spacing < %d (mcon.2)" - - exact_overlap mcon/li - -#------------------------------------------------------------- -# METAL1 - -#------------------------------------------------------------- - - width *m1,rm1 140 "Metal1 width < %d (met1.1)" - spacing allm1,m1fill allm1,*obsm1,m1fill 140 touching_ok "Metal1 spacing < %d (met1.2)" - area allm1,*obsm1 83000 140 "Metal1 minimum area < %a (met1.6)" - - surround mcon/m1 *met1 30 absence_illegal \ - "Metal1 overlap of local interconnect contact < %d (met1.4)" - surround mcon/m1 *met1 60 directional \ - "Metal1 overlap of local interconnect contact < %d in one direction (met1.5)" - - angles allm1,m1fill 45 "Only 45 and 90 degree angles permitted on metal1 (x.3a)" - -variants (fast),(full) - widespacing allm1 3005 allm1,*obsm1,m1fill 280 touching_ok \ - "Metal1 > 3um spacing to unrelated m1 < %d (met1.3b)" - widespacing *obsm1 3005 allm1 280 touching_ok \ - "Metal1 > 3um spacing to unrelated m1 < %d (met1.3b)" - -variants (full) - cifmaxwidth m1_hole_empty 0 bend_illegal \ - "Min area of metal1 holes > 0.14um^2 (met1.7)" - - cifspacing m1_large_halo m1_large_halo 280 touching_ok \ - "Spacing of metal1 features attached to and within 0.28um of large metal1 < %d (met1.3a)" -variants * - -#-------------------------------------------------- -# VIA1 -#-------------------------------------------------- - - width v1/m1 260 "Via1 width < %d (via.1a + 2 * via.4a)" - spacing v1 v1 60 touching_ok "Via1 spacing < %d (via.2 - 2 * via.4a)" - surround v1/m1 *m1,rm1 30 directional \ - "Metal1 overlap of Via1 < %d in one direction (via.5a - via.4a)" - surround v1/m2 *m2,rm2 30 directional \ - "Metal2 overlap of Via1 < %d in one direction (met2.5 - met2.4)" - - exact_overlap v1/m1 - -#-------------------------------------------------- -# METAL2 - -#-------------------------------------------------- - - width allm2,m2fill 140 "Metal2 width < %d (met2.1)" - spacing allm2 allm2,obsm2,m2fill 140 touching_ok "Metal2 spacing < %d (met2.2)" - area allm2,obsm2 67600 140 "Metal2 minimum area < %a (met2.6)" - - angles allm2 45 "Only 45 and 90 degree angles permitted on metal2 (x.3a)" - -variants (fast),(full) - widespacing allm2 3005 allm2,obsm2,m2fill 280 touching_ok \ - "Metal2 > 3um spacing to unrelated m2 < %d (met2.3b)" - widespacing obsm2 3005 allm2 280 touching_ok \ - "Metal2 > 3um spacing to unrelated m2 < %d (met2.3b)" - -variants (full) - cifmaxwidth m2_hole_empty 0 bend_illegal \ - "Min area of metal2 holes > 0.14um^2 (met2.7)" - - cifspacing m2_large_halo m2_large_halo 280 touching_ok \ - "Spacing of metal2 features attached to and within 0.28um of large metal2 < %d (met2.3a)" -variants * - -#-------------------------------------------------- -# VIA2 -#-------------------------------------------------- - - width v2/m2 280 "via2 width < %d (via2.1a + 2 * via2.4)" - - spacing v2 v2 120 touching_ok "via2 spacing < %d (via2.2 - 2 * via2.4)" - - surround v2/m2 *m2,rm2 45 directional \ - "Metal2 overlap of via2 < %d in one direction (via2.4a - via2.4)" - surround v2/m3 *m3,rm3 25 absence_illegal "Metal3 overlap of via2 < %d (met3.4)" - - exact_overlap v2/m2 - -#-------------------------------------------------- -# METAL3 - -#-------------------------------------------------- - - width allm3,m3fill 300 "Metal3 width < %d (met3.1)" - spacing allm3 allm3,obsm3,m3fill 300 touching_ok "Metal3 spacing < %d (met3.2)" - area allm3,obsm3 240000 300 "Metal3 minimum area < %a (met3.6)" - - angles allm3 45 "Only 45 and 90 degree angles permitted on metal3 (x.3a)" - -variants (fast),(full) - widespacing allm3,m3fill 3005 allm3,obsm3 400 touching_ok \ - "Metal3 > 3um spacing to unrelated m3 < %d (met3.3d)" - widespacing obsm3 3005 allm3 400 touching_ok \ - "Metal3 > 3um spacing to unrelated m3 < %d (met3.3d)" -variants (full) - cifspacing m3_large_halo m3_large_halo 400 touching_ok \ - "Spacing of metal3 features attached to and within 0.40um of large metal3 < %d (met3.3c)" -variants * - - -#-------------------------------------------------- -# VIA3 - Requires METAL5 Module -#-------------------------------------------------- - - width v3/m3 320 "via3 width < %d (via3.1 + 2 * via3.4)" - spacing v3 v3 80 touching_ok "via3 spacing < %d (via3.2 - 2 * via3.4)" - surround v3/m3 *m3,rm3 30 directional \ - "Metal3 overlap of via3 in one direction < %d (via3.5 - via3.4)" - surround v3/m4 *m4,rm4 5 absence_illegal \ - "Metal4 overlap of via3 < %d (met4.3 - via3.4)" - - exact_overlap v3/m3 - -#----------------------------- -# METAL4 - METAL4 Module -#----------------------------- - -variants * - - width allm4,m4fill 300 "Metal4 width < %d (met4.1)" - spacing allm4 allm4,obsm4,m4fill 300 touching_ok "Metal4 spacing < %d (met4.2)" - area allm4,obsm4 240000 300 "Metal4 minimum area < %a (met4.4a)" - - angles allm4 45 "Only 45 and 90 degree angles permitted on metal4 (x.3a)" - -variants (fast),(full) - widespacing allm4,m4fill 3005 allm4,obsm4 400 touching_ok \ - "Metal4 > 3um spacing to unrelated m4 < %d (met4.5b)" - widespacing obsm4 3005 allm4 400 touching_ok \ - "Metal4 > 3um spacing to unrelated m4 < %d (met4.5b)" -variants (full) - cifspacing m4_large_halo m4_large_halo 400 touching_ok \ - "Spacing of metal4 features attached to and within 0.40um of large metal4 < %d (met4.5a)" -variants * - -#-------------------------------------------------- -# VIA4 - Requires METAL5 Module -#-------------------------------------------------- - - width v4/m4 1180 "via4 width < %d (via4.1 + 2 * via4.4)" - spacing v4 v4 420 touching_ok "via4 spacing < %d (via4.2 - 2 * via4.4)" - surround v4/m5 *m5,rm5 120 absence_illegal \ - "Metal5 overlap of via4 < %d (met5.3 - via4.4)" - - exact_overlap v4/m4 - -#----------------------------- -# METAL5 - METAL5 Module -#----------------------------- - - width allm5,m5fill 1600 "Metal5 width < %d (met5.1)" - spacing allm5 allm5,obsm5,m5fill 1600 touching_ok "Metal5 spacing < %d (met5.2)" - area allm5,obsm5 4000000 1600 "Metal5 minimum area < %a (met5.4)" - - angles allm5 45 "Only 45 and 90 degree angles permitted on metal5 (x.3a)" - - - -variants (full) - - width metrdl 10000 "RDL width < %d (rdl.1)" - spacing metrdl metrdl 10000 touching_ok "RDL spacing < %d (rdl.2)" - surround glass metrdl 10750 absence_ok "RDL must surround glass cut by %d (rdl.3)" - spacing padl metrdl 19660 surround_ok "RDL spacing to unrelated pad < %d (rdl.6)" - -variants (fast),(full) - - -#-------------------------------------------------- -# NMOS, PMOS -#-------------------------------------------------- - - edge4way *poly allfetsstd 420 allfets 0 0 \ - "Transistor width < %d (diff/tap.2)" - edge4way *poly allfetsspecial 360 allfets 0 0 \ - "Transistor in standard cell width < %d (diff/tap.2)" - edge4way *poly npass,npd,nsonos 210 allfets 0 0 \ - "N-Transistor in SRAM core width < %d (diff/tap.2)" - edge4way *poly ppu 140 allfets 0 0 \ - "P-Transistor in SRAM core width < %d (diff/tap.2)" - - # Except: Note that standard cells allow transistor width minimum 0.36um - width pfetlvt 350 "LVT PMOS gate length < %d (poly.1b)" - - spacing allpolynonfet,polyfill *nsd 55 corner_ok var,varhvt,corenvar \ - "poly spacing to diffusion tap < %d (poly.5)" - spacing allpolynonfet,polyfill *psd 55 corner_ok corepvar \ - "poly spacing to diffusion tap < %d (poly.5)" - spacing allpolynonfet,polyfill *mvnsd 55 corner_ok mvvar \ - "poly spacing to diffusion tap < %d (poly.5)" - spacing allpolynonfet,polyfill *mvpsd 55 touching_illegal \ - "poly spacing to diffusion tap < %d (poly.5)" - - edge4way *psd *ndiff 300 ~(nfet,npass,npd,scnfet,nfetlvt,nsonos)/a *psd 300 \ - "Butting P-tap spacing to NMOS gate < %d (poly.6)" - edge4way *nsd *pdiff 300 ~(pfet,ppu,scpfet,scpfethvt,pfetlvt,pfetmvt)/a *nsd 300 \ - "Butting N-tap spacing to PMOS gate < %d (poly.6)" - edge4way *mvpsd *mvndiff 300 ~(mvnfet,mvnfetesd,mvnnfet,nnfet)/a *mvpsd 300 \ - "Butting MV P-tap spacing to MV NMOS gate < %d (poly.6)" - edge4way *mvnsd *mvpdiff 300 ~(mvpfet,mvpfetesd)/a *mvnsd 300 \ - "Butting MV N-tap spacing to MV PMOS gate < %d (poly.6)" - - # No LV FETs in HV diff - spacing pfet,scpfet,scpfethvt,ppu,pfetlvt,pfetmvt,pfethvt,*pdiff *mvpdiff 360 touching_illegal \ - "LV P-diffusion to MV P-diffusion < %d (diff/tap.23 + diff/tap.22)" - - spacing nfet,scnfet,npd,npass,nfetlvt,varactor,varhvt,*ndiff *mvndiff 360 touching_illegal \ - "LV N-diffusion to MV N-diffusion < %d (diff/tap.23 + diff/tap.22)" - - # No HV FETs in LV diff - spacing mvpfet,mvpfetesd,*mvpdiff *pdiff 360 touching_illegal \ - "MV P-diffusion to LV P-diffusion < %d (diff/tap.23 + diff/tap.22)" - - spacing mvnfet,mvnfetesd,mvvaractor,*mvndiff *ndiff 360 touching_illegal \ - "MV N-diffusion to LV N-diffusion < %d (diff/tap.23 + diff/tap.22)" - - # Minimum length of MV FETs. Note that this is larger than the minimum - # width (0.29um), so an edge rule is required - - edge4way mvndiff mvnfet,mvnfetesd 500 mvnfet,mvnfetesd 0 0 \ - "MV NMOS minimum length < %d (poly.13)" - - edge4way mvnsd mvvaractor 500 mvvaractor 0 0 \ - "MV Varactor minimum length < %d (poly.13)" - - edge4way mvpdiff mvpfet,mvpfetesd 500 mvpfet,mvpfetesd 0 0 \ - "MV PMOS minimum length < %d (poly.13)" - -#-------------------------------------------------- -# mrp1 (N+ poly resistor) -#-------------------------------------------------- - - width mrp1 330 "mrp1 resistor width < %d (poly.3)" - -#-------------------------------------------------- -# xhrpoly (P+ poly resistor) -# uhrpoly (P+ poly resistor, 2kOhm/sq) -#-------------------------------------------------- - - # NOTE: u/xhrpoly resistor requires discrete widths 0.35, 0.69, ... up to 1.27. - width xhrpoly 350 "xhrpoly resistor width < %d (P+ poly.1a)" - width uhrpoly 350 "uhrpoly resistor width < %d (P+ poly.1a)" - - spacing xhrpoly,uhrpoly,xpc alldiff 480 touching_illegal \ - "xhrpoly/uhrpoly resistor spacing to diffusion < %d (poly.9)" - - spacing mrp1,xhrpoly,uhrpoly,xpc allfets 480 touching_illegal \ - "Poly resistor spacing to poly < %d (poly.9)" - - spacing xhrpoly,uhrpoly,xpc *poly 480 touching_illegal \ - "Poly resistor spacing to poly < %d (poly.9)" - - spacing mrp1 *poly 480 touching_ok \ - "Poly resistor spacing to poly < %d (poly.9)" - - spacing mrp1,xhrpoly,uhrpoly,xpc alldiff 480 touching_illegal \ - "Poly resistor spacing to diffusion < %d (poly.9)" - -#------------------------------------ -# nsonos -#------------------------------------ - -variants (full) - cifmaxwidth bbox_missing 0 bend_illegal \ - "SONOS transistor must be in cell with abutment box (tunm.8)" -variants (fast),(full) - -#------------------------------------ -# MOS Varactor device rules -#------------------------------------ - - overhang *nsd var,varhvt 250 \ - "N-Tap overhang of Varactor < %d (var.4)" - - overhang *mvnsd mvvar 250 \ - "N-Tap overhang of Varactor < %d (var.4)" - - width var,varhvt,mvvar 180 "Varactor length < %d (var.1)" - extend var,varhvt,mvvar *poly 1000 "Varactor width < %d (var.2)" - -variants (full) - cifmaxwidth var_poly_no_nwell 0 bend_illegal \ - "N-well overlap of varactor poly < 0.15um (varac.5)" - - cifmaxwidth pdiff_in_varactor_well 0 bend_illegal \ - "Varactor N-well must not contain P+ diffusion (varac.7)" -variants (fast),(full) - -#----------------------------------------------------------- -# MiM CAP (CAPM) - -#----------------------------------------------------------- - - width *mimcap 1000 "MiM cap width < %d (capm.1)" - spacing *mimcap *mimcap 840 touching_ok "MiM cap spacing < %d (capm.2a)" - spacing *mimcap via3/m3 80 touching_illegal \ - "MiM cap spacing to via3 < %d (capm.5 - via3.4)" - surround *mimcc *mimcap 80 absence_illegal \ - "MiM cap must surround MiM cap contact by %d (capm.4 - via3.4)" - rect_only *mimcap "MiM cap must be rectangular (capm.7) - - surround *mimcap *metal3/m3 140 absence_illegal \ - "Metal3 must surround MiM cap by %d (capm.3)" - spacing via2 *mimcap 100 touching_illegal \ - "MiM cap spacing to via2 < %d (capm.8 - via2.4)" - spacing *mimcap *metal3/m3 500 surround_ok \ - "MiM cap spacing to unrelated metal3 < %d (capm.11)" - -variants (full) - cifspacing mim_bottom mim_bottom 1200 touching_ok \ - "MiM cap bottom plate spacing < %d (capm.2b)" -variants (fast),(full) - - # MiM cap contact rules (VIA3) - - width mimcc/c1 320 "MiM cap contact width < %d (via3.1 + 2 * via3.4)" - spacing mimcc mimcc 80 touching_ok "MiM cap contact spacing < %d (via3.2 - 2 * via3.4)" - surround mimcc/m4 *m4 5 directional \ - "Metal4 overlap of MiM cap contact in one direction < %d (met4.3 - via3.4)" - exact_overlap mimcc/c1 - - width *mimcap2 1000 "MiM2 cap width < %d (cap2m.1)" - spacing *mimcap2 *mimcap2 840 touching_ok "MiM2 cap spacing < %d (cap2m.2a)" - spacing *mimcap2 via4/m4 10 touching_illegal \ - "MiM2 cap spacing to via4 < %d (cap2m.5 - via4.4)" - surround *mim2cc *mimcap2 10 absence_illegal \ - "MiM2 cap must surround MiM cap 2 contact by %d (cap2m.4 - via4.4)" - rect_only *mimcap2 "MiM2 cap must be rectangular (cap2m.7) - - surround *mimcap2 *metal4/m4 140 absence_illegal \ - "Metal4 must surround MiM2 cap by %d (cap2m.3)" - spacing via3 *mimcap2 80 touching_illegal \ - "MiM2 cap spacing to via3 < %d (cap2m.8 - via3.4)" - spacing *mimcap2 *metal4/m4 500 surround_ok \ - "MiM2 cap spacing to unrelated metal4 < %d (cap2m.11)" - -variants (full) - cifmaxwidth mim2_contact_overlap 0 bend_illegal \ - "MiM2 cap contact must not cross MiM cap contact (cap2m.8)" - - cifspacing mim2_bottom mim2_bottom 1200 touching_ok \ - "MiM2 cap bottom plate spacing < %d (cap2m.2b)" -variants (fast),(full) - - # MiM cap contact rules (VIA4) - - width mim2cc/c2 1180 "MiM2 cap contact width < %d (via4.1 + 2 * via4.4)" - spacing mim2cc mim2cc 420 touching_ok \ - "MiM2 cap contact spacing < %d (via4.2 - 2 * via4.4)" - surround mim2cc/m5 *m5 120 absence_illegal \ - "Metal5 overlap of MiM2 cap contact < %d (met5.3 - via4.4)" - exact_overlap mim2cc/c2 - - -#---------------------------- -# HVNTM -#---------------------------- -variants (full) - cifspacing hvntm_generate hvntm_generate 700 touching_ok \ - "HVNTM spacing < %d (hvntm.2)" -variants (fast),(full) - -#---------------------------- -# End DRC style -#---------------------------- - -end - -#---------------------------- -# LEF format definitions -#---------------------------- - -lef - - masterslice pwell pwell PWELL substrate - masterslice nwell nwell NWELL - - routing li li1 LI1 LI li - - routing m1 met1 MET1 m1 - routing m2 met2 MET2 m2 - routing m3 met3 MET3 m3 - routing m4 met4 MET4 m4 - routing m5 met5 MET5 m5 - routing mrdl met6 MET6 m6 MRDL METRDL - - cut mcon mcon MCON Mcon - cut m2c via via1 VIA VIA1 cont2 via12 - cut m3c via2 VIA2 cont3 via23 - cut via3 via3 VIA3 cont4 via34 - cut via4 via4 VIA4 cont5 via45 - - obs obsli li1 - obs obsm1 met1 - obs obsm2 met2 - obs obsm3 met3 - - obs obsm4 met4 - obs obsm5 met5 - obs obsmrdl met6 - - # NOTE: obsmcon only used with li1, not obsli. - obs obsmcon mcon - - # Vias on obstruction layers should be ignored, so cast to obstruction metal. - obs obsm1 via - obs obsm2 via2 - obs obsm3 via3 - obs obsm4 via4 - -end - -#----------------------------------------------------- -# Device and Parasitic extraction -#----------------------------------------------------- - - -extract - style ngspice variants (),(orig),(si) - cscale 1 - # NOTE: SkyWater SPICE libraries use .option scale 1E6 so all - # dimensions must be in units of microns in the extract file. - # Use extract style "ngspice(si)" to override this and produce - # a file with SI units for length/area. - - variants (),(orig) - lambda 1E6 - variants (si) - lambda 1.0 - variants * - - units microns - step 7 - sidehalo 2 - - # NOTE: MiM cap layers have been purposely put out of order, - # may want to reconsider. - - planeorder dwell 0 - planeorder well 1 - planeorder active 2 - planeorder locali 3 - planeorder metal1 4 - planeorder metal2 5 - planeorder metal3 6 - planeorder metal4 7 - planeorder metal5 8 - planeorder metali 9 - planeorder block 10 - planeorder comment 11 - planeorder cap1 12 - planeorder cap2 13 - - height dnwell -0.1 0.1 - height nwell,pwell 0.0 0.2062 - height alldiff 0.2062 0.12 - height fomfill 0.2062 0.12 - height allpoly 0.3262 0.18 - height polyfill 0.3262 0.18 - height alldiffcont 0.3262 0.61 - height pc 0.5062 0.43 - height allli 0.9361 0.10 - height mcon 1.0361 0.34 - height allm1 1.3761 0.36 - height m1fill 1.3761 0.36 - height v1 1.7361 0.27 - height allm2 2.0061 0.36 - height m2fill 1.3761 0.36 - height v2 2.3661 0.42 - height allm3 2.7861 0.845 - height m3fill 1.3761 0.36 - height v3 3.6311 0.39 - height allm4 4.0211 0.845 - height m4fill 1.3761 0.36 - height v4 4.8661 0.505 - height allm5 5.3711 1.26 - height m5fill 1.3761 0.36 - height mimcap 2.4661 0.2 - height mimcap2 3.7311 0.2 - height mimcc 2.6661 0.12 - height mim2cc 3.9311 0.09 - height mrdlc 6.6311 0.63 - height mrdl 7.2611 3.0 - - # Antenna check parameters - # Note that checks w/diode diffusion are not modeled - model partial - antenna poly sidewall 50 none - antenna allcont surface 3 none - antenna li sidewall 75 0 450 - antenna mcon surface 3 0 18 - antenna m1,m2,m3 sidewall 400 2600 400 - antenna v1 surface 3 0 18 - antenna v2 surface 6 0 36 - antenna m4,m5 sidewall 400 2600 400 - antenna v3,v4 surface 6 0 36 - - tiedown alldiffnonfet - - substrate *ppdiff,*mvppdiff,space/w,pwell well $SUB -dnwell,isosub - -# Resistances are in milliohms per square -# Optional 3rd argument is the corner adjustment fraction -# Device values come from trtc.cor (typical corner) - resist (dnwell)/dwell 2200000 - resist (pwell)/well 3050000 - resist (nwell)/well 1700000 - resist (rpw)/well 3050000 0.5 - resist (*ndiff,nsd)/active 120000 - resist (*pdiff,*psd)/active 197000 - resist (*mvndiff,mvnsd)/active 114000 - resist (*mvpdiff,*mvpsd)/active 191000 - - resist ndiffres/active 120000 0.5 - resist pdiffres/active 197000 0.5 - resist mvndiffres/active 114000 0.5 - resist mvpdiffres/active 191000 0.5 - resist mrp1/active 48200 0.5 - resist xhrpoly/active 319800 0.5 - resist uhrpoly/active 2000000 0.5 - - resist (allpolynonres)/active 48200 - resist rmp/active 48200 - - resist (allli)/locali 12200 - resist (allm1)/metal1 125 - resist (allm2)/metal2 125 - resist (allm3)/metal3 47 - resist (allm4)/metal4 47 - resist (allm5)/metal5 29 - resist mrdl/metali 5 - - # These types should not be considered as electrical nodes - resist blocktypes None - resist obstypes None - resist idtypes None - resist comment None - - contact ndc,nsc 15000 - contact pdc,psc 15000 - contact mvndc,mvnsc 15000 - contact mvpdc,mvpsc 15000 - contact pc 15000 - contact mcon 152000 - contact m2c 4500 - contact m3c 3410 - contact mimcc 4500 - contact mim2cc 3410 - contact via3 3410 - contact via4 380 - contact mrdlc 6 - -#------------------------------------------------------------------------- -# Parasitic capacitance values: Use document (...) -#------------------------------------------------------------------------- -# This uses the new "default" definitions that determine the intervening -# planes from the planeorder stack, take care of the reflexive sideoverlap -# definitions, and generally clean up the section and make it more readable. -# -# Also uses "units microns" statement. All values are taken from the -# document PEX/xRC/cap_models. Fringe capacitance values are approximated. -# Units are aF/um^2 for area caps and aF/um for perimeter and sidewall caps. -#------------------------------------------------------------------------- -# Remember that device capacitances to substrate are taken care of by the -# models. Thus, active and poly definitions ignore all "fet" types. -# fet types are excluded when computing parasitic capacitance to -# active from layers above them because poly is a shield; fet types are -# included for parasitics from layers above to poly. Resistor types -# should be removed from all parasitic capacitance calculations, or else -# they just create floating caps. Technically, the capacitance probably -# should be split between the two terminals. Unsure of the correct model. -#------------------------------------------------------------------------- - -#n-well -# NOTE: This value not found in PEX files -defaultareacap nwell well 120 - -#n-active -# Rely on device models to capture *ndiff area cap -# Do not extract parasitics from resistors -# defaultareacap allnactivenonfet active 790 -# defaultperimeter allnactivenonfet active 280 - -#p-active -# Rely on device models to capture *pdiff area cap -# Do not extract parasitics from resistors -# defaultareacap allpactivenonfet active 810 -# defaultperimeter allpactivenonfet active 300 - -#poly -# Do not extract parasitics from resistors -# defaultsidewall allpolynonfet active 22 -# defaultareacap allpolynonfet active 106 -# defaultperimeter allpolynonfet active 57 - - defaultsidewall *poly active 23 - defaultareacap *poly active nwell,obswell,pwell well 106 - defaultperimeter *poly active nwell,obswell,pwell well 55 - -#locali - defaultsidewall allli locali 33 - defaultareacap allli locali nwell,obswell,pwell well 37 - defaultperimeter allli locali nwell,obswell,pwell well 55 - defaultoverlap allli locali nwell well 37 - -#locali->diff - defaultoverlap allli locali allactivenonfet active 37 - defaultsideoverlap allli locali allactivenonfet active 55 - -#locali->poly - defaultoverlap allli locali allpolynonres active 94 - defaultsideoverlap allli locali allpolynonres active 52 - defaultsideoverlap *poly active allli locali 25 - -#metal1 - defaultsidewall allm1 metal1 45 - defaultareacap allm1 metal1 nwell,obswell,pwell well 26 - defaultperimeter allm1 metal1 nwell,obswell,pwell well 41 - defaultoverlap allm1 metal1 nwell well 26 - -#metal1->diff - defaultoverlap allm1 metal1 allactivenonfet active 26 - defaultsideoverlap allm1 metal1 allactivenonfet active 41 - -#metal1->poly - defaultoverlap allm1 metal1 allpolynonres active 45 - defaultsideoverlap allm1 metal1 allpolynonres active 47 - defaultsideoverlap *poly active allm1 metal1 17 - -#metal1->locali - defaultoverlap allm1 metal1 allli locali 114 - defaultsideoverlap allm1 metal1 allli locali 59 - defaultsideoverlap allli locali allm1 metal1 35 - -#metal2 - defaultsidewall allm2 metal2 50 - defaultareacap allm2 metal2 nwell,obswell,pwell well 17 - defaultperimeter allm2 metal2 nwell,obswell,pwell well 41 - defaultoverlap allm2 metal2 nwell well 38 - -#metal2->diff - defaultoverlap allm2 metal2 allactivenonfet active 17 - defaultsideoverlap allm2 metal2 allactivenonfet active 41 - -#metal2->poly - defaultoverlap allm2 metal2 allpolynonres active 24 - defaultsideoverlap allm2 metal2 allpolynonres active 41 - defaultsideoverlap *poly active allm2 metal2 11 - -#metal2->locali - defaultoverlap allm2 metal2 allli locali 38 - defaultsideoverlap allm2 metal2 allli locali 46 - defaultsideoverlap allli locali allm2 metal2 22 - -#metal2->metal1 - defaultoverlap allm2 metal2 allm1 metal1 134 - defaultsideoverlap allm2 metal2 allm1 metal1 67 - defaultsideoverlap allm1 metal1 allm2 metal2 48 - -#metal3 - defaultsidewall allm3 metal3 63 - defaultoverlap allm3 metal3 nwell well 12 - defaultareacap allm3 metal3 nwell,obswell,pwell well 12 - defaultperimeter allm3 metal3 nwell,obswell,pwell well 41 - -#metal3->diff - defaultoverlap allm3 metal3 allactive active 12 - defaultsideoverlap allm3 metal3 allactive active 41 - -#metal3->poly - defaultoverlap allm3 metal3 allpolynonres active 16 - defaultsideoverlap allm3 metal3 allpolynonres active 44 - defaultsideoverlap *poly active allm3 metal3 9 - -#metal3->locali - defaultoverlap allm3 metal3 allli locali 21 - defaultsideoverlap allm3 metal3 allli locali 47 - defaultsideoverlap allli locali allm3 metal3 15 - -#metal3->metal1 - defaultoverlap allm3 metal3 allm1 metal1 35 - defaultsideoverlap allm3 metal3 allm1 metal1 55 - defaultsideoverlap allm1 metal1 allm3 metal3 27 - -#metal3->metal2 - defaultoverlap allm3 metal3 allm2 metal2 86 - defaultsideoverlap allm3 metal3 allm2 metal2 70 - defaultsideoverlap allm2 metal2 allm3 metal3 44 - -#metal4 - defaultsidewall allm4 metal4 67 -# defaultareacap alltopm metal4 well 6 - areacap allm4/m4 8 - defaultoverlap allm4 metal4 nwell well 8 - defaultperimeter allm4 metal4 well 37 - -#metal4->diff - defaultoverlap allm4 metal4 allactivenonfet active 8 - defaultsideoverlap allm4 metal4 allactivenonfet active 37 - -#metal4->poly - defaultoverlap allm4 metal4 allpolynonres active 10 - defaultsideoverlap allm4 metal4 allpolynonres active 38 - defaultsideoverlap *poly active allm4 metal4 6 - -#metal4->locali - defaultoverlap allm4 metal4 allli locali 12 - defaultsideoverlap allm4 metal4 allli locali 40 - defaultsideoverlap allli locali allm4 metal4 10 - -#metal4->metal1 - defaultoverlap allm4 metal4 allm1 metal1 15 - defaultsideoverlap allm4 metal4 allm1 metal1 43 - defaultsideoverlap allm1 metal1 allm4 metal4 16 - -#metal4->metal2 - defaultoverlap allm4 metal4 allm2 metal2 20 - defaultsideoverlap allm4 metal4 allm2 metal2 46 - defaultsideoverlap allm2 metal2 allm4 metal4 22 - -#metal4->metal3 - defaultoverlap allm4 metal4 allm3 metal3 84 - defaultsideoverlap allm4 metal4 allm3 metal3 71 - defaultsideoverlap allm3 metal3 allm4 metal4 43 - -#metal5 - defaultsidewall allm5 metal5 127 -# defaultareacap allm5 metal5 well 6 - areacap allm5/m5 6 - defaultoverlap allm5 metal5 nwell well 6 - defaultperimeter allm5 metal5 well 39 - -#metal5->diff - defaultoverlap allm5 metal5 allactivenonfet active 6 - defaultsideoverlap allm5 metal5 allactivenonfet active 39 - -#metal5->poly - defaultoverlap allm5 metal5 allpolynonres active 7 - defaultsideoverlap allm5 metal5 allpolynonres active 40 - defaultsideoverlap *poly active allm5 metal5 6 - -#metal5->locali - defaultoverlap allm5 metal5 allli locali 8 - defaultsideoverlap allm5 metal5 allli locali 41 - defaultsideoverlap allli locali allm5 metal5 8 - -#metal5->metal1 - defaultoverlap allm5 metal5 allm1 metal1 9 - defaultsideoverlap allm5 metal5 allm1 metal1 43 - defaultsideoverlap allm1 metal1 allm5 metal5 12 - -#metal5->metal2 - defaultoverlap allm5 metal5 allm2 metal2 11 - defaultsideoverlap allm5 metal5 allm2 metal2 46 - defaultsideoverlap allm2 metal2 allm5 metal5 16 - -#metal5->metal3 - defaultoverlap allm5 metal5 allm3 metal3 20 - defaultsideoverlap allm5 metal5 allm3 metal3 54 - defaultsideoverlap allm3 metal3 allm5 metal5 28 - -#metal5->metal4 - defaultoverlap allm5 metal5 allm4 metal4 68 - defaultsideoverlap allm5 metal5 allm4 metal4 83 - defaultsideoverlap allm4 metal4 allm5 metal5 47 - - -# Devices: Base models (not subcircuit wrappers) - -variants (),(si) - - device msubcircuit sky130_fd_pr__pfet_01v8 pfet,scpfet \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__special_pfet_pass ppu \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__pfet_01v8_lvt pfetlvt \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__pfet_01v8_mvt pfetmvt \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__pfet_01v8_hvt pfethvt,scpfethvt \ - *pdiff,pdiffres *pdiff,pdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - - device msubcircuit sky130_fd_pr__nfet_01v8 nfet,scnfet \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__special_nfet_latch npd \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__special_nfet_latch npd \ - *ndiff,ndiffres *srampvar pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__special_nfet_pass npass \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__nfet_01v8_lvt nfetlvt \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_bs_flash__special_sonosfet_star nsonos \ - *ndiff,ndiffres *ndiff,ndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device subcircuit sky130_fd_pr__cap_var_lvt varactor \ - *nndiff nwell error l=l w=w a1=as a2=ad p1=ps p2=pd - device subcircuit sky130_fd_pr__cap_var_hvt varhvt \ - *nndiff nwell error l=l w=w a1=as a2=ad p1=ps p2=pd - device subcircuit sky130_fd_pr__cap_var mvvaractor \ - *mvnndiff nwell error l=l w=w a1=as a2=ad p1=ps p2=pd - - # Bipolars - device msubcircuit sky130_fd_pr__npn_05v5_W1p00L1p00 npn *ndiff dnwell space/w \ - error +npn1p00 - device msubcircuit sky130_fd_pr__npn_05v5_W1p00L2p00 npn *ndiff dnwell space/w \ - error +npn2p00 - device msubcircuit sky130_fd_pr__npn_05v5 npn *ndiff dnwell space/w error a2=area - device msubcircuit sky130_fd_pr__pnp_05v5_W0p68L0p68 pnp *pdiff \ - pwell,space/w +pnp0p68 - device msubcircuit sky130_fd_pr__pnp_05v5_W3p40L3p40 pnp *pdiff \ - pwell,space/w +pnp3p40 - device msubcircuit sky130_fd_pr__pnp_05v5 pnp *pdiff pwell,space/w a2=area - device msubcircuit sky130_fd_pr__npn_11v0_W1p00L1p00 npn *mvndiff \ - dnwell space/w error +npn11p0 - device msubcircuit sky130_fd_pr__npn_11v0 npn *mvndiff dnwell space/w error a2=area - - # Ignore the extended-drain FET geometry that forms part of the high-voltage - # bipolar devices. - device msubcircuit Ignore mvnfet *mvndiff,mvndiffres dnwell pwell,space/w error +npn,pnp - device msubcircuit Ignore mvpfet *mvpdiff,mvpdiffres pwell,space/w nwell error +npn,pnp - - # Extended drain devices (must appear before the regular devices) - device msubcircuit sky130_fd_pr__nfet_20v0_nvt mvnnfet *mvndiff,mvndiffres \ - dnwell pwell,space/w error l=l w=w a1=as a2=ad p1=ps p2=pd - device msubcircuit sky130_fd_pr__nfet_20v0 mvnfet *mvndiff,mvndiffres \ - dnwell pwell,space/w error l=l w=w a1=as a2=ad p1=ps p2=pd - device msubcircuit sky130_fd_pr__pfet_20v0 mvpfet *mvpdiff,mvpdiffres \ - pwell,space/w nwell error l=l w=w a1=as a2=ad p1=ps p2=pd - - device msubcircuit sky130_fd_pr__pfet_g5v0d10v5 mvpfet \ - *mvpdiff,mvpdiffres *mvpdiff,mvpdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__nfet_g5v0d10v5 mvnfet \ - *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__nfet_05v0_nvt mvnnfet \ - *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__nfet_03v3_nvt nnfet \ - *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__esd_nfet_g5v0d10v5 mvnfetesd \ - *mvndiff,mvndiffres *mvndiff,mvndiffres pwell,space/w error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - device msubcircuit sky130_fd_pr__esd_pfet_g5v0d10v5 mvpfetesd \ - *mvpdiff,mvpdiffres *mvpdiff,mvpdiffres nwell error l=l w=w \ - a1=as p1=ps a2=ad p2=pd - - device resistor sky130_fd_pr__res_generic_l1 rli1 *li,coreli - device resistor sky130_fd_pr__res_generic_m1 rmetal1 *metal1 - device resistor sky130_fd_pr__res_generic_m2 rmetal2 *metal2 - device resistor sky130_fd_pr__res_generic_m3 rmetal3 *metal3 - device resistor sky130_fd_pr__res_generic_m4 rm4 *m4 - device resistor sky130_fd_pr__res_generic_m5 rm5 *m5 - - device rsubcircuit sky130_fd_pr__res_high_po_0p35 xhrpoly \ - xpc pwell,space/w error +res0p35 l=l - device rsubcircuit sky130_fd_pr__res_high_po_0p69 xhrpoly \ - xpc pwell,space/w error +res0p69 l=l - device rsubcircuit sky130_fd_pr__res_high_po_1p41 xhrpoly \ - xpc pwell,space/w error +res1p41 l=l - device rsubcircuit sky130_fd_pr__res_high_po_2p85 xhrpoly \ - xpc pwell,space/w error +res2p85 l=l - device rsubcircuit sky130_fd_pr__res_high_po_5p73 xhrpoly \ - xpc pwell,space/w error +res5p73 l=l - device rsubcircuit sky130_fd_pr__res_high_po xhrpoly \ - xpc pwell,space/w error l=l w=w - device rsubcircuit sky130_fd_pr__res_xhigh_po_0p35 uhrpoly \ - xpc pwell,space/w error +res0p35 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po_0p69 uhrpoly \ - xpc pwell,space/w error +res0p69 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po_1p41 uhrpoly \ - xpc pwell,space/w error +res1p41 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po_2p85 uhrpoly \ - xpc pwell,space/w error +res2p85 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po_5p73 uhrpoly \ - xpc pwell,space/w error +res5p73 l=l - device rsubcircuit sky130_fd_pr__res_xhigh_po uhrpoly \ - xpc pwell,space/w error l=l w=w - - device rsubcircuit sky130_fd_pr__res_generic_nd ndiffres \ - *ndiff pwell,space/w error l=l w=w - device rsubcircuit sky130_fd_pr__res_generic_pd pdiffres \ - *pdiff nwell error l=l w=w - device rsubcircuit sky130_fd_pr__res_iso_pw rpw \ - pwell dnwell error l=l w=w - device rsubcircuit sky130_fd_pr__res_generic_nd__hv mvndiffres \ - *mvndiff pwell,space/w error l=l w=w - device rsubcircuit sky130_fd_pr__res_generic_pd__hv mvpdiffres \ - *mvpdiff nwell error l=l w=w - - device resistor sky130_fd_pr__res_generic_po rmp *poly - device resistor sky130_fd_pr__res_generic_po mrp1 *poly - - device pdiode sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area p=pj - device pdiode sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area p=pj - device pdiode sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area p=pj - device pdiode sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area p=pj - - device ndiode sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area p=pj - device ndiode sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area p=pj - device ndiode sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area p=pj - device ndiode sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area p=pj - - device csubcircuit sky130_fd_pr__cap_mim_m3_1 *mimcap *m3 w=w l=l - device csubcircuit sky130_fd_pr__cap_mim_m3_2 *mimcap2 *m4 w=w l=l - - variants (orig) - - device mosfet sky130_fd_pr__pfet_01v8 scpfet,pfet pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__special_pfet_pass ppu pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__pfet_01v8_lvt pfetlvt pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__pfet_01v8_mvt pfetmvt pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__pfet_01v8_hvt scpfethvt,pfethvt pdiff,pdiffres,pdc nwell - device mosfet sky130_fd_pr__nfet_01v8 scnfet,nfet ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_pr__special_nfet_pass npass ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_pr__special_nfet_latch npd ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_pr__special_nfet_latch npd ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_pr__nfet_01v8_lvt nfetlvt ndiff,ndiffres,ndc pwell,space/w - device mosfet sky130_fd_bs_flash__special_sonosfet_star nsonos ndiff,ndiffres,ndc \ - pwell,space/w - - # Note that corenvar, corepvar are not considered devices, and extract as - # parasitic capacitance instead (but cap values need to be added). - - # Extended drain devices (must appear before the regular devices) - device mosfet sky130_fd_pr__nfet_20v0_nvt mvnnfet *mvndiff,mvndiffres \ - dnwell pwell,space/w error - device mosfet sky130_fd_pr__nfet_20v0 mvnfet *mvndiff,mvndiffres \ - dnwell pwell,space/w error - device mosfet sky130_fd_pr__pfet_20v0 mvpfet *mvpdiff,mvpdiffres \ - pwell,space/w nwell error - - device mosfet sky130_fd_pr__pfet_g5v0d10v5 mvpfet mvpdiff,mvpdiffres,mvpdc nwell - device mosfet sky130_fd_pr__esd_pfet_g5v0d10v5 mvpfetesd mvpdiff,mvpdiffres,mvpdc nwell - device mosfet sky130_fd_pr__nfet_g5v0d10v5 mvnfet mvndiff,mvndiffres,mvndc pwell,space/w - device mosfet sky130_fd_pr__esd_nfet_g5v0d10v5 mvnfetesd mvndiff,mvndiffres,mvndc pwell,space/w - device mosfet sky130_fd_pr__nfet_05v0_nvt mvnnfet *mvndiff,mvndiffres pwell,space/w - device mosfet sky130_fd_pr__nfet_03v3_nvt nnfet *mvndiff,mvndiffres pwell,space/w - - # These devices always extract as subcircuits - device subcircuit sky130_fd_pr__cap_var_lvt varactor *nndiff nwell error l=l w=w - device subcircuit sky130_fd_pr__cap_var_hvt varhvt *nndiff nwell error l=l w=w - device subcircuit sky130_fd_pr__cap_var mvvaractor *mvnndiff nwell error l=l w=w - - device resistor sky130_fd_pr__res_generic_po rmp *poly - device resistor sky130_fd_pr__res_generic_l1 rli1 *li,coreli - device resistor sky130_fd_pr__res_generic_m1 rmetal1 *metal1 - device resistor sky130_fd_pr__res_generic_m2 rmetal2 *metal2 - device resistor sky130_fd_pr__res_generic_m3 rmetal3 *metal3 - device resistor sky130_fd_pr__res_generic_m4 rm4 *m4 - device resistor sky130_fd_pr__res_generic_m5 rm5 *m5 - - device resistor sky130_fd_pr__res_high_po_0p35 xhrpoly xpc +res0p35 - device resistor sky130_fd_pr__res_high_po_0p69 xhrpoly xpc +res0p69 - device resistor sky130_fd_pr__res_high_po_1p41 xhrpoly xpc +res1p41 - device resistor sky130_fd_pr__res_high_po_2p85 xhrpoly xpc +res2p85 - device resistor sky130_fd_pr__res_high_po_5p73 xhrpoly xpc +res5p73 - device resistor sky130_fd_pr__res_high_po xhrpoly xpc - device resistor sky130_fd_pr__res_xhigh_po_0p35 uhrpoly xpc +res0p35 - device resistor sky130_fd_pr__res_xhigh_po_0p69 uhrpoly xpc +res0p69 - device resistor sky130_fd_pr__res_xhigh_po_1p41 uhrpoly xpc +res1p41 - device resistor sky130_fd_pr__res_xhigh_po_2p85 uhrpoly xpc +res2p85 - device resistor sky130_fd_pr__res_xhigh_po_5p73 uhrpoly xpc +res5p73 - device resistor sky130_fd_pr__res_xhigh_po uhrpoly xpc - device resistor sky130_fd_pr__res_generic_po mrp1 *poly - device resistor sky130_fd_pr__res_generic_nd ndiffres *ndiff - device resistor sky130_fd_pr__res_generic_pd pdiffres *pdiff - device resistor mrdn_hv mvndiffres *mvndiff - device resistor mrdp_hv mvpdiffres *mvpdiff - device resistor sky130_fd_pr__res_iso_pw rpw pwell - - device ndiode sky130_fd_pr__diode_pw2nd_05v5 *ndiode pwell,space/w a=area - device ndiode sky130_fd_pr__diode_pw2nd_05v5_lvt *ndiodelvt pwell,space/w a=area - device ndiode sky130_fd_pr__diode_pw2nd_05v5_nvt *nndiode pwell,space/w a=area - device ndiode sky130_fd_pr__diode_pw2nd_11v0 *mvndiode pwell,space/w a=area - - device pdiode sky130_fd_pr__diode_pd2nw_05v5 *pdiode nwell a=area - device pdiode sky130_fd_pr__diode_pd2nw_05v5_lvt *pdiodelvt nwell a=area - device pdiode sky130_fd_pr__diode_pd2nw_05v5_hvt *pdiodehvt nwell a=area - device pdiode sky130_fd_pr__diode_pd2nw_11v0 *mvpdiode nwell a=area - - device bjt sky130_fd_pr__npn_05v5_W1p00L1p00 npn *ndiff dnwell space/w error +npn1p00 - device bjt sky130_fd_pr__npn_05v5_W1p00L2p00 npn *ndiff dnwell space/w error +npn2p00 - device bjt sky130_fd_pr__npn_05v5 npn *ndiff dnwell space/w error a2=area - device bjt sky130_fd_pr__pnp_05v5_W0p68L0p68 pnp *pdiff pwell,space/w +pnp0p68 - device bjt sky130_fd_pr__pnp_05v5_W3p40L3p40 pnp *pdiff pwell,space/w +pnp3p40 - device bjt sky130_fd_pr__pnp_05v5 pnp *pdiff pwell,space/w a2=area - device bjt sky130_fd_pr__npn_11v0_W1p00L1p00 npn *mvndiff dnwell space/w error +npn11p0 - device bjt sky130_fd_pr__npn_11v0 npn *mvndiff dnwell space/w error a2=area - - device capacitor sky130_fd_pr__cap_mim_m3_1 *mimcap *m3 1 - device capacitor sky130_fd_pr__cap_mim_m3_2 *mimcap2 *m4 1 - -end - -#----------------------------------------------------- -# Wiring tool definitions -#----------------------------------------------------- - -wiring - # All wiring values are in nanometers - scalefactor 10 - - contact mcon 170 li 0 0 m1 30 60 - contact v1 260 m1 0 30 m2 0 30 - contact v2 280 m2 0 45 m3 25 0 - contact v3 320 m3 0 30 m4 5 5 - contact v4 1180 m4 0 m5 120 - - contact pc 170 poly 50 80 li 0 80 - contact pdc 170 pdiff 40 60 li 0 80 - contact ndc 170 ndiff 40 60 li 0 80 - contact psc 170 psd 40 60 li 0 80 - contact nsc 170 nsd 40 60 li 0 80 - -end - -#----------------------------------------------------- -# Plain old router. . . -#----------------------------------------------------- - -router -end - -#------------------------------------------------------------ -# Plowing (restored in magic 8.2, need to fill this section) -#------------------------------------------------------------ - -plowing -end - -#----------------------------------------------------------------- -# No special plot layers defined (use default PNM color choices) -#----------------------------------------------------------------- - -plot - style pnm - default - draw fillblock no_color_at_all - draw fillblock4 no_color_at_all - draw fomfill no_color_at_all - draw polyfill no_color_at_all - draw m1fill no_color_at_all - draw m2fill no_color_at_all - draw m3fill no_color_at_all - draw m4fill no_color_at_all - draw m5fill no_color_at_all - draw nwell cwell -end -
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index b2677a4..ebc5e1b 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,2052 +1,2305 @@ magic tech sky130A -timestamp 1633439465 +magscale 1 2 +timestamp 1620395479 +<< mvpsubdiff >> +rect 345740 628255 345764 629032 +rect 371078 628255 371102 629032 +<< mvpsubdiffcont >> +rect 345764 628255 371078 629032 +<< locali >> +rect 345748 628255 345764 629032 +rect 371078 628255 371094 629032 +<< viali >> +rect 357593 628300 359298 629000 +<< metal1 >> +rect 357470 629399 359442 629457 +rect 357470 628057 357538 629399 +rect 359388 628057 359442 629399 +rect 357470 627990 359442 628057 +<< via1 >> +rect 357538 629000 359388 629399 +rect 357538 628300 357593 629000 +rect 357593 628300 359298 629000 +rect 359298 628300 359388 629000 +rect 357538 628057 359388 628300 << metal2 >> -rect 262 -400 318 240 -rect 853 -400 909 240 -rect 1444 -400 1500 240 -rect 2035 -400 2091 240 -rect 2626 -400 2682 240 -rect 3217 -400 3273 240 -rect 3808 -400 3864 240 -rect 4399 -400 4455 240 -rect 4990 -400 5046 240 -rect 5581 -400 5637 240 -rect 6172 -400 6228 240 -rect 6763 -400 6819 240 -rect 7354 -400 7410 240 -rect 7945 -400 8001 240 -rect 8536 -400 8592 240 -rect 9127 -400 9183 240 -rect 9718 -400 9774 240 -rect 10309 -400 10365 240 -rect 10900 -400 10956 240 -rect 11491 -400 11547 240 -rect 12082 -400 12138 240 -rect 12673 -400 12729 240 -rect 13264 -400 13320 240 -rect 13855 -400 13911 240 -rect 14446 -400 14502 240 -rect 15037 -400 15093 240 -rect 15628 -400 15684 240 -rect 16219 -400 16275 240 -rect 16810 -400 16866 240 -rect 17401 -400 17457 240 -rect 17992 -400 18048 240 -rect 18583 -400 18639 240 -rect 19174 -400 19230 240 -rect 19765 -400 19821 240 -rect 20356 -400 20412 240 -rect 20947 -400 21003 240 -rect 21538 -400 21594 240 -rect 22129 -400 22185 240 -rect 22720 -400 22776 240 -rect 23311 -400 23367 240 -rect 23902 -400 23958 240 -rect 24493 -400 24549 240 -rect 25084 -400 25140 240 -rect 25675 -400 25731 240 -rect 26266 -400 26322 240 -rect 26857 -400 26913 240 -rect 27448 -400 27504 240 -rect 28039 -400 28095 240 -rect 28630 -400 28686 240 -rect 29221 -400 29277 240 -rect 29812 -400 29868 240 -rect 30403 -400 30459 240 -rect 30994 -400 31050 240 -rect 31585 -400 31641 240 -rect 32176 -400 32232 240 -rect 32767 -400 32823 240 -rect 33358 -400 33414 240 -rect 33949 -400 34005 240 -rect 34540 -400 34596 240 -rect 35131 -400 35187 240 -rect 35722 -400 35778 240 -rect 36313 -400 36369 240 -rect 36904 -400 36960 240 -rect 37495 -400 37551 240 -rect 38086 -400 38142 240 -rect 38677 -400 38733 240 -rect 39268 -400 39324 240 -rect 39859 -400 39915 240 -rect 40450 -400 40506 240 -rect 41041 -400 41097 240 -rect 41632 -400 41688 240 -rect 42223 -400 42279 240 -rect 42814 -400 42870 240 -rect 43405 -400 43461 240 -rect 43996 -400 44052 240 -rect 44587 -400 44643 240 -rect 45178 -400 45234 240 -rect 45769 -400 45825 240 -rect 46360 -400 46416 240 -rect 46951 -400 47007 240 -rect 47542 -400 47598 240 -rect 48133 -400 48189 240 -rect 48724 -400 48780 240 -rect 49315 -400 49371 240 -rect 49906 -400 49962 240 -rect 50497 -400 50553 240 -rect 51088 -400 51144 240 -rect 51679 -400 51735 240 -rect 52270 -400 52326 240 -rect 52861 -400 52917 240 -rect 53452 -400 53508 240 -rect 54043 -400 54099 240 -rect 54634 -400 54690 240 -rect 55225 -400 55281 240 -rect 55816 -400 55872 240 -rect 56407 -400 56463 240 -rect 56998 -400 57054 240 -rect 57589 -400 57645 240 -rect 58180 -400 58236 240 -rect 58771 -400 58827 240 -rect 59362 -400 59418 240 -rect 59953 -400 60009 240 -rect 60544 -400 60600 240 -rect 61135 -400 61191 240 -rect 61726 -400 61782 240 -rect 62317 -400 62373 240 -rect 62908 -400 62964 240 -rect 63499 -400 63555 240 -rect 64090 -400 64146 240 -rect 64681 -400 64737 240 -rect 65272 -400 65328 240 -rect 65863 -400 65919 240 -rect 66454 -400 66510 240 -rect 67045 -400 67101 240 -rect 67636 -400 67692 240 -rect 68227 -400 68283 240 -rect 68818 -400 68874 240 -rect 69409 -400 69465 240 -rect 70000 -400 70056 240 -rect 70591 -400 70647 240 -rect 71182 -400 71238 240 -rect 71773 -400 71829 240 -rect 72364 -400 72420 240 -rect 72955 -400 73011 240 -rect 73546 -400 73602 240 -rect 74137 -400 74193 240 -rect 74728 -400 74784 240 -rect 75319 -400 75375 240 -rect 75910 -400 75966 240 -rect 76501 -400 76557 240 -rect 77092 -400 77148 240 -rect 77683 -400 77739 240 -rect 78274 -400 78330 240 -rect 78865 -400 78921 240 -rect 79456 -400 79512 240 -rect 80047 -400 80103 240 -rect 80638 -400 80694 240 -rect 81229 -400 81285 240 -rect 81820 -400 81876 240 -rect 82411 -400 82467 240 -rect 83002 -400 83058 240 -rect 83593 -400 83649 240 -rect 84184 -400 84240 240 -rect 84775 -400 84831 240 -rect 85366 -400 85422 240 -rect 85957 -400 86013 240 -rect 86548 -400 86604 240 -rect 87139 -400 87195 240 -rect 87730 -400 87786 240 -rect 88321 -400 88377 240 -rect 88912 -400 88968 240 -rect 89503 -400 89559 240 -rect 90094 -400 90150 240 -rect 90685 -400 90741 240 -rect 91276 -400 91332 240 -rect 91867 -400 91923 240 -rect 92458 -400 92514 240 -rect 93049 -400 93105 240 -rect 93640 -400 93696 240 -rect 94231 -400 94287 240 -rect 94822 -400 94878 240 -rect 95413 -400 95469 240 -rect 96004 -400 96060 240 -rect 96595 -400 96651 240 -rect 97186 -400 97242 240 -rect 97777 -400 97833 240 -rect 98368 -400 98424 240 -rect 98959 -400 99015 240 -rect 99550 -400 99606 240 -rect 100141 -400 100197 240 -rect 100732 -400 100788 240 -rect 101323 -400 101379 240 -rect 101914 -400 101970 240 -rect 102505 -400 102561 240 -rect 103096 -400 103152 240 -rect 103687 -400 103743 240 -rect 104278 -400 104334 240 -rect 104869 -400 104925 240 -rect 105460 -400 105516 240 -rect 106051 -400 106107 240 -rect 106642 -400 106698 240 -rect 107233 -400 107289 240 -rect 107824 -400 107880 240 -rect 108415 -400 108471 240 -rect 109006 -400 109062 240 -rect 109597 -400 109653 240 -rect 110188 -400 110244 240 -rect 110779 -400 110835 240 -rect 111370 -400 111426 240 -rect 111961 -400 112017 240 -rect 112552 -400 112608 240 -rect 113143 -400 113199 240 -rect 113734 -400 113790 240 -rect 114325 -400 114381 240 -rect 114916 -400 114972 240 -rect 115507 -400 115563 240 -rect 116098 -400 116154 240 -rect 116689 -400 116745 240 -rect 117280 -400 117336 240 -rect 117871 -400 117927 240 -rect 118462 -400 118518 240 -rect 119053 -400 119109 240 -rect 119644 -400 119700 240 -rect 120235 -400 120291 240 -rect 120826 -400 120882 240 -rect 121417 -400 121473 240 -rect 122008 -400 122064 240 -rect 122599 -400 122655 240 -rect 123190 -400 123246 240 -rect 123781 -400 123837 240 -rect 124372 -400 124428 240 -rect 124963 -400 125019 240 -rect 125554 -400 125610 240 -rect 126145 -400 126201 240 -rect 126736 -400 126792 240 -rect 127327 -400 127383 240 -rect 127918 -400 127974 240 -rect 128509 -400 128565 240 -rect 129100 -400 129156 240 -rect 129691 -400 129747 240 -rect 130282 -400 130338 240 -rect 130873 -400 130929 240 -rect 131464 -400 131520 240 -rect 132055 -400 132111 240 -rect 132646 -400 132702 240 -rect 133237 -400 133293 240 -rect 133828 -400 133884 240 -rect 134419 -400 134475 240 -rect 135010 -400 135066 240 -rect 135601 -400 135657 240 -rect 136192 -400 136248 240 -rect 136783 -400 136839 240 -rect 137374 -400 137430 240 -rect 137965 -400 138021 240 -rect 138556 -400 138612 240 -rect 139147 -400 139203 240 -rect 139738 -400 139794 240 -rect 140329 -400 140385 240 -rect 140920 -400 140976 240 -rect 141511 -400 141567 240 -rect 142102 -400 142158 240 -rect 142693 -400 142749 240 -rect 143284 -400 143340 240 -rect 143875 -400 143931 240 -rect 144466 -400 144522 240 -rect 145057 -400 145113 240 -rect 145648 -400 145704 240 -rect 146239 -400 146295 240 -rect 146830 -400 146886 240 -rect 147421 -400 147477 240 -rect 148012 -400 148068 240 -rect 148603 -400 148659 240 -rect 149194 -400 149250 240 -rect 149785 -400 149841 240 -rect 150376 -400 150432 240 -rect 150967 -400 151023 240 -rect 151558 -400 151614 240 -rect 152149 -400 152205 240 -rect 152740 -400 152796 240 -rect 153331 -400 153387 240 -rect 153922 -400 153978 240 -rect 154513 -400 154569 240 -rect 155104 -400 155160 240 -rect 155695 -400 155751 240 -rect 156286 -400 156342 240 -rect 156877 -400 156933 240 -rect 157468 -400 157524 240 -rect 158059 -400 158115 240 -rect 158650 -400 158706 240 -rect 159241 -400 159297 240 -rect 159832 -400 159888 240 -rect 160423 -400 160479 240 -rect 161014 -400 161070 240 -rect 161605 -400 161661 240 -rect 162196 -400 162252 240 -rect 162787 -400 162843 240 -rect 163378 -400 163434 240 -rect 163969 -400 164025 240 -rect 164560 -400 164616 240 -rect 165151 -400 165207 240 -rect 165742 -400 165798 240 -rect 166333 -400 166389 240 -rect 166924 -400 166980 240 -rect 167515 -400 167571 240 -rect 168106 -400 168162 240 -rect 168697 -400 168753 240 -rect 169288 -400 169344 240 -rect 169879 -400 169935 240 -rect 170470 -400 170526 240 -rect 171061 -400 171117 240 -rect 171652 -400 171708 240 -rect 172243 -400 172299 240 -rect 172834 -400 172890 240 -rect 173425 -400 173481 240 -rect 174016 -400 174072 240 -rect 174607 -400 174663 240 -rect 175198 -400 175254 240 -rect 175789 -400 175845 240 -rect 176380 -400 176436 240 -rect 176971 -400 177027 240 -rect 177562 -400 177618 240 -rect 178153 -400 178209 240 -rect 178744 -400 178800 240 -rect 179335 -400 179391 240 -rect 179926 -400 179982 240 -rect 180517 -400 180573 240 -rect 181108 -400 181164 240 -rect 181699 -400 181755 240 -rect 182290 -400 182346 240 -rect 182881 -400 182937 240 -rect 183472 -400 183528 240 -rect 184063 -400 184119 240 -rect 184654 -400 184710 240 -rect 185245 -400 185301 240 -rect 185836 -400 185892 240 -rect 186427 -400 186483 240 -rect 187018 -400 187074 240 -rect 187609 -400 187665 240 -rect 188200 -400 188256 240 -rect 188791 -400 188847 240 -rect 189382 -400 189438 240 -rect 189973 -400 190029 240 -rect 190564 -400 190620 240 -rect 191155 -400 191211 240 -rect 191746 -400 191802 240 -rect 192337 -400 192393 240 -rect 192928 -400 192984 240 -rect 193519 -400 193575 240 -rect 194110 -400 194166 240 -rect 194701 -400 194757 240 -rect 195292 -400 195348 240 -rect 195883 -400 195939 240 -rect 196474 -400 196530 240 -rect 197065 -400 197121 240 -rect 197656 -400 197712 240 -rect 198247 -400 198303 240 -rect 198838 -400 198894 240 -rect 199429 -400 199485 240 -rect 200020 -400 200076 240 -rect 200611 -400 200667 240 -rect 201202 -400 201258 240 -rect 201793 -400 201849 240 -rect 202384 -400 202440 240 -rect 202975 -400 203031 240 -rect 203566 -400 203622 240 -rect 204157 -400 204213 240 -rect 204748 -400 204804 240 -rect 205339 -400 205395 240 -rect 205930 -400 205986 240 -rect 206521 -400 206577 240 -rect 207112 -400 207168 240 -rect 207703 -400 207759 240 -rect 208294 -400 208350 240 -rect 208885 -400 208941 240 -rect 209476 -400 209532 240 -rect 210067 -400 210123 240 -rect 210658 -400 210714 240 -rect 211249 -400 211305 240 -rect 211840 -400 211896 240 -rect 212431 -400 212487 240 -rect 213022 -400 213078 240 -rect 213613 -400 213669 240 -rect 214204 -400 214260 240 -rect 214795 -400 214851 240 -rect 215386 -400 215442 240 -rect 215977 -400 216033 240 -rect 216568 -400 216624 240 -rect 217159 -400 217215 240 -rect 217750 -400 217806 240 -rect 218341 -400 218397 240 -rect 218932 -400 218988 240 -rect 219523 -400 219579 240 -rect 220114 -400 220170 240 -rect 220705 -400 220761 240 -rect 221296 -400 221352 240 -rect 221887 -400 221943 240 -rect 222478 -400 222534 240 -rect 223069 -400 223125 240 -rect 223660 -400 223716 240 -rect 224251 -400 224307 240 -rect 224842 -400 224898 240 -rect 225433 -400 225489 240 -rect 226024 -400 226080 240 -rect 226615 -400 226671 240 -rect 227206 -400 227262 240 -rect 227797 -400 227853 240 -rect 228388 -400 228444 240 -rect 228979 -400 229035 240 -rect 229570 -400 229626 240 -rect 230161 -400 230217 240 -rect 230752 -400 230808 240 -rect 231343 -400 231399 240 -rect 231934 -400 231990 240 -rect 232525 -400 232581 240 -rect 233116 -400 233172 240 -rect 233707 -400 233763 240 -rect 234298 -400 234354 240 -rect 234889 -400 234945 240 -rect 235480 -400 235536 240 -rect 236071 -400 236127 240 -rect 236662 -400 236718 240 -rect 237253 -400 237309 240 -rect 237844 -400 237900 240 -rect 238435 -400 238491 240 -rect 239026 -400 239082 240 -rect 239617 -400 239673 240 -rect 240208 -400 240264 240 -rect 240799 -400 240855 240 -rect 241390 -400 241446 240 -rect 241981 -400 242037 240 -rect 242572 -400 242628 240 -rect 243163 -400 243219 240 -rect 243754 -400 243810 240 -rect 244345 -400 244401 240 -rect 244936 -400 244992 240 -rect 245527 -400 245583 240 -rect 246118 -400 246174 240 -rect 246709 -400 246765 240 -rect 247300 -400 247356 240 -rect 247891 -400 247947 240 -rect 248482 -400 248538 240 -rect 249073 -400 249129 240 -rect 249664 -400 249720 240 -rect 250255 -400 250311 240 -rect 250846 -400 250902 240 -rect 251437 -400 251493 240 -rect 252028 -400 252084 240 -rect 252619 -400 252675 240 -rect 253210 -400 253266 240 -rect 253801 -400 253857 240 -rect 254392 -400 254448 240 -rect 254983 -400 255039 240 -rect 255574 -400 255630 240 -rect 256165 -400 256221 240 -rect 256756 -400 256812 240 -rect 257347 -400 257403 240 -rect 257938 -400 257994 240 -rect 258529 -400 258585 240 -rect 259120 -400 259176 240 -rect 259711 -400 259767 240 -rect 260302 -400 260358 240 -rect 260893 -400 260949 240 -rect 261484 -400 261540 240 -rect 262075 -400 262131 240 -rect 262666 -400 262722 240 -rect 263257 -400 263313 240 -rect 263848 -400 263904 240 -rect 264439 -400 264495 240 -rect 265030 -400 265086 240 -rect 265621 -400 265677 240 -rect 266212 -400 266268 240 -rect 266803 -400 266859 240 -rect 267394 -400 267450 240 -rect 267985 -400 268041 240 -rect 268576 -400 268632 240 -rect 269167 -400 269223 240 -rect 269758 -400 269814 240 -rect 270349 -400 270405 240 -rect 270940 -400 270996 240 -rect 271531 -400 271587 240 -rect 272122 -400 272178 240 -rect 272713 -400 272769 240 -rect 273304 -400 273360 240 -rect 273895 -400 273951 240 -rect 274486 -400 274542 240 -rect 275077 -400 275133 240 -rect 275668 -400 275724 240 -rect 276259 -400 276315 240 -rect 276850 -400 276906 240 -rect 277441 -400 277497 240 -rect 278032 -400 278088 240 -rect 278623 -400 278679 240 -rect 279214 -400 279270 240 -rect 279805 -400 279861 240 -rect 280396 -400 280452 240 -rect 280987 -400 281043 240 -rect 281578 -400 281634 240 -rect 282169 -400 282225 240 -rect 282760 -400 282816 240 -rect 283351 -400 283407 240 -rect 283942 -400 283998 240 -rect 284533 -400 284589 240 -rect 285124 -400 285180 240 -rect 285715 -400 285771 240 -rect 286306 -400 286362 240 -rect 286897 -400 286953 240 -rect 287488 -400 287544 240 -rect 288079 -400 288135 240 -rect 288670 -400 288726 240 -rect 289261 -400 289317 240 -rect 289852 -400 289908 240 -rect 290443 -400 290499 240 -rect 291034 -400 291090 240 -rect 291625 -400 291681 240 +rect 357470 629399 359442 629457 +rect 357470 628057 357538 629399 +rect 359388 628057 359442 629399 +rect 357470 627990 359442 628057 +rect 524 -800 636 480 +rect 1706 -800 1818 480 +rect 2888 -800 3000 480 +rect 4070 -800 4182 480 +rect 5252 -800 5364 480 +rect 6434 -800 6546 480 +rect 7616 -800 7728 480 +rect 8798 -800 8910 480 +rect 9980 -800 10092 480 +rect 11162 -800 11274 480 +rect 12344 -800 12456 480 +rect 13526 -800 13638 480 +rect 14708 -800 14820 480 +rect 15890 -800 16002 480 +rect 17072 -800 17184 480 +rect 18254 -800 18366 480 +rect 19436 -800 19548 480 +rect 20618 -800 20730 480 +rect 21800 -800 21912 480 +rect 22982 -800 23094 480 +rect 24164 -800 24276 480 +rect 25346 -800 25458 480 +rect 26528 -800 26640 480 +rect 27710 -800 27822 480 +rect 28892 -800 29004 480 +rect 30074 -800 30186 480 +rect 31256 -800 31368 480 +rect 32438 -800 32550 480 +rect 33620 -800 33732 480 +rect 34802 -800 34914 480 +rect 35984 -800 36096 480 +rect 37166 -800 37278 480 +rect 38348 -800 38460 480 +rect 39530 -800 39642 480 +rect 40712 -800 40824 480 +rect 41894 -800 42006 480 +rect 43076 -800 43188 480 +rect 44258 -800 44370 480 +rect 45440 -800 45552 480 +rect 46622 -800 46734 480 +rect 47804 -800 47916 480 +rect 48986 -800 49098 480 +rect 50168 -800 50280 480 +rect 51350 -800 51462 480 +rect 52532 -800 52644 480 +rect 53714 -800 53826 480 +rect 54896 -800 55008 480 +rect 56078 -800 56190 480 +rect 57260 -800 57372 480 +rect 58442 -800 58554 480 +rect 59624 -800 59736 480 +rect 60806 -800 60918 480 +rect 61988 -800 62100 480 +rect 63170 -800 63282 480 +rect 64352 -800 64464 480 +rect 65534 -800 65646 480 +rect 66716 -800 66828 480 +rect 67898 -800 68010 480 +rect 69080 -800 69192 480 +rect 70262 -800 70374 480 +rect 71444 -800 71556 480 +rect 72626 -800 72738 480 +rect 73808 -800 73920 480 +rect 74990 -800 75102 480 +rect 76172 -800 76284 480 +rect 77354 -800 77466 480 +rect 78536 -800 78648 480 +rect 79718 -800 79830 480 +rect 80900 -800 81012 480 +rect 82082 -800 82194 480 +rect 83264 -800 83376 480 +rect 84446 -800 84558 480 +rect 85628 -800 85740 480 +rect 86810 -800 86922 480 +rect 87992 -800 88104 480 +rect 89174 -800 89286 480 +rect 90356 -800 90468 480 +rect 91538 -800 91650 480 +rect 92720 -800 92832 480 +rect 93902 -800 94014 480 +rect 95084 -800 95196 480 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136566 480 +rect 137636 -800 137748 480 +rect 138818 -800 138930 480 +rect 140000 -800 140112 480 +rect 141182 -800 141294 480 +rect 142364 -800 142476 480 +rect 143546 -800 143658 480 +rect 144728 -800 144840 480 +rect 145910 -800 146022 480 +rect 147092 -800 147204 480 +rect 148274 -800 148386 480 +rect 149456 -800 149568 480 +rect 150638 -800 150750 480 +rect 151820 -800 151932 480 +rect 153002 -800 153114 480 +rect 154184 -800 154296 480 +rect 155366 -800 155478 480 +rect 156548 -800 156660 480 +rect 157730 -800 157842 480 +rect 158912 -800 159024 480 +rect 160094 -800 160206 480 +rect 161276 -800 161388 480 +rect 162458 -800 162570 480 +rect 163640 -800 163752 480 +rect 164822 -800 164934 480 +rect 166004 -800 166116 480 +rect 167186 -800 167298 480 +rect 168368 -800 168480 480 +rect 169550 -800 169662 480 +rect 170732 -800 170844 480 +rect 171914 -800 172026 480 +rect 173096 -800 173208 480 +rect 174278 -800 174390 480 +rect 175460 -800 175572 480 +rect 176642 -800 176754 480 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-800 218124 480 +rect 219194 -800 219306 480 +rect 220376 -800 220488 480 +rect 221558 -800 221670 480 +rect 222740 -800 222852 480 +rect 223922 -800 224034 480 +rect 225104 -800 225216 480 +rect 226286 -800 226398 480 +rect 227468 -800 227580 480 +rect 228650 -800 228762 480 +rect 229832 -800 229944 480 +rect 231014 -800 231126 480 +rect 232196 -800 232308 480 +rect 233378 -800 233490 480 +rect 234560 -800 234672 480 +rect 235742 -800 235854 480 +rect 236924 -800 237036 480 +rect 238106 -800 238218 480 +rect 239288 -800 239400 480 +rect 240470 -800 240582 480 +rect 241652 -800 241764 480 +rect 242834 -800 242946 480 +rect 244016 -800 244128 480 +rect 245198 -800 245310 480 +rect 246380 -800 246492 480 +rect 247562 -800 247674 480 +rect 248744 -800 248856 480 +rect 249926 -800 250038 480 +rect 251108 -800 251220 480 +rect 252290 -800 252402 480 +rect 253472 -800 253584 480 +rect 254654 -800 254766 480 +rect 255836 -800 255948 480 +rect 257018 -800 257130 480 +rect 258200 -800 258312 480 +rect 259382 -800 259494 480 +rect 260564 -800 260676 480 +rect 261746 -800 261858 480 +rect 262928 -800 263040 480 +rect 264110 -800 264222 480 +rect 265292 -800 265404 480 +rect 266474 -800 266586 480 +rect 267656 -800 267768 480 +rect 268838 -800 268950 480 +rect 270020 -800 270132 480 +rect 271202 -800 271314 480 +rect 272384 -800 272496 480 +rect 273566 -800 273678 480 +rect 274748 -800 274860 480 +rect 275930 -800 276042 480 +rect 277112 -800 277224 480 +rect 278294 -800 278406 480 +rect 279476 -800 279588 480 +rect 280658 -800 280770 480 +rect 281840 -800 281952 480 +rect 283022 -800 283134 480 +rect 284204 -800 284316 480 +rect 285386 -800 285498 480 +rect 286568 -800 286680 480 +rect 287750 -800 287862 480 +rect 288932 -800 289044 480 +rect 290114 -800 290226 480 +rect 291296 -800 291408 480 +rect 292478 -800 292590 480 +rect 293660 -800 293772 480 +rect 294842 -800 294954 480 +rect 296024 -800 296136 480 +rect 297206 -800 297318 480 +rect 298388 -800 298500 480 +rect 299570 -800 299682 480 +rect 300752 -800 300864 480 +rect 301934 -800 302046 480 +rect 303116 -800 303228 480 +rect 304298 -800 304410 480 +rect 305480 -800 305592 480 +rect 306662 -800 306774 480 +rect 307844 -800 307956 480 +rect 309026 -800 309138 480 +rect 310208 -800 310320 480 +rect 311390 -800 311502 480 +rect 312572 -800 312684 480 +rect 313754 -800 313866 480 +rect 314936 -800 315048 480 +rect 316118 -800 316230 480 +rect 317300 -800 317412 480 +rect 318482 -800 318594 480 +rect 319664 -800 319776 480 +rect 320846 -800 320958 480 +rect 322028 -800 322140 480 +rect 323210 -800 323322 480 +rect 324392 -800 324504 480 +rect 325574 -800 325686 480 +rect 326756 -800 326868 480 +rect 327938 -800 328050 480 +rect 329120 -800 329232 480 +rect 330302 -800 330414 480 +rect 331484 -800 331596 480 +rect 332666 -800 332778 480 +rect 333848 -800 333960 480 +rect 335030 -800 335142 480 +rect 336212 -800 336324 480 +rect 337394 -800 337506 480 +rect 338576 -800 338688 480 +rect 339758 -800 339870 480 +rect 340940 -800 341052 480 +rect 342122 -800 342234 480 +rect 343304 -800 343416 480 +rect 344486 -800 344598 480 +rect 345668 -800 345780 480 +rect 346850 -800 346962 480 +rect 348032 -800 348144 480 +rect 349214 -800 349326 480 +rect 350396 -800 350508 480 +rect 351578 -800 351690 480 +rect 352760 -800 352872 480 +rect 353942 -800 354054 480 +rect 355124 -800 355236 480 +rect 356306 -800 356418 480 +rect 357488 -800 357600 480 +rect 358670 -800 358782 480 +rect 359852 -800 359964 480 +rect 361034 -800 361146 480 +rect 362216 -800 362328 480 +rect 363398 -800 363510 480 +rect 364580 -800 364692 480 +rect 365762 -800 365874 480 +rect 366944 -800 367056 480 +rect 368126 -800 368238 480 +rect 369308 -800 369420 480 +rect 370490 -800 370602 480 +rect 371672 -800 371784 480 +rect 372854 -800 372966 480 +rect 374036 -800 374148 480 +rect 375218 -800 375330 480 +rect 376400 -800 376512 480 +rect 377582 -800 377694 480 +rect 378764 -800 378876 480 +rect 379946 -800 380058 480 +rect 381128 -800 381240 480 +rect 382310 -800 382422 480 +rect 383492 -800 383604 480 +rect 384674 -800 384786 480 +rect 385856 -800 385968 480 +rect 387038 -800 387150 480 +rect 388220 -800 388332 480 +rect 389402 -800 389514 480 +rect 390584 -800 390696 480 +rect 391766 -800 391878 480 +rect 392948 -800 393060 480 +rect 394130 -800 394242 480 +rect 395312 -800 395424 480 +rect 396494 -800 396606 480 +rect 397676 -800 397788 480 +rect 398858 -800 398970 480 +rect 400040 -800 400152 480 +rect 401222 -800 401334 480 +rect 402404 -800 402516 480 +rect 403586 -800 403698 480 +rect 404768 -800 404880 480 +rect 405950 -800 406062 480 +rect 407132 -800 407244 480 +rect 408314 -800 408426 480 +rect 409496 -800 409608 480 +rect 410678 -800 410790 480 +rect 411860 -800 411972 480 +rect 413042 -800 413154 480 +rect 414224 -800 414336 480 +rect 415406 -800 415518 480 +rect 416588 -800 416700 480 +rect 417770 -800 417882 480 +rect 418952 -800 419064 480 +rect 420134 -800 420246 480 +rect 421316 -800 421428 480 +rect 422498 -800 422610 480 +rect 423680 -800 423792 480 +rect 424862 -800 424974 480 +rect 426044 -800 426156 480 +rect 427226 -800 427338 480 +rect 428408 -800 428520 480 +rect 429590 -800 429702 480 +rect 430772 -800 430884 480 +rect 431954 -800 432066 480 +rect 433136 -800 433248 480 +rect 434318 -800 434430 480 +rect 435500 -800 435612 480 +rect 436682 -800 436794 480 +rect 437864 -800 437976 480 +rect 439046 -800 439158 480 +rect 440228 -800 440340 480 +rect 441410 -800 441522 480 +rect 442592 -800 442704 480 +rect 443774 -800 443886 480 +rect 444956 -800 445068 480 +rect 446138 -800 446250 480 +rect 447320 -800 447432 480 +rect 448502 -800 448614 480 +rect 449684 -800 449796 480 +rect 450866 -800 450978 480 +rect 452048 -800 452160 480 +rect 453230 -800 453342 480 +rect 454412 -800 454524 480 +rect 455594 -800 455706 480 +rect 456776 -800 456888 480 +rect 457958 -800 458070 480 +rect 459140 -800 459252 480 +rect 460322 -800 460434 480 +rect 461504 -800 461616 480 +rect 462686 -800 462798 480 +rect 463868 -800 463980 480 +rect 465050 -800 465162 480 +rect 466232 -800 466344 480 +rect 467414 -800 467526 480 +rect 468596 -800 468708 480 +rect 469778 -800 469890 480 +rect 470960 -800 471072 480 +rect 472142 -800 472254 480 +rect 473324 -800 473436 480 +rect 474506 -800 474618 480 +rect 475688 -800 475800 480 +rect 476870 -800 476982 480 +rect 478052 -800 478164 480 +rect 479234 -800 479346 480 +rect 480416 -800 480528 480 +rect 481598 -800 481710 480 +rect 482780 -800 482892 480 +rect 483962 -800 484074 480 +rect 485144 -800 485256 480 +rect 486326 -800 486438 480 +rect 487508 -800 487620 480 +rect 488690 -800 488802 480 +rect 489872 -800 489984 480 +rect 491054 -800 491166 480 +rect 492236 -800 492348 480 +rect 493418 -800 493530 480 +rect 494600 -800 494712 480 +rect 495782 -800 495894 480 +rect 496964 -800 497076 480 +rect 498146 -800 498258 480 +rect 499328 -800 499440 480 +rect 500510 -800 500622 480 +rect 501692 -800 501804 480 +rect 502874 -800 502986 480 +rect 504056 -800 504168 480 +rect 505238 -800 505350 480 +rect 506420 -800 506532 480 +rect 507602 -800 507714 480 +rect 508784 -800 508896 480 +rect 509966 -800 510078 480 +rect 511148 -800 511260 480 +rect 512330 -800 512442 480 +rect 513512 -800 513624 480 +rect 514694 -800 514806 480 +rect 515876 -800 515988 480 +rect 517058 -800 517170 480 +rect 518240 -800 518352 480 +rect 519422 -800 519534 480 +rect 520604 -800 520716 480 +rect 521786 -800 521898 480 +rect 522968 -800 523080 480 +rect 524150 -800 524262 480 +rect 525332 -800 525444 480 +rect 526514 -800 526626 480 +rect 527696 -800 527808 480 +rect 528878 -800 528990 480 +rect 530060 -800 530172 480 +rect 531242 -800 531354 480 +rect 532424 -800 532536 480 +rect 533606 -800 533718 480 +rect 534788 -800 534900 480 +rect 535970 -800 536082 480 +rect 537152 -800 537264 480 +rect 538334 -800 538446 480 +rect 539516 -800 539628 480 +rect 540698 -800 540810 480 +rect 541880 -800 541992 480 +rect 543062 -800 543174 480 +rect 544244 -800 544356 480 +rect 545426 -800 545538 480 +rect 546608 -800 546720 480 +rect 547790 -800 547902 480 +rect 548972 -800 549084 480 +rect 550154 -800 550266 480 +rect 551336 -800 551448 480 +rect 552518 -800 552630 480 +rect 553700 -800 553812 480 +rect 554882 -800 554994 480 +rect 556064 -800 556176 480 +rect 557246 -800 557358 480 +rect 558428 -800 558540 480 +rect 559610 -800 559722 480 +rect 560792 -800 560904 480 +rect 561974 -800 562086 480 +rect 563156 -800 563268 480 +rect 564338 -800 564450 480 +rect 565520 -800 565632 480 +rect 566702 -800 566814 480 +rect 567884 -800 567996 480 +rect 569066 -800 569178 480 +rect 570248 -800 570360 480 +rect 571430 -800 571542 480 +rect 572612 -800 572724 480 +rect 573794 -800 573906 480 +rect 574976 -800 575088 480 +rect 576158 -800 576270 480 +rect 577340 -800 577452 480 +rect 578522 -800 578634 480 +rect 579704 -800 579816 480 +rect 580886 -800 580998 480 +rect 582068 -800 582180 480 +rect 583250 -800 583362 480 +<< via2 >> +rect 357538 628057 359388 629399 << metal3 >> -rect 8097 351150 10597 352400 -rect 34097 351150 36597 352400 -rect 60097 351150 62597 352400 -rect 82797 351150 85297 352400 -rect 85447 351150 86547 352400 -rect 86697 351150 87797 352400 -rect 87947 351150 90447 352400 -rect 108647 351150 111147 352400 -rect 111297 351150 112397 352400 -rect 112547 351150 113647 352400 -rect 113797 351150 116297 352400 -rect 159497 351150 161997 352400 -rect 162147 351150 163247 352400 -rect 163397 351150 164497 352400 -rect 164647 351150 167147 352400 -rect 206697 351150 209197 352400 -rect 232697 351150 235197 352400 -rect 255297 351170 257697 352400 -rect 260297 351170 262697 352400 -rect 283297 351150 285797 352400 -rect -400 340121 850 342621 -rect 291150 338992 292400 341492 -rect -400 321921 830 324321 -rect 291170 319892 292400 322292 -rect -400 316921 830 319321 -rect 291170 314892 292400 317292 -rect 291760 294736 292400 294792 -rect 291760 294145 292400 294201 -rect 291760 293554 292400 293610 -rect 291760 292963 292400 293019 -rect 291760 292372 292400 292428 -rect 291760 291781 292400 291837 -rect -400 279721 830 282121 -rect -400 274721 830 277121 -rect 291170 275281 292400 277681 -rect 291170 270281 292400 272681 -rect -400 255765 240 255821 -rect -400 255174 240 255230 -rect -400 254583 240 254639 -rect -400 253992 240 254048 -rect -400 253401 240 253457 -rect -400 252810 240 252866 -rect 291760 250025 292400 250081 -rect 291760 249434 292400 249490 -rect 291760 248843 292400 248899 -rect 291760 248252 292400 248308 -rect 291760 247661 292400 247717 -rect 291760 247070 292400 247126 -rect -400 234154 240 234210 -rect -400 233563 240 233619 -rect -400 232972 240 233028 -rect -400 232381 240 232437 -rect -400 231790 240 231846 -rect -400 231199 240 231255 -rect 291760 227814 292400 227870 -rect 291760 227223 292400 227279 -rect 291760 226632 292400 226688 -rect 291760 226041 292400 226097 -rect 291760 225450 292400 225506 -rect 291760 224859 292400 224915 -rect -400 212543 240 212599 -rect -400 211952 240 212008 -rect -400 211361 240 211417 -rect -400 210770 240 210826 -rect -400 210179 240 210235 -rect -400 209588 240 209644 -rect 291760 205603 292400 205659 -rect 291760 205012 292400 205068 -rect 291760 204421 292400 204477 -rect 291760 203830 292400 203886 -rect 291760 203239 292400 203295 -rect 291760 202648 292400 202704 -rect -400 190932 240 190988 -rect -400 190341 240 190397 -rect -400 189750 240 189806 -rect -400 189159 240 189215 -rect -400 188568 240 188624 -rect -400 187977 240 188033 -rect 291760 182392 292400 182448 -rect 291760 181801 292400 181857 -rect 291760 181210 292400 181266 -rect 291760 180619 292400 180675 -rect 291760 180028 292400 180084 -rect 291760 179437 292400 179493 -rect -400 169321 240 169377 -rect -400 168730 240 168786 -rect -400 168139 240 168195 -rect -400 167548 240 167604 -rect -400 166957 240 167013 -rect -400 166366 240 166422 -rect 291760 159781 292400 159837 -rect 291760 159190 292400 159246 -rect 291760 158599 292400 158655 -rect 291760 158008 292400 158064 -rect 291760 157417 292400 157473 -rect 291760 156826 292400 156882 -rect -400 147710 240 147766 -rect -400 147119 240 147175 -rect -400 146528 240 146584 -rect -400 145937 240 145993 -rect -400 145346 240 145402 -rect -400 144755 240 144811 -rect 291760 137570 292400 137626 -rect 291760 136979 292400 137035 -rect 291760 136388 292400 136444 -rect 291760 135797 292400 135853 -rect 291760 135206 292400 135262 -rect 291760 134615 292400 134671 -rect -400 126199 240 126255 -rect -400 125608 240 125664 -rect -400 125017 240 125073 -rect -400 124426 240 124482 -rect -400 123835 240 123891 -rect -400 123244 240 123300 -rect 291170 117615 292400 120015 -rect 291170 112615 292400 115015 -rect -400 107444 830 109844 -rect -400 102444 830 104844 -rect 291170 95715 292400 98115 -rect 291170 90715 292400 93115 -rect -400 86444 830 88844 -rect -400 81444 830 83844 -rect 291170 73415 292400 75815 -rect 291170 68415 292400 70815 -rect -400 62388 240 62444 -rect -400 61797 240 61853 -rect -400 61206 240 61262 -rect -400 60615 240 60671 -rect -400 60024 240 60080 -rect -400 59433 240 59489 -rect 291760 47559 292400 47615 -rect 291760 46968 292400 47024 -rect 291760 46377 292400 46433 -rect 291760 45786 292400 45842 -rect -400 40777 240 40833 -rect -400 40186 240 40242 -rect -400 39595 240 39651 -rect -400 39004 240 39060 -rect -400 38413 240 38469 -rect -400 37822 240 37878 -rect 291760 25230 292400 25286 -rect 291760 24639 292400 24695 -rect 291760 24048 292400 24104 -rect 291760 23457 292400 23513 -rect -400 19166 240 19222 -rect -400 18575 240 18631 -rect -400 17984 240 18040 -rect -400 17393 240 17449 -rect -400 16802 240 16858 -rect -400 16211 240 16267 -rect 291760 12001 292400 12057 -rect 291760 11410 292400 11466 -rect 291760 10819 292400 10875 -rect 291760 10228 292400 10284 -rect 291760 9637 292400 9693 -rect 291760 9046 292400 9102 -rect -400 8455 240 8511 -rect 291760 8455 292400 8511 -rect -400 7864 240 7920 -rect 291760 7864 292400 7920 -rect -400 7273 240 7329 -rect 291760 7273 292400 7329 -rect -400 6682 240 6738 -rect 291760 6682 292400 6738 -rect -400 6091 240 6147 -rect 291760 6091 292400 6147 -rect -400 5500 240 5556 -rect 291760 5500 292400 5556 -rect -400 4909 240 4965 -rect 291760 4909 292400 4965 -rect -400 4318 240 4374 -rect 291760 4318 292400 4374 -rect -400 3727 240 3783 -rect 291760 3727 292400 3783 -rect -400 3136 240 3192 -rect 291760 3136 292400 3192 -rect -400 2545 240 2601 -rect 291760 2545 292400 2601 -rect -400 1954 240 2010 -rect 291760 1954 292400 2010 -rect -400 1363 240 1419 -rect 291760 1363 292400 1419 -rect -400 772 240 828 -rect 291760 772 292400 828 +rect 16194 702300 21194 704800 +rect 68194 702300 73194 704800 +rect 120194 702300 125194 704800 +rect 165594 702300 170594 704800 +rect 170894 690603 173094 704800 +rect -800 680242 1700 685242 +rect 170894 683764 173094 684327 +rect 173394 690603 175594 704800 +rect 175894 702300 180894 704800 +rect 217294 702300 222294 704800 +rect 173394 683764 175594 684327 +rect 222594 690636 224794 704800 +rect 222594 683913 224794 684360 +rect 225094 690636 227294 704800 +rect 227594 702300 232594 704800 +rect 225094 683913 227294 684360 +rect 318994 649497 323994 704800 +rect 324294 690618 326494 704800 +rect 326794 694292 328994 704800 +rect 329294 694292 334294 704800 +rect 413394 702300 418394 704800 +rect 465394 702300 470394 704800 +rect 326794 692092 334294 694292 +rect 324294 684038 326494 684344 +rect -800 643842 1660 648642 +rect 318994 642983 323994 643740 +rect 329294 649497 334294 692092 +rect 329294 642983 334294 643740 +rect 510594 690564 515394 704800 +rect -800 633842 1660 638642 +rect 510594 637598 515394 684332 +rect 510594 631116 515394 631780 +rect 520594 690564 525394 704800 +rect 566594 702300 571594 704800 +rect 520594 637598 525394 684332 +rect 582300 677984 584800 682984 +rect 560050 639784 560566 644584 +rect 566742 639784 584800 644584 +rect 520594 631116 525394 631780 +rect 560050 629784 560566 634584 +rect 566742 629784 584800 634584 +rect 357470 629399 359442 629457 +rect 357470 628057 357538 629399 +rect 359388 628057 359442 629399 +rect 357470 627990 359442 628057 +rect 339960 620294 345660 620363 +rect 371099 620302 533609 620371 +rect -800 559442 1660 564242 +rect -800 549442 1660 554242 +rect 339960 511642 340072 620294 +rect 341733 619574 341739 619684 +rect 341849 619637 341855 619684 +rect 533089 619645 533095 619647 +rect 341849 619577 345660 619637 +rect 371099 619585 533095 619645 +rect 533089 619583 533095 619585 +rect 533159 619583 533165 619647 +rect 341849 619574 341855 619577 +rect 533105 619280 533111 619282 +rect -800 511530 340072 511642 +rect 340967 619212 345660 619272 +rect 371099 619220 533111 619280 +rect 533105 619218 533111 619220 +rect 533175 619218 533181 619282 +rect -800 510348 480 510460 +rect -800 509166 480 509278 +rect -800 507984 480 508096 +rect -800 506802 480 506914 +rect -800 505620 480 505732 +rect -800 468308 480 468420 +rect -800 467126 480 467238 +rect -800 465944 480 466056 +rect -800 464762 480 464874 +rect 340967 463692 341079 619212 +rect -800 463580 341079 463692 +rect 341738 618632 341850 618638 +rect -800 462398 13894 462510 +rect 17564 462398 17711 462510 +rect -800 425086 480 425198 +rect -800 423904 480 424016 +rect -800 422722 480 422834 +rect -800 421540 480 421652 +rect 341738 420470 341850 618520 +rect -800 420358 341850 420470 +rect -800 419176 13887 419288 +rect 17599 419176 17694 419288 +rect 533497 405408 533609 620302 +rect 533894 619647 533958 619653 +rect 533958 619585 539606 619645 +rect 533894 619577 533958 619583 +rect 533904 619282 533968 619288 +rect 533968 619220 537488 619280 +rect 533904 619212 533968 619218 +rect 537376 454558 537488 619220 +rect 539494 498980 539606 619585 +rect 583520 589472 584800 589584 +rect 583520 588290 584800 588402 +rect 583520 587108 584800 587220 +rect 583520 585926 584800 586038 +rect 583520 584744 584800 584856 +rect 583520 583562 584800 583674 +rect 555452 550562 556229 555362 +rect 562346 550562 584800 555362 +rect 555452 540562 556229 545362 +rect 562346 540562 584800 545362 +rect 573371 500050 573548 500162 +rect 576743 500050 584800 500162 +rect 539494 498868 584800 498980 +rect 583520 497686 584800 497798 +rect 583520 496504 584800 496616 +rect 583520 495322 584800 495434 +rect 583520 494140 584800 494252 +rect 573405 455628 573556 455740 +rect 576731 455628 584800 455740 +rect 537376 454446 584800 454558 +rect 583520 453264 584800 453376 +rect 583520 452082 584800 452194 +rect 583520 450900 584800 451012 +rect 583520 449718 584800 449830 +rect 583520 411206 584800 411318 +rect 583520 410024 584800 410136 +rect 583520 408842 584800 408954 +rect 583520 407660 584800 407772 +rect 583520 406478 584800 406590 +rect 533497 405296 584800 405408 +rect -800 381864 480 381976 +rect -800 380682 480 380794 +rect -800 379500 480 379612 +rect -800 378318 480 378430 +rect -800 377136 480 377248 +rect -800 375954 480 376066 +rect 583520 364784 584800 364896 +rect 583520 363602 584800 363714 +rect 583520 362420 584800 362532 +rect 583520 361238 584800 361350 +rect 583520 360056 584800 360168 +rect 583520 358874 584800 358986 +rect -800 338642 480 338754 +rect -800 337460 480 337572 +rect -800 336278 480 336390 +rect -800 335096 480 335208 +rect -800 333914 480 334026 +rect -800 332732 480 332844 +rect 583520 319562 584800 319674 +rect 583520 318380 584800 318492 +rect 583520 317198 584800 317310 +rect 583520 316016 584800 316128 +rect 583520 314834 584800 314946 +rect 583520 313652 584800 313764 +rect -800 295420 480 295532 +rect -800 294238 480 294350 +rect -800 293056 480 293168 +rect -800 291874 480 291986 +rect -800 290692 480 290804 +rect -800 289510 480 289622 +rect 583520 275140 584800 275252 +rect 583520 273958 584800 274070 +rect 583520 272776 584800 272888 +rect 583520 271594 584800 271706 +rect 583520 270412 584800 270524 +rect 583520 269230 584800 269342 +rect -800 252398 480 252510 +rect -800 251216 480 251328 +rect -800 250034 480 250146 +rect -800 248852 480 248964 +rect -800 247670 480 247782 +rect -800 246488 480 246600 +rect 582340 235230 584800 240030 +rect 582340 225230 584800 230030 +rect -800 214888 1660 219688 +rect -800 204888 1660 209688 +rect 13406 191430 13991 196230 +rect 17427 191430 573605 196230 +rect 576629 191430 584800 196230 +rect 582340 181430 584800 186230 +rect -800 172888 1660 177688 +rect -800 162888 1660 167688 +rect 582340 146830 584800 151630 +rect 582340 136830 584800 141630 +rect -800 124776 480 124888 +rect -800 123594 480 123706 +rect -800 122412 480 122524 +rect -800 121230 480 121342 +rect -800 120048 480 120160 +rect -800 118866 480 118978 +rect 583520 95118 584800 95230 +rect 583520 93936 584800 94048 +rect 583520 92754 584800 92866 +rect 583520 91572 584800 91684 +rect -800 81554 480 81666 +rect -800 80372 480 80484 +rect -800 79190 480 79302 +rect -800 78008 480 78120 +rect -800 76826 480 76938 +rect -800 75644 480 75756 +rect 583520 50460 584800 50572 +rect 583520 49278 584800 49390 +rect 583520 48096 584800 48208 +rect 583520 46914 584800 47026 +rect -800 38332 480 38444 +rect -800 37150 480 37262 +rect -800 35968 480 36080 +rect -800 34786 480 34898 +rect -800 33604 480 33716 +rect -800 32422 480 32534 +rect 583520 24002 584800 24114 +rect 583520 22820 584800 22932 +rect 583520 21638 584800 21750 +rect 583520 20456 584800 20568 +rect 583520 19274 584800 19386 +rect 583520 18092 584800 18204 +rect -800 16910 480 17022 +rect 583520 16910 584800 17022 +rect -800 15728 480 15840 +rect 583520 15728 584800 15840 +rect -800 14546 480 14658 +rect 583520 14546 584800 14658 +rect -800 13364 480 13476 +rect 583520 13364 584800 13476 +rect -800 12182 480 12294 +rect 583520 12182 584800 12294 +rect -800 11000 480 11112 +rect 583520 11000 584800 11112 +rect -800 9818 480 9930 +rect 583520 9818 584800 9930 +rect -800 8636 480 8748 +rect 583520 8636 584800 8748 +rect -800 7454 480 7566 +rect 583520 7454 584800 7566 +rect -800 6272 480 6384 +rect 583520 6272 584800 6384 +rect -800 5090 480 5202 +rect 583520 5090 584800 5202 +rect -800 3908 480 4020 +rect 583520 3908 584800 4020 +rect -800 2726 480 2838 +rect 583520 2726 584800 2838 +rect -800 1544 480 1656 +rect 583520 1544 584800 1656 +<< via3 >> +rect 170894 684327 173094 690603 +rect 173394 684327 175594 690603 +rect 222594 684360 224794 690636 +rect 225094 684360 227294 690636 +rect 324294 684344 326494 690618 +rect 318994 643740 323994 649497 +rect 329294 643740 334294 649497 +rect 510594 684332 515394 690564 +rect 510594 631780 515394 637598 +rect 520594 684332 525394 690564 +rect 560566 639784 566742 644584 +rect 520594 631780 525394 637598 +rect 560566 629784 566742 634584 +rect 357538 628057 359388 629399 +rect 341739 619574 341849 619684 +rect 533095 619583 533159 619647 +rect 533111 619218 533175 619282 +rect 341738 618520 341850 618632 +rect 13894 462398 17564 462510 +rect 13887 419176 17599 419288 +rect 533894 619583 533958 619647 +rect 533904 619218 533968 619282 +rect 556229 550562 562346 555362 +rect 556229 540562 562346 545362 +rect 573548 500050 576743 500162 +rect 573556 455628 576731 455740 +rect 13991 191430 17427 196230 +rect 573605 191430 576629 196230 +<< metal4 >> +rect 170628 690636 526162 690737 +rect 170628 690603 222594 690636 +rect 170628 684327 170894 690603 +rect 173094 684327 173394 690603 +rect 175594 684360 222594 690603 +rect 224794 684360 225094 690636 +rect 227294 690618 526162 690636 +rect 227294 684360 324294 690618 +rect 175594 684344 324294 684360 +rect 326494 690564 526162 690618 +rect 326494 684344 510594 690564 +rect 175594 684332 510594 684344 +rect 515394 684332 520594 690564 +rect 525394 684332 526162 690564 +rect 175594 684327 526162 684332 +rect 170628 684183 526162 684327 +rect 318330 649837 359973 649898 +rect 318330 649497 357559 649837 +rect 318330 643740 318994 649497 +rect 323994 643740 329294 649497 +rect 334294 643740 357559 649497 +rect 318330 643394 357559 643740 +rect 359314 643394 359973 649837 +rect 318330 643344 359973 643394 +rect 560425 644584 566979 644980 +rect 560425 639784 560566 644584 +rect 566742 639784 566979 644584 +rect 356144 637598 525696 637898 +rect 356144 631780 510594 637598 +rect 515394 631780 520594 637598 +rect 525394 631780 525696 637598 +rect 356144 631344 525696 631780 +rect 560425 634584 566979 639784 +rect 357442 629399 359470 631344 +rect 357442 628057 357538 629399 +rect 359388 628057 359470 629399 +rect 357442 619873 359470 628057 +rect 560425 629784 560566 634584 +rect 566742 629784 566979 634584 +rect 341738 619684 341850 619685 +rect 341738 619574 341739 619684 +rect 341849 619574 341850 619684 +rect 341738 618633 341850 619574 +rect 356867 619473 359885 619873 +rect 533094 619647 533160 619648 +rect 533094 619583 533095 619647 +rect 533159 619645 533160 619647 +rect 533893 619647 533959 619648 +rect 533893 619645 533894 619647 +rect 533159 619585 533894 619645 +rect 533159 619583 533160 619585 +rect 533094 619582 533160 619583 +rect 533893 619583 533894 619585 +rect 533958 619583 533959 619647 +rect 533893 619582 533959 619583 +rect 533110 619282 533176 619283 +rect 533110 619218 533111 619282 +rect 533175 619280 533176 619282 +rect 533903 619282 533969 619283 +rect 533903 619280 533904 619282 +rect 533175 619220 533904 619280 +rect 533175 619218 533176 619220 +rect 533110 619217 533176 619218 +rect 533903 619218 533904 619220 +rect 533968 619218 533969 619282 +rect 533903 619217 533969 619218 +rect 341737 618632 341851 618633 +rect 341737 618520 341738 618632 +rect 341850 618520 341851 618632 +rect 341737 618519 341851 618520 +rect 345773 613756 346828 618849 +rect 351928 617829 353757 618856 +rect 351928 615249 352028 617829 +rect 353603 615249 353757 617829 +rect 351928 615131 353757 615249 +rect 363328 617835 365157 618884 +rect 363328 615255 363412 617835 +rect 364987 615255 365157 617835 +rect 363328 615131 365157 615255 +rect 369823 613756 370980 618859 +rect 560425 613756 566979 629784 +rect 345256 607202 566979 613756 +rect 362658 601572 562613 601756 +rect 362658 597231 363414 601572 +rect 364992 597231 562613 601572 +rect 362658 595202 562613 597231 +rect 556059 555362 562613 595202 +rect 556059 550562 556229 555362 +rect 562346 550562 562613 555362 +rect 556059 545362 562613 550562 +rect 556059 540562 556229 545362 +rect 562346 540562 562613 545362 +rect 556059 540155 562613 540562 +rect 573464 500162 576816 500473 +rect 573464 500050 573548 500162 +rect 576743 500050 576816 500162 +rect 13814 462510 17684 462771 +rect 13814 462398 13894 462510 +rect 17564 462398 17684 462510 +rect 13814 419288 17684 462398 +rect 13814 419176 13887 419288 +rect 17599 419176 17684 419288 +rect 13814 227257 17684 419176 +rect 573464 455740 576816 500050 +rect 573464 455628 573556 455740 +rect 576731 455628 576816 455740 +rect 13811 196230 17688 227257 +rect 13811 191430 13991 196230 +rect 17427 191430 17688 196230 +rect 13811 191098 17688 191430 +rect 573464 196230 576816 455628 +rect 573464 191430 573605 196230 +rect 576629 191430 576816 196230 +rect 573464 191191 576816 191430 +<< via4 >> +rect 357559 643394 359314 649837 +rect 352028 615249 353603 617829 +rect 363412 615255 364987 617835 +rect 363414 597231 364992 601572 +<< metal5 >> +rect 357521 649837 359350 649991 +rect 357521 643394 357559 649837 +rect 359314 643394 359350 649837 +rect 351918 617829 353747 617929 +rect 351918 615249 352028 617829 +rect 353603 615249 353747 617829 +rect 351918 614900 353747 615249 +rect 357521 614900 359350 643394 +rect 351918 613071 359350 614900 +rect 363318 617835 365147 617929 +rect 363318 615255 363412 617835 +rect 364987 615255 365147 617835 +rect 363318 601572 365147 615255 +rect 363318 597231 363414 601572 +rect 364992 597231 365147 601572 +rect 363318 597052 365147 597231 << comment >> -rect -50 352000 292050 352050 -rect -50 0 0 352000 -rect 292000 0 292050 352000 -rect -50 -50 292050 0 -use layout_opamp layout_opamp_0 -timestamp 1633439465 -transform 1 0 239854 0 1 268250 -box -74654 -2309 51528 83228 +rect -100 704000 584100 704100 +rect -100 0 0 704000 +rect 584000 0 584100 704000 +rect -100 -100 584100 0 +use user_analog_proj_example user_analog_proj_example_0 +timestamp 1620310959 +transform 1 0 345668 0 -1 627114 +box -59 -22 25476 8324 << labels >> -flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0] +flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1120 0 0 0 gpio_analog[0] port 0 nsew signal bidirectional -flabel metal3 s -400 190932 240 190988 0 FreeSans 560 0 0 0 gpio_analog[10] +flabel metal3 s -800 381864 480 381976 0 FreeSans 1120 0 0 0 gpio_analog[10] port 1 nsew signal bidirectional -flabel metal3 s -400 169321 240 169377 0 FreeSans 560 0 0 0 gpio_analog[11] +flabel metal3 s -800 338642 480 338754 0 FreeSans 1120 0 0 0 gpio_analog[11] port 2 nsew signal bidirectional -flabel metal3 s -400 147710 240 147766 0 FreeSans 560 0 0 0 gpio_analog[12] +flabel metal3 s -800 295420 480 295532 0 FreeSans 1120 0 0 0 gpio_analog[12] port 3 nsew signal bidirectional -flabel metal3 s -400 126199 240 126255 0 FreeSans 560 0 0 0 gpio_analog[13] +flabel metal3 s -800 252398 480 252510 0 FreeSans 1120 0 0 0 gpio_analog[13] port 4 nsew signal bidirectional -flabel metal3 s -400 62388 240 62444 0 FreeSans 560 0 0 0 gpio_analog[14] +flabel metal3 s -800 124776 480 124888 0 FreeSans 1120 0 0 0 gpio_analog[14] port 5 nsew signal bidirectional -flabel metal3 s -400 40777 240 40833 0 FreeSans 560 0 0 0 gpio_analog[15] +flabel metal3 s -800 81554 480 81666 0 FreeSans 1120 0 0 0 gpio_analog[15] port 6 nsew signal bidirectional -flabel metal3 s -400 19166 240 19222 0 FreeSans 560 0 0 0 gpio_analog[16] +flabel metal3 s -800 38332 480 38444 0 FreeSans 1120 0 0 0 gpio_analog[16] port 7 nsew signal bidirectional -flabel metal3 s -400 8455 240 8511 0 FreeSans 560 0 0 0 gpio_analog[17] +flabel metal3 s -800 16910 480 17022 0 FreeSans 1120 0 0 0 gpio_analog[17] port 8 nsew signal bidirectional -flabel metal3 s 291760 156826 292400 156882 0 FreeSans 560 0 0 0 gpio_analog[1] +flabel metal3 s 583520 313652 584800 313764 0 FreeSans 1120 0 0 0 gpio_analog[1] port 9 nsew signal bidirectional -flabel metal3 s 291760 179437 292400 179493 0 FreeSans 560 0 0 0 gpio_analog[2] +flabel metal3 s 583520 358874 584800 358986 0 FreeSans 1120 0 0 0 gpio_analog[2] port 10 nsew signal bidirectional -flabel metal3 s 291760 202648 292400 202704 0 FreeSans 560 0 0 0 gpio_analog[3] +flabel metal3 s 583520 405296 584800 405408 0 FreeSans 1120 0 0 0 gpio_analog[3] port 11 nsew signal bidirectional -flabel metal3 s 291760 224859 292400 224915 0 FreeSans 560 0 0 0 gpio_analog[4] +flabel metal3 s 583520 449718 584800 449830 0 FreeSans 1120 0 0 0 gpio_analog[4] port 12 nsew signal bidirectional -flabel metal3 s 291760 247070 292400 247126 0 FreeSans 560 0 0 0 gpio_analog[5] +flabel metal3 s 583520 494140 584800 494252 0 FreeSans 1120 0 0 0 gpio_analog[5] port 13 nsew signal bidirectional -flabel metal3 s 291760 291781 292400 291837 0 FreeSans 560 0 0 0 gpio_analog[6] +flabel metal3 s 583520 583562 584800 583674 0 FreeSans 1120 0 0 0 gpio_analog[6] port 14 nsew signal bidirectional -flabel metal3 s -400 255765 240 255821 0 FreeSans 560 0 0 0 gpio_analog[7] +flabel metal3 s -800 511530 480 511642 0 FreeSans 1120 0 0 0 gpio_analog[7] port 15 nsew signal bidirectional -flabel metal3 s -400 234154 240 234210 0 FreeSans 560 0 0 0 gpio_analog[8] +flabel metal3 s -800 468308 480 468420 0 FreeSans 1120 0 0 0 gpio_analog[8] port 16 nsew signal bidirectional -flabel metal3 s -400 212543 240 212599 0 FreeSans 560 0 0 0 gpio_analog[9] +flabel metal3 s -800 425086 480 425198 0 FreeSans 1120 0 0 0 gpio_analog[9] port 17 nsew signal bidirectional -flabel metal3 s 291760 135206 292400 135262 0 FreeSans 560 0 0 0 gpio_noesd[0] +flabel metal3 s 583520 270412 584800 270524 0 FreeSans 1120 0 0 0 gpio_noesd[0] port 18 nsew signal bidirectional -flabel metal3 s -400 190341 240 190397 0 FreeSans 560 0 0 0 gpio_noesd[10] +flabel metal3 s -800 380682 480 380794 0 FreeSans 1120 0 0 0 gpio_noesd[10] port 19 nsew signal bidirectional -flabel metal3 s -400 168730 240 168786 0 FreeSans 560 0 0 0 gpio_noesd[11] +flabel metal3 s -800 337460 480 337572 0 FreeSans 1120 0 0 0 gpio_noesd[11] port 20 nsew signal bidirectional -flabel metal3 s -400 147119 240 147175 0 FreeSans 560 0 0 0 gpio_noesd[12] +flabel metal3 s -800 294238 480 294350 0 FreeSans 1120 0 0 0 gpio_noesd[12] port 21 nsew signal bidirectional -flabel metal3 s -400 125608 240 125664 0 FreeSans 560 0 0 0 gpio_noesd[13] +flabel metal3 s -800 251216 480 251328 0 FreeSans 1120 0 0 0 gpio_noesd[13] port 22 nsew signal bidirectional -flabel metal3 s -400 61797 240 61853 0 FreeSans 560 0 0 0 gpio_noesd[14] +flabel metal3 s -800 123594 480 123706 0 FreeSans 1120 0 0 0 gpio_noesd[14] port 23 nsew signal bidirectional -flabel metal3 s -400 40186 240 40242 0 FreeSans 560 0 0 0 gpio_noesd[15] +flabel metal3 s -800 80372 480 80484 0 FreeSans 1120 0 0 0 gpio_noesd[15] port 24 nsew signal bidirectional -flabel metal3 s -400 18575 240 18631 0 FreeSans 560 0 0 0 gpio_noesd[16] +flabel metal3 s -800 37150 480 37262 0 FreeSans 1120 0 0 0 gpio_noesd[16] port 25 nsew signal bidirectional -flabel metal3 s -400 7864 240 7920 0 FreeSans 560 0 0 0 gpio_noesd[17] +flabel metal3 s -800 15728 480 15840 0 FreeSans 1120 0 0 0 gpio_noesd[17] port 26 nsew signal bidirectional -flabel metal3 s 291760 157417 292400 157473 0 FreeSans 560 0 0 0 gpio_noesd[1] +flabel metal3 s 583520 314834 584800 314946 0 FreeSans 1120 0 0 0 gpio_noesd[1] port 27 nsew signal bidirectional -flabel metal3 s 291760 180028 292400 180084 0 FreeSans 560 0 0 0 gpio_noesd[2] +flabel metal3 s 583520 360056 584800 360168 0 FreeSans 1120 0 0 0 gpio_noesd[2] port 28 nsew signal bidirectional -flabel metal3 s 291760 203239 292400 203295 0 FreeSans 560 0 0 0 gpio_noesd[3] +flabel metal3 s 583520 406478 584800 406590 0 FreeSans 1120 0 0 0 gpio_noesd[3] port 29 nsew signal bidirectional -flabel metal3 s 291760 225450 292400 225506 0 FreeSans 560 0 0 0 gpio_noesd[4] +flabel metal3 s 583520 450900 584800 451012 0 FreeSans 1120 0 0 0 gpio_noesd[4] port 30 nsew signal bidirectional -flabel metal3 s 291760 247661 292400 247717 0 FreeSans 560 0 0 0 gpio_noesd[5] +flabel metal3 s 583520 495322 584800 495434 0 FreeSans 1120 0 0 0 gpio_noesd[5] port 31 nsew signal bidirectional -flabel metal3 s 291760 292372 292400 292428 0 FreeSans 560 0 0 0 gpio_noesd[6] +flabel metal3 s 583520 584744 584800 584856 0 FreeSans 1120 0 0 0 gpio_noesd[6] port 32 nsew signal bidirectional -flabel metal3 s -400 255174 240 255230 0 FreeSans 560 0 0 0 gpio_noesd[7] +flabel metal3 s -800 510348 480 510460 0 FreeSans 1120 0 0 0 gpio_noesd[7] port 33 nsew signal bidirectional -flabel metal3 s -400 233563 240 233619 0 FreeSans 560 0 0 0 gpio_noesd[8] +flabel metal3 s -800 467126 480 467238 0 FreeSans 1120 0 0 0 gpio_noesd[8] port 34 nsew signal bidirectional -flabel metal3 s -400 211952 240 212008 0 FreeSans 560 0 0 0 gpio_noesd[9] +flabel metal3 s -800 423904 480 424016 0 FreeSans 1120 0 0 0 gpio_noesd[9] port 35 nsew signal bidirectional -flabel metal3 s 291150 338992 292400 341492 0 FreeSans 560 0 0 0 io_analog[0] +flabel metal3 s 582300 677984 584800 682984 0 FreeSans 1120 0 0 0 io_analog[0] port 36 nsew signal bidirectional -flabel metal3 s 0 340121 850 342621 0 FreeSans 560 0 0 0 io_analog[10] +flabel metal3 s 0 680242 1700 685242 0 FreeSans 1120 0 0 0 io_analog[10] port 37 nsew signal bidirectional -flabel metal3 s 283297 351150 285797 352400 0 FreeSans 960 180 0 0 io_analog[1] +flabel metal3 s 566594 702300 571594 704800 0 FreeSans 1920 180 0 0 io_analog[1] port 38 nsew signal bidirectional -flabel metal3 s 232697 351150 235197 352400 0 FreeSans 960 180 0 0 io_analog[2] +flabel metal3 s 465394 702300 470394 704800 0 FreeSans 1920 180 0 0 io_analog[2] port 39 nsew signal bidirectional -flabel metal3 s 206697 351150 209197 352400 0 FreeSans 960 180 0 0 io_analog[3] +flabel metal3 s 413394 702300 418394 704800 0 FreeSans 1920 180 0 0 io_analog[3] port 40 nsew signal bidirectional -flabel metal3 s 164647 351150 167147 352400 0 FreeSans 960 180 0 0 io_analog[4] +flabel metal3 s 329294 702300 334294 704800 0 FreeSans 1920 180 0 0 io_analog[4] port 41 nsew signal bidirectional -flabel metal3 s 113797 351150 116297 352400 0 FreeSans 960 180 0 0 io_analog[5] +flabel metal3 s 227594 702300 232594 704800 0 FreeSans 1920 180 0 0 io_analog[5] port 42 nsew signal bidirectional -flabel metal3 s 87947 351150 90447 352400 0 FreeSans 960 180 0 0 io_analog[6] +flabel metal3 s 175894 702300 180894 704800 0 FreeSans 1920 180 0 0 io_analog[6] port 43 nsew signal bidirectional -flabel metal3 s 60097 351150 62597 352400 0 FreeSans 960 180 0 0 io_analog[7] +flabel metal3 s 120194 702300 125194 704800 0 FreeSans 1920 180 0 0 io_analog[7] port 44 nsew signal bidirectional -flabel metal3 s 34097 351150 36597 352400 0 FreeSans 960 180 0 0 io_analog[8] +flabel metal3 s 68194 702300 73194 704800 0 FreeSans 1920 180 0 0 io_analog[8] port 45 nsew signal bidirectional -flabel metal3 s 8097 351150 10597 352400 0 FreeSans 960 180 0 0 io_analog[9] +flabel metal3 s 16194 702300 21194 704800 0 FreeSans 1920 180 0 0 io_analog[9] port 46 nsew signal bidirectional -flabel metal3 s 159497 351150 161997 352400 0 FreeSans 960 180 0 0 io_analog[4] +flabel metal3 s 318994 702300 323994 704800 0 FreeSans 1920 180 0 0 io_analog[4] port 47 nsew signal bidirectional -flabel metal3 s 108647 351150 111147 352400 0 FreeSans 960 180 0 0 io_analog[5] +flabel metal3 s 217294 702300 222294 704800 0 FreeSans 1920 180 0 0 io_analog[5] port 48 nsew signal bidirectional -flabel metal3 s 82797 351150 85297 352400 0 FreeSans 960 180 0 0 io_analog[6] +flabel metal3 s 165594 702300 170594 704800 0 FreeSans 1920 180 0 0 io_analog[6] port 49 nsew signal bidirectional -flabel metal3 s 163397 351150 164497 352400 0 FreeSans 960 180 0 0 io_clamp_high[0] +flabel metal3 s 326794 702300 328994 704800 0 FreeSans 1920 180 0 0 io_clamp_high[0] port 50 nsew signal bidirectional -flabel metal3 s 112547 351150 113647 352400 0 FreeSans 960 180 0 0 io_clamp_high[1] +flabel metal3 s 225094 702300 227294 704800 0 FreeSans 1920 180 0 0 io_clamp_high[1] port 51 nsew signal bidirectional -flabel metal3 s 86697 351150 87797 352400 0 FreeSans 960 180 0 0 io_clamp_high[2] +flabel metal3 s 173394 702300 175594 704800 0 FreeSans 1920 180 0 0 io_clamp_high[2] port 52 nsew signal bidirectional -flabel metal3 s 162147 351150 163247 352400 0 FreeSans 960 180 0 0 io_clamp_low[0] +flabel metal3 s 324294 702300 326494 704800 0 FreeSans 1920 180 0 0 io_clamp_low[0] port 53 nsew signal bidirectional -flabel metal3 s 111297 351150 112397 352400 0 FreeSans 960 180 0 0 io_clamp_low[1] +flabel metal3 s 222594 702300 224794 704800 0 FreeSans 1920 180 0 0 io_clamp_low[1] port 54 nsew signal bidirectional -flabel metal3 s 85447 351150 86547 352400 0 FreeSans 960 180 0 0 io_clamp_low[2] +flabel metal3 s 170894 702300 173094 704800 0 FreeSans 1920 180 0 0 io_clamp_low[2] port 55 nsew signal bidirectional -flabel metal3 s 291760 1363 292400 1419 0 FreeSans 560 0 0 0 io_in[0] +flabel metal3 s 583520 2726 584800 2838 0 FreeSans 1120 0 0 0 io_in[0] port 56 nsew signal input -flabel metal3 s 291760 204421 292400 204477 0 FreeSans 560 0 0 0 io_in[10] +flabel metal3 s 583520 408842 584800 408954 0 FreeSans 1120 0 0 0 io_in[10] port 57 nsew signal input -flabel metal3 s 291760 226632 292400 226688 0 FreeSans 560 0 0 0 io_in[11] +flabel metal3 s 583520 453264 584800 453376 0 FreeSans 1120 0 0 0 io_in[11] port 58 nsew signal input -flabel metal3 s 291760 248843 292400 248899 0 FreeSans 560 0 0 0 io_in[12] +flabel metal3 s 583520 497686 584800 497798 0 FreeSans 1120 0 0 0 io_in[12] port 59 nsew signal input -flabel metal3 s 291760 293554 292400 293610 0 FreeSans 560 0 0 0 io_in[13] +flabel metal3 s 583520 587108 584800 587220 0 FreeSans 1120 0 0 0 io_in[13] port 60 nsew signal input -flabel metal3 s -400 253992 240 254048 0 FreeSans 560 0 0 0 io_in[14] +flabel metal3 s -800 507984 480 508096 0 FreeSans 1120 0 0 0 io_in[14] port 61 nsew signal input -flabel metal3 s -400 232381 240 232437 0 FreeSans 560 0 0 0 io_in[15] +flabel metal3 s -800 464762 480 464874 0 FreeSans 1120 0 0 0 io_in[15] port 62 nsew signal input -flabel metal3 s -400 210770 240 210826 0 FreeSans 560 0 0 0 io_in[16] +flabel metal3 s -800 421540 480 421652 0 FreeSans 1120 0 0 0 io_in[16] port 63 nsew signal input -flabel metal3 s -400 189159 240 189215 0 FreeSans 560 0 0 0 io_in[17] +flabel metal3 s -800 378318 480 378430 0 FreeSans 1120 0 0 0 io_in[17] port 64 nsew signal input -flabel metal3 s -400 167548 240 167604 0 FreeSans 560 0 0 0 io_in[18] +flabel metal3 s -800 335096 480 335208 0 FreeSans 1120 0 0 0 io_in[18] port 65 nsew signal input -flabel metal3 s -400 145937 240 145993 0 FreeSans 560 0 0 0 io_in[19] +flabel metal3 s -800 291874 480 291986 0 FreeSans 1120 0 0 0 io_in[19] port 66 nsew signal input -flabel metal3 s 291760 3727 292400 3783 0 FreeSans 560 0 0 0 io_in[1] +flabel metal3 s 583520 7454 584800 7566 0 FreeSans 1120 0 0 0 io_in[1] port 67 nsew signal input -flabel metal3 s -400 124426 240 124482 0 FreeSans 560 0 0 0 io_in[20] +flabel metal3 s -800 248852 480 248964 0 FreeSans 1120 0 0 0 io_in[20] port 68 nsew signal input -flabel metal3 s -400 60615 240 60671 0 FreeSans 560 0 0 0 io_in[21] +flabel metal3 s -800 121230 480 121342 0 FreeSans 1120 0 0 0 io_in[21] port 69 nsew signal input -flabel metal3 s -400 39004 240 39060 0 FreeSans 560 0 0 0 io_in[22] +flabel metal3 s -800 78008 480 78120 0 FreeSans 1120 0 0 0 io_in[22] port 70 nsew signal input -flabel metal3 s -400 17393 240 17449 0 FreeSans 560 0 0 0 io_in[23] +flabel metal3 s -800 34786 480 34898 0 FreeSans 1120 0 0 0 io_in[23] port 71 nsew signal input -flabel metal3 s -400 6682 240 6738 0 FreeSans 560 0 0 0 io_in[24] +flabel metal3 s -800 13364 480 13476 0 FreeSans 1120 0 0 0 io_in[24] port 72 nsew signal input -flabel metal3 s -400 4318 240 4374 0 FreeSans 560 0 0 0 io_in[25] +flabel metal3 s -800 8636 480 8748 0 FreeSans 1120 0 0 0 io_in[25] port 73 nsew signal input -flabel metal3 s -400 1954 240 2010 0 FreeSans 560 0 0 0 io_in[26] +flabel metal3 s -800 3908 480 4020 0 FreeSans 1120 0 0 0 io_in[26] port 74 nsew signal input -flabel metal3 s 291760 6091 292400 6147 0 FreeSans 560 0 0 0 io_in[2] +flabel metal3 s 583520 12182 584800 12294 0 FreeSans 1120 0 0 0 io_in[2] port 75 nsew signal input -flabel metal3 s 291760 8455 292400 8511 0 FreeSans 560 0 0 0 io_in[3] +flabel metal3 s 583520 16910 584800 17022 0 FreeSans 1120 0 0 0 io_in[3] port 76 nsew signal input -flabel metal3 s 291760 10819 292400 10875 0 FreeSans 560 0 0 0 io_in[4] +flabel metal3 s 583520 21638 584800 21750 0 FreeSans 1120 0 0 0 io_in[4] port 77 nsew signal input -flabel metal3 s 291760 24048 292400 24104 0 FreeSans 560 0 0 0 io_in[5] +flabel metal3 s 583520 48096 584800 48208 0 FreeSans 1120 0 0 0 io_in[5] port 78 nsew signal input -flabel metal3 s 291760 46377 292400 46433 0 FreeSans 560 0 0 0 io_in[6] +flabel metal3 s 583520 92754 584800 92866 0 FreeSans 1120 0 0 0 io_in[6] port 79 nsew signal input -flabel metal3 s 291760 136388 292400 136444 0 FreeSans 560 0 0 0 io_in[7] +flabel metal3 s 583520 272776 584800 272888 0 FreeSans 1120 0 0 0 io_in[7] port 80 nsew signal input -flabel metal3 s 291760 158599 292400 158655 0 FreeSans 560 0 0 0 io_in[8] +flabel metal3 s 583520 317198 584800 317310 0 FreeSans 1120 0 0 0 io_in[8] port 81 nsew signal input -flabel metal3 s 291760 181210 292400 181266 0 FreeSans 560 0 0 0 io_in[9] +flabel metal3 s 583520 362420 584800 362532 0 FreeSans 1120 0 0 0 io_in[9] port 82 nsew signal input -flabel metal3 s 291760 772 292400 828 0 FreeSans 560 0 0 0 io_in_3v3[0] +flabel metal3 s 583520 1544 584800 1656 0 FreeSans 1120 0 0 0 io_in_3v3[0] port 83 nsew signal input -flabel metal3 s 291760 203830 292400 203886 0 FreeSans 560 0 0 0 io_in_3v3[10] +flabel metal3 s 583520 407660 584800 407772 0 FreeSans 1120 0 0 0 io_in_3v3[10] port 84 nsew signal input -flabel metal3 s 291760 226041 292400 226097 0 FreeSans 560 0 0 0 io_in_3v3[11] +flabel metal3 s 583520 452082 584800 452194 0 FreeSans 1120 0 0 0 io_in_3v3[11] port 85 nsew signal input -flabel metal3 s 291760 248252 292400 248308 0 FreeSans 560 0 0 0 io_in_3v3[12] +flabel metal3 s 583520 496504 584800 496616 0 FreeSans 1120 0 0 0 io_in_3v3[12] port 86 nsew signal input -flabel metal3 s 291760 292963 292400 293019 0 FreeSans 560 0 0 0 io_in_3v3[13] +flabel metal3 s 583520 585926 584800 586038 0 FreeSans 1120 0 0 0 io_in_3v3[13] port 87 nsew signal input -flabel metal3 s -400 254583 240 254639 0 FreeSans 560 0 0 0 io_in_3v3[14] +flabel metal3 s -800 509166 480 509278 0 FreeSans 1120 0 0 0 io_in_3v3[14] port 88 nsew signal input -flabel metal3 s -400 232972 240 233028 0 FreeSans 560 0 0 0 io_in_3v3[15] +flabel metal3 s -800 465944 480 466056 0 FreeSans 1120 0 0 0 io_in_3v3[15] port 89 nsew signal input -flabel metal3 s -400 211361 240 211417 0 FreeSans 560 0 0 0 io_in_3v3[16] +flabel metal3 s -800 422722 480 422834 0 FreeSans 1120 0 0 0 io_in_3v3[16] port 90 nsew signal input -flabel metal3 s -400 189750 240 189806 0 FreeSans 560 0 0 0 io_in_3v3[17] +flabel metal3 s -800 379500 480 379612 0 FreeSans 1120 0 0 0 io_in_3v3[17] port 91 nsew signal input -flabel metal3 s -400 168139 240 168195 0 FreeSans 560 0 0 0 io_in_3v3[18] +flabel metal3 s -800 336278 480 336390 0 FreeSans 1120 0 0 0 io_in_3v3[18] port 92 nsew signal input -flabel metal3 s -400 146528 240 146584 0 FreeSans 560 0 0 0 io_in_3v3[19] +flabel metal3 s -800 293056 480 293168 0 FreeSans 1120 0 0 0 io_in_3v3[19] port 93 nsew signal input -flabel metal3 s 291760 3136 292400 3192 0 FreeSans 560 0 0 0 io_in_3v3[1] +flabel metal3 s 583520 6272 584800 6384 0 FreeSans 1120 0 0 0 io_in_3v3[1] port 94 nsew signal input -flabel metal3 s -400 125017 240 125073 0 FreeSans 560 0 0 0 io_in_3v3[20] +flabel metal3 s -800 250034 480 250146 0 FreeSans 1120 0 0 0 io_in_3v3[20] port 95 nsew signal input -flabel metal3 s -400 61206 240 61262 0 FreeSans 560 0 0 0 io_in_3v3[21] +flabel metal3 s -800 122412 480 122524 0 FreeSans 1120 0 0 0 io_in_3v3[21] port 96 nsew signal input -flabel metal3 s -400 39595 240 39651 0 FreeSans 560 0 0 0 io_in_3v3[22] +flabel metal3 s -800 79190 480 79302 0 FreeSans 1120 0 0 0 io_in_3v3[22] port 97 nsew signal input -flabel metal3 s -400 17984 240 18040 0 FreeSans 560 0 0 0 io_in_3v3[23] +flabel metal3 s -800 35968 480 36080 0 FreeSans 1120 0 0 0 io_in_3v3[23] port 98 nsew signal input -flabel metal3 s -400 7273 240 7329 0 FreeSans 560 0 0 0 io_in_3v3[24] +flabel metal3 s -800 14546 480 14658 0 FreeSans 1120 0 0 0 io_in_3v3[24] port 99 nsew signal input -flabel metal3 s -400 4909 240 4965 0 FreeSans 560 0 0 0 io_in_3v3[25] +flabel metal3 s -800 9818 480 9930 0 FreeSans 1120 0 0 0 io_in_3v3[25] port 100 nsew signal input -flabel metal3 s -400 2545 240 2601 0 FreeSans 560 0 0 0 io_in_3v3[26] +flabel metal3 s -800 5090 480 5202 0 FreeSans 1120 0 0 0 io_in_3v3[26] port 101 nsew signal input -flabel metal3 s 291760 5500 292400 5556 0 FreeSans 560 0 0 0 io_in_3v3[2] +flabel metal3 s 583520 11000 584800 11112 0 FreeSans 1120 0 0 0 io_in_3v3[2] port 102 nsew signal input -flabel metal3 s 291760 7864 292400 7920 0 FreeSans 560 0 0 0 io_in_3v3[3] +flabel metal3 s 583520 15728 584800 15840 0 FreeSans 1120 0 0 0 io_in_3v3[3] port 103 nsew signal input -flabel metal3 s 291760 10228 292400 10284 0 FreeSans 560 0 0 0 io_in_3v3[4] +flabel metal3 s 583520 20456 584800 20568 0 FreeSans 1120 0 0 0 io_in_3v3[4] port 104 nsew signal input -flabel metal3 s 291760 23457 292400 23513 0 FreeSans 560 0 0 0 io_in_3v3[5] +flabel metal3 s 583520 46914 584800 47026 0 FreeSans 1120 0 0 0 io_in_3v3[5] port 105 nsew signal input -flabel metal3 s 291760 45786 292400 45842 0 FreeSans 560 0 0 0 io_in_3v3[6] +flabel metal3 s 583520 91572 584800 91684 0 FreeSans 1120 0 0 0 io_in_3v3[6] port 106 nsew signal input -flabel metal3 s 291760 135797 292400 135853 0 FreeSans 560 0 0 0 io_in_3v3[7] +flabel metal3 s 583520 271594 584800 271706 0 FreeSans 1120 0 0 0 io_in_3v3[7] port 107 nsew signal input -flabel metal3 s 291760 158008 292400 158064 0 FreeSans 560 0 0 0 io_in_3v3[8] +flabel metal3 s 583520 316016 584800 316128 0 FreeSans 1120 0 0 0 io_in_3v3[8] port 108 nsew signal input -flabel metal3 s 291760 180619 292400 180675 0 FreeSans 560 0 0 0 io_in_3v3[9] +flabel metal3 s 583520 361238 584800 361350 0 FreeSans 1120 0 0 0 io_in_3v3[9] port 109 nsew signal input -flabel metal3 s 291760 2545 292400 2601 0 FreeSans 560 0 0 0 io_oeb[0] +flabel metal3 s 583520 5090 584800 5202 0 FreeSans 1120 0 0 0 io_oeb[0] port 110 nsew signal tristate -flabel metal3 s 291760 205603 292400 205659 0 FreeSans 560 0 0 0 io_oeb[10] +flabel metal3 s 583520 411206 584800 411318 0 FreeSans 1120 0 0 0 io_oeb[10] port 111 nsew signal tristate -flabel metal3 s 291760 227814 292400 227870 0 FreeSans 560 0 0 0 io_oeb[11] +flabel metal3 s 583520 455628 584800 455740 0 FreeSans 1120 0 0 0 io_oeb[11] port 112 nsew signal tristate -flabel metal3 s 291760 250025 292400 250081 0 FreeSans 560 0 0 0 io_oeb[12] +flabel metal3 s 583520 500050 584800 500162 0 FreeSans 1120 0 0 0 io_oeb[12] port 113 nsew signal tristate -flabel metal3 s 291760 294736 292400 294792 0 FreeSans 560 0 0 0 io_oeb[13] +flabel metal3 s 583520 589472 584800 589584 0 FreeSans 1120 0 0 0 io_oeb[13] port 114 nsew signal tristate -flabel metal3 s -400 252810 240 252866 0 FreeSans 560 0 0 0 io_oeb[14] +flabel metal3 s -800 505620 480 505732 0 FreeSans 1120 0 0 0 io_oeb[14] port 115 nsew signal tristate -flabel metal3 s -400 231199 240 231255 0 FreeSans 560 0 0 0 io_oeb[15] +flabel metal3 s -800 462398 480 462510 0 FreeSans 1120 0 0 0 io_oeb[15] port 116 nsew signal tristate -flabel metal3 s -400 209588 240 209644 0 FreeSans 560 0 0 0 io_oeb[16] +flabel metal3 s -800 419176 480 419288 0 FreeSans 1120 0 0 0 io_oeb[16] port 117 nsew signal tristate -flabel metal3 s -400 187977 240 188033 0 FreeSans 560 0 0 0 io_oeb[17] +flabel metal3 s -800 375954 480 376066 0 FreeSans 1120 0 0 0 io_oeb[17] port 118 nsew signal tristate -flabel metal3 s -400 166366 240 166422 0 FreeSans 560 0 0 0 io_oeb[18] +flabel metal3 s -800 332732 480 332844 0 FreeSans 1120 0 0 0 io_oeb[18] port 119 nsew signal tristate -flabel metal3 s -400 144755 240 144811 0 FreeSans 560 0 0 0 io_oeb[19] +flabel metal3 s -800 289510 480 289622 0 FreeSans 1120 0 0 0 io_oeb[19] port 120 nsew signal tristate -flabel metal3 s 291760 4909 292400 4965 0 FreeSans 560 0 0 0 io_oeb[1] +flabel metal3 s 583520 9818 584800 9930 0 FreeSans 1120 0 0 0 io_oeb[1] port 121 nsew signal tristate -flabel metal3 s -400 123244 240 123300 0 FreeSans 560 0 0 0 io_oeb[20] +flabel metal3 s -800 246488 480 246600 0 FreeSans 1120 0 0 0 io_oeb[20] port 122 nsew signal tristate -flabel metal3 s -400 59433 240 59489 0 FreeSans 560 0 0 0 io_oeb[21] +flabel metal3 s -800 118866 480 118978 0 FreeSans 1120 0 0 0 io_oeb[21] port 123 nsew signal tristate -flabel metal3 s -400 37822 240 37878 0 FreeSans 560 0 0 0 io_oeb[22] +flabel metal3 s -800 75644 480 75756 0 FreeSans 1120 0 0 0 io_oeb[22] port 124 nsew signal tristate -flabel metal3 s -400 16211 240 16267 0 FreeSans 560 0 0 0 io_oeb[23] +flabel metal3 s -800 32422 480 32534 0 FreeSans 1120 0 0 0 io_oeb[23] port 125 nsew signal tristate -flabel metal3 s -400 5500 240 5556 0 FreeSans 560 0 0 0 io_oeb[24] +flabel metal3 s -800 11000 480 11112 0 FreeSans 1120 0 0 0 io_oeb[24] port 126 nsew signal tristate -flabel metal3 s -400 3136 240 3192 0 FreeSans 560 0 0 0 io_oeb[25] +flabel metal3 s -800 6272 480 6384 0 FreeSans 1120 0 0 0 io_oeb[25] port 127 nsew signal tristate -flabel metal3 s -400 772 240 828 0 FreeSans 560 0 0 0 io_oeb[26] +flabel metal3 s -800 1544 480 1656 0 FreeSans 1120 0 0 0 io_oeb[26] port 128 nsew signal tristate -flabel metal3 s 291760 7273 292400 7329 0 FreeSans 560 0 0 0 io_oeb[2] +flabel metal3 s 583520 14546 584800 14658 0 FreeSans 1120 0 0 0 io_oeb[2] port 129 nsew signal tristate -flabel metal3 s 291760 9637 292400 9693 0 FreeSans 560 0 0 0 io_oeb[3] +flabel metal3 s 583520 19274 584800 19386 0 FreeSans 1120 0 0 0 io_oeb[3] port 130 nsew signal tristate -flabel metal3 s 291760 12001 292400 12057 0 FreeSans 560 0 0 0 io_oeb[4] +flabel metal3 s 583520 24002 584800 24114 0 FreeSans 1120 0 0 0 io_oeb[4] port 131 nsew signal tristate -flabel metal3 s 291760 25230 292400 25286 0 FreeSans 560 0 0 0 io_oeb[5] +flabel metal3 s 583520 50460 584800 50572 0 FreeSans 1120 0 0 0 io_oeb[5] port 132 nsew signal tristate -flabel metal3 s 291760 47559 292400 47615 0 FreeSans 560 0 0 0 io_oeb[6] +flabel metal3 s 583520 95118 584800 95230 0 FreeSans 1120 0 0 0 io_oeb[6] port 133 nsew signal tristate -flabel metal3 s 291760 137570 292400 137626 0 FreeSans 560 0 0 0 io_oeb[7] +flabel metal3 s 583520 275140 584800 275252 0 FreeSans 1120 0 0 0 io_oeb[7] port 134 nsew signal tristate -flabel metal3 s 291760 159781 292400 159837 0 FreeSans 560 0 0 0 io_oeb[8] +flabel metal3 s 583520 319562 584800 319674 0 FreeSans 1120 0 0 0 io_oeb[8] port 135 nsew signal tristate -flabel metal3 s 291760 182392 292400 182448 0 FreeSans 560 0 0 0 io_oeb[9] +flabel metal3 s 583520 364784 584800 364896 0 FreeSans 1120 0 0 0 io_oeb[9] port 136 nsew signal tristate -flabel metal3 s 291760 1954 292400 2010 0 FreeSans 560 0 0 0 io_out[0] +flabel metal3 s 583520 3908 584800 4020 0 FreeSans 1120 0 0 0 io_out[0] port 137 nsew signal tristate -flabel metal3 s 291760 205012 292400 205068 0 FreeSans 560 0 0 0 io_out[10] +flabel metal3 s 583520 410024 584800 410136 0 FreeSans 1120 0 0 0 io_out[10] port 138 nsew signal tristate -flabel metal3 s 291760 227223 292400 227279 0 FreeSans 560 0 0 0 io_out[11] +flabel metal3 s 583520 454446 584800 454558 0 FreeSans 1120 0 0 0 io_out[11] port 139 nsew signal tristate -flabel metal3 s 291760 249434 292400 249490 0 FreeSans 560 0 0 0 io_out[12] +flabel metal3 s 583520 498868 584800 498980 0 FreeSans 1120 0 0 0 io_out[12] port 140 nsew signal tristate -flabel metal3 s 291760 294145 292400 294201 0 FreeSans 560 0 0 0 io_out[13] +flabel metal3 s 583520 588290 584800 588402 0 FreeSans 1120 0 0 0 io_out[13] port 141 nsew signal tristate -flabel metal3 s -400 253401 240 253457 0 FreeSans 560 0 0 0 io_out[14] +flabel metal3 s -800 506802 480 506914 0 FreeSans 1120 0 0 0 io_out[14] port 142 nsew signal tristate -flabel metal3 s -400 231790 240 231846 0 FreeSans 560 0 0 0 io_out[15] +flabel metal3 s -800 463580 480 463692 0 FreeSans 1120 0 0 0 io_out[15] port 143 nsew signal tristate -flabel metal3 s -400 210179 240 210235 0 FreeSans 560 0 0 0 io_out[16] +flabel metal3 s -800 420358 480 420470 0 FreeSans 1120 0 0 0 io_out[16] port 144 nsew signal tristate -flabel metal3 s -400 188568 240 188624 0 FreeSans 560 0 0 0 io_out[17] +flabel metal3 s -800 377136 480 377248 0 FreeSans 1120 0 0 0 io_out[17] port 145 nsew signal tristate -flabel metal3 s -400 166957 240 167013 0 FreeSans 560 0 0 0 io_out[18] +flabel metal3 s -800 333914 480 334026 0 FreeSans 1120 0 0 0 io_out[18] port 146 nsew signal tristate -flabel metal3 s -400 145346 240 145402 0 FreeSans 560 0 0 0 io_out[19] +flabel metal3 s -800 290692 480 290804 0 FreeSans 1120 0 0 0 io_out[19] port 147 nsew signal tristate -flabel metal3 s 291760 4318 292400 4374 0 FreeSans 560 0 0 0 io_out[1] +flabel metal3 s 583520 8636 584800 8748 0 FreeSans 1120 0 0 0 io_out[1] port 148 nsew signal tristate -flabel metal3 s -400 123835 240 123891 0 FreeSans 560 0 0 0 io_out[20] +flabel metal3 s -800 247670 480 247782 0 FreeSans 1120 0 0 0 io_out[20] port 149 nsew signal tristate -flabel metal3 s -400 60024 240 60080 0 FreeSans 560 0 0 0 io_out[21] +flabel metal3 s -800 120048 480 120160 0 FreeSans 1120 0 0 0 io_out[21] port 150 nsew signal tristate -flabel metal3 s -400 38413 240 38469 0 FreeSans 560 0 0 0 io_out[22] +flabel metal3 s -800 76826 480 76938 0 FreeSans 1120 0 0 0 io_out[22] port 151 nsew signal tristate -flabel metal3 s -400 16802 240 16858 0 FreeSans 560 0 0 0 io_out[23] +flabel metal3 s -800 33604 480 33716 0 FreeSans 1120 0 0 0 io_out[23] port 152 nsew signal tristate -flabel metal3 s -400 6091 240 6147 0 FreeSans 560 0 0 0 io_out[24] +flabel metal3 s -800 12182 480 12294 0 FreeSans 1120 0 0 0 io_out[24] port 153 nsew signal tristate -flabel metal3 s -400 3727 240 3783 0 FreeSans 560 0 0 0 io_out[25] +flabel metal3 s -800 7454 480 7566 0 FreeSans 1120 0 0 0 io_out[25] port 154 nsew signal tristate -flabel metal3 s -400 1363 240 1419 0 FreeSans 560 0 0 0 io_out[26] +flabel metal3 s -800 2726 480 2838 0 FreeSans 1120 0 0 0 io_out[26] port 155 nsew signal tristate -flabel metal3 s 291760 6682 292400 6738 0 FreeSans 560 0 0 0 io_out[2] +flabel metal3 s 583520 13364 584800 13476 0 FreeSans 1120 0 0 0 io_out[2] port 156 nsew signal tristate -flabel metal3 s 291760 9046 292400 9102 0 FreeSans 560 0 0 0 io_out[3] +flabel metal3 s 583520 18092 584800 18204 0 FreeSans 1120 0 0 0 io_out[3] port 157 nsew signal tristate -flabel metal3 s 291760 11410 292400 11466 0 FreeSans 560 0 0 0 io_out[4] +flabel metal3 s 583520 22820 584800 22932 0 FreeSans 1120 0 0 0 io_out[4] port 158 nsew signal tristate -flabel metal3 s 291760 24639 292400 24695 0 FreeSans 560 0 0 0 io_out[5] +flabel metal3 s 583520 49278 584800 49390 0 FreeSans 1120 0 0 0 io_out[5] port 159 nsew signal tristate -flabel metal3 s 291760 46968 292400 47024 0 FreeSans 560 0 0 0 io_out[6] +flabel metal3 s 583520 93936 584800 94048 0 FreeSans 1120 0 0 0 io_out[6] port 160 nsew signal tristate -flabel metal3 s 291760 136979 292400 137035 0 FreeSans 560 0 0 0 io_out[7] +flabel metal3 s 583520 273958 584800 274070 0 FreeSans 1120 0 0 0 io_out[7] port 161 nsew signal tristate -flabel metal3 s 291760 159190 292400 159246 0 FreeSans 560 0 0 0 io_out[8] +flabel metal3 s 583520 318380 584800 318492 0 FreeSans 1120 0 0 0 io_out[8] port 162 nsew signal tristate -flabel metal3 s 291760 181801 292400 181857 0 FreeSans 560 0 0 0 io_out[9] +flabel metal3 s 583520 363602 584800 363714 0 FreeSans 1120 0 0 0 io_out[9] port 163 nsew signal tristate -flabel metal2 s 62908 -400 62964 240 0 FreeSans 560 90 0 0 la_data_in[0] +flabel metal2 s 125816 -800 125928 480 0 FreeSans 1120 90 0 0 la_data_in[0] port 164 nsew signal input -flabel metal2 s 240208 -400 240264 240 0 FreeSans 560 90 0 0 la_data_in[100] +flabel metal2 s 480416 -800 480528 480 0 FreeSans 1120 90 0 0 la_data_in[100] port 165 nsew signal input -flabel metal2 s 241981 -400 242037 240 0 FreeSans 560 90 0 0 la_data_in[101] +flabel metal2 s 483962 -800 484074 480 0 FreeSans 1120 90 0 0 la_data_in[101] port 166 nsew signal input -flabel metal2 s 243754 -400 243810 240 0 FreeSans 560 90 0 0 la_data_in[102] +flabel metal2 s 487508 -800 487620 480 0 FreeSans 1120 90 0 0 la_data_in[102] port 167 nsew signal input -flabel metal2 s 245527 -400 245583 240 0 FreeSans 560 90 0 0 la_data_in[103] +flabel metal2 s 491054 -800 491166 480 0 FreeSans 1120 90 0 0 la_data_in[103] port 168 nsew signal input -flabel metal2 s 247300 -400 247356 240 0 FreeSans 560 90 0 0 la_data_in[104] +flabel metal2 s 494600 -800 494712 480 0 FreeSans 1120 90 0 0 la_data_in[104] port 169 nsew signal input -flabel metal2 s 249073 -400 249129 240 0 FreeSans 560 90 0 0 la_data_in[105] +flabel metal2 s 498146 -800 498258 480 0 FreeSans 1120 90 0 0 la_data_in[105] port 170 nsew signal input -flabel metal2 s 250846 -400 250902 240 0 FreeSans 560 90 0 0 la_data_in[106] +flabel metal2 s 501692 -800 501804 480 0 FreeSans 1120 90 0 0 la_data_in[106] port 171 nsew signal input -flabel metal2 s 252619 -400 252675 240 0 FreeSans 560 90 0 0 la_data_in[107] +flabel metal2 s 505238 -800 505350 480 0 FreeSans 1120 90 0 0 la_data_in[107] port 172 nsew signal input -flabel metal2 s 254392 -400 254448 240 0 FreeSans 560 90 0 0 la_data_in[108] +flabel metal2 s 508784 -800 508896 480 0 FreeSans 1120 90 0 0 la_data_in[108] port 173 nsew signal input -flabel metal2 s 256165 -400 256221 240 0 FreeSans 560 90 0 0 la_data_in[109] +flabel metal2 s 512330 -800 512442 480 0 FreeSans 1120 90 0 0 la_data_in[109] port 174 nsew signal input -flabel metal2 s 80638 -400 80694 240 0 FreeSans 560 90 0 0 la_data_in[10] +flabel metal2 s 161276 -800 161388 480 0 FreeSans 1120 90 0 0 la_data_in[10] port 175 nsew signal input -flabel metal2 s 257938 -400 257994 240 0 FreeSans 560 90 0 0 la_data_in[110] +flabel metal2 s 515876 -800 515988 480 0 FreeSans 1120 90 0 0 la_data_in[110] port 176 nsew signal input -flabel metal2 s 259711 -400 259767 240 0 FreeSans 560 90 0 0 la_data_in[111] +flabel metal2 s 519422 -800 519534 480 0 FreeSans 1120 90 0 0 la_data_in[111] port 177 nsew signal input -flabel metal2 s 261484 -400 261540 240 0 FreeSans 560 90 0 0 la_data_in[112] +flabel metal2 s 522968 -800 523080 480 0 FreeSans 1120 90 0 0 la_data_in[112] port 178 nsew signal input -flabel metal2 s 263257 -400 263313 240 0 FreeSans 560 90 0 0 la_data_in[113] +flabel metal2 s 526514 -800 526626 480 0 FreeSans 1120 90 0 0 la_data_in[113] port 179 nsew signal input -flabel metal2 s 265030 -400 265086 240 0 FreeSans 560 90 0 0 la_data_in[114] +flabel metal2 s 530060 -800 530172 480 0 FreeSans 1120 90 0 0 la_data_in[114] port 180 nsew signal input -flabel metal2 s 266803 -400 266859 240 0 FreeSans 560 90 0 0 la_data_in[115] +flabel metal2 s 533606 -800 533718 480 0 FreeSans 1120 90 0 0 la_data_in[115] port 181 nsew signal input -flabel metal2 s 268576 -400 268632 240 0 FreeSans 560 90 0 0 la_data_in[116] +flabel metal2 s 537152 -800 537264 480 0 FreeSans 1120 90 0 0 la_data_in[116] port 182 nsew signal input -flabel metal2 s 270349 -400 270405 240 0 FreeSans 560 90 0 0 la_data_in[117] +flabel metal2 s 540698 -800 540810 480 0 FreeSans 1120 90 0 0 la_data_in[117] port 183 nsew signal input -flabel metal2 s 272122 -400 272178 240 0 FreeSans 560 90 0 0 la_data_in[118] +flabel metal2 s 544244 -800 544356 480 0 FreeSans 1120 90 0 0 la_data_in[118] port 184 nsew signal input -flabel metal2 s 273895 -400 273951 240 0 FreeSans 560 90 0 0 la_data_in[119] +flabel metal2 s 547790 -800 547902 480 0 FreeSans 1120 90 0 0 la_data_in[119] port 185 nsew signal input -flabel metal2 s 82411 -400 82467 240 0 FreeSans 560 90 0 0 la_data_in[11] +flabel metal2 s 164822 -800 164934 480 0 FreeSans 1120 90 0 0 la_data_in[11] port 186 nsew signal input -flabel metal2 s 275668 -400 275724 240 0 FreeSans 560 90 0 0 la_data_in[120] +flabel metal2 s 551336 -800 551448 480 0 FreeSans 1120 90 0 0 la_data_in[120] port 187 nsew signal input -flabel metal2 s 277441 -400 277497 240 0 FreeSans 560 90 0 0 la_data_in[121] +flabel metal2 s 554882 -800 554994 480 0 FreeSans 1120 90 0 0 la_data_in[121] port 188 nsew signal input -flabel metal2 s 279214 -400 279270 240 0 FreeSans 560 90 0 0 la_data_in[122] +flabel metal2 s 558428 -800 558540 480 0 FreeSans 1120 90 0 0 la_data_in[122] port 189 nsew signal input -flabel metal2 s 280987 -400 281043 240 0 FreeSans 560 90 0 0 la_data_in[123] +flabel metal2 s 561974 -800 562086 480 0 FreeSans 1120 90 0 0 la_data_in[123] port 190 nsew signal input -flabel metal2 s 282760 -400 282816 240 0 FreeSans 560 90 0 0 la_data_in[124] +flabel metal2 s 565520 -800 565632 480 0 FreeSans 1120 90 0 0 la_data_in[124] port 191 nsew signal input -flabel metal2 s 284533 -400 284589 240 0 FreeSans 560 90 0 0 la_data_in[125] +flabel metal2 s 569066 -800 569178 480 0 FreeSans 1120 90 0 0 la_data_in[125] port 192 nsew signal input -flabel metal2 s 286306 -400 286362 240 0 FreeSans 560 90 0 0 la_data_in[126] +flabel metal2 s 572612 -800 572724 480 0 FreeSans 1120 90 0 0 la_data_in[126] port 193 nsew signal input -flabel metal2 s 288079 -400 288135 240 0 FreeSans 560 90 0 0 la_data_in[127] +flabel metal2 s 576158 -800 576270 480 0 FreeSans 1120 90 0 0 la_data_in[127] port 194 nsew signal input -flabel metal2 s 84184 -400 84240 240 0 FreeSans 560 90 0 0 la_data_in[12] +flabel metal2 s 168368 -800 168480 480 0 FreeSans 1120 90 0 0 la_data_in[12] port 195 nsew signal input -flabel metal2 s 85957 -400 86013 240 0 FreeSans 560 90 0 0 la_data_in[13] +flabel metal2 s 171914 -800 172026 480 0 FreeSans 1120 90 0 0 la_data_in[13] port 196 nsew signal input -flabel metal2 s 87730 -400 87786 240 0 FreeSans 560 90 0 0 la_data_in[14] +flabel metal2 s 175460 -800 175572 480 0 FreeSans 1120 90 0 0 la_data_in[14] port 197 nsew signal input -flabel metal2 s 89503 -400 89559 240 0 FreeSans 560 90 0 0 la_data_in[15] +flabel metal2 s 179006 -800 179118 480 0 FreeSans 1120 90 0 0 la_data_in[15] port 198 nsew signal input -flabel metal2 s 91276 -400 91332 240 0 FreeSans 560 90 0 0 la_data_in[16] +flabel metal2 s 182552 -800 182664 480 0 FreeSans 1120 90 0 0 la_data_in[16] port 199 nsew signal input -flabel metal2 s 93049 -400 93105 240 0 FreeSans 560 90 0 0 la_data_in[17] +flabel metal2 s 186098 -800 186210 480 0 FreeSans 1120 90 0 0 la_data_in[17] port 200 nsew signal input -flabel metal2 s 94822 -400 94878 240 0 FreeSans 560 90 0 0 la_data_in[18] +flabel metal2 s 189644 -800 189756 480 0 FreeSans 1120 90 0 0 la_data_in[18] port 201 nsew signal input -flabel metal2 s 96595 -400 96651 240 0 FreeSans 560 90 0 0 la_data_in[19] +flabel metal2 s 193190 -800 193302 480 0 FreeSans 1120 90 0 0 la_data_in[19] port 202 nsew signal input -flabel metal2 s 64681 -400 64737 240 0 FreeSans 560 90 0 0 la_data_in[1] +flabel metal2 s 129362 -800 129474 480 0 FreeSans 1120 90 0 0 la_data_in[1] port 203 nsew signal input -flabel metal2 s 98368 -400 98424 240 0 FreeSans 560 90 0 0 la_data_in[20] +flabel metal2 s 196736 -800 196848 480 0 FreeSans 1120 90 0 0 la_data_in[20] port 204 nsew signal input -flabel metal2 s 100141 -400 100197 240 0 FreeSans 560 90 0 0 la_data_in[21] +flabel metal2 s 200282 -800 200394 480 0 FreeSans 1120 90 0 0 la_data_in[21] port 205 nsew signal input -flabel metal2 s 101914 -400 101970 240 0 FreeSans 560 90 0 0 la_data_in[22] +flabel metal2 s 203828 -800 203940 480 0 FreeSans 1120 90 0 0 la_data_in[22] port 206 nsew signal input -flabel metal2 s 103687 -400 103743 240 0 FreeSans 560 90 0 0 la_data_in[23] +flabel metal2 s 207374 -800 207486 480 0 FreeSans 1120 90 0 0 la_data_in[23] port 207 nsew signal input -flabel metal2 s 105460 -400 105516 240 0 FreeSans 560 90 0 0 la_data_in[24] +flabel metal2 s 210920 -800 211032 480 0 FreeSans 1120 90 0 0 la_data_in[24] port 208 nsew signal input -flabel metal2 s 107233 -400 107289 240 0 FreeSans 560 90 0 0 la_data_in[25] +flabel metal2 s 214466 -800 214578 480 0 FreeSans 1120 90 0 0 la_data_in[25] port 209 nsew signal input -flabel metal2 s 109006 -400 109062 240 0 FreeSans 560 90 0 0 la_data_in[26] +flabel metal2 s 218012 -800 218124 480 0 FreeSans 1120 90 0 0 la_data_in[26] port 210 nsew signal input -flabel metal2 s 110779 -400 110835 240 0 FreeSans 560 90 0 0 la_data_in[27] +flabel metal2 s 221558 -800 221670 480 0 FreeSans 1120 90 0 0 la_data_in[27] port 211 nsew signal input -flabel metal2 s 112552 -400 112608 240 0 FreeSans 560 90 0 0 la_data_in[28] +flabel metal2 s 225104 -800 225216 480 0 FreeSans 1120 90 0 0 la_data_in[28] port 212 nsew signal input -flabel metal2 s 114325 -400 114381 240 0 FreeSans 560 90 0 0 la_data_in[29] +flabel metal2 s 228650 -800 228762 480 0 FreeSans 1120 90 0 0 la_data_in[29] port 213 nsew signal input -flabel metal2 s 66454 -400 66510 240 0 FreeSans 560 90 0 0 la_data_in[2] +flabel metal2 s 132908 -800 133020 480 0 FreeSans 1120 90 0 0 la_data_in[2] port 214 nsew signal input -flabel metal2 s 116098 -400 116154 240 0 FreeSans 560 90 0 0 la_data_in[30] +flabel metal2 s 232196 -800 232308 480 0 FreeSans 1120 90 0 0 la_data_in[30] port 215 nsew signal input -flabel metal2 s 117871 -400 117927 240 0 FreeSans 560 90 0 0 la_data_in[31] +flabel metal2 s 235742 -800 235854 480 0 FreeSans 1120 90 0 0 la_data_in[31] port 216 nsew signal input -flabel metal2 s 119644 -400 119700 240 0 FreeSans 560 90 0 0 la_data_in[32] +flabel metal2 s 239288 -800 239400 480 0 FreeSans 1120 90 0 0 la_data_in[32] port 217 nsew signal input -flabel metal2 s 121417 -400 121473 240 0 FreeSans 560 90 0 0 la_data_in[33] +flabel metal2 s 242834 -800 242946 480 0 FreeSans 1120 90 0 0 la_data_in[33] port 218 nsew signal input -flabel metal2 s 123190 -400 123246 240 0 FreeSans 560 90 0 0 la_data_in[34] +flabel metal2 s 246380 -800 246492 480 0 FreeSans 1120 90 0 0 la_data_in[34] port 219 nsew signal input -flabel metal2 s 124963 -400 125019 240 0 FreeSans 560 90 0 0 la_data_in[35] +flabel metal2 s 249926 -800 250038 480 0 FreeSans 1120 90 0 0 la_data_in[35] port 220 nsew signal input -flabel metal2 s 126736 -400 126792 240 0 FreeSans 560 90 0 0 la_data_in[36] +flabel metal2 s 253472 -800 253584 480 0 FreeSans 1120 90 0 0 la_data_in[36] port 221 nsew signal input -flabel metal2 s 128509 -400 128565 240 0 FreeSans 560 90 0 0 la_data_in[37] +flabel metal2 s 257018 -800 257130 480 0 FreeSans 1120 90 0 0 la_data_in[37] port 222 nsew signal input -flabel metal2 s 130282 -400 130338 240 0 FreeSans 560 90 0 0 la_data_in[38] +flabel metal2 s 260564 -800 260676 480 0 FreeSans 1120 90 0 0 la_data_in[38] port 223 nsew signal input -flabel metal2 s 132055 -400 132111 240 0 FreeSans 560 90 0 0 la_data_in[39] +flabel metal2 s 264110 -800 264222 480 0 FreeSans 1120 90 0 0 la_data_in[39] port 224 nsew signal input -flabel metal2 s 68227 -400 68283 240 0 FreeSans 560 90 0 0 la_data_in[3] +flabel metal2 s 136454 -800 136566 480 0 FreeSans 1120 90 0 0 la_data_in[3] port 225 nsew signal input -flabel metal2 s 133828 -400 133884 240 0 FreeSans 560 90 0 0 la_data_in[40] +flabel metal2 s 267656 -800 267768 480 0 FreeSans 1120 90 0 0 la_data_in[40] port 226 nsew signal input -flabel metal2 s 135601 -400 135657 240 0 FreeSans 560 90 0 0 la_data_in[41] +flabel metal2 s 271202 -800 271314 480 0 FreeSans 1120 90 0 0 la_data_in[41] port 227 nsew signal input -flabel metal2 s 137374 -400 137430 240 0 FreeSans 560 90 0 0 la_data_in[42] +flabel metal2 s 274748 -800 274860 480 0 FreeSans 1120 90 0 0 la_data_in[42] port 228 nsew signal input -flabel metal2 s 139147 -400 139203 240 0 FreeSans 560 90 0 0 la_data_in[43] +flabel metal2 s 278294 -800 278406 480 0 FreeSans 1120 90 0 0 la_data_in[43] port 229 nsew signal input -flabel metal2 s 140920 -400 140976 240 0 FreeSans 560 90 0 0 la_data_in[44] +flabel metal2 s 281840 -800 281952 480 0 FreeSans 1120 90 0 0 la_data_in[44] port 230 nsew signal input -flabel metal2 s 142693 -400 142749 240 0 FreeSans 560 90 0 0 la_data_in[45] +flabel metal2 s 285386 -800 285498 480 0 FreeSans 1120 90 0 0 la_data_in[45] port 231 nsew signal input -flabel metal2 s 144466 -400 144522 240 0 FreeSans 560 90 0 0 la_data_in[46] +flabel metal2 s 288932 -800 289044 480 0 FreeSans 1120 90 0 0 la_data_in[46] port 232 nsew signal input -flabel metal2 s 146239 -400 146295 240 0 FreeSans 560 90 0 0 la_data_in[47] +flabel metal2 s 292478 -800 292590 480 0 FreeSans 1120 90 0 0 la_data_in[47] port 233 nsew signal input -flabel metal2 s 148012 -400 148068 240 0 FreeSans 560 90 0 0 la_data_in[48] +flabel metal2 s 296024 -800 296136 480 0 FreeSans 1120 90 0 0 la_data_in[48] port 234 nsew signal input -flabel metal2 s 149785 -400 149841 240 0 FreeSans 560 90 0 0 la_data_in[49] +flabel metal2 s 299570 -800 299682 480 0 FreeSans 1120 90 0 0 la_data_in[49] port 235 nsew signal input -flabel metal2 s 70000 -400 70056 240 0 FreeSans 560 90 0 0 la_data_in[4] +flabel metal2 s 140000 -800 140112 480 0 FreeSans 1120 90 0 0 la_data_in[4] port 236 nsew signal input -flabel metal2 s 151558 -400 151614 240 0 FreeSans 560 90 0 0 la_data_in[50] +flabel metal2 s 303116 -800 303228 480 0 FreeSans 1120 90 0 0 la_data_in[50] port 237 nsew signal input -flabel metal2 s 153331 -400 153387 240 0 FreeSans 560 90 0 0 la_data_in[51] +flabel metal2 s 306662 -800 306774 480 0 FreeSans 1120 90 0 0 la_data_in[51] port 238 nsew signal input -flabel metal2 s 155104 -400 155160 240 0 FreeSans 560 90 0 0 la_data_in[52] +flabel metal2 s 310208 -800 310320 480 0 FreeSans 1120 90 0 0 la_data_in[52] port 239 nsew signal input -flabel metal2 s 156877 -400 156933 240 0 FreeSans 560 90 0 0 la_data_in[53] +flabel metal2 s 313754 -800 313866 480 0 FreeSans 1120 90 0 0 la_data_in[53] port 240 nsew signal input -flabel metal2 s 158650 -400 158706 240 0 FreeSans 560 90 0 0 la_data_in[54] +flabel metal2 s 317300 -800 317412 480 0 FreeSans 1120 90 0 0 la_data_in[54] port 241 nsew signal input -flabel metal2 s 160423 -400 160479 240 0 FreeSans 560 90 0 0 la_data_in[55] +flabel metal2 s 320846 -800 320958 480 0 FreeSans 1120 90 0 0 la_data_in[55] port 242 nsew signal input -flabel metal2 s 162196 -400 162252 240 0 FreeSans 560 90 0 0 la_data_in[56] +flabel metal2 s 324392 -800 324504 480 0 FreeSans 1120 90 0 0 la_data_in[56] port 243 nsew signal input -flabel metal2 s 163969 -400 164025 240 0 FreeSans 560 90 0 0 la_data_in[57] +flabel metal2 s 327938 -800 328050 480 0 FreeSans 1120 90 0 0 la_data_in[57] port 244 nsew signal input -flabel metal2 s 165742 -400 165798 240 0 FreeSans 560 90 0 0 la_data_in[58] +flabel metal2 s 331484 -800 331596 480 0 FreeSans 1120 90 0 0 la_data_in[58] port 245 nsew signal input -flabel metal2 s 167515 -400 167571 240 0 FreeSans 560 90 0 0 la_data_in[59] +flabel metal2 s 335030 -800 335142 480 0 FreeSans 1120 90 0 0 la_data_in[59] port 246 nsew signal input -flabel metal2 s 71773 -400 71829 240 0 FreeSans 560 90 0 0 la_data_in[5] +flabel metal2 s 143546 -800 143658 480 0 FreeSans 1120 90 0 0 la_data_in[5] port 247 nsew signal input -flabel metal2 s 169288 -400 169344 240 0 FreeSans 560 90 0 0 la_data_in[60] +flabel metal2 s 338576 -800 338688 480 0 FreeSans 1120 90 0 0 la_data_in[60] port 248 nsew signal input -flabel metal2 s 171061 -400 171117 240 0 FreeSans 560 90 0 0 la_data_in[61] +flabel metal2 s 342122 -800 342234 480 0 FreeSans 1120 90 0 0 la_data_in[61] port 249 nsew signal input -flabel metal2 s 172834 -400 172890 240 0 FreeSans 560 90 0 0 la_data_in[62] +flabel metal2 s 345668 -800 345780 480 0 FreeSans 1120 90 0 0 la_data_in[62] port 250 nsew signal input -flabel metal2 s 174607 -400 174663 240 0 FreeSans 560 90 0 0 la_data_in[63] +flabel metal2 s 349214 -800 349326 480 0 FreeSans 1120 90 0 0 la_data_in[63] port 251 nsew signal input -flabel metal2 s 176380 -400 176436 240 0 FreeSans 560 90 0 0 la_data_in[64] +flabel metal2 s 352760 -800 352872 480 0 FreeSans 1120 90 0 0 la_data_in[64] port 252 nsew signal input -flabel metal2 s 178153 -400 178209 240 0 FreeSans 560 90 0 0 la_data_in[65] +flabel metal2 s 356306 -800 356418 480 0 FreeSans 1120 90 0 0 la_data_in[65] port 253 nsew signal input -flabel metal2 s 179926 -400 179982 240 0 FreeSans 560 90 0 0 la_data_in[66] +flabel metal2 s 359852 -800 359964 480 0 FreeSans 1120 90 0 0 la_data_in[66] port 254 nsew signal input -flabel metal2 s 181699 -400 181755 240 0 FreeSans 560 90 0 0 la_data_in[67] +flabel metal2 s 363398 -800 363510 480 0 FreeSans 1120 90 0 0 la_data_in[67] port 255 nsew signal input -flabel metal2 s 183472 -400 183528 240 0 FreeSans 560 90 0 0 la_data_in[68] +flabel metal2 s 366944 -800 367056 480 0 FreeSans 1120 90 0 0 la_data_in[68] port 256 nsew signal input -flabel metal2 s 185245 -400 185301 240 0 FreeSans 560 90 0 0 la_data_in[69] +flabel metal2 s 370490 -800 370602 480 0 FreeSans 1120 90 0 0 la_data_in[69] port 257 nsew signal input -flabel metal2 s 73546 -400 73602 240 0 FreeSans 560 90 0 0 la_data_in[6] +flabel metal2 s 147092 -800 147204 480 0 FreeSans 1120 90 0 0 la_data_in[6] port 258 nsew signal input -flabel metal2 s 187018 -400 187074 240 0 FreeSans 560 90 0 0 la_data_in[70] +flabel metal2 s 374036 -800 374148 480 0 FreeSans 1120 90 0 0 la_data_in[70] port 259 nsew signal input -flabel metal2 s 188791 -400 188847 240 0 FreeSans 560 90 0 0 la_data_in[71] +flabel metal2 s 377582 -800 377694 480 0 FreeSans 1120 90 0 0 la_data_in[71] port 260 nsew signal input -flabel metal2 s 190564 -400 190620 240 0 FreeSans 560 90 0 0 la_data_in[72] +flabel metal2 s 381128 -800 381240 480 0 FreeSans 1120 90 0 0 la_data_in[72] port 261 nsew signal input -flabel metal2 s 192337 -400 192393 240 0 FreeSans 560 90 0 0 la_data_in[73] +flabel metal2 s 384674 -800 384786 480 0 FreeSans 1120 90 0 0 la_data_in[73] port 262 nsew signal input -flabel metal2 s 194110 -400 194166 240 0 FreeSans 560 90 0 0 la_data_in[74] +flabel metal2 s 388220 -800 388332 480 0 FreeSans 1120 90 0 0 la_data_in[74] port 263 nsew signal input -flabel metal2 s 195883 -400 195939 240 0 FreeSans 560 90 0 0 la_data_in[75] +flabel metal2 s 391766 -800 391878 480 0 FreeSans 1120 90 0 0 la_data_in[75] port 264 nsew signal input -flabel metal2 s 197656 -400 197712 240 0 FreeSans 560 90 0 0 la_data_in[76] +flabel metal2 s 395312 -800 395424 480 0 FreeSans 1120 90 0 0 la_data_in[76] port 265 nsew signal input -flabel metal2 s 199429 -400 199485 240 0 FreeSans 560 90 0 0 la_data_in[77] +flabel metal2 s 398858 -800 398970 480 0 FreeSans 1120 90 0 0 la_data_in[77] port 266 nsew signal input -flabel metal2 s 201202 -400 201258 240 0 FreeSans 560 90 0 0 la_data_in[78] +flabel metal2 s 402404 -800 402516 480 0 FreeSans 1120 90 0 0 la_data_in[78] port 267 nsew signal input -flabel metal2 s 202975 -400 203031 240 0 FreeSans 560 90 0 0 la_data_in[79] +flabel metal2 s 405950 -800 406062 480 0 FreeSans 1120 90 0 0 la_data_in[79] port 268 nsew signal input -flabel metal2 s 75319 -400 75375 240 0 FreeSans 560 90 0 0 la_data_in[7] +flabel metal2 s 150638 -800 150750 480 0 FreeSans 1120 90 0 0 la_data_in[7] port 269 nsew signal input -flabel metal2 s 204748 -400 204804 240 0 FreeSans 560 90 0 0 la_data_in[80] +flabel metal2 s 409496 -800 409608 480 0 FreeSans 1120 90 0 0 la_data_in[80] port 270 nsew signal input -flabel metal2 s 206521 -400 206577 240 0 FreeSans 560 90 0 0 la_data_in[81] +flabel metal2 s 413042 -800 413154 480 0 FreeSans 1120 90 0 0 la_data_in[81] port 271 nsew signal input -flabel metal2 s 208294 -400 208350 240 0 FreeSans 560 90 0 0 la_data_in[82] +flabel metal2 s 416588 -800 416700 480 0 FreeSans 1120 90 0 0 la_data_in[82] port 272 nsew signal input -flabel metal2 s 210067 -400 210123 240 0 FreeSans 560 90 0 0 la_data_in[83] +flabel metal2 s 420134 -800 420246 480 0 FreeSans 1120 90 0 0 la_data_in[83] port 273 nsew signal input -flabel metal2 s 211840 -400 211896 240 0 FreeSans 560 90 0 0 la_data_in[84] +flabel metal2 s 423680 -800 423792 480 0 FreeSans 1120 90 0 0 la_data_in[84] port 274 nsew signal input -flabel metal2 s 213613 -400 213669 240 0 FreeSans 560 90 0 0 la_data_in[85] +flabel metal2 s 427226 -800 427338 480 0 FreeSans 1120 90 0 0 la_data_in[85] port 275 nsew signal input -flabel metal2 s 215386 -400 215442 240 0 FreeSans 560 90 0 0 la_data_in[86] +flabel metal2 s 430772 -800 430884 480 0 FreeSans 1120 90 0 0 la_data_in[86] port 276 nsew signal input -flabel metal2 s 217159 -400 217215 240 0 FreeSans 560 90 0 0 la_data_in[87] +flabel metal2 s 434318 -800 434430 480 0 FreeSans 1120 90 0 0 la_data_in[87] port 277 nsew signal input -flabel metal2 s 218932 -400 218988 240 0 FreeSans 560 90 0 0 la_data_in[88] +flabel metal2 s 437864 -800 437976 480 0 FreeSans 1120 90 0 0 la_data_in[88] port 278 nsew signal input -flabel metal2 s 220705 -400 220761 240 0 FreeSans 560 90 0 0 la_data_in[89] +flabel metal2 s 441410 -800 441522 480 0 FreeSans 1120 90 0 0 la_data_in[89] port 279 nsew signal input -flabel metal2 s 77092 -400 77148 240 0 FreeSans 560 90 0 0 la_data_in[8] +flabel metal2 s 154184 -800 154296 480 0 FreeSans 1120 90 0 0 la_data_in[8] port 280 nsew signal input -flabel metal2 s 222478 -400 222534 240 0 FreeSans 560 90 0 0 la_data_in[90] +flabel metal2 s 444956 -800 445068 480 0 FreeSans 1120 90 0 0 la_data_in[90] port 281 nsew signal input -flabel metal2 s 224251 -400 224307 240 0 FreeSans 560 90 0 0 la_data_in[91] +flabel metal2 s 448502 -800 448614 480 0 FreeSans 1120 90 0 0 la_data_in[91] port 282 nsew signal input -flabel metal2 s 226024 -400 226080 240 0 FreeSans 560 90 0 0 la_data_in[92] +flabel metal2 s 452048 -800 452160 480 0 FreeSans 1120 90 0 0 la_data_in[92] port 283 nsew signal input -flabel metal2 s 227797 -400 227853 240 0 FreeSans 560 90 0 0 la_data_in[93] +flabel metal2 s 455594 -800 455706 480 0 FreeSans 1120 90 0 0 la_data_in[93] port 284 nsew signal input -flabel metal2 s 229570 -400 229626 240 0 FreeSans 560 90 0 0 la_data_in[94] +flabel metal2 s 459140 -800 459252 480 0 FreeSans 1120 90 0 0 la_data_in[94] port 285 nsew signal input -flabel metal2 s 231343 -400 231399 240 0 FreeSans 560 90 0 0 la_data_in[95] +flabel metal2 s 462686 -800 462798 480 0 FreeSans 1120 90 0 0 la_data_in[95] port 286 nsew signal input -flabel metal2 s 233116 -400 233172 240 0 FreeSans 560 90 0 0 la_data_in[96] +flabel metal2 s 466232 -800 466344 480 0 FreeSans 1120 90 0 0 la_data_in[96] port 287 nsew signal input -flabel metal2 s 234889 -400 234945 240 0 FreeSans 560 90 0 0 la_data_in[97] +flabel metal2 s 469778 -800 469890 480 0 FreeSans 1120 90 0 0 la_data_in[97] port 288 nsew signal input -flabel metal2 s 236662 -400 236718 240 0 FreeSans 560 90 0 0 la_data_in[98] +flabel metal2 s 473324 -800 473436 480 0 FreeSans 1120 90 0 0 la_data_in[98] port 289 nsew signal input -flabel metal2 s 238435 -400 238491 240 0 FreeSans 560 90 0 0 la_data_in[99] +flabel metal2 s 476870 -800 476982 480 0 FreeSans 1120 90 0 0 la_data_in[99] port 290 nsew signal input -flabel metal2 s 78865 -400 78921 240 0 FreeSans 560 90 0 0 la_data_in[9] +flabel metal2 s 157730 -800 157842 480 0 FreeSans 1120 90 0 0 la_data_in[9] port 291 nsew signal input -flabel metal2 s 63499 -400 63555 240 0 FreeSans 560 90 0 0 la_data_out[0] +flabel metal2 s 126998 -800 127110 480 0 FreeSans 1120 90 0 0 la_data_out[0] port 292 nsew signal tristate -flabel metal2 s 240799 -400 240855 240 0 FreeSans 560 90 0 0 la_data_out[100] +flabel metal2 s 481598 -800 481710 480 0 FreeSans 1120 90 0 0 la_data_out[100] port 293 nsew signal tristate -flabel metal2 s 242572 -400 242628 240 0 FreeSans 560 90 0 0 la_data_out[101] +flabel metal2 s 485144 -800 485256 480 0 FreeSans 1120 90 0 0 la_data_out[101] port 294 nsew signal tristate -flabel metal2 s 244345 -400 244401 240 0 FreeSans 560 90 0 0 la_data_out[102] +flabel metal2 s 488690 -800 488802 480 0 FreeSans 1120 90 0 0 la_data_out[102] port 295 nsew signal tristate -flabel metal2 s 246118 -400 246174 240 0 FreeSans 560 90 0 0 la_data_out[103] +flabel metal2 s 492236 -800 492348 480 0 FreeSans 1120 90 0 0 la_data_out[103] port 296 nsew signal tristate -flabel metal2 s 247891 -400 247947 240 0 FreeSans 560 90 0 0 la_data_out[104] +flabel metal2 s 495782 -800 495894 480 0 FreeSans 1120 90 0 0 la_data_out[104] port 297 nsew signal tristate -flabel metal2 s 249664 -400 249720 240 0 FreeSans 560 90 0 0 la_data_out[105] +flabel metal2 s 499328 -800 499440 480 0 FreeSans 1120 90 0 0 la_data_out[105] port 298 nsew signal tristate -flabel metal2 s 251437 -400 251493 240 0 FreeSans 560 90 0 0 la_data_out[106] +flabel metal2 s 502874 -800 502986 480 0 FreeSans 1120 90 0 0 la_data_out[106] port 299 nsew signal tristate -flabel metal2 s 253210 -400 253266 240 0 FreeSans 560 90 0 0 la_data_out[107] +flabel metal2 s 506420 -800 506532 480 0 FreeSans 1120 90 0 0 la_data_out[107] port 300 nsew signal tristate -flabel metal2 s 254983 -400 255039 240 0 FreeSans 560 90 0 0 la_data_out[108] +flabel metal2 s 509966 -800 510078 480 0 FreeSans 1120 90 0 0 la_data_out[108] port 301 nsew signal tristate -flabel metal2 s 256756 -400 256812 240 0 FreeSans 560 90 0 0 la_data_out[109] +flabel metal2 s 513512 -800 513624 480 0 FreeSans 1120 90 0 0 la_data_out[109] port 302 nsew signal tristate -flabel metal2 s 81229 -400 81285 240 0 FreeSans 560 90 0 0 la_data_out[10] +flabel metal2 s 162458 -800 162570 480 0 FreeSans 1120 90 0 0 la_data_out[10] port 303 nsew signal tristate -flabel metal2 s 258529 -400 258585 240 0 FreeSans 560 90 0 0 la_data_out[110] +flabel metal2 s 517058 -800 517170 480 0 FreeSans 1120 90 0 0 la_data_out[110] port 304 nsew signal tristate -flabel metal2 s 260302 -400 260358 240 0 FreeSans 560 90 0 0 la_data_out[111] +flabel metal2 s 520604 -800 520716 480 0 FreeSans 1120 90 0 0 la_data_out[111] port 305 nsew signal tristate -flabel metal2 s 262075 -400 262131 240 0 FreeSans 560 90 0 0 la_data_out[112] +flabel metal2 s 524150 -800 524262 480 0 FreeSans 1120 90 0 0 la_data_out[112] port 306 nsew signal tristate -flabel metal2 s 263848 -400 263904 240 0 FreeSans 560 90 0 0 la_data_out[113] +flabel metal2 s 527696 -800 527808 480 0 FreeSans 1120 90 0 0 la_data_out[113] port 307 nsew signal tristate -flabel metal2 s 265621 -400 265677 240 0 FreeSans 560 90 0 0 la_data_out[114] +flabel metal2 s 531242 -800 531354 480 0 FreeSans 1120 90 0 0 la_data_out[114] port 308 nsew signal tristate -flabel metal2 s 267394 -400 267450 240 0 FreeSans 560 90 0 0 la_data_out[115] +flabel metal2 s 534788 -800 534900 480 0 FreeSans 1120 90 0 0 la_data_out[115] port 309 nsew signal tristate -flabel metal2 s 269167 -400 269223 240 0 FreeSans 560 90 0 0 la_data_out[116] +flabel metal2 s 538334 -800 538446 480 0 FreeSans 1120 90 0 0 la_data_out[116] port 310 nsew signal tristate -flabel metal2 s 270940 -400 270996 240 0 FreeSans 560 90 0 0 la_data_out[117] +flabel metal2 s 541880 -800 541992 480 0 FreeSans 1120 90 0 0 la_data_out[117] port 311 nsew signal tristate -flabel metal2 s 272713 -400 272769 240 0 FreeSans 560 90 0 0 la_data_out[118] +flabel metal2 s 545426 -800 545538 480 0 FreeSans 1120 90 0 0 la_data_out[118] port 312 nsew signal tristate -flabel metal2 s 274486 -400 274542 240 0 FreeSans 560 90 0 0 la_data_out[119] +flabel metal2 s 548972 -800 549084 480 0 FreeSans 1120 90 0 0 la_data_out[119] port 313 nsew signal tristate -flabel metal2 s 83002 -400 83058 240 0 FreeSans 560 90 0 0 la_data_out[11] +flabel metal2 s 166004 -800 166116 480 0 FreeSans 1120 90 0 0 la_data_out[11] port 314 nsew signal tristate -flabel metal2 s 276259 -400 276315 240 0 FreeSans 560 90 0 0 la_data_out[120] +flabel metal2 s 552518 -800 552630 480 0 FreeSans 1120 90 0 0 la_data_out[120] port 315 nsew signal tristate -flabel metal2 s 278032 -400 278088 240 0 FreeSans 560 90 0 0 la_data_out[121] +flabel metal2 s 556064 -800 556176 480 0 FreeSans 1120 90 0 0 la_data_out[121] port 316 nsew signal tristate -flabel metal2 s 279805 -400 279861 240 0 FreeSans 560 90 0 0 la_data_out[122] +flabel metal2 s 559610 -800 559722 480 0 FreeSans 1120 90 0 0 la_data_out[122] port 317 nsew signal tristate -flabel metal2 s 281578 -400 281634 240 0 FreeSans 560 90 0 0 la_data_out[123] +flabel metal2 s 563156 -800 563268 480 0 FreeSans 1120 90 0 0 la_data_out[123] port 318 nsew signal tristate -flabel metal2 s 283351 -400 283407 240 0 FreeSans 560 90 0 0 la_data_out[124] +flabel metal2 s 566702 -800 566814 480 0 FreeSans 1120 90 0 0 la_data_out[124] port 319 nsew signal tristate -flabel metal2 s 285124 -400 285180 240 0 FreeSans 560 90 0 0 la_data_out[125] +flabel metal2 s 570248 -800 570360 480 0 FreeSans 1120 90 0 0 la_data_out[125] port 320 nsew signal tristate -flabel metal2 s 286897 -400 286953 240 0 FreeSans 560 90 0 0 la_data_out[126] +flabel metal2 s 573794 -800 573906 480 0 FreeSans 1120 90 0 0 la_data_out[126] port 321 nsew signal tristate -flabel metal2 s 288670 -400 288726 240 0 FreeSans 560 90 0 0 la_data_out[127] +flabel metal2 s 577340 -800 577452 480 0 FreeSans 1120 90 0 0 la_data_out[127] port 322 nsew signal tristate -flabel metal2 s 84775 -400 84831 240 0 FreeSans 560 90 0 0 la_data_out[12] +flabel metal2 s 169550 -800 169662 480 0 FreeSans 1120 90 0 0 la_data_out[12] port 323 nsew signal tristate -flabel metal2 s 86548 -400 86604 240 0 FreeSans 560 90 0 0 la_data_out[13] +flabel metal2 s 173096 -800 173208 480 0 FreeSans 1120 90 0 0 la_data_out[13] port 324 nsew signal tristate -flabel metal2 s 88321 -400 88377 240 0 FreeSans 560 90 0 0 la_data_out[14] +flabel metal2 s 176642 -800 176754 480 0 FreeSans 1120 90 0 0 la_data_out[14] port 325 nsew signal tristate -flabel metal2 s 90094 -400 90150 240 0 FreeSans 560 90 0 0 la_data_out[15] +flabel metal2 s 180188 -800 180300 480 0 FreeSans 1120 90 0 0 la_data_out[15] port 326 nsew signal tristate -flabel metal2 s 91867 -400 91923 240 0 FreeSans 560 90 0 0 la_data_out[16] +flabel metal2 s 183734 -800 183846 480 0 FreeSans 1120 90 0 0 la_data_out[16] port 327 nsew signal tristate -flabel metal2 s 93640 -400 93696 240 0 FreeSans 560 90 0 0 la_data_out[17] +flabel metal2 s 187280 -800 187392 480 0 FreeSans 1120 90 0 0 la_data_out[17] port 328 nsew signal tristate -flabel metal2 s 95413 -400 95469 240 0 FreeSans 560 90 0 0 la_data_out[18] +flabel metal2 s 190826 -800 190938 480 0 FreeSans 1120 90 0 0 la_data_out[18] port 329 nsew signal tristate -flabel metal2 s 97186 -400 97242 240 0 FreeSans 560 90 0 0 la_data_out[19] +flabel metal2 s 194372 -800 194484 480 0 FreeSans 1120 90 0 0 la_data_out[19] port 330 nsew signal tristate -flabel metal2 s 65272 -400 65328 240 0 FreeSans 560 90 0 0 la_data_out[1] +flabel metal2 s 130544 -800 130656 480 0 FreeSans 1120 90 0 0 la_data_out[1] port 331 nsew signal tristate -flabel metal2 s 98959 -400 99015 240 0 FreeSans 560 90 0 0 la_data_out[20] +flabel metal2 s 197918 -800 198030 480 0 FreeSans 1120 90 0 0 la_data_out[20] port 332 nsew signal tristate -flabel metal2 s 100732 -400 100788 240 0 FreeSans 560 90 0 0 la_data_out[21] +flabel metal2 s 201464 -800 201576 480 0 FreeSans 1120 90 0 0 la_data_out[21] port 333 nsew signal tristate -flabel metal2 s 102505 -400 102561 240 0 FreeSans 560 90 0 0 la_data_out[22] +flabel metal2 s 205010 -800 205122 480 0 FreeSans 1120 90 0 0 la_data_out[22] port 334 nsew signal tristate -flabel metal2 s 104278 -400 104334 240 0 FreeSans 560 90 0 0 la_data_out[23] +flabel metal2 s 208556 -800 208668 480 0 FreeSans 1120 90 0 0 la_data_out[23] port 335 nsew signal tristate -flabel metal2 s 106051 -400 106107 240 0 FreeSans 560 90 0 0 la_data_out[24] +flabel metal2 s 212102 -800 212214 480 0 FreeSans 1120 90 0 0 la_data_out[24] port 336 nsew signal tristate -flabel metal2 s 107824 -400 107880 240 0 FreeSans 560 90 0 0 la_data_out[25] +flabel metal2 s 215648 -800 215760 480 0 FreeSans 1120 90 0 0 la_data_out[25] port 337 nsew signal tristate -flabel metal2 s 109597 -400 109653 240 0 FreeSans 560 90 0 0 la_data_out[26] +flabel metal2 s 219194 -800 219306 480 0 FreeSans 1120 90 0 0 la_data_out[26] port 338 nsew signal tristate -flabel metal2 s 111370 -400 111426 240 0 FreeSans 560 90 0 0 la_data_out[27] +flabel metal2 s 222740 -800 222852 480 0 FreeSans 1120 90 0 0 la_data_out[27] port 339 nsew signal tristate -flabel metal2 s 113143 -400 113199 240 0 FreeSans 560 90 0 0 la_data_out[28] +flabel metal2 s 226286 -800 226398 480 0 FreeSans 1120 90 0 0 la_data_out[28] port 340 nsew signal tristate -flabel metal2 s 114916 -400 114972 240 0 FreeSans 560 90 0 0 la_data_out[29] +flabel metal2 s 229832 -800 229944 480 0 FreeSans 1120 90 0 0 la_data_out[29] port 341 nsew signal tristate -flabel metal2 s 67045 -400 67101 240 0 FreeSans 560 90 0 0 la_data_out[2] +flabel metal2 s 134090 -800 134202 480 0 FreeSans 1120 90 0 0 la_data_out[2] port 342 nsew signal tristate -flabel metal2 s 116689 -400 116745 240 0 FreeSans 560 90 0 0 la_data_out[30] +flabel metal2 s 233378 -800 233490 480 0 FreeSans 1120 90 0 0 la_data_out[30] port 343 nsew signal tristate -flabel metal2 s 118462 -400 118518 240 0 FreeSans 560 90 0 0 la_data_out[31] +flabel metal2 s 236924 -800 237036 480 0 FreeSans 1120 90 0 0 la_data_out[31] port 344 nsew signal tristate -flabel metal2 s 120235 -400 120291 240 0 FreeSans 560 90 0 0 la_data_out[32] +flabel metal2 s 240470 -800 240582 480 0 FreeSans 1120 90 0 0 la_data_out[32] port 345 nsew signal tristate -flabel metal2 s 122008 -400 122064 240 0 FreeSans 560 90 0 0 la_data_out[33] +flabel metal2 s 244016 -800 244128 480 0 FreeSans 1120 90 0 0 la_data_out[33] port 346 nsew signal tristate -flabel metal2 s 123781 -400 123837 240 0 FreeSans 560 90 0 0 la_data_out[34] +flabel metal2 s 247562 -800 247674 480 0 FreeSans 1120 90 0 0 la_data_out[34] port 347 nsew signal tristate -flabel metal2 s 125554 -400 125610 240 0 FreeSans 560 90 0 0 la_data_out[35] +flabel metal2 s 251108 -800 251220 480 0 FreeSans 1120 90 0 0 la_data_out[35] port 348 nsew signal tristate -flabel metal2 s 127327 -400 127383 240 0 FreeSans 560 90 0 0 la_data_out[36] +flabel metal2 s 254654 -800 254766 480 0 FreeSans 1120 90 0 0 la_data_out[36] port 349 nsew signal tristate -flabel metal2 s 129100 -400 129156 240 0 FreeSans 560 90 0 0 la_data_out[37] +flabel metal2 s 258200 -800 258312 480 0 FreeSans 1120 90 0 0 la_data_out[37] port 350 nsew signal tristate -flabel metal2 s 130873 -400 130929 240 0 FreeSans 560 90 0 0 la_data_out[38] +flabel metal2 s 261746 -800 261858 480 0 FreeSans 1120 90 0 0 la_data_out[38] port 351 nsew signal tristate -flabel metal2 s 132646 -400 132702 240 0 FreeSans 560 90 0 0 la_data_out[39] +flabel metal2 s 265292 -800 265404 480 0 FreeSans 1120 90 0 0 la_data_out[39] port 352 nsew signal tristate -flabel metal2 s 68818 -400 68874 240 0 FreeSans 560 90 0 0 la_data_out[3] +flabel metal2 s 137636 -800 137748 480 0 FreeSans 1120 90 0 0 la_data_out[3] port 353 nsew signal tristate -flabel metal2 s 134419 -400 134475 240 0 FreeSans 560 90 0 0 la_data_out[40] +flabel metal2 s 268838 -800 268950 480 0 FreeSans 1120 90 0 0 la_data_out[40] port 354 nsew signal tristate -flabel metal2 s 136192 -400 136248 240 0 FreeSans 560 90 0 0 la_data_out[41] +flabel metal2 s 272384 -800 272496 480 0 FreeSans 1120 90 0 0 la_data_out[41] port 355 nsew signal tristate -flabel metal2 s 137965 -400 138021 240 0 FreeSans 560 90 0 0 la_data_out[42] +flabel metal2 s 275930 -800 276042 480 0 FreeSans 1120 90 0 0 la_data_out[42] port 356 nsew signal tristate -flabel metal2 s 139738 -400 139794 240 0 FreeSans 560 90 0 0 la_data_out[43] +flabel metal2 s 279476 -800 279588 480 0 FreeSans 1120 90 0 0 la_data_out[43] port 357 nsew signal tristate -flabel metal2 s 141511 -400 141567 240 0 FreeSans 560 90 0 0 la_data_out[44] +flabel metal2 s 283022 -800 283134 480 0 FreeSans 1120 90 0 0 la_data_out[44] port 358 nsew signal tristate -flabel metal2 s 143284 -400 143340 240 0 FreeSans 560 90 0 0 la_data_out[45] +flabel metal2 s 286568 -800 286680 480 0 FreeSans 1120 90 0 0 la_data_out[45] port 359 nsew signal tristate -flabel metal2 s 145057 -400 145113 240 0 FreeSans 560 90 0 0 la_data_out[46] +flabel metal2 s 290114 -800 290226 480 0 FreeSans 1120 90 0 0 la_data_out[46] port 360 nsew signal tristate -flabel metal2 s 146830 -400 146886 240 0 FreeSans 560 90 0 0 la_data_out[47] +flabel metal2 s 293660 -800 293772 480 0 FreeSans 1120 90 0 0 la_data_out[47] port 361 nsew signal tristate -flabel metal2 s 148603 -400 148659 240 0 FreeSans 560 90 0 0 la_data_out[48] +flabel metal2 s 297206 -800 297318 480 0 FreeSans 1120 90 0 0 la_data_out[48] port 362 nsew signal tristate -flabel metal2 s 150376 -400 150432 240 0 FreeSans 560 90 0 0 la_data_out[49] +flabel metal2 s 300752 -800 300864 480 0 FreeSans 1120 90 0 0 la_data_out[49] port 363 nsew signal tristate -flabel metal2 s 70591 -400 70647 240 0 FreeSans 560 90 0 0 la_data_out[4] +flabel metal2 s 141182 -800 141294 480 0 FreeSans 1120 90 0 0 la_data_out[4] port 364 nsew signal tristate -flabel metal2 s 152149 -400 152205 240 0 FreeSans 560 90 0 0 la_data_out[50] +flabel metal2 s 304298 -800 304410 480 0 FreeSans 1120 90 0 0 la_data_out[50] port 365 nsew signal tristate -flabel metal2 s 153922 -400 153978 240 0 FreeSans 560 90 0 0 la_data_out[51] +flabel metal2 s 307844 -800 307956 480 0 FreeSans 1120 90 0 0 la_data_out[51] port 366 nsew signal tristate -flabel metal2 s 155695 -400 155751 240 0 FreeSans 560 90 0 0 la_data_out[52] +flabel metal2 s 311390 -800 311502 480 0 FreeSans 1120 90 0 0 la_data_out[52] port 367 nsew signal tristate -flabel metal2 s 157468 -400 157524 240 0 FreeSans 560 90 0 0 la_data_out[53] +flabel metal2 s 314936 -800 315048 480 0 FreeSans 1120 90 0 0 la_data_out[53] port 368 nsew signal tristate -flabel metal2 s 159241 -400 159297 240 0 FreeSans 560 90 0 0 la_data_out[54] +flabel metal2 s 318482 -800 318594 480 0 FreeSans 1120 90 0 0 la_data_out[54] port 369 nsew signal tristate -flabel metal2 s 161014 -400 161070 240 0 FreeSans 560 90 0 0 la_data_out[55] +flabel metal2 s 322028 -800 322140 480 0 FreeSans 1120 90 0 0 la_data_out[55] port 370 nsew signal tristate -flabel metal2 s 162787 -400 162843 240 0 FreeSans 560 90 0 0 la_data_out[56] +flabel metal2 s 325574 -800 325686 480 0 FreeSans 1120 90 0 0 la_data_out[56] port 371 nsew signal tristate -flabel metal2 s 164560 -400 164616 240 0 FreeSans 560 90 0 0 la_data_out[57] +flabel metal2 s 329120 -800 329232 480 0 FreeSans 1120 90 0 0 la_data_out[57] port 372 nsew signal tristate -flabel metal2 s 166333 -400 166389 240 0 FreeSans 560 90 0 0 la_data_out[58] +flabel metal2 s 332666 -800 332778 480 0 FreeSans 1120 90 0 0 la_data_out[58] port 373 nsew signal tristate -flabel metal2 s 168106 -400 168162 240 0 FreeSans 560 90 0 0 la_data_out[59] +flabel metal2 s 336212 -800 336324 480 0 FreeSans 1120 90 0 0 la_data_out[59] port 374 nsew signal tristate -flabel metal2 s 72364 -400 72420 240 0 FreeSans 560 90 0 0 la_data_out[5] +flabel metal2 s 144728 -800 144840 480 0 FreeSans 1120 90 0 0 la_data_out[5] port 375 nsew signal tristate -flabel metal2 s 169879 -400 169935 240 0 FreeSans 560 90 0 0 la_data_out[60] +flabel metal2 s 339758 -800 339870 480 0 FreeSans 1120 90 0 0 la_data_out[60] port 376 nsew signal tristate -flabel metal2 s 171652 -400 171708 240 0 FreeSans 560 90 0 0 la_data_out[61] +flabel metal2 s 343304 -800 343416 480 0 FreeSans 1120 90 0 0 la_data_out[61] port 377 nsew signal tristate -flabel metal2 s 173425 -400 173481 240 0 FreeSans 560 90 0 0 la_data_out[62] +flabel metal2 s 346850 -800 346962 480 0 FreeSans 1120 90 0 0 la_data_out[62] port 378 nsew signal tristate -flabel metal2 s 175198 -400 175254 240 0 FreeSans 560 90 0 0 la_data_out[63] +flabel metal2 s 350396 -800 350508 480 0 FreeSans 1120 90 0 0 la_data_out[63] port 379 nsew signal tristate -flabel metal2 s 176971 -400 177027 240 0 FreeSans 560 90 0 0 la_data_out[64] +flabel metal2 s 353942 -800 354054 480 0 FreeSans 1120 90 0 0 la_data_out[64] port 380 nsew signal tristate -flabel metal2 s 178744 -400 178800 240 0 FreeSans 560 90 0 0 la_data_out[65] +flabel metal2 s 357488 -800 357600 480 0 FreeSans 1120 90 0 0 la_data_out[65] port 381 nsew signal tristate -flabel metal2 s 180517 -400 180573 240 0 FreeSans 560 90 0 0 la_data_out[66] +flabel metal2 s 361034 -800 361146 480 0 FreeSans 1120 90 0 0 la_data_out[66] port 382 nsew signal tristate -flabel metal2 s 182290 -400 182346 240 0 FreeSans 560 90 0 0 la_data_out[67] +flabel metal2 s 364580 -800 364692 480 0 FreeSans 1120 90 0 0 la_data_out[67] port 383 nsew signal tristate -flabel metal2 s 184063 -400 184119 240 0 FreeSans 560 90 0 0 la_data_out[68] +flabel metal2 s 368126 -800 368238 480 0 FreeSans 1120 90 0 0 la_data_out[68] port 384 nsew signal tristate -flabel metal2 s 185836 -400 185892 240 0 FreeSans 560 90 0 0 la_data_out[69] +flabel metal2 s 371672 -800 371784 480 0 FreeSans 1120 90 0 0 la_data_out[69] port 385 nsew signal tristate -flabel metal2 s 74137 -400 74193 240 0 FreeSans 560 90 0 0 la_data_out[6] +flabel metal2 s 148274 -800 148386 480 0 FreeSans 1120 90 0 0 la_data_out[6] port 386 nsew signal tristate -flabel metal2 s 187609 -400 187665 240 0 FreeSans 560 90 0 0 la_data_out[70] +flabel metal2 s 375218 -800 375330 480 0 FreeSans 1120 90 0 0 la_data_out[70] port 387 nsew signal tristate -flabel metal2 s 189382 -400 189438 240 0 FreeSans 560 90 0 0 la_data_out[71] +flabel metal2 s 378764 -800 378876 480 0 FreeSans 1120 90 0 0 la_data_out[71] port 388 nsew signal tristate -flabel metal2 s 191155 -400 191211 240 0 FreeSans 560 90 0 0 la_data_out[72] +flabel metal2 s 382310 -800 382422 480 0 FreeSans 1120 90 0 0 la_data_out[72] port 389 nsew signal tristate -flabel metal2 s 192928 -400 192984 240 0 FreeSans 560 90 0 0 la_data_out[73] +flabel metal2 s 385856 -800 385968 480 0 FreeSans 1120 90 0 0 la_data_out[73] port 390 nsew signal tristate -flabel metal2 s 194701 -400 194757 240 0 FreeSans 560 90 0 0 la_data_out[74] +flabel metal2 s 389402 -800 389514 480 0 FreeSans 1120 90 0 0 la_data_out[74] port 391 nsew signal tristate -flabel metal2 s 196474 -400 196530 240 0 FreeSans 560 90 0 0 la_data_out[75] +flabel metal2 s 392948 -800 393060 480 0 FreeSans 1120 90 0 0 la_data_out[75] port 392 nsew signal tristate -flabel metal2 s 198247 -400 198303 240 0 FreeSans 560 90 0 0 la_data_out[76] +flabel metal2 s 396494 -800 396606 480 0 FreeSans 1120 90 0 0 la_data_out[76] port 393 nsew signal tristate -flabel metal2 s 200020 -400 200076 240 0 FreeSans 560 90 0 0 la_data_out[77] +flabel metal2 s 400040 -800 400152 480 0 FreeSans 1120 90 0 0 la_data_out[77] port 394 nsew signal tristate -flabel metal2 s 201793 -400 201849 240 0 FreeSans 560 90 0 0 la_data_out[78] +flabel metal2 s 403586 -800 403698 480 0 FreeSans 1120 90 0 0 la_data_out[78] port 395 nsew signal tristate -flabel metal2 s 203566 -400 203622 240 0 FreeSans 560 90 0 0 la_data_out[79] +flabel metal2 s 407132 -800 407244 480 0 FreeSans 1120 90 0 0 la_data_out[79] port 396 nsew signal tristate -flabel metal2 s 75910 -400 75966 240 0 FreeSans 560 90 0 0 la_data_out[7] +flabel metal2 s 151820 -800 151932 480 0 FreeSans 1120 90 0 0 la_data_out[7] port 397 nsew signal tristate -flabel metal2 s 205339 -400 205395 240 0 FreeSans 560 90 0 0 la_data_out[80] +flabel metal2 s 410678 -800 410790 480 0 FreeSans 1120 90 0 0 la_data_out[80] port 398 nsew signal tristate -flabel metal2 s 207112 -400 207168 240 0 FreeSans 560 90 0 0 la_data_out[81] +flabel metal2 s 414224 -800 414336 480 0 FreeSans 1120 90 0 0 la_data_out[81] port 399 nsew signal tristate -flabel metal2 s 208885 -400 208941 240 0 FreeSans 560 90 0 0 la_data_out[82] +flabel metal2 s 417770 -800 417882 480 0 FreeSans 1120 90 0 0 la_data_out[82] port 400 nsew signal tristate -flabel metal2 s 210658 -400 210714 240 0 FreeSans 560 90 0 0 la_data_out[83] +flabel metal2 s 421316 -800 421428 480 0 FreeSans 1120 90 0 0 la_data_out[83] port 401 nsew signal tristate -flabel metal2 s 212431 -400 212487 240 0 FreeSans 560 90 0 0 la_data_out[84] +flabel metal2 s 424862 -800 424974 480 0 FreeSans 1120 90 0 0 la_data_out[84] port 402 nsew signal tristate -flabel metal2 s 214204 -400 214260 240 0 FreeSans 560 90 0 0 la_data_out[85] +flabel metal2 s 428408 -800 428520 480 0 FreeSans 1120 90 0 0 la_data_out[85] port 403 nsew signal tristate -flabel metal2 s 215977 -400 216033 240 0 FreeSans 560 90 0 0 la_data_out[86] +flabel metal2 s 431954 -800 432066 480 0 FreeSans 1120 90 0 0 la_data_out[86] port 404 nsew signal tristate -flabel metal2 s 217750 -400 217806 240 0 FreeSans 560 90 0 0 la_data_out[87] +flabel metal2 s 435500 -800 435612 480 0 FreeSans 1120 90 0 0 la_data_out[87] port 405 nsew signal tristate -flabel metal2 s 219523 -400 219579 240 0 FreeSans 560 90 0 0 la_data_out[88] +flabel metal2 s 439046 -800 439158 480 0 FreeSans 1120 90 0 0 la_data_out[88] port 406 nsew signal tristate -flabel metal2 s 221296 -400 221352 240 0 FreeSans 560 90 0 0 la_data_out[89] +flabel metal2 s 442592 -800 442704 480 0 FreeSans 1120 90 0 0 la_data_out[89] port 407 nsew signal tristate -flabel metal2 s 77683 -400 77739 240 0 FreeSans 560 90 0 0 la_data_out[8] +flabel metal2 s 155366 -800 155478 480 0 FreeSans 1120 90 0 0 la_data_out[8] port 408 nsew signal tristate -flabel metal2 s 223069 -400 223125 240 0 FreeSans 560 90 0 0 la_data_out[90] +flabel metal2 s 446138 -800 446250 480 0 FreeSans 1120 90 0 0 la_data_out[90] port 409 nsew signal tristate -flabel metal2 s 224842 -400 224898 240 0 FreeSans 560 90 0 0 la_data_out[91] +flabel metal2 s 449684 -800 449796 480 0 FreeSans 1120 90 0 0 la_data_out[91] port 410 nsew signal tristate -flabel metal2 s 226615 -400 226671 240 0 FreeSans 560 90 0 0 la_data_out[92] +flabel metal2 s 453230 -800 453342 480 0 FreeSans 1120 90 0 0 la_data_out[92] port 411 nsew signal tristate -flabel metal2 s 228388 -400 228444 240 0 FreeSans 560 90 0 0 la_data_out[93] +flabel metal2 s 456776 -800 456888 480 0 FreeSans 1120 90 0 0 la_data_out[93] port 412 nsew signal tristate -flabel metal2 s 230161 -400 230217 240 0 FreeSans 560 90 0 0 la_data_out[94] +flabel metal2 s 460322 -800 460434 480 0 FreeSans 1120 90 0 0 la_data_out[94] port 413 nsew signal tristate -flabel metal2 s 231934 -400 231990 240 0 FreeSans 560 90 0 0 la_data_out[95] +flabel metal2 s 463868 -800 463980 480 0 FreeSans 1120 90 0 0 la_data_out[95] port 414 nsew signal tristate -flabel metal2 s 233707 -400 233763 240 0 FreeSans 560 90 0 0 la_data_out[96] +flabel metal2 s 467414 -800 467526 480 0 FreeSans 1120 90 0 0 la_data_out[96] port 415 nsew signal tristate -flabel metal2 s 235480 -400 235536 240 0 FreeSans 560 90 0 0 la_data_out[97] +flabel metal2 s 470960 -800 471072 480 0 FreeSans 1120 90 0 0 la_data_out[97] port 416 nsew signal tristate -flabel metal2 s 237253 -400 237309 240 0 FreeSans 560 90 0 0 la_data_out[98] +flabel metal2 s 474506 -800 474618 480 0 FreeSans 1120 90 0 0 la_data_out[98] port 417 nsew signal tristate -flabel metal2 s 239026 -400 239082 240 0 FreeSans 560 90 0 0 la_data_out[99] +flabel metal2 s 478052 -800 478164 480 0 FreeSans 1120 90 0 0 la_data_out[99] port 418 nsew signal tristate -flabel metal2 s 79456 -400 79512 240 0 FreeSans 560 90 0 0 la_data_out[9] +flabel metal2 s 158912 -800 159024 480 0 FreeSans 1120 90 0 0 la_data_out[9] port 419 nsew signal tristate -flabel metal2 s 64090 -400 64146 240 0 FreeSans 560 90 0 0 la_oenb[0] +flabel metal2 s 128180 -800 128292 480 0 FreeSans 1120 90 0 0 la_oenb[0] port 420 nsew signal input -flabel metal2 s 241390 -400 241446 240 0 FreeSans 560 90 0 0 la_oenb[100] +flabel metal2 s 482780 -800 482892 480 0 FreeSans 1120 90 0 0 la_oenb[100] port 421 nsew signal input -flabel metal2 s 243163 -400 243219 240 0 FreeSans 560 90 0 0 la_oenb[101] +flabel metal2 s 486326 -800 486438 480 0 FreeSans 1120 90 0 0 la_oenb[101] port 422 nsew signal input -flabel metal2 s 244936 -400 244992 240 0 FreeSans 560 90 0 0 la_oenb[102] +flabel metal2 s 489872 -800 489984 480 0 FreeSans 1120 90 0 0 la_oenb[102] port 423 nsew signal input -flabel metal2 s 246709 -400 246765 240 0 FreeSans 560 90 0 0 la_oenb[103] +flabel metal2 s 493418 -800 493530 480 0 FreeSans 1120 90 0 0 la_oenb[103] port 424 nsew signal input -flabel metal2 s 248482 -400 248538 240 0 FreeSans 560 90 0 0 la_oenb[104] +flabel metal2 s 496964 -800 497076 480 0 FreeSans 1120 90 0 0 la_oenb[104] port 425 nsew signal input -flabel metal2 s 250255 -400 250311 240 0 FreeSans 560 90 0 0 la_oenb[105] +flabel metal2 s 500510 -800 500622 480 0 FreeSans 1120 90 0 0 la_oenb[105] port 426 nsew signal input -flabel metal2 s 252028 -400 252084 240 0 FreeSans 560 90 0 0 la_oenb[106] +flabel metal2 s 504056 -800 504168 480 0 FreeSans 1120 90 0 0 la_oenb[106] port 427 nsew signal input -flabel metal2 s 253801 -400 253857 240 0 FreeSans 560 90 0 0 la_oenb[107] +flabel metal2 s 507602 -800 507714 480 0 FreeSans 1120 90 0 0 la_oenb[107] port 428 nsew signal input -flabel metal2 s 255574 -400 255630 240 0 FreeSans 560 90 0 0 la_oenb[108] +flabel metal2 s 511148 -800 511260 480 0 FreeSans 1120 90 0 0 la_oenb[108] port 429 nsew signal input -flabel metal2 s 257347 -400 257403 240 0 FreeSans 560 90 0 0 la_oenb[109] +flabel metal2 s 514694 -800 514806 480 0 FreeSans 1120 90 0 0 la_oenb[109] port 430 nsew signal input -flabel metal2 s 81820 -400 81876 240 0 FreeSans 560 90 0 0 la_oenb[10] +flabel metal2 s 163640 -800 163752 480 0 FreeSans 1120 90 0 0 la_oenb[10] port 431 nsew signal input -flabel metal2 s 259120 -400 259176 240 0 FreeSans 560 90 0 0 la_oenb[110] +flabel metal2 s 518240 -800 518352 480 0 FreeSans 1120 90 0 0 la_oenb[110] port 432 nsew signal input -flabel metal2 s 260893 -400 260949 240 0 FreeSans 560 90 0 0 la_oenb[111] +flabel metal2 s 521786 -800 521898 480 0 FreeSans 1120 90 0 0 la_oenb[111] port 433 nsew signal input -flabel metal2 s 262666 -400 262722 240 0 FreeSans 560 90 0 0 la_oenb[112] +flabel metal2 s 525332 -800 525444 480 0 FreeSans 1120 90 0 0 la_oenb[112] port 434 nsew signal input -flabel metal2 s 264439 -400 264495 240 0 FreeSans 560 90 0 0 la_oenb[113] +flabel metal2 s 528878 -800 528990 480 0 FreeSans 1120 90 0 0 la_oenb[113] port 435 nsew signal input -flabel metal2 s 266212 -400 266268 240 0 FreeSans 560 90 0 0 la_oenb[114] +flabel metal2 s 532424 -800 532536 480 0 FreeSans 1120 90 0 0 la_oenb[114] port 436 nsew signal input -flabel metal2 s 267985 -400 268041 240 0 FreeSans 560 90 0 0 la_oenb[115] +flabel metal2 s 535970 -800 536082 480 0 FreeSans 1120 90 0 0 la_oenb[115] port 437 nsew signal input -flabel metal2 s 269758 -400 269814 240 0 FreeSans 560 90 0 0 la_oenb[116] +flabel metal2 s 539516 -800 539628 480 0 FreeSans 1120 90 0 0 la_oenb[116] port 438 nsew signal input -flabel metal2 s 271531 -400 271587 240 0 FreeSans 560 90 0 0 la_oenb[117] +flabel metal2 s 543062 -800 543174 480 0 FreeSans 1120 90 0 0 la_oenb[117] port 439 nsew signal input -flabel metal2 s 273304 -400 273360 240 0 FreeSans 560 90 0 0 la_oenb[118] +flabel metal2 s 546608 -800 546720 480 0 FreeSans 1120 90 0 0 la_oenb[118] port 440 nsew signal input -flabel metal2 s 275077 -400 275133 240 0 FreeSans 560 90 0 0 la_oenb[119] +flabel metal2 s 550154 -800 550266 480 0 FreeSans 1120 90 0 0 la_oenb[119] port 441 nsew signal input -flabel metal2 s 83593 -400 83649 240 0 FreeSans 560 90 0 0 la_oenb[11] +flabel metal2 s 167186 -800 167298 480 0 FreeSans 1120 90 0 0 la_oenb[11] port 442 nsew signal input -flabel metal2 s 276850 -400 276906 240 0 FreeSans 560 90 0 0 la_oenb[120] +flabel metal2 s 553700 -800 553812 480 0 FreeSans 1120 90 0 0 la_oenb[120] port 443 nsew signal input -flabel metal2 s 278623 -400 278679 240 0 FreeSans 560 90 0 0 la_oenb[121] +flabel metal2 s 557246 -800 557358 480 0 FreeSans 1120 90 0 0 la_oenb[121] port 444 nsew signal input -flabel metal2 s 280396 -400 280452 240 0 FreeSans 560 90 0 0 la_oenb[122] +flabel metal2 s 560792 -800 560904 480 0 FreeSans 1120 90 0 0 la_oenb[122] port 445 nsew signal input -flabel metal2 s 282169 -400 282225 240 0 FreeSans 560 90 0 0 la_oenb[123] +flabel metal2 s 564338 -800 564450 480 0 FreeSans 1120 90 0 0 la_oenb[123] port 446 nsew signal input -flabel metal2 s 283942 -400 283998 240 0 FreeSans 560 90 0 0 la_oenb[124] +flabel metal2 s 567884 -800 567996 480 0 FreeSans 1120 90 0 0 la_oenb[124] port 447 nsew signal input -flabel metal2 s 285715 -400 285771 240 0 FreeSans 560 90 0 0 la_oenb[125] +flabel metal2 s 571430 -800 571542 480 0 FreeSans 1120 90 0 0 la_oenb[125] port 448 nsew signal input -flabel metal2 s 287488 -400 287544 240 0 FreeSans 560 90 0 0 la_oenb[126] +flabel metal2 s 574976 -800 575088 480 0 FreeSans 1120 90 0 0 la_oenb[126] port 449 nsew signal input -flabel metal2 s 289261 -400 289317 240 0 FreeSans 560 90 0 0 la_oenb[127] +flabel metal2 s 578522 -800 578634 480 0 FreeSans 1120 90 0 0 la_oenb[127] port 450 nsew signal input -flabel metal2 s 85366 -400 85422 240 0 FreeSans 560 90 0 0 la_oenb[12] +flabel metal2 s 170732 -800 170844 480 0 FreeSans 1120 90 0 0 la_oenb[12] port 451 nsew signal input -flabel metal2 s 87139 -400 87195 240 0 FreeSans 560 90 0 0 la_oenb[13] +flabel metal2 s 174278 -800 174390 480 0 FreeSans 1120 90 0 0 la_oenb[13] port 452 nsew signal input -flabel metal2 s 88912 -400 88968 240 0 FreeSans 560 90 0 0 la_oenb[14] +flabel metal2 s 177824 -800 177936 480 0 FreeSans 1120 90 0 0 la_oenb[14] port 453 nsew signal input -flabel metal2 s 90685 -400 90741 240 0 FreeSans 560 90 0 0 la_oenb[15] +flabel metal2 s 181370 -800 181482 480 0 FreeSans 1120 90 0 0 la_oenb[15] port 454 nsew signal input -flabel metal2 s 92458 -400 92514 240 0 FreeSans 560 90 0 0 la_oenb[16] +flabel metal2 s 184916 -800 185028 480 0 FreeSans 1120 90 0 0 la_oenb[16] port 455 nsew signal input -flabel metal2 s 94231 -400 94287 240 0 FreeSans 560 90 0 0 la_oenb[17] +flabel metal2 s 188462 -800 188574 480 0 FreeSans 1120 90 0 0 la_oenb[17] port 456 nsew signal input -flabel metal2 s 96004 -400 96060 240 0 FreeSans 560 90 0 0 la_oenb[18] +flabel metal2 s 192008 -800 192120 480 0 FreeSans 1120 90 0 0 la_oenb[18] port 457 nsew signal input -flabel metal2 s 97777 -400 97833 240 0 FreeSans 560 90 0 0 la_oenb[19] +flabel metal2 s 195554 -800 195666 480 0 FreeSans 1120 90 0 0 la_oenb[19] port 458 nsew signal input -flabel metal2 s 65863 -400 65919 240 0 FreeSans 560 90 0 0 la_oenb[1] +flabel metal2 s 131726 -800 131838 480 0 FreeSans 1120 90 0 0 la_oenb[1] port 459 nsew signal input -flabel metal2 s 99550 -400 99606 240 0 FreeSans 560 90 0 0 la_oenb[20] +flabel metal2 s 199100 -800 199212 480 0 FreeSans 1120 90 0 0 la_oenb[20] port 460 nsew signal input -flabel metal2 s 101323 -400 101379 240 0 FreeSans 560 90 0 0 la_oenb[21] +flabel metal2 s 202646 -800 202758 480 0 FreeSans 1120 90 0 0 la_oenb[21] port 461 nsew signal input -flabel metal2 s 103096 -400 103152 240 0 FreeSans 560 90 0 0 la_oenb[22] +flabel metal2 s 206192 -800 206304 480 0 FreeSans 1120 90 0 0 la_oenb[22] port 462 nsew signal input -flabel metal2 s 104869 -400 104925 240 0 FreeSans 560 90 0 0 la_oenb[23] +flabel metal2 s 209738 -800 209850 480 0 FreeSans 1120 90 0 0 la_oenb[23] port 463 nsew signal input -flabel metal2 s 106642 -400 106698 240 0 FreeSans 560 90 0 0 la_oenb[24] +flabel metal2 s 213284 -800 213396 480 0 FreeSans 1120 90 0 0 la_oenb[24] port 464 nsew signal input -flabel metal2 s 108415 -400 108471 240 0 FreeSans 560 90 0 0 la_oenb[25] +flabel metal2 s 216830 -800 216942 480 0 FreeSans 1120 90 0 0 la_oenb[25] port 465 nsew signal input -flabel metal2 s 110188 -400 110244 240 0 FreeSans 560 90 0 0 la_oenb[26] +flabel metal2 s 220376 -800 220488 480 0 FreeSans 1120 90 0 0 la_oenb[26] port 466 nsew signal input -flabel metal2 s 111961 -400 112017 240 0 FreeSans 560 90 0 0 la_oenb[27] +flabel metal2 s 223922 -800 224034 480 0 FreeSans 1120 90 0 0 la_oenb[27] port 467 nsew signal input -flabel metal2 s 113734 -400 113790 240 0 FreeSans 560 90 0 0 la_oenb[28] +flabel metal2 s 227468 -800 227580 480 0 FreeSans 1120 90 0 0 la_oenb[28] port 468 nsew signal input -flabel metal2 s 115507 -400 115563 240 0 FreeSans 560 90 0 0 la_oenb[29] +flabel metal2 s 231014 -800 231126 480 0 FreeSans 1120 90 0 0 la_oenb[29] port 469 nsew signal input -flabel metal2 s 67636 -400 67692 240 0 FreeSans 560 90 0 0 la_oenb[2] +flabel metal2 s 135272 -800 135384 480 0 FreeSans 1120 90 0 0 la_oenb[2] port 470 nsew signal input -flabel metal2 s 117280 -400 117336 240 0 FreeSans 560 90 0 0 la_oenb[30] +flabel metal2 s 234560 -800 234672 480 0 FreeSans 1120 90 0 0 la_oenb[30] port 471 nsew signal input -flabel metal2 s 119053 -400 119109 240 0 FreeSans 560 90 0 0 la_oenb[31] +flabel metal2 s 238106 -800 238218 480 0 FreeSans 1120 90 0 0 la_oenb[31] port 472 nsew signal input -flabel metal2 s 120826 -400 120882 240 0 FreeSans 560 90 0 0 la_oenb[32] +flabel metal2 s 241652 -800 241764 480 0 FreeSans 1120 90 0 0 la_oenb[32] port 473 nsew signal input -flabel metal2 s 122599 -400 122655 240 0 FreeSans 560 90 0 0 la_oenb[33] +flabel metal2 s 245198 -800 245310 480 0 FreeSans 1120 90 0 0 la_oenb[33] port 474 nsew signal input -flabel metal2 s 124372 -400 124428 240 0 FreeSans 560 90 0 0 la_oenb[34] +flabel metal2 s 248744 -800 248856 480 0 FreeSans 1120 90 0 0 la_oenb[34] port 475 nsew signal input -flabel metal2 s 126145 -400 126201 240 0 FreeSans 560 90 0 0 la_oenb[35] +flabel metal2 s 252290 -800 252402 480 0 FreeSans 1120 90 0 0 la_oenb[35] port 476 nsew signal input -flabel metal2 s 127918 -400 127974 240 0 FreeSans 560 90 0 0 la_oenb[36] +flabel metal2 s 255836 -800 255948 480 0 FreeSans 1120 90 0 0 la_oenb[36] port 477 nsew signal input -flabel metal2 s 129691 -400 129747 240 0 FreeSans 560 90 0 0 la_oenb[37] +flabel metal2 s 259382 -800 259494 480 0 FreeSans 1120 90 0 0 la_oenb[37] port 478 nsew signal input -flabel metal2 s 131464 -400 131520 240 0 FreeSans 560 90 0 0 la_oenb[38] +flabel metal2 s 262928 -800 263040 480 0 FreeSans 1120 90 0 0 la_oenb[38] port 479 nsew signal input -flabel metal2 s 133237 -400 133293 240 0 FreeSans 560 90 0 0 la_oenb[39] +flabel metal2 s 266474 -800 266586 480 0 FreeSans 1120 90 0 0 la_oenb[39] port 480 nsew signal input -flabel metal2 s 69409 -400 69465 240 0 FreeSans 560 90 0 0 la_oenb[3] +flabel metal2 s 138818 -800 138930 480 0 FreeSans 1120 90 0 0 la_oenb[3] port 481 nsew signal input -flabel metal2 s 135010 -400 135066 240 0 FreeSans 560 90 0 0 la_oenb[40] +flabel metal2 s 270020 -800 270132 480 0 FreeSans 1120 90 0 0 la_oenb[40] port 482 nsew signal input -flabel metal2 s 136783 -400 136839 240 0 FreeSans 560 90 0 0 la_oenb[41] +flabel metal2 s 273566 -800 273678 480 0 FreeSans 1120 90 0 0 la_oenb[41] port 483 nsew signal input -flabel metal2 s 138556 -400 138612 240 0 FreeSans 560 90 0 0 la_oenb[42] +flabel metal2 s 277112 -800 277224 480 0 FreeSans 1120 90 0 0 la_oenb[42] port 484 nsew signal input -flabel metal2 s 140329 -400 140385 240 0 FreeSans 560 90 0 0 la_oenb[43] +flabel metal2 s 280658 -800 280770 480 0 FreeSans 1120 90 0 0 la_oenb[43] port 485 nsew signal input -flabel metal2 s 142102 -400 142158 240 0 FreeSans 560 90 0 0 la_oenb[44] +flabel metal2 s 284204 -800 284316 480 0 FreeSans 1120 90 0 0 la_oenb[44] port 486 nsew signal input -flabel metal2 s 143875 -400 143931 240 0 FreeSans 560 90 0 0 la_oenb[45] +flabel metal2 s 287750 -800 287862 480 0 FreeSans 1120 90 0 0 la_oenb[45] port 487 nsew signal input -flabel metal2 s 145648 -400 145704 240 0 FreeSans 560 90 0 0 la_oenb[46] +flabel metal2 s 291296 -800 291408 480 0 FreeSans 1120 90 0 0 la_oenb[46] port 488 nsew signal input -flabel metal2 s 147421 -400 147477 240 0 FreeSans 560 90 0 0 la_oenb[47] +flabel metal2 s 294842 -800 294954 480 0 FreeSans 1120 90 0 0 la_oenb[47] port 489 nsew signal input -flabel metal2 s 149194 -400 149250 240 0 FreeSans 560 90 0 0 la_oenb[48] +flabel metal2 s 298388 -800 298500 480 0 FreeSans 1120 90 0 0 la_oenb[48] port 490 nsew signal input -flabel metal2 s 150967 -400 151023 240 0 FreeSans 560 90 0 0 la_oenb[49] +flabel metal2 s 301934 -800 302046 480 0 FreeSans 1120 90 0 0 la_oenb[49] port 491 nsew signal input -flabel metal2 s 71182 -400 71238 240 0 FreeSans 560 90 0 0 la_oenb[4] +flabel metal2 s 142364 -800 142476 480 0 FreeSans 1120 90 0 0 la_oenb[4] port 492 nsew signal input -flabel metal2 s 152740 -400 152796 240 0 FreeSans 560 90 0 0 la_oenb[50] +flabel metal2 s 305480 -800 305592 480 0 FreeSans 1120 90 0 0 la_oenb[50] port 493 nsew signal input -flabel metal2 s 154513 -400 154569 240 0 FreeSans 560 90 0 0 la_oenb[51] +flabel metal2 s 309026 -800 309138 480 0 FreeSans 1120 90 0 0 la_oenb[51] port 494 nsew signal input -flabel metal2 s 156286 -400 156342 240 0 FreeSans 560 90 0 0 la_oenb[52] +flabel metal2 s 312572 -800 312684 480 0 FreeSans 1120 90 0 0 la_oenb[52] port 495 nsew signal input -flabel metal2 s 158059 -400 158115 240 0 FreeSans 560 90 0 0 la_oenb[53] +flabel metal2 s 316118 -800 316230 480 0 FreeSans 1120 90 0 0 la_oenb[53] port 496 nsew signal input -flabel metal2 s 159832 -400 159888 240 0 FreeSans 560 90 0 0 la_oenb[54] +flabel metal2 s 319664 -800 319776 480 0 FreeSans 1120 90 0 0 la_oenb[54] port 497 nsew signal input -flabel metal2 s 161605 -400 161661 240 0 FreeSans 560 90 0 0 la_oenb[55] +flabel metal2 s 323210 -800 323322 480 0 FreeSans 1120 90 0 0 la_oenb[55] port 498 nsew signal input -flabel metal2 s 163378 -400 163434 240 0 FreeSans 560 90 0 0 la_oenb[56] +flabel metal2 s 326756 -800 326868 480 0 FreeSans 1120 90 0 0 la_oenb[56] port 499 nsew signal input -flabel metal2 s 165151 -400 165207 240 0 FreeSans 560 90 0 0 la_oenb[57] +flabel metal2 s 330302 -800 330414 480 0 FreeSans 1120 90 0 0 la_oenb[57] port 500 nsew signal input -flabel metal2 s 166924 -400 166980 240 0 FreeSans 560 90 0 0 la_oenb[58] +flabel metal2 s 333848 -800 333960 480 0 FreeSans 1120 90 0 0 la_oenb[58] port 501 nsew signal input -flabel metal2 s 168697 -400 168753 240 0 FreeSans 560 90 0 0 la_oenb[59] +flabel metal2 s 337394 -800 337506 480 0 FreeSans 1120 90 0 0 la_oenb[59] port 502 nsew signal input -flabel metal2 s 72955 -400 73011 240 0 FreeSans 560 90 0 0 la_oenb[5] +flabel metal2 s 145910 -800 146022 480 0 FreeSans 1120 90 0 0 la_oenb[5] port 503 nsew signal input -flabel metal2 s 170470 -400 170526 240 0 FreeSans 560 90 0 0 la_oenb[60] +flabel metal2 s 340940 -800 341052 480 0 FreeSans 1120 90 0 0 la_oenb[60] port 504 nsew signal input -flabel metal2 s 172243 -400 172299 240 0 FreeSans 560 90 0 0 la_oenb[61] +flabel metal2 s 344486 -800 344598 480 0 FreeSans 1120 90 0 0 la_oenb[61] port 505 nsew signal input -flabel metal2 s 174016 -400 174072 240 0 FreeSans 560 90 0 0 la_oenb[62] +flabel metal2 s 348032 -800 348144 480 0 FreeSans 1120 90 0 0 la_oenb[62] port 506 nsew signal input -flabel metal2 s 175789 -400 175845 240 0 FreeSans 560 90 0 0 la_oenb[63] +flabel metal2 s 351578 -800 351690 480 0 FreeSans 1120 90 0 0 la_oenb[63] port 507 nsew signal input -flabel metal2 s 177562 -400 177618 240 0 FreeSans 560 90 0 0 la_oenb[64] +flabel metal2 s 355124 -800 355236 480 0 FreeSans 1120 90 0 0 la_oenb[64] port 508 nsew signal input -flabel metal2 s 179335 -400 179391 240 0 FreeSans 560 90 0 0 la_oenb[65] +flabel metal2 s 358670 -800 358782 480 0 FreeSans 1120 90 0 0 la_oenb[65] port 509 nsew signal input -flabel metal2 s 181108 -400 181164 240 0 FreeSans 560 90 0 0 la_oenb[66] +flabel metal2 s 362216 -800 362328 480 0 FreeSans 1120 90 0 0 la_oenb[66] port 510 nsew signal input -flabel metal2 s 182881 -400 182937 240 0 FreeSans 560 90 0 0 la_oenb[67] +flabel metal2 s 365762 -800 365874 480 0 FreeSans 1120 90 0 0 la_oenb[67] port 511 nsew signal input -flabel metal2 s 184654 -400 184710 240 0 FreeSans 560 90 0 0 la_oenb[68] +flabel metal2 s 369308 -800 369420 480 0 FreeSans 1120 90 0 0 la_oenb[68] port 512 nsew signal input -flabel metal2 s 186427 -400 186483 240 0 FreeSans 560 90 0 0 la_oenb[69] +flabel metal2 s 372854 -800 372966 480 0 FreeSans 1120 90 0 0 la_oenb[69] port 513 nsew signal input -flabel metal2 s 74728 -400 74784 240 0 FreeSans 560 90 0 0 la_oenb[6] +flabel metal2 s 149456 -800 149568 480 0 FreeSans 1120 90 0 0 la_oenb[6] port 514 nsew signal input -flabel metal2 s 188200 -400 188256 240 0 FreeSans 560 90 0 0 la_oenb[70] +flabel metal2 s 376400 -800 376512 480 0 FreeSans 1120 90 0 0 la_oenb[70] port 515 nsew signal input -flabel metal2 s 189973 -400 190029 240 0 FreeSans 560 90 0 0 la_oenb[71] +flabel metal2 s 379946 -800 380058 480 0 FreeSans 1120 90 0 0 la_oenb[71] port 516 nsew signal input -flabel metal2 s 191746 -400 191802 240 0 FreeSans 560 90 0 0 la_oenb[72] +flabel metal2 s 383492 -800 383604 480 0 FreeSans 1120 90 0 0 la_oenb[72] port 517 nsew signal input -flabel metal2 s 193519 -400 193575 240 0 FreeSans 560 90 0 0 la_oenb[73] +flabel metal2 s 387038 -800 387150 480 0 FreeSans 1120 90 0 0 la_oenb[73] port 518 nsew signal input -flabel metal2 s 195292 -400 195348 240 0 FreeSans 560 90 0 0 la_oenb[74] +flabel metal2 s 390584 -800 390696 480 0 FreeSans 1120 90 0 0 la_oenb[74] port 519 nsew signal input -flabel metal2 s 197065 -400 197121 240 0 FreeSans 560 90 0 0 la_oenb[75] +flabel metal2 s 394130 -800 394242 480 0 FreeSans 1120 90 0 0 la_oenb[75] port 520 nsew signal input -flabel metal2 s 198838 -400 198894 240 0 FreeSans 560 90 0 0 la_oenb[76] +flabel metal2 s 397676 -800 397788 480 0 FreeSans 1120 90 0 0 la_oenb[76] port 521 nsew signal input -flabel metal2 s 200611 -400 200667 240 0 FreeSans 560 90 0 0 la_oenb[77] +flabel metal2 s 401222 -800 401334 480 0 FreeSans 1120 90 0 0 la_oenb[77] port 522 nsew signal input -flabel metal2 s 202384 -400 202440 240 0 FreeSans 560 90 0 0 la_oenb[78] +flabel metal2 s 404768 -800 404880 480 0 FreeSans 1120 90 0 0 la_oenb[78] port 523 nsew signal input -flabel metal2 s 204157 -400 204213 240 0 FreeSans 560 90 0 0 la_oenb[79] +flabel metal2 s 408314 -800 408426 480 0 FreeSans 1120 90 0 0 la_oenb[79] port 524 nsew signal input -flabel metal2 s 76501 -400 76557 240 0 FreeSans 560 90 0 0 la_oenb[7] +flabel metal2 s 153002 -800 153114 480 0 FreeSans 1120 90 0 0 la_oenb[7] port 525 nsew signal input -flabel metal2 s 205930 -400 205986 240 0 FreeSans 560 90 0 0 la_oenb[80] +flabel metal2 s 411860 -800 411972 480 0 FreeSans 1120 90 0 0 la_oenb[80] port 526 nsew signal input -flabel metal2 s 207703 -400 207759 240 0 FreeSans 560 90 0 0 la_oenb[81] +flabel metal2 s 415406 -800 415518 480 0 FreeSans 1120 90 0 0 la_oenb[81] port 527 nsew signal input -flabel metal2 s 209476 -400 209532 240 0 FreeSans 560 90 0 0 la_oenb[82] +flabel metal2 s 418952 -800 419064 480 0 FreeSans 1120 90 0 0 la_oenb[82] port 528 nsew signal input -flabel metal2 s 211249 -400 211305 240 0 FreeSans 560 90 0 0 la_oenb[83] +flabel metal2 s 422498 -800 422610 480 0 FreeSans 1120 90 0 0 la_oenb[83] port 529 nsew signal input -flabel metal2 s 213022 -400 213078 240 0 FreeSans 560 90 0 0 la_oenb[84] +flabel metal2 s 426044 -800 426156 480 0 FreeSans 1120 90 0 0 la_oenb[84] port 530 nsew signal input -flabel metal2 s 214795 -400 214851 240 0 FreeSans 560 90 0 0 la_oenb[85] +flabel metal2 s 429590 -800 429702 480 0 FreeSans 1120 90 0 0 la_oenb[85] port 531 nsew signal input -flabel metal2 s 216568 -400 216624 240 0 FreeSans 560 90 0 0 la_oenb[86] +flabel metal2 s 433136 -800 433248 480 0 FreeSans 1120 90 0 0 la_oenb[86] port 532 nsew signal input -flabel metal2 s 218341 -400 218397 240 0 FreeSans 560 90 0 0 la_oenb[87] +flabel metal2 s 436682 -800 436794 480 0 FreeSans 1120 90 0 0 la_oenb[87] port 533 nsew signal input -flabel metal2 s 220114 -400 220170 240 0 FreeSans 560 90 0 0 la_oenb[88] +flabel metal2 s 440228 -800 440340 480 0 FreeSans 1120 90 0 0 la_oenb[88] port 534 nsew signal input -flabel metal2 s 221887 -400 221943 240 0 FreeSans 560 90 0 0 la_oenb[89] +flabel metal2 s 443774 -800 443886 480 0 FreeSans 1120 90 0 0 la_oenb[89] port 535 nsew signal input -flabel metal2 s 78274 -400 78330 240 0 FreeSans 560 90 0 0 la_oenb[8] +flabel metal2 s 156548 -800 156660 480 0 FreeSans 1120 90 0 0 la_oenb[8] port 536 nsew signal input -flabel metal2 s 223660 -400 223716 240 0 FreeSans 560 90 0 0 la_oenb[90] +flabel metal2 s 447320 -800 447432 480 0 FreeSans 1120 90 0 0 la_oenb[90] port 537 nsew signal input -flabel metal2 s 225433 -400 225489 240 0 FreeSans 560 90 0 0 la_oenb[91] +flabel metal2 s 450866 -800 450978 480 0 FreeSans 1120 90 0 0 la_oenb[91] port 538 nsew signal input -flabel metal2 s 227206 -400 227262 240 0 FreeSans 560 90 0 0 la_oenb[92] +flabel metal2 s 454412 -800 454524 480 0 FreeSans 1120 90 0 0 la_oenb[92] port 539 nsew signal input -flabel metal2 s 228979 -400 229035 240 0 FreeSans 560 90 0 0 la_oenb[93] +flabel metal2 s 457958 -800 458070 480 0 FreeSans 1120 90 0 0 la_oenb[93] port 540 nsew signal input -flabel metal2 s 230752 -400 230808 240 0 FreeSans 560 90 0 0 la_oenb[94] +flabel metal2 s 461504 -800 461616 480 0 FreeSans 1120 90 0 0 la_oenb[94] port 541 nsew signal input -flabel metal2 s 232525 -400 232581 240 0 FreeSans 560 90 0 0 la_oenb[95] +flabel metal2 s 465050 -800 465162 480 0 FreeSans 1120 90 0 0 la_oenb[95] port 542 nsew signal input -flabel metal2 s 234298 -400 234354 240 0 FreeSans 560 90 0 0 la_oenb[96] +flabel metal2 s 468596 -800 468708 480 0 FreeSans 1120 90 0 0 la_oenb[96] port 543 nsew signal input -flabel metal2 s 236071 -400 236127 240 0 FreeSans 560 90 0 0 la_oenb[97] +flabel metal2 s 472142 -800 472254 480 0 FreeSans 1120 90 0 0 la_oenb[97] port 544 nsew signal input -flabel metal2 s 237844 -400 237900 240 0 FreeSans 560 90 0 0 la_oenb[98] +flabel metal2 s 475688 -800 475800 480 0 FreeSans 1120 90 0 0 la_oenb[98] port 545 nsew signal input -flabel metal2 s 239617 -400 239673 240 0 FreeSans 560 90 0 0 la_oenb[99] +flabel metal2 s 479234 -800 479346 480 0 FreeSans 1120 90 0 0 la_oenb[99] port 546 nsew signal input -flabel metal2 s 80047 -400 80103 240 0 FreeSans 560 90 0 0 la_oenb[9] +flabel metal2 s 160094 -800 160206 480 0 FreeSans 1120 90 0 0 la_oenb[9] port 547 nsew signal input -flabel metal2 s 289852 -400 289908 240 0 FreeSans 560 90 0 0 user_clock2 +flabel metal2 s 579704 -800 579816 480 0 FreeSans 1120 90 0 0 user_clock2 port 548 nsew signal input -flabel metal2 s 290443 -400 290499 240 0 FreeSans 560 90 0 0 user_irq[0] +flabel metal2 s 580886 -800 580998 480 0 FreeSans 1120 90 0 0 user_irq[0] port 549 nsew signal tristate -flabel metal2 s 291034 -400 291090 240 0 FreeSans 560 90 0 0 user_irq[1] +flabel metal2 s 582068 -800 582180 480 0 FreeSans 1120 90 0 0 user_irq[1] port 550 nsew signal tristate -flabel metal2 s 291625 -400 291681 240 0 FreeSans 560 90 0 0 user_irq[2] +flabel metal2 s 583250 -800 583362 480 0 FreeSans 1120 90 0 0 user_irq[2] port 551 nsew signal tristate -flabel metal3 s 291170 319892 292400 322292 0 FreeSans 560 0 0 0 vccd1 +flabel metal3 s 582340 639784 584800 644584 0 FreeSans 1120 0 0 0 vccd1 port 552 nsew signal bidirectional -flabel metal3 s 291170 314892 292400 317292 0 FreeSans 560 0 0 0 vccd1 +flabel metal3 s 582340 629784 584800 634584 0 FreeSans 1120 0 0 0 vccd1 port 553 nsew signal bidirectional -flabel metal3 s 0 321921 830 324321 0 FreeSans 560 0 0 0 vccd2 +flabel metal3 s 0 643842 1660 648642 0 FreeSans 1120 0 0 0 vccd2 port 554 nsew signal bidirectional -flabel metal3 s 0 316921 830 319321 0 FreeSans 560 0 0 0 vccd2 +flabel metal3 s 0 633842 1660 638642 0 FreeSans 1120 0 0 0 vccd2 port 555 nsew signal bidirectional -flabel metal3 s 291170 270281 292400 272681 0 FreeSans 560 0 0 0 vdda1 +flabel metal3 s 582340 540562 584800 545362 0 FreeSans 1120 0 0 0 vdda1 port 556 nsew signal bidirectional -flabel metal3 s 291170 275281 292400 277681 0 FreeSans 560 0 0 0 vdda1 +flabel metal3 s 582340 550562 584800 555362 0 FreeSans 1120 0 0 0 vdda1 port 557 nsew signal bidirectional -flabel metal3 s 291170 117615 292400 120015 0 FreeSans 560 0 0 0 vdda1 +flabel metal3 s 582340 235230 584800 240030 0 FreeSans 1120 0 0 0 vdda1 port 558 nsew signal bidirectional -flabel metal3 s 291170 112615 292400 115015 0 FreeSans 560 0 0 0 vdda1 +flabel metal3 s 582340 225230 584800 230030 0 FreeSans 1120 0 0 0 vdda1 port 559 nsew signal bidirectional -flabel metal3 s 0 102444 830 104844 0 FreeSans 560 0 0 0 vdda2 +flabel metal3 s 0 204888 1660 209688 0 FreeSans 1120 0 0 0 vdda2 port 560 nsew signal bidirectional -flabel metal3 s 0 107444 830 109844 0 FreeSans 560 0 0 0 vdda2 +flabel metal3 s 0 214888 1660 219688 0 FreeSans 1120 0 0 0 vdda2 port 561 nsew signal bidirectional -flabel metal3 s 260297 351170 262697 352400 0 FreeSans 960 180 0 0 vssa1 +flabel metal3 s 520594 702340 525394 704800 0 FreeSans 1920 180 0 0 vssa1 port 562 nsew signal bidirectional -flabel metal3 s 255297 351170 257697 352400 0 FreeSans 960 180 0 0 vssa1 +flabel metal3 s 510594 702340 515394 704800 0 FreeSans 1920 180 0 0 vssa1 port 563 nsew signal bidirectional -flabel metal3 s 291170 73415 292400 75815 0 FreeSans 560 0 0 0 vssa1 +flabel metal3 s 582340 146830 584800 151630 0 FreeSans 1120 0 0 0 vssa1 port 564 nsew signal bidirectional -flabel metal3 s 291170 68415 292400 70815 0 FreeSans 560 0 0 0 vssa1 +flabel metal3 s 582340 136830 584800 141630 0 FreeSans 1120 0 0 0 vssa1 port 565 nsew signal bidirectional -flabel metal3 s 0 279721 830 282121 0 FreeSans 560 0 0 0 vssa2 +flabel metal3 s 0 559442 1660 564242 0 FreeSans 1120 0 0 0 vssa2 port 566 nsew signal bidirectional -flabel metal3 s 0 274721 830 277121 0 FreeSans 560 0 0 0 vssa2 +flabel metal3 s 0 549442 1660 554242 0 FreeSans 1120 0 0 0 vssa2 port 567 nsew signal bidirectional -flabel metal3 s 291170 95715 292400 98115 0 FreeSans 560 0 0 0 vssd1 +flabel metal3 s 582340 191430 584800 196230 0 FreeSans 1120 0 0 0 vssd1 port 568 nsew signal bidirectional -flabel metal3 s 291170 90715 292400 93115 0 FreeSans 560 0 0 0 vssd1 +flabel metal3 s 582340 181430 584800 186230 0 FreeSans 1120 0 0 0 vssd1 port 569 nsew signal bidirectional -flabel metal3 s 0 86444 830 88844 0 FreeSans 560 0 0 0 vssd2 +flabel metal3 s 0 172888 1660 177688 0 FreeSans 1120 0 0 0 vssd2 port 570 nsew signal bidirectional -flabel metal3 s 0 81444 830 83844 0 FreeSans 560 0 0 0 vssd2 +flabel metal3 s 0 162888 1660 167688 0 FreeSans 1120 0 0 0 vssd2 port 571 nsew signal bidirectional -flabel metal2 s 262 -400 318 240 0 FreeSans 560 90 0 0 wb_clk_i +flabel metal2 s 524 -800 636 480 0 FreeSans 1120 90 0 0 wb_clk_i port 572 nsew signal input -flabel metal2 s 853 -400 909 240 0 FreeSans 560 90 0 0 wb_rst_i +flabel metal2 s 1706 -800 1818 480 0 FreeSans 1120 90 0 0 wb_rst_i port 573 nsew signal input -flabel metal2 s 1444 -400 1500 240 0 FreeSans 560 90 0 0 wbs_ack_o +flabel metal2 s 2888 -800 3000 480 0 FreeSans 1120 90 0 0 wbs_ack_o port 574 nsew signal tristate -flabel metal2 s 3808 -400 3864 240 0 FreeSans 560 90 0 0 wbs_adr_i[0] +flabel metal2 s 7616 -800 7728 480 0 FreeSans 1120 90 0 0 wbs_adr_i[0] port 575 nsew signal input -flabel metal2 s 23902 -400 23958 240 0 FreeSans 560 90 0 0 wbs_adr_i[10] +flabel metal2 s 47804 -800 47916 480 0 FreeSans 1120 90 0 0 wbs_adr_i[10] port 576 nsew signal input -flabel metal2 s 25675 -400 25731 240 0 FreeSans 560 90 0 0 wbs_adr_i[11] +flabel metal2 s 51350 -800 51462 480 0 FreeSans 1120 90 0 0 wbs_adr_i[11] port 577 nsew signal input -flabel metal2 s 27448 -400 27504 240 0 FreeSans 560 90 0 0 wbs_adr_i[12] +flabel metal2 s 54896 -800 55008 480 0 FreeSans 1120 90 0 0 wbs_adr_i[12] port 578 nsew signal input -flabel metal2 s 29221 -400 29277 240 0 FreeSans 560 90 0 0 wbs_adr_i[13] +flabel metal2 s 58442 -800 58554 480 0 FreeSans 1120 90 0 0 wbs_adr_i[13] port 579 nsew signal input -flabel metal2 s 30994 -400 31050 240 0 FreeSans 560 90 0 0 wbs_adr_i[14] +flabel metal2 s 61988 -800 62100 480 0 FreeSans 1120 90 0 0 wbs_adr_i[14] port 580 nsew signal input -flabel metal2 s 32767 -400 32823 240 0 FreeSans 560 90 0 0 wbs_adr_i[15] +flabel metal2 s 65534 -800 65646 480 0 FreeSans 1120 90 0 0 wbs_adr_i[15] port 581 nsew signal input -flabel metal2 s 34540 -400 34596 240 0 FreeSans 560 90 0 0 wbs_adr_i[16] +flabel metal2 s 69080 -800 69192 480 0 FreeSans 1120 90 0 0 wbs_adr_i[16] port 582 nsew signal input -flabel metal2 s 36313 -400 36369 240 0 FreeSans 560 90 0 0 wbs_adr_i[17] +flabel metal2 s 72626 -800 72738 480 0 FreeSans 1120 90 0 0 wbs_adr_i[17] port 583 nsew signal input -flabel metal2 s 38086 -400 38142 240 0 FreeSans 560 90 0 0 wbs_adr_i[18] +flabel metal2 s 76172 -800 76284 480 0 FreeSans 1120 90 0 0 wbs_adr_i[18] port 584 nsew signal input -flabel metal2 s 39859 -400 39915 240 0 FreeSans 560 90 0 0 wbs_adr_i[19] +flabel metal2 s 79718 -800 79830 480 0 FreeSans 1120 90 0 0 wbs_adr_i[19] port 585 nsew signal input -flabel metal2 s 6172 -400 6228 240 0 FreeSans 560 90 0 0 wbs_adr_i[1] +flabel metal2 s 12344 -800 12456 480 0 FreeSans 1120 90 0 0 wbs_adr_i[1] port 586 nsew signal input -flabel metal2 s 41632 -400 41688 240 0 FreeSans 560 90 0 0 wbs_adr_i[20] +flabel metal2 s 83264 -800 83376 480 0 FreeSans 1120 90 0 0 wbs_adr_i[20] port 587 nsew signal input -flabel metal2 s 43405 -400 43461 240 0 FreeSans 560 90 0 0 wbs_adr_i[21] +flabel metal2 s 86810 -800 86922 480 0 FreeSans 1120 90 0 0 wbs_adr_i[21] port 588 nsew signal input -flabel metal2 s 45178 -400 45234 240 0 FreeSans 560 90 0 0 wbs_adr_i[22] +flabel metal2 s 90356 -800 90468 480 0 FreeSans 1120 90 0 0 wbs_adr_i[22] port 589 nsew signal input -flabel metal2 s 46951 -400 47007 240 0 FreeSans 560 90 0 0 wbs_adr_i[23] +flabel metal2 s 93902 -800 94014 480 0 FreeSans 1120 90 0 0 wbs_adr_i[23] port 590 nsew signal input -flabel metal2 s 48724 -400 48780 240 0 FreeSans 560 90 0 0 wbs_adr_i[24] +flabel metal2 s 97448 -800 97560 480 0 FreeSans 1120 90 0 0 wbs_adr_i[24] port 591 nsew signal input -flabel metal2 s 50497 -400 50553 240 0 FreeSans 560 90 0 0 wbs_adr_i[25] +flabel metal2 s 100994 -800 101106 480 0 FreeSans 1120 90 0 0 wbs_adr_i[25] port 592 nsew signal input -flabel metal2 s 52270 -400 52326 240 0 FreeSans 560 90 0 0 wbs_adr_i[26] +flabel metal2 s 104540 -800 104652 480 0 FreeSans 1120 90 0 0 wbs_adr_i[26] port 593 nsew signal input -flabel metal2 s 54043 -400 54099 240 0 FreeSans 560 90 0 0 wbs_adr_i[27] +flabel metal2 s 108086 -800 108198 480 0 FreeSans 1120 90 0 0 wbs_adr_i[27] port 594 nsew signal input -flabel metal2 s 55816 -400 55872 240 0 FreeSans 560 90 0 0 wbs_adr_i[28] +flabel metal2 s 111632 -800 111744 480 0 FreeSans 1120 90 0 0 wbs_adr_i[28] port 595 nsew signal input -flabel metal2 s 57589 -400 57645 240 0 FreeSans 560 90 0 0 wbs_adr_i[29] +flabel metal2 s 115178 -800 115290 480 0 FreeSans 1120 90 0 0 wbs_adr_i[29] port 596 nsew signal input -flabel metal2 s 8536 -400 8592 240 0 FreeSans 560 90 0 0 wbs_adr_i[2] +flabel metal2 s 17072 -800 17184 480 0 FreeSans 1120 90 0 0 wbs_adr_i[2] port 597 nsew signal input -flabel metal2 s 59362 -400 59418 240 0 FreeSans 560 90 0 0 wbs_adr_i[30] +flabel metal2 s 118724 -800 118836 480 0 FreeSans 1120 90 0 0 wbs_adr_i[30] port 598 nsew signal input -flabel metal2 s 61135 -400 61191 240 0 FreeSans 560 90 0 0 wbs_adr_i[31] +flabel metal2 s 122270 -800 122382 480 0 FreeSans 1120 90 0 0 wbs_adr_i[31] port 599 nsew signal input -flabel metal2 s 10900 -400 10956 240 0 FreeSans 560 90 0 0 wbs_adr_i[3] +flabel metal2 s 21800 -800 21912 480 0 FreeSans 1120 90 0 0 wbs_adr_i[3] port 600 nsew signal input -flabel metal2 s 13264 -400 13320 240 0 FreeSans 560 90 0 0 wbs_adr_i[4] +flabel metal2 s 26528 -800 26640 480 0 FreeSans 1120 90 0 0 wbs_adr_i[4] port 601 nsew signal input -flabel metal2 s 15037 -400 15093 240 0 FreeSans 560 90 0 0 wbs_adr_i[5] +flabel metal2 s 30074 -800 30186 480 0 FreeSans 1120 90 0 0 wbs_adr_i[5] port 602 nsew signal input -flabel metal2 s 16810 -400 16866 240 0 FreeSans 560 90 0 0 wbs_adr_i[6] +flabel metal2 s 33620 -800 33732 480 0 FreeSans 1120 90 0 0 wbs_adr_i[6] port 603 nsew signal input -flabel metal2 s 18583 -400 18639 240 0 FreeSans 560 90 0 0 wbs_adr_i[7] +flabel metal2 s 37166 -800 37278 480 0 FreeSans 1120 90 0 0 wbs_adr_i[7] port 604 nsew signal input -flabel metal2 s 20356 -400 20412 240 0 FreeSans 560 90 0 0 wbs_adr_i[8] +flabel metal2 s 40712 -800 40824 480 0 FreeSans 1120 90 0 0 wbs_adr_i[8] port 605 nsew signal input -flabel metal2 s 22129 -400 22185 240 0 FreeSans 560 90 0 0 wbs_adr_i[9] +flabel metal2 s 44258 -800 44370 480 0 FreeSans 1120 90 0 0 wbs_adr_i[9] port 606 nsew signal input -flabel metal2 s 2035 -400 2091 240 0 FreeSans 560 90 0 0 wbs_cyc_i +flabel metal2 s 4070 -800 4182 480 0 FreeSans 1120 90 0 0 wbs_cyc_i port 607 nsew signal input -flabel metal2 s 4399 -400 4455 240 0 FreeSans 560 90 0 0 wbs_dat_i[0] +flabel metal2 s 8798 -800 8910 480 0 FreeSans 1120 90 0 0 wbs_dat_i[0] port 608 nsew signal input -flabel metal2 s 24493 -400 24549 240 0 FreeSans 560 90 0 0 wbs_dat_i[10] +flabel metal2 s 48986 -800 49098 480 0 FreeSans 1120 90 0 0 wbs_dat_i[10] port 609 nsew signal input -flabel metal2 s 26266 -400 26322 240 0 FreeSans 560 90 0 0 wbs_dat_i[11] +flabel metal2 s 52532 -800 52644 480 0 FreeSans 1120 90 0 0 wbs_dat_i[11] port 610 nsew signal input -flabel metal2 s 28039 -400 28095 240 0 FreeSans 560 90 0 0 wbs_dat_i[12] +flabel metal2 s 56078 -800 56190 480 0 FreeSans 1120 90 0 0 wbs_dat_i[12] port 611 nsew signal input -flabel metal2 s 29812 -400 29868 240 0 FreeSans 560 90 0 0 wbs_dat_i[13] +flabel metal2 s 59624 -800 59736 480 0 FreeSans 1120 90 0 0 wbs_dat_i[13] port 612 nsew signal input -flabel metal2 s 31585 -400 31641 240 0 FreeSans 560 90 0 0 wbs_dat_i[14] +flabel metal2 s 63170 -800 63282 480 0 FreeSans 1120 90 0 0 wbs_dat_i[14] port 613 nsew signal input -flabel metal2 s 33358 -400 33414 240 0 FreeSans 560 90 0 0 wbs_dat_i[15] +flabel metal2 s 66716 -800 66828 480 0 FreeSans 1120 90 0 0 wbs_dat_i[15] port 614 nsew signal input -flabel metal2 s 35131 -400 35187 240 0 FreeSans 560 90 0 0 wbs_dat_i[16] +flabel metal2 s 70262 -800 70374 480 0 FreeSans 1120 90 0 0 wbs_dat_i[16] port 615 nsew signal input -flabel metal2 s 36904 -400 36960 240 0 FreeSans 560 90 0 0 wbs_dat_i[17] +flabel metal2 s 73808 -800 73920 480 0 FreeSans 1120 90 0 0 wbs_dat_i[17] port 616 nsew signal input -flabel metal2 s 38677 -400 38733 240 0 FreeSans 560 90 0 0 wbs_dat_i[18] +flabel metal2 s 77354 -800 77466 480 0 FreeSans 1120 90 0 0 wbs_dat_i[18] port 617 nsew signal input -flabel metal2 s 40450 -400 40506 240 0 FreeSans 560 90 0 0 wbs_dat_i[19] +flabel metal2 s 80900 -800 81012 480 0 FreeSans 1120 90 0 0 wbs_dat_i[19] port 618 nsew signal input -flabel metal2 s 6763 -400 6819 240 0 FreeSans 560 90 0 0 wbs_dat_i[1] +flabel metal2 s 13526 -800 13638 480 0 FreeSans 1120 90 0 0 wbs_dat_i[1] port 619 nsew signal input -flabel metal2 s 42223 -400 42279 240 0 FreeSans 560 90 0 0 wbs_dat_i[20] +flabel metal2 s 84446 -800 84558 480 0 FreeSans 1120 90 0 0 wbs_dat_i[20] port 620 nsew signal input -flabel metal2 s 43996 -400 44052 240 0 FreeSans 560 90 0 0 wbs_dat_i[21] +flabel metal2 s 87992 -800 88104 480 0 FreeSans 1120 90 0 0 wbs_dat_i[21] port 621 nsew signal input -flabel metal2 s 45769 -400 45825 240 0 FreeSans 560 90 0 0 wbs_dat_i[22] +flabel metal2 s 91538 -800 91650 480 0 FreeSans 1120 90 0 0 wbs_dat_i[22] port 622 nsew signal input -flabel metal2 s 47542 -400 47598 240 0 FreeSans 560 90 0 0 wbs_dat_i[23] +flabel metal2 s 95084 -800 95196 480 0 FreeSans 1120 90 0 0 wbs_dat_i[23] port 623 nsew signal input -flabel metal2 s 49315 -400 49371 240 0 FreeSans 560 90 0 0 wbs_dat_i[24] +flabel metal2 s 98630 -800 98742 480 0 FreeSans 1120 90 0 0 wbs_dat_i[24] port 624 nsew signal input -flabel metal2 s 51088 -400 51144 240 0 FreeSans 560 90 0 0 wbs_dat_i[25] +flabel metal2 s 102176 -800 102288 480 0 FreeSans 1120 90 0 0 wbs_dat_i[25] port 625 nsew signal input -flabel metal2 s 52861 -400 52917 240 0 FreeSans 560 90 0 0 wbs_dat_i[26] +flabel metal2 s 105722 -800 105834 480 0 FreeSans 1120 90 0 0 wbs_dat_i[26] port 626 nsew signal input -flabel metal2 s 54634 -400 54690 240 0 FreeSans 560 90 0 0 wbs_dat_i[27] +flabel metal2 s 109268 -800 109380 480 0 FreeSans 1120 90 0 0 wbs_dat_i[27] port 627 nsew signal input -flabel metal2 s 56407 -400 56463 240 0 FreeSans 560 90 0 0 wbs_dat_i[28] +flabel metal2 s 112814 -800 112926 480 0 FreeSans 1120 90 0 0 wbs_dat_i[28] port 628 nsew signal input -flabel metal2 s 58180 -400 58236 240 0 FreeSans 560 90 0 0 wbs_dat_i[29] +flabel metal2 s 116360 -800 116472 480 0 FreeSans 1120 90 0 0 wbs_dat_i[29] port 629 nsew signal input -flabel metal2 s 9127 -400 9183 240 0 FreeSans 560 90 0 0 wbs_dat_i[2] +flabel metal2 s 18254 -800 18366 480 0 FreeSans 1120 90 0 0 wbs_dat_i[2] port 630 nsew signal input -flabel metal2 s 59953 -400 60009 240 0 FreeSans 560 90 0 0 wbs_dat_i[30] +flabel metal2 s 119906 -800 120018 480 0 FreeSans 1120 90 0 0 wbs_dat_i[30] port 631 nsew signal input -flabel metal2 s 61726 -400 61782 240 0 FreeSans 560 90 0 0 wbs_dat_i[31] +flabel metal2 s 123452 -800 123564 480 0 FreeSans 1120 90 0 0 wbs_dat_i[31] port 632 nsew signal input -flabel metal2 s 11491 -400 11547 240 0 FreeSans 560 90 0 0 wbs_dat_i[3] +flabel metal2 s 22982 -800 23094 480 0 FreeSans 1120 90 0 0 wbs_dat_i[3] port 633 nsew signal input -flabel metal2 s 13855 -400 13911 240 0 FreeSans 560 90 0 0 wbs_dat_i[4] +flabel metal2 s 27710 -800 27822 480 0 FreeSans 1120 90 0 0 wbs_dat_i[4] port 634 nsew signal input -flabel metal2 s 15628 -400 15684 240 0 FreeSans 560 90 0 0 wbs_dat_i[5] +flabel metal2 s 31256 -800 31368 480 0 FreeSans 1120 90 0 0 wbs_dat_i[5] port 635 nsew signal input -flabel metal2 s 17401 -400 17457 240 0 FreeSans 560 90 0 0 wbs_dat_i[6] +flabel metal2 s 34802 -800 34914 480 0 FreeSans 1120 90 0 0 wbs_dat_i[6] port 636 nsew signal input -flabel metal2 s 19174 -400 19230 240 0 FreeSans 560 90 0 0 wbs_dat_i[7] +flabel metal2 s 38348 -800 38460 480 0 FreeSans 1120 90 0 0 wbs_dat_i[7] port 637 nsew signal input -flabel metal2 s 20947 -400 21003 240 0 FreeSans 560 90 0 0 wbs_dat_i[8] +flabel metal2 s 41894 -800 42006 480 0 FreeSans 1120 90 0 0 wbs_dat_i[8] port 638 nsew signal input -flabel metal2 s 22720 -400 22776 240 0 FreeSans 560 90 0 0 wbs_dat_i[9] +flabel metal2 s 45440 -800 45552 480 0 FreeSans 1120 90 0 0 wbs_dat_i[9] port 639 nsew signal input -flabel metal2 s 4990 -400 5046 240 0 FreeSans 560 90 0 0 wbs_dat_o[0] +flabel metal2 s 9980 -800 10092 480 0 FreeSans 1120 90 0 0 wbs_dat_o[0] port 640 nsew signal tristate -flabel metal2 s 25084 -400 25140 240 0 FreeSans 560 90 0 0 wbs_dat_o[10] +flabel metal2 s 50168 -800 50280 480 0 FreeSans 1120 90 0 0 wbs_dat_o[10] port 641 nsew signal tristate -flabel metal2 s 26857 -400 26913 240 0 FreeSans 560 90 0 0 wbs_dat_o[11] +flabel metal2 s 53714 -800 53826 480 0 FreeSans 1120 90 0 0 wbs_dat_o[11] port 642 nsew signal tristate -flabel metal2 s 28630 -400 28686 240 0 FreeSans 560 90 0 0 wbs_dat_o[12] +flabel metal2 s 57260 -800 57372 480 0 FreeSans 1120 90 0 0 wbs_dat_o[12] port 643 nsew signal tristate -flabel metal2 s 30403 -400 30459 240 0 FreeSans 560 90 0 0 wbs_dat_o[13] +flabel metal2 s 60806 -800 60918 480 0 FreeSans 1120 90 0 0 wbs_dat_o[13] port 644 nsew signal tristate -flabel metal2 s 32176 -400 32232 240 0 FreeSans 560 90 0 0 wbs_dat_o[14] +flabel metal2 s 64352 -800 64464 480 0 FreeSans 1120 90 0 0 wbs_dat_o[14] port 645 nsew signal tristate -flabel metal2 s 33949 -400 34005 240 0 FreeSans 560 90 0 0 wbs_dat_o[15] +flabel metal2 s 67898 -800 68010 480 0 FreeSans 1120 90 0 0 wbs_dat_o[15] port 646 nsew signal tristate -flabel metal2 s 35722 -400 35778 240 0 FreeSans 560 90 0 0 wbs_dat_o[16] +flabel metal2 s 71444 -800 71556 480 0 FreeSans 1120 90 0 0 wbs_dat_o[16] port 647 nsew signal tristate -flabel metal2 s 37495 -400 37551 240 0 FreeSans 560 90 0 0 wbs_dat_o[17] +flabel metal2 s 74990 -800 75102 480 0 FreeSans 1120 90 0 0 wbs_dat_o[17] port 648 nsew signal tristate -flabel metal2 s 39268 -400 39324 240 0 FreeSans 560 90 0 0 wbs_dat_o[18] +flabel metal2 s 78536 -800 78648 480 0 FreeSans 1120 90 0 0 wbs_dat_o[18] port 649 nsew signal tristate -flabel metal2 s 41041 -400 41097 240 0 FreeSans 560 90 0 0 wbs_dat_o[19] +flabel metal2 s 82082 -800 82194 480 0 FreeSans 1120 90 0 0 wbs_dat_o[19] port 650 nsew signal tristate -flabel metal2 s 7354 -400 7410 240 0 FreeSans 560 90 0 0 wbs_dat_o[1] +flabel metal2 s 14708 -800 14820 480 0 FreeSans 1120 90 0 0 wbs_dat_o[1] port 651 nsew signal tristate -flabel metal2 s 42814 -400 42870 240 0 FreeSans 560 90 0 0 wbs_dat_o[20] +flabel metal2 s 85628 -800 85740 480 0 FreeSans 1120 90 0 0 wbs_dat_o[20] port 652 nsew signal tristate -flabel metal2 s 44587 -400 44643 240 0 FreeSans 560 90 0 0 wbs_dat_o[21] +flabel metal2 s 89174 -800 89286 480 0 FreeSans 1120 90 0 0 wbs_dat_o[21] port 653 nsew signal tristate -flabel metal2 s 46360 -400 46416 240 0 FreeSans 560 90 0 0 wbs_dat_o[22] +flabel metal2 s 92720 -800 92832 480 0 FreeSans 1120 90 0 0 wbs_dat_o[22] port 654 nsew signal tristate -flabel metal2 s 48133 -400 48189 240 0 FreeSans 560 90 0 0 wbs_dat_o[23] +flabel metal2 s 96266 -800 96378 480 0 FreeSans 1120 90 0 0 wbs_dat_o[23] port 655 nsew signal tristate -flabel metal2 s 49906 -400 49962 240 0 FreeSans 560 90 0 0 wbs_dat_o[24] +flabel metal2 s 99812 -800 99924 480 0 FreeSans 1120 90 0 0 wbs_dat_o[24] port 656 nsew signal tristate -flabel metal2 s 51679 -400 51735 240 0 FreeSans 560 90 0 0 wbs_dat_o[25] +flabel metal2 s 103358 -800 103470 480 0 FreeSans 1120 90 0 0 wbs_dat_o[25] port 657 nsew signal tristate -flabel metal2 s 53452 -400 53508 240 0 FreeSans 560 90 0 0 wbs_dat_o[26] +flabel metal2 s 106904 -800 107016 480 0 FreeSans 1120 90 0 0 wbs_dat_o[26] port 658 nsew signal tristate -flabel metal2 s 55225 -400 55281 240 0 FreeSans 560 90 0 0 wbs_dat_o[27] +flabel metal2 s 110450 -800 110562 480 0 FreeSans 1120 90 0 0 wbs_dat_o[27] port 659 nsew signal tristate -flabel metal2 s 56998 -400 57054 240 0 FreeSans 560 90 0 0 wbs_dat_o[28] +flabel metal2 s 113996 -800 114108 480 0 FreeSans 1120 90 0 0 wbs_dat_o[28] port 660 nsew signal tristate -flabel metal2 s 58771 -400 58827 240 0 FreeSans 560 90 0 0 wbs_dat_o[29] +flabel metal2 s 117542 -800 117654 480 0 FreeSans 1120 90 0 0 wbs_dat_o[29] port 661 nsew signal tristate -flabel metal2 s 9718 -400 9774 240 0 FreeSans 560 90 0 0 wbs_dat_o[2] +flabel metal2 s 19436 -800 19548 480 0 FreeSans 1120 90 0 0 wbs_dat_o[2] port 662 nsew signal tristate -flabel metal2 s 60544 -400 60600 240 0 FreeSans 560 90 0 0 wbs_dat_o[30] +flabel metal2 s 121088 -800 121200 480 0 FreeSans 1120 90 0 0 wbs_dat_o[30] port 663 nsew signal tristate -flabel metal2 s 62317 -400 62373 240 0 FreeSans 560 90 0 0 wbs_dat_o[31] +flabel metal2 s 124634 -800 124746 480 0 FreeSans 1120 90 0 0 wbs_dat_o[31] port 664 nsew signal tristate -flabel metal2 s 12082 -400 12138 240 0 FreeSans 560 90 0 0 wbs_dat_o[3] +flabel metal2 s 24164 -800 24276 480 0 FreeSans 1120 90 0 0 wbs_dat_o[3] port 665 nsew signal tristate -flabel metal2 s 14446 -400 14502 240 0 FreeSans 560 90 0 0 wbs_dat_o[4] +flabel metal2 s 28892 -800 29004 480 0 FreeSans 1120 90 0 0 wbs_dat_o[4] port 666 nsew signal tristate -flabel metal2 s 16219 -400 16275 240 0 FreeSans 560 90 0 0 wbs_dat_o[5] +flabel metal2 s 32438 -800 32550 480 0 FreeSans 1120 90 0 0 wbs_dat_o[5] port 667 nsew signal tristate -flabel metal2 s 17992 -400 18048 240 0 FreeSans 560 90 0 0 wbs_dat_o[6] +flabel metal2 s 35984 -800 36096 480 0 FreeSans 1120 90 0 0 wbs_dat_o[6] port 668 nsew signal tristate -flabel metal2 s 19765 -400 19821 240 0 FreeSans 560 90 0 0 wbs_dat_o[7] +flabel metal2 s 39530 -800 39642 480 0 FreeSans 1120 90 0 0 wbs_dat_o[7] port 669 nsew signal tristate -flabel metal2 s 21538 -400 21594 240 0 FreeSans 560 90 0 0 wbs_dat_o[8] +flabel metal2 s 43076 -800 43188 480 0 FreeSans 1120 90 0 0 wbs_dat_o[8] port 670 nsew signal tristate -flabel metal2 s 23311 -400 23367 240 0 FreeSans 560 90 0 0 wbs_dat_o[9] +flabel metal2 s 46622 -800 46734 480 0 FreeSans 1120 90 0 0 wbs_dat_o[9] port 671 nsew signal tristate -flabel metal2 s 5581 -400 5637 240 0 FreeSans 560 90 0 0 wbs_sel_i[0] +flabel metal2 s 11162 -800 11274 480 0 FreeSans 1120 90 0 0 wbs_sel_i[0] port 672 nsew signal input -flabel metal2 s 7945 -400 8001 240 0 FreeSans 560 90 0 0 wbs_sel_i[1] +flabel metal2 s 15890 -800 16002 480 0 FreeSans 1120 90 0 0 wbs_sel_i[1] port 673 nsew signal input -flabel metal2 s 10309 -400 10365 240 0 FreeSans 560 90 0 0 wbs_sel_i[2] +flabel metal2 s 20618 -800 20730 480 0 FreeSans 1120 90 0 0 wbs_sel_i[2] port 674 nsew signal input -flabel metal2 s 12673 -400 12729 240 0 FreeSans 560 90 0 0 wbs_sel_i[3] +flabel metal2 s 25346 -800 25458 480 0 FreeSans 1120 90 0 0 wbs_sel_i[3] port 675 nsew signal input -flabel metal2 s 2626 -400 2682 240 0 FreeSans 560 90 0 0 wbs_stb_i +flabel metal2 s 5252 -800 5364 480 0 FreeSans 1120 90 0 0 wbs_stb_i port 676 nsew signal input -flabel metal2 s 3217 -400 3273 240 0 FreeSans 560 90 0 0 wbs_we_i +flabel metal2 s 6434 -800 6546 480 0 FreeSans 1120 90 0 0 wbs_we_i port 677 nsew signal input +flabel metal3 572152 640142 580220 644150 0 FreeSans 16000 0 0 0 VCCD1 +flabel metal3 567038 550960 577302 554546 0 FreeSans 16000 0 0 0 VDDA1 +flabel metal3 511190 664896 514962 676272 0 FreeSans 16000 90 0 0 VSSA1 +flabel metal3 561703 191929 571721 195859 0 FreeSans 16000 0 0 0 VSSD1 << properties >> -string FIXED_BBOX 0 0 292000 352000 +string FIXED_BBOX 0 0 584000 704000 << end >>