fix vss shorting
3 files changed
tree: f5d7ca69593aeab878db372f619065d34213a750
  1. .github/
  2. docs/
  3. example/
  4. gds/
  5. mag/
  6. netgen/
  7. old-comparator/
  8. openlane/
  9. signoff/
  10. verilog/
  11. xschem/
  12. .gitignore
  13. .gitmodules
  14. .magicrc
  15. EXPORT_BEFORE_PRECHECK.txt
  16. info.yaml
  17. LICENSE
  18. Makefile
  19. README.md
README.md

Caravel Analog User

License CI Caravan Build


Mixed signal tests

Collection of analog and mixed signal test circuits.

Basic goal: a comparator based on the circuit in “CMOS Design” (Jacob Baker).

Extra goals:

  • A small array (eg 1x8) of Flash cells for characterisation
  • An alternative comparator layout using only self-biased amplifiers (no bias voltage required)
  • The digital section of delta-sigma ADC
  • Demo charge pump
  • Sample-and-hold circuit

Refer to README for the sample project documentation.