wire up power to new modules
diff --git a/mag/analog_mux.mag b/mag/analog_mux.mag
index 8da6c11..19fb302 100644
--- a/mag/analog_mux.mag
+++ b/mag/analog_mux.mag
@@ -1,6 +1,6 @@
magic
tech sky130A
-timestamp 1635205324
+timestamp 1636413257
<< nwell >>
rect 1400 1950 2150 2700
rect 1350 -2650 2150 -2000
@@ -431,14 +431,14 @@
rect 2150 -2540 2160 -2160
rect 2340 -2540 2650 -2160
rect 2150 -2700 2650 -2540
-use analog_switch analog_switch_1
-timestamp 1634764606
-transform 1 0 500 0 1 -1150
-box -500 -750 2250 1100
use analog_switch analog_switch_0
-timestamp 1634764606
+timestamp 1636413257
transform 1 0 500 0 1 750
box -500 -750 2250 1100
+use analog_switch analog_switch_1
+timestamp 1636413257
+transform 1 0 500 0 1 -1150
+box -500 -750 2250 1100
<< labels >>
rlabel locali 990 -2040 1040 -1990 1 EN0
rlabel locali 1450 -2010 1490 -1980 1 ENB0
diff --git a/mag/analog_switch.mag b/mag/analog_switch.mag
index 7a3810d..ed91d3b 100644
--- a/mag/analog_switch.mag
+++ b/mag/analog_switch.mag
@@ -1,6 +1,6 @@
magic
tech sky130A
-timestamp 1634764606
+timestamp 1636413257
<< nwell >>
rect 800 -600 2150 900
<< pwell >>
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index fed01de..c2f8cc4 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
-timestamp 1636387400
+timestamp 1636413257
<< locali >>
rect 6700 106200 7700 106500
rect 7300 106140 7700 106200
@@ -23,6 +23,30 @@
rect 7100 104500 7500 104900
rect 12400 103400 13200 104200
<< metal1 >>
+rect 414800 341900 425320 342000
+rect 414800 340700 414900 341900
+rect 416300 341200 425320 341900
+rect 416300 340700 416400 341200
+rect 414800 340600 416400 340700
+rect 469400 339300 470600 339400
+rect 469400 338300 469500 339300
+rect 470500 338300 470600 339300
+rect 469400 336600 470600 338300
+rect 468360 336200 470600 336600
+rect 421200 334980 425320 335000
+rect 421200 334420 421220 334980
+rect 421780 334600 425320 334980
+rect 421780 334420 421800 334600
+rect 421200 334400 421800 334420
+rect 418000 333590 425200 333600
+rect 418000 333500 425320 333590
+rect 418000 332300 418100 333500
+rect 419500 332800 425320 333500
+rect 419500 332300 419600 332800
+rect 418000 332200 419600 332300
+rect 40840 297220 41260 298040
+rect 47960 296920 48300 297740
+rect 40840 293420 41260 294240
rect 7200 108200 8800 108400
rect 2200 107600 3400 107800
rect 2200 106800 2400 107600
@@ -70,6 +94,10 @@
rect 13200 102200 13400 103000
rect 12200 102000 13400 102200
<< via1 >>
+rect 414900 340700 416300 341900
+rect 469500 338300 470500 339300
+rect 421220 334420 421780 334980
+rect 418100 332300 419500 333500
rect 2400 106800 3200 107600
rect 7400 107000 8600 108200
rect 9400 107000 10600 108200
@@ -102,6 +130,45 @@
rect 10600 107000 10800 108200
rect 9200 106800 10800 107000
rect 11200 108200 12800 634000
+rect 414800 341900 416400 342000
+rect 414800 340700 414900 341900
+rect 416300 340700 416400 341900
+rect 43660 302020 43860 302100
+rect 43960 302020 44160 302100
+rect 41560 290600 42560 291140
+rect 45660 290600 46660 291160
+rect 41000 167600 42600 290600
+rect 45600 209600 47200 290600
+rect 414800 239800 416400 340700
+rect 469400 339300 470600 403000
+rect 469400 338300 469500 339300
+rect 470500 338300 470600 339300
+rect 469400 338200 470600 338300
+rect 424400 335800 425320 336200
+rect 468360 335800 471800 336200
+rect 421200 334980 421800 335000
+rect 421200 334420 421220 334980
+rect 421780 334420 421800 334980
+rect 414800 235600 415000 239800
+rect 416200 235600 416400 239800
+rect 414800 235400 416400 235600
+rect 418000 333500 419600 333600
+rect 418000 332300 418100 333500
+rect 419500 332300 419600 333500
+rect 45600 205200 45800 209600
+rect 47000 205200 47200 209600
+rect 45600 205000 47200 205200
+rect 41000 163200 41200 167600
+rect 42400 163200 42600 167600
+rect 41000 163000 42600 163200
+rect 418000 151400 419600 332300
+rect 421200 275600 421800 334420
+rect 424400 331600 424800 335800
+rect 469600 335400 471800 335800
+rect 424400 330800 471800 331600
+rect 418000 147200 418200 151400
+rect 419400 147200 419600 151400
+rect 418000 147000 419600 147200
rect 11200 107000 11400 108200
rect 12600 107000 12800 108200
rect 11200 106800 12800 107000
@@ -633,6 +700,10 @@
rect 9400 205200 10600 209200
rect 7400 163200 8600 167200
rect 2400 124400 3200 125200
+rect 415000 235600 416200 239800
+rect 45800 205200 47000 209600
+rect 41200 163200 42400 167600
+rect 418200 147200 419400 151400
rect 2400 81200 3200 82000
rect 4800 38000 5600 38800
rect 7200 16600 8000 17400
@@ -757,21 +828,31 @@
rect -800 248852 480 248964
rect -800 247670 480 247782
rect -800 246488 480 246600
-rect 458000 235230 584800 240030
+rect 396600 239800 584800 240030
+rect 396600 235600 415000 239800
+rect 416200 235600 584800 239800
+rect 396600 235230 584800 235600
rect 582340 225230 584800 230030
rect -800 214888 1660 219688
-rect -800 209200 52600 209688
+rect -800 209600 52600 209688
+rect -800 209200 45800 209600
rect -800 205200 9400 209200
-rect 10600 205200 52600 209200
+rect 10600 205200 45800 209200
+rect 47000 205200 52600 209600
rect -800 204888 52600 205200
rect 582340 191430 584800 196230
rect 582340 181430 584800 186230
rect -800 172888 1660 177688
-rect -800 167200 49400 167688
+rect -800 167600 49400 167688
+rect -800 167200 41200 167600
rect -800 163200 7400 167200
-rect 8600 163200 49400 167200
+rect 8600 163200 41200 167200
+rect 42400 163200 49400 167600
rect -800 162888 49400 163200
-rect 447200 146830 584800 151630
+rect 400400 151400 584800 151630
+rect 400400 147200 418200 151400
+rect 419400 147200 584800 151400
+rect 400400 146830 584800 147200
rect 582340 136830 584800 141630
rect 2200 125200 3400 125400
rect 2200 125000 2400 125200
@@ -887,12 +968,12 @@
rect -100 0 0 704000
rect 584000 0 584100 704000
rect -100 -100 584100 0
-use myopamp_flat myopamp_flat_0
+use myopamp_flat myopamp_flat_0 zeroToASIC_integration
timestamp 1636387338
-transform 1 0 428519 0 1 332532
+transform 1 0 434519 0 1 332532
box -9200 490 33850 17218
use analog_mux analog_mux_0
-timestamp 1635205324
+timestamp 1636413257
transform 1 0 41360 0 1 296524
box -100 -5400 6600 5500
use comparator comparator_0 comparator
diff --git a/mag/zeroToASIC_integration/myopamp_flat.spice b/mag/zeroToASIC_integration/myopamp_flat.spice
new file mode 100644
index 0000000..77a81d9
--- /dev/null
+++ b/mag/zeroToASIC_integration/myopamp_flat.spice
@@ -0,0 +1,85 @@
+* SPICE3 file created from myopamp_flat.ext - technology: sky130A
+
+.subckt myopamp_flat in_n in_p vdd bias out vss
+X0 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X1 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X2 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X3 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X4 bias bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X5 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X6 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X7 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X8 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X9 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X10 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X11 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X12 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X13 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X14 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X15 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X16 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X17 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X18 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X19 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X20 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X21 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X22 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X23 a_3424_7369# a_n4266_3630# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X24 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X25 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X26 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X27 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X28 a_n4008_3630# bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X29 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X30 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X31 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X32 a_n4266_3630# a_n4266_3630# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X33 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X34 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X35 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X36 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X37 bias bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X38 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X39 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X40 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X41 out a_21439_8488# vss sky130_fd_pr__res_xhigh_po w=690000u l=1e+07u
+X42 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X43 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X44 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X45 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X46 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X47 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X48 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X49 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X50 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X51 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X52 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X53 a_3424_7369# a_n4266_3630# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X54 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X55 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X56 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X57 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X58 a_n4266_3630# a_n4266_3630# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X59 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X60 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X61 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X62 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X63 a_n4008_3630# bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X64 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X65 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X66 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+C0 a_n4008_3630# a_n4266_3630# 13.74fF
+C1 vdd a_n4266_3630# 2.09fF
+C2 bias out 3.22fF
+C3 a_3424_7369# out 4.20fF
+C4 a_3424_7369# a_n4008_3630# 13.74fF
+C5 a_3424_7369# vdd 8.96fF
+C6 out vdd 6.05fF
+C7 a_3424_7369# a_21439_8488# 513.13fF
+C8 in_n a_n4008_3630# 4.06fF
+C9 in_p a_n4008_3630# 4.26fF
+C10 a_n4008_3630# vss 26.41fF
+C11 a_21439_8488# vss 111.08fF
+C12 a_3424_7369# vss 50.37fF
+C13 a_n4266_3630# vss 17.96fF
+.ends
diff --git a/mag/zeroToASIC_integration/myopamp_flat_lvs.spice b/mag/zeroToASIC_integration/myopamp_flat_lvs.spice
new file mode 100644
index 0000000..3b6bace
--- /dev/null
+++ b/mag/zeroToASIC_integration/myopamp_flat_lvs.spice
@@ -0,0 +1,72 @@
+* NGSPICE file created from myopamp_flat.ext - technology: sky130A
+
+.subckt myopamp_flat in_n in_p vdd bias out vss
+X0 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X1 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X2 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X3 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X4 bias bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X5 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X6 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X7 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X8 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X9 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X10 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X11 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X12 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X13 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X14 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X15 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X16 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X17 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X18 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X19 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X20 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X21 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X22 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X23 a_3424_7369# a_n4266_3630# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X24 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X25 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X26 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X27 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X28 a_n4008_3630# bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X29 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X30 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X31 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X32 a_n4266_3630# a_n4266_3630# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X33 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X34 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X35 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X36 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X37 bias bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X38 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X39 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X40 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X41 out a_21439_8488# vss sky130_fd_pr__res_xhigh_po w=690000u l=1e+07u
+X42 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X43 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X44 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X45 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X46 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X47 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X48 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X49 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X50 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X51 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X52 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X53 a_3424_7369# a_n4266_3630# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X54 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X55 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X56 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X57 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X58 a_n4266_3630# a_n4266_3630# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X59 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X60 a_n4008_3630# in_n a_n4266_3630# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X61 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+X62 out bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X63 a_n4008_3630# bias vss vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=2e+06u
+X64 a_3424_7369# a_21439_8488# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+X65 out a_3424_7369# vdd vdd sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=2e+06u
+X66 a_n4008_3630# in_p a_3424_7369# vss sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+07u l=1e+06u
+.ends
+
