| OpenROAD 1 fb8ae93b6c7a5eb0e6fac83360a8a48d76c41885 |
| This program is licensed under the BSD-3 license. See the LICENSE file for details. |
| Components of this program may be licensed under more restrictive licenses which must be honored. |
| [INFO ODB-0222] Reading LEF file: /openLANE_flow/designs/axmul/runs/run1/tmp/merged_unpadded.lef |
| [WARNING ODB-0220] WARNING (LEFPARS-2036): SOURCE statement is obsolete in version 5.6 and later. |
| The LEF parser will ignore this statement. |
| To avoid this warning in the future, remove this statement from the LEF file with version 5.6 or later. See file /openLANE_flow/designs/axmul/runs/run1/tmp/merged_unpadded.lef at line 68110. |
| |
| [INFO ODB-0223] Created 13 technology layers |
| [INFO ODB-0224] Created 25 technology vias |
| [INFO ODB-0225] Created 441 library cells |
| [INFO ODB-0226] Finished LEF file: /openLANE_flow/designs/axmul/runs/run1/tmp/merged_unpadded.lef |
| [INFO ODB-0127] Reading DEF file: /openLANE_flow/designs/axmul/runs/run1/tmp/routing/93-fastroute.def |
| [INFO ODB-0128] Design: axmul |
| [INFO ODB-0130] Created 34 pins. |
| [INFO ODB-0131] Created 51696 components and 193024 component-terminals. |
| [INFO ODB-0132] Created 2 special nets and 192232 connections. |
| [INFO ODB-0133] Created 226 nets and 792 connections. |
| [INFO ODB-0134] Finished DEF file: /openLANE_flow/designs/axmul/runs/run1/tmp/routing/93-fastroute.def |
| [INFO ORD-0030] Using 2 thread(s). |
| [INFO DRT-0149] Reading tech and libs. |
| |
| Units: 1000 |
| Number of layers: 13 |
| Number of macros: 441 |
| Number of vias: 25 |
| Number of viarulegen: 25 |
| |
| [INFO DRT-0150] Reading design. |
| |
| Design: axmul |
| Die area: ( 0 0 ) ( 900000 600000 ) |
| Number of track patterns: 12 |
| Number of DEF vias: 4 |
| Number of components: 51696 |
| Number of terminals: 34 |
| Number of snets: 2 |
| Number of nets: 226 |
| |
| [INFO DRT-0151] Reading guide. |
| |
| Number of guides: 1812 |
| |
| [INFO DRT-0167] List of default vias: |
| Layer mcon |
| default via: L1M1_PR_MR |
| Layer via |
| default via: M1M2_PR |
| Layer via2 |
| default via: M2M3_PR_M |
| Layer via3 |
| default via: M3M4_PR_M |
| Layer via4 |
| default via: M4M5_PR_C |
| [INFO DRT-0162] Library cell analysis. |
| [INFO DRT-0163] Instance analysis. |
| Complete 10000 instances. |
| Complete 20000 instances. |
| Complete 30000 instances. |
| Complete 40000 instances. |
| Complete 50000 instances. |
| [INFO DRT-0164] Number of unique instances = 107. |
| [INFO DRT-0168] Init region query. |
| [INFO DRT-0018] Complete 10000 insts. |
| [INFO DRT-0018] Complete 20000 insts. |
| [INFO DRT-0018] Complete 30000 insts. |
| [INFO DRT-0018] Complete 40000 insts. |
| [INFO DRT-0018] Complete 50000 insts. |
| [INFO DRT-0024] Complete FR_MASTERSLICE. |
| [INFO DRT-0024] Complete FR_VIA. |
| [INFO DRT-0024] Complete li1. |
| [INFO DRT-0024] Complete mcon. |
| [INFO DRT-0024] Complete met1. |
| [INFO DRT-0024] Complete via. |
| [INFO DRT-0024] Complete met2. |
| [INFO DRT-0024] Complete via2. |
| [INFO DRT-0024] Complete met3. |
| [INFO DRT-0024] Complete via3. |
| [INFO DRT-0024] Complete met4. |
| [INFO DRT-0024] Complete via4. |
| [INFO DRT-0024] Complete met5. |
| [INFO DRT-0033] FR_MASTERSLICE shape region query size = 0. |
| [INFO DRT-0033] FR_VIA shape region query size = 0. |
| [INFO DRT-0033] li1 shape region query size = 270320. |
| [INFO DRT-0033] mcon shape region query size = 819186. |
| [INFO DRT-0033] met1 shape region query size = 104928. |
| [INFO DRT-0033] via shape region query size = 6390. |
| [INFO DRT-0033] met2 shape region query size = 2580. |
| [INFO DRT-0033] via2 shape region query size = 5112. |
| [INFO DRT-0033] met3 shape region query size = 2564. |
| [INFO DRT-0033] via3 shape region query size = 5112. |
| [INFO DRT-0033] met4 shape region query size = 1350. |
| [INFO DRT-0033] via4 shape region query size = 48. |
| [INFO DRT-0033] met5 shape region query size = 66. |
| [INFO DRT-0165] Start pin access. |
| [INFO DRT-0076] Complete 100 pins. |
| [INFO DRT-0076] Complete 200 pins. |
| [INFO DRT-0076] Complete 300 pins. |
| [INFO DRT-0078] Complete 316 pins. |
| [INFO DRT-0079] Complete 100 unique inst patterns. |
| [INFO DRT-0081] Complete 101 unique inst patterns. |
| [INFO DRT-0084] Complete 298 groups. |
| #scanned instances = 51696 |
| #unique instances = 107 |
| #stdCellGenAp = 2582 |
| #stdCellValidPlanarAp = 13 |
| #stdCellValidViaAp = 1985 |
| #stdCellPinNoAp = 0 |
| #stdCellPinCnt = 792 |
| #instTermValidViaApCnt = 0 |
| #macroGenAp = 0 |
| #macroValidPlanarAp = 0 |
| #macroValidViaAp = 0 |
| #macroNoAp = 0 |
| [INFO DRT-0166] Complete pin access. |
| [INFO DRT-0267] cpu time = 00:00:03, elapsed time = 00:00:01, memory = 234.95 (MB), peak = 260.33 (MB) |
| [INFO DRT-0169] Post process guides. |
| [INFO DRT-0176] GCELLGRID X 0 DO 86 STEP 6900 ; |
| [INFO DRT-0177] GCELLGRID Y 0 DO 130 STEP 6900 ; |
| [INFO DRT-0028] Complete FR_MASTERSLICE. |
| [INFO DRT-0028] Complete FR_VIA. |
| [INFO DRT-0028] Complete li1. |
| [INFO DRT-0028] Complete mcon. |
| [INFO DRT-0028] Complete met1. |
| [INFO DRT-0028] Complete via. |
| [INFO DRT-0028] Complete met2. |
| [INFO DRT-0028] Complete via2. |
| [INFO DRT-0028] Complete met3. |
| [INFO DRT-0028] Complete via3. |
| [INFO DRT-0028] Complete met4. |
| [INFO DRT-0028] Complete via4. |
| [INFO DRT-0028] Complete met5. |
| [INFO DRT-0178] Init guide query. |
| [INFO DRT-0035] Complete FR_MASTERSLICE (guide). |
| [INFO DRT-0035] Complete FR_VIA (guide). |
| [INFO DRT-0035] Complete li1 (guide). |
| [INFO DRT-0035] Complete mcon (guide). |
| [INFO DRT-0035] Complete met1 (guide). |
| [INFO DRT-0035] Complete via (guide). |
| [INFO DRT-0035] Complete met2 (guide). |
| [INFO DRT-0035] Complete via2 (guide). |
| [INFO DRT-0035] Complete met3 (guide). |
| [INFO DRT-0035] Complete via3 (guide). |
| [INFO DRT-0035] Complete met4 (guide). |
| [INFO DRT-0035] Complete via4 (guide). |
| [INFO DRT-0035] Complete met5 (guide). |
| [INFO DRT-0036] FR_MASTERSLICE guide region query size = 0. |
| [INFO DRT-0036] FR_VIA guide region query size = 0. |
| [INFO DRT-0036] li1 guide region query size = 664. |
| [INFO DRT-0036] mcon guide region query size = 0. |
| [INFO DRT-0036] met1 guide region query size = 591. |
| [INFO DRT-0036] via guide region query size = 0. |
| [INFO DRT-0036] met2 guide region query size = 333. |
| [INFO DRT-0036] via2 guide region query size = 0. |
| [INFO DRT-0036] met3 guide region query size = 18. |
| [INFO DRT-0036] via3 guide region query size = 0. |
| [INFO DRT-0036] met4 guide region query size = 0. |
| [INFO DRT-0036] via4 guide region query size = 0. |
| [INFO DRT-0036] met5 guide region query size = 0. |
| [INFO DRT-0179] Init gr pin query. |
| [INFO DRT-0185] Post process initialize RPin region query. |
| [INFO DRT-0181] Start track assignment. |
| [INFO DRT-0184] Done with 997 vertical wires in 3 frboxes and 609 horizontal wires in 2 frboxes. |
| [INFO DRT-0186] Done with 121 vertical wires in 3 frboxes and 241 horizontal wires in 2 frboxes. |
| [INFO DRT-0182] Complete track assignment. |
| [INFO DRT-0267] cpu time = 00:00:02, elapsed time = 00:00:01, memory = 323.00 (MB), peak = 403.11 (MB) |
| [INFO DRT-0187] Start routing data preparation. |
| [INFO DRT-0267] cpu time = 00:00:00, elapsed time = 00:00:00, memory = 323.00 (MB), peak = 403.11 (MB) |
| [INFO DRT-0194] Start detail routing. |
| [INFO DRT-0195] Start 0th optimization iteration. |
| Completing 10% with 0 violations. |
| elapsed time = 00:00:00, memory = 344.91 (MB). |
| Completing 20% with 0 violations. |
| elapsed time = 00:00:02, memory = 357.52 (MB). |
| Completing 30% with 46 violations. |
| elapsed time = 00:00:03, memory = 357.71 (MB). |
| Completing 40% with 46 violations. |
| elapsed time = 00:00:04, memory = 357.83 (MB). |
| Completing 50% with 46 violations. |
| elapsed time = 00:00:05, memory = 357.83 (MB). |
| Completing 60% with 53 violations. |
| elapsed time = 00:00:06, memory = 357.83 (MB). |
| Completing 70% with 53 violations. |
| elapsed time = 00:00:07, memory = 371.23 (MB). |
| Completing 80% with 155 violations. |
| elapsed time = 00:00:13, memory = 343.52 (MB). |
| Completing 90% with 155 violations. |
| elapsed time = 00:00:14, memory = 345.32 (MB). |
| Completing 100% with 172 violations. |
| elapsed time = 00:00:15, memory = 345.83 (MB). |
| [INFO DRT-0199] Number of violations = 257. |
| [INFO DRT-0267] cpu time = 00:00:27, elapsed time = 00:00:15, memory = 623.92 (MB), peak = 623.92 (MB) |
| Total wire length = 22221 um. |
| Total wire length on LAYER li1 = 2 um. |
| Total wire length on LAYER met1 = 11890 um. |
| Total wire length on LAYER met2 = 9866 um. |
| Total wire length on LAYER met3 = 432 um. |
| Total wire length on LAYER met4 = 30 um. |
| Total wire length on LAYER met5 = 0 um. |
| Total number of vias = 1772. |
| Up-via summary (total 1772):. |
| |
| ----------------------- |
| FR_MASTERSLICE 0 |
| li1 797 |
| met1 901 |
| met2 69 |
| met3 5 |
| met4 0 |
| ----------------------- |
| 1772 |
| |
| |
| [INFO DRT-0195] Start 1st optimization iteration. |
| Completing 10% with 257 violations. |
| elapsed time = 00:00:00, memory = 624.00 (MB). |
| Completing 20% with 257 violations. |
| elapsed time = 00:00:02, memory = 624.70 (MB). |
| Completing 30% with 240 violations. |
| elapsed time = 00:00:02, memory = 624.73 (MB). |
| Completing 40% with 240 violations. |
| elapsed time = 00:00:03, memory = 624.73 (MB). |
| Completing 50% with 240 violations. |
| elapsed time = 00:00:05, memory = 624.77 (MB). |
| Completing 60% with 240 violations. |
| elapsed time = 00:00:06, memory = 625.00 (MB). |
| Completing 70% with 240 violations. |
| elapsed time = 00:00:07, memory = 664.18 (MB). |
