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foss-eda-tools / third_party / shuttle / sky130 / mpw-003 / slot-001 / 47a1fbb0f6e596867db5cb297024f696cc3cd931 / verilog / dv / la_test1
  1. 47a1fbb Merge branch 'main' of https://github.com/efabless/caravel_user_project into efabless-main by Philipp Gühring · 3 years, 4 months ago
  2. ee54cee Update Makefile to work with efabless style by manarabdelaty · 3 years, 7 months ago
  3. f02cd32 Update Makefile PDK_PATH by manarabdelaty · 3 years, 7 months ago
  4. 6f494ed New cells by Philipp Gühring · 3 years, 9 months ago
  5. c89cfac Update to coincide with the most recent commit to the caravel by Tim Edwards · 3 years, 11 months ago
  6. 340cc4a Update full chip simulation to run from root by manarabdelaty · 4 years ago
  7. 22f3cd0 Submodule caravel-lite by manarabdelaty · 4 years ago
  8. c0f458a Update DV Makefile by manarabdelaty · 4 years ago
  9. eac56e8 Rename CARAVEL_MASTER -> CARAVEL_ROOT by manarabdelaty · 4 years ago
  10. 8dbabc1 Update DV Makefiles by manarabdelaty · 4 years ago
  11. 496112a Add CARAVEL_PATH for the testbenches by manarabdelaty · 4 years ago
  12. a63e2e6 Makefile and RTL updates to run GL sim by manarabdelaty · 4 years ago
  13. 69bd326 Updated DV tests by manarabdelaty · 4 years ago