Added the magic, gds, and verilog modules for the test structure. Still need to put the verilog instance into the wrapper and assign pin connections
diff --git a/gds/sky130_hilas_TopLevelTestStructure.gds b/gds/sky130_hilas_TopLevelTestStructure.gds
new file mode 100644
index 0000000..2bfb683
--- /dev/null
+++ b/gds/sky130_hilas_TopLevelTestStructure.gds
Binary files differ
diff --git a/mag/sky130_hilas_TopLevelTestStructure.mag b/mag/sky130_hilas_TopLevelTestStructure.mag
new file mode 100644
index 0000000..7a4853b
--- /dev/null
+++ b/mag/sky130_hilas_TopLevelTestStructure.mag
@@ -0,0 +1,2680 @@
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+rect 10340 -350 10343 -312
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+rect 10301 -353 10343 -350
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+rect 9911 -717 9931 -649
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+rect 10724 -717 10745 -628
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+rect 10204 -747 10424 -717
+rect 10204 -782 10407 -747
+rect 10612 -782 10815 -717
+rect 10917 -726 10938 -628
+rect 11014 -647 11033 -630
+rect 11014 -666 11514 -647
+rect 11030 -726 11233 -717
+rect 11495 -719 11514 -666
+rect 11579 -719 11598 -712
+rect 11839 -717 12040 1013
+rect 10917 -747 11233 -726
+rect 11030 -782 11233 -747
+rect 11428 -784 11631 -719
+rect 11833 -769 12040 -717
+rect 12225 -717 12426 1103
+rect 11833 -782 12036 -769
+rect 12225 -782 12432 -717
+rect 12633 -719 12834 1193
+rect 13042 -717 13243 1283
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+rect 12633 -784 12837 -719
+rect 13039 -775 13243 -717
+rect 13039 -782 13242 -775
+rect 12633 -792 12834 -784
+use sky130_hilas_pFETLarge sky130_hilas_pFETLarge_0
+timestamp 1608245216
+transform -1 0 2012 0 -1 1081
+box 64 419 528 1018
+use sky130_hilas_nFETLarge sky130_hilas_nFETLarge_0
+timestamp 1625426387
+transform -1 0 2008 0 -1 1836
+box 64 420 501 1003
+use sky130_hilas_DAC5bit01 sky130_hilas_DAC5bit01_0
+timestamp 1625056879
+transform 0 1 9912 1 0 -1031
+box 382 524 2040 1121
+use sky130_hilas_Trans2med sky130_hilas_Trans2med_0
+timestamp 1626027626
+transform 1 0 2073 0 -1 2311
+box -380 -143 -27 452
+use sky130_hilas_LevelShift4InputUp sky130_hilas_LevelShift4InputUp_3
+timestamp 1624113741
+transform -1 0 4927 0 -1 2263
+box -30 -102 850 522
+use sky130_hilas_drainSelect01 sky130_hilas_drainSelect01_3
+timestamp 1625970648
+transform -1 0 6601 0 -1 2362
+box 1050 5 1622 610
+use sky130_hilas_pFETLarge sky130_hilas_pFETLarge_1
+timestamp 1608245216
+transform 1 0 4824 0 1 606
+box 64 419 528 1018
+use sky130_hilas_pFETLarge sky130_hilas_pFETLarge_2
+timestamp 1608245216
+transform -1 0 5880 0 1 606
+box 64 419 528 1018
+use sky130_hilas_pFETLarge sky130_hilas_pFETLarge_3
+timestamp 1608245216
+transform 1 0 5805 0 1 609
+box 64 419 528 1018
+use sky130_hilas_pFETLarge sky130_hilas_pFETLarge_4
+timestamp 1608245216
+transform -1 0 6861 0 1 609
+box 64 419 528 1018
+use sky130_hilas_WTA4Stage01 sky130_hilas_WTA4Stage01_0
+timestamp 1625404155
+transform 1 0 6825 0 1 1803
+box -1121 -43 296 562
+use sky130_hilas_nFETLarge sky130_hilas_nFETLarge_1
+timestamp 1625426387
+transform -1 0 7435 0 1 608
+box 64 420 501 1003
+use sky130_hilas_Trans4small sky130_hilas_Trans4small_0
+timestamp 1608234847
+transform 1 0 1738 0 1 4259
+box 191 -150 471 438
+use sky130_hilas_LevelShift4InputUp sky130_hilas_LevelShift4InputUp_2
+timestamp 1624113741
+transform -1 0 4927 0 -1 3240
+box -30 -102 850 522
+use sky130_hilas_LevelShift4InputUp sky130_hilas_LevelShift4InputUp_1
+timestamp 1624113741
+transform -1 0 4927 0 -1 4253
+box -30 -102 850 522
+use sky130_hilas_drainSelect01 sky130_hilas_drainSelect01_2
+timestamp 1625970648
+transform -1 0 6601 0 -1 3338
+box 1050 5 1622 610
+use sky130_hilas_swc4x2cell sky130_hilas_swc4x2cell_0
+timestamp 1625491916
+transform 1 0 6768 0 1 2742
+box -1004 -4 1009 601
+use sky130_hilas_drainSelect01 sky130_hilas_drainSelect01_1
+timestamp 1625970648
+transform -1 0 6601 0 -1 4345
+box 1050 5 1622 610
+use sky130_hilas_TA2Cell_1FG_Strong sky130_hilas_TA2Cell_1FG_Strong_0
+timestamp 1625491312
+transform 1 0 8236 0 1 3936
+box -2617 140 193 745
+use sky130_hilas_TA2Cell_1FG sky130_hilas_TA2Cell_1FG_0
+timestamp 1625491133
+transform 1 0 8236 0 1 3333
+box -2616 140 193 745
+use sky130_hilas_Tgate4Single01 sky130_hilas_Tgate4Single01_0
+timestamp 1608226321
+transform 1 0 10780 0 1 3947
+box -36 -141 440 464
+use sky130_hilas_FGcharacterization01 sky130_hilas_FGcharacterization01_0
+timestamp 1625074044
+transform -1 0 2682 0 1 5308
+box -912 259 2083 864
+use sky130_hilas_LevelShift4InputUp sky130_hilas_LevelShift4InputUp_0
+timestamp 1624113741
+transform -1 0 4927 0 1 4465
+box -30 -102 850 522
+<< labels >>
+rlabel metal2 13039 -782 13242 -717 1 DIG24
+port 1 n
+rlabel metal2 12634 -784 12837 -719 0 DIG23
+port 2 nsew
+rlabel metal2 12229 -782 12432 -717 0 DIG22
+port 3 nsew
+rlabel metal2 11833 -782 12036 -717 0 DIG21
+port 4 nsew
+rlabel metal2 11428 -784 11631 -719 0 DIG29
+port 5 nsew
+rlabel metal2 11030 -782 11233 -717 0 DIG28
+port 6 nsew
+rlabel metal2 10612 -782 10815 -717 0 DIG27
+port 7 nsew
+rlabel metal2 10204 -782 10407 -717 0 DIG26
+port 8 nsew
+rlabel metal2 9802 -782 10005 -717 0 DIG25
+port 9 nsew
+rlabel metal2 9403 -785 9606 -720 0 DIG20
+port 10 nsew
+rlabel metal2 8989 -782 9192 -717 0 DIG19
+port 11 nsew
+rlabel metal2 8577 -784 8780 -719 0 DIG18
+port 12 nsew
+rlabel metal2 8182 -782 8385 -717 0 DIG17
+port 13 nsew
+rlabel metal2 7774 -780 7977 -715 0 DIG16
+port 14 nsew
+rlabel metal2 7367 -782 7570 -717 0 DIG15
+port 15 nsew
+rlabel metal2 6962 -782 7165 -717 0 DIG14
+port 16 nsew
+rlabel metal2 6559 -782 6762 -717 0 DIG13
+port 17 nsew
+rlabel metal2 6152 -784 6355 -719 0 DIG12
+port 18 nsew
+rlabel metal2 5747 -778 5950 -712 0 DIG11
+port 19 nsew
+rlabel metal2 5351 -776 5554 -710 0 DIG10
+port 20 nsew
+rlabel metal2 4953 -782 5156 -716 0 DIG09
+port 21 nsew
+rlabel metal2 4536 -784 4739 -718 0 DIG08
+port 22 nsew
+rlabel metal2 4127 -782 4330 -716 0 DIG07
+port 23 nsew
+rlabel metal2 3731 -785 3934 -719 0 DIG06
+port 24 nsew
+rlabel metal2 3328 -784 3531 -718 0 DIG05
+port 25 nsew
+rlabel metal2 2923 -782 3126 -716 0 DIG04
+port 26 nsew
+rlabel metal2 2523 -782 2726 -716 0 DIG03
+port 27 nsew
+rlabel metal2 2127 -782 2330 -716 0 DIG02
+port 28 nsew
+rlabel metal2 1720 -785 1923 -719 0 DIG01
+port 29 nsew
+rlabel metal2 11805 1367 11882 1576 0 CAP2
+port 30 nsew
+rlabel metal2 11760 1918 11850 2127 0 GENERALGATE01
+port 31 nsew
+rlabel metal2 11763 2426 11853 2635 0 GATEANDCAP1
+port 32 nsew
+rlabel metal2 11760 2944 11850 3153 0 GENERALGATE02
+port 33 nsew
+rlabel metal2 11760 3432 11850 3641 0 OUTPUTTA1
+port 34 nsew
+rlabel metal2 11760 3970 11850 4179 0 GATENFET1
+port 35 nsew
+rlabel metal2 11763 4415 11853 4624 0 DACOUTPUT
+port 36 nsew
+rlabel metal2 11764 4853 11850 5063 0 DRAINOUT
+port 37 nsew
+rlabel metal2 11764 5292 11850 5502 0 ROWTERM2
+port 38 nsew
+rlabel metal2 11767 5701 11853 5911 0 COLUMN2
+port 39 nsew
+rlabel metal2 11767 6114 11853 6324 0 COLUMN1
+port 40 nsew
+rlabel metal1 10273 6287 10592 6399 0 GATE2
+port 41 nsew
+rlabel metal1 7416 6284 7735 6396 0 GATE1
+port 61 nsew
+rlabel metal1 4557 6285 4876 6397 0 DRAININJECT
+port 42 nsew
+rlabel metal1 3026 6238 3160 6339 0 VTUN
+port 43 nsew
+rlabel metal2 295 6136 363 6368 0 VREFCHAR
+port 44 nsew
+rlabel metal2 295 5683 363 5915 0 CHAROUTPUT
+port 45 nsew
+rlabel metal2 250 5236 318 5468 0 LARGECAPACITOR
+port 46 nsew
+rlabel metal2 1379 920 1416 961 0 DRAIN6N
+port 47 nsew
+rlabel metal2 1379 192 1416 233 0 DRAIN6P
+port 48 nsew
+rlabel metal2 1383 1884 1420 1925 0 DRAIN5P
+port 49 nsew
+rlabel metal2 1383 1980 1420 2021 0 DARIN4P
+port 50 nsew
+rlabel metal2 1383 2350 1420 2391 0 DRAIN5N
+port 51 nsew
+rlabel metal2 1383 2414 1420 2455 0 DRAIN4N
+port 52 nsew
+rlabel metal2 1383 4157 1420 4198 0 DRAIN3P
+port 53 nsew
+rlabel metal2 1383 4253 1420 4294 0 DRAIN2P
+port 54 nsew
+rlabel metal2 1383 4349 1420 4390 0 DRAIN1P
+port 55 nsew
+rlabel metal2 1383 4461 1420 4502 0 DRAIN3N
+port 56 nsew
+rlabel metal2 1383 4554 1420 4595 0 DRAIN2N
+port 57 nsew
+rlabel metal2 1383 4657 1420 4698 0 DRAIN1N
+port 58 nsew
+rlabel metal2 1353 4765 1383 4805 0 SOURCEN
+port 59 nsew
+rlabel metal2 1353 4847 1383 4887 0 SOURCEP
+port 60 nsew
+rlabel metal2 279 5546 324 5586 0 VGND
+port 63 nsew
+rlabel metal2 283 5987 328 6027 0 VINJ
+port 62 nsew
+rlabel metal2 250 5157 301 5198 0 VINJ
+port 62 nsew
+rlabel metal2 246 5067 297 5108 0 VGND
+port 63 nsew
+rlabel metal2 298 1555 361 1597 0 VINJ
+port 62 nsew
+rlabel metal2 296 1458 359 1500 0 VGND
+port 63 nsew
+<< end >>
diff --git a/verilog/rtl/sky130_hilas_TopLevelTestStructure.v b/verilog/rtl/sky130_hilas_TopLevelTestStructure.v
new file mode 100644
index 0000000..d1fe314
--- /dev/null
+++ b/verilog/rtl/sky130_hilas_TopLevelTestStructure.v
@@ -0,0 +1,254 @@
+
+`ifndef SKY130_HILAS_TOPLEVELTESTSTRUCTURE
+`define SKY130_HILAS_TOPLEVELTESTSTRUCTURE
+
+/**
+ * sky130_hilas_TopLevelTestStructure: top level test structure
+ *
+ * Verilog wrapper for sky130_hilas_TopLevelTestStructure.
+ *
+ * WARNING: This file is autogenerated, do not modify directly!
+ */
+
+`timescale 1ns / 1ps
+`default_nettype none
+
+
+`ifdef USE_POWER_PINS
+/*********************************************************/
+
+`celldefine
+module sky130_hilas_TopLevelTestStructure (
+ DIG23,
+ DIG22,
+ DIG21,
+ DIG29,
+ DIG28,
+ DIG27,
+ DIG26,
+ DIG25,
+ DIG20,
+ DIG19,
+ DIG18,
+ DIG17,
+ DIG16,
+ DIG15,
+ DIG14,
+ DIG13,
+ DIG12,
+ DIG11,
+ DIG10,
+ DIG09,
+ DIG08,
+ DIG07,
+ DIG06,
+ DIG05,
+ DIG04,
+ DIG03,
+ DIG02,
+ DIG01,
+ GENERALGATE02,
+ DRAINOUT,
+ ROWTERM2,
+ COLUMN2,
+ COLUMN1,
+ GATE2,
+ DRAININJECT,
+ VTUN,
+ VREFCHAR,
+ CHAROUTPUT,
+ LARGECAPACITOR,
+ DRAIN6N,
+ DRAIN6P,
+ DRAIN5P,
+ DARIN4P,
+ DRAIN5N,
+ DRAIN4N,
+ DRAIN3P,
+ DRAIN2P,
+ DRAIN3N,
+ SOURCEN,
+ SOURCEP,
+ GATE1,
+ VINJ,
+ VGND,
+ VNB,
+ VPB
+);
+ inout DIG23;
+ inout DIG22;
+ inout DIG21;
+ inout DIG29;
+ inout DIG28;
+ inout DIG27;
+ inout DIG26;
+ inout DIG25;
+ inout DIG20;
+ inout DIG19;
+ inout DIG18;
+ inout DIG17;
+ inout DIG16;
+ inout DIG15;
+ inout DIG14;
+ inout DIG13;
+ inout DIG12;
+ inout DIG11;
+ inout DIG10;
+ inout DIG09;
+ inout DIG08;
+ inout DIG07;
+ inout DIG06;
+ inout DIG05;
+ inout DIG04;
+ inout DIG03;
+ inout DIG02;
+ inout DIG01;
+ inout GENERALGATE02;
+ inout DRAINOUT;
+ inout ROWTERM2;
+ inout COLUMN2;
+ inout COLUMN1;
+ inout GATE2;
+ inout DRAININJECT;
+ inout VTUN;
+ inout VREFCHAR;
+ inout CHAROUTPUT;
+ inout LARGECAPACITOR;
+ inout DRAIN6N;
+ inout DRAIN6P;
+ inout DRAIN5P;
+ inout DARIN4P;
+ inout DRAIN5N;
+ inout DRAIN4N;
+ inout DRAIN3P;
+ inout DRAIN2P;
+ inout DRAIN3N;
+ inout SOURCEN;
+ inout SOURCEP;
+ inout GATE1;
+ inout VINJ;
+ inout VGND;
+ inout VNB;
+ inout VPB;
+endmodule
+`endcelldefine
+
+/*********************************************************/
+`else // If not USE_POWER_PINS
+/*********************************************************/
+
+`celldefine
+module sky130_hilas_TopLevelTestStructure (
+ DIG23,
+ DIG22,
+ DIG21,
+ DIG29,
+ DIG28,
+ DIG27,
+ DIG26,
+ DIG25,
+ DIG20,
+ DIG19,
+ DIG18,
+ DIG17,
+ DIG16,
+ DIG15,
+ DIG14,
+ DIG13,
+ DIG12,
+ DIG11,
+ DIG10,
+ DIG09,
+ DIG08,
+ DIG07,
+ DIG06,
+ DIG05,
+ DIG04,
+ DIG03,
+ DIG02,
+ DIG01,
+ GENERALGATE02,
+ DRAINOUT,
+ ROWTERM2,
+ COLUMN2,
+ COLUMN1,
+ GATE2,
+ DRAININJECT,
+ VTUN,
+ VREFCHAR,
+ CHAROUTPUT,
+ LARGECAPACITOR,
+ DRAIN6N,
+ DRAIN6P,
+ DRAIN5P,
+ DARIN4P,
+ DRAIN5N,
+ DRAIN4N,
+ DRAIN3P,
+ DRAIN2P,
+ DRAIN3N,
+ SOURCEN,
+ SOURCEP,
+ GATE1,
+ VINJ
+);
+ inout DIG23;
+ inout DIG22;
+ inout DIG21;
+ inout DIG29;
+ inout DIG28;
+ inout DIG27;
+ inout DIG26;
+ inout DIG25;
+ inout DIG20;
+ inout DIG19;
+ inout DIG18;
+ inout DIG17;
+ inout DIG16;
+ inout DIG15;
+ inout DIG14;
+ inout DIG13;
+ inout DIG12;
+ inout DIG11;
+ inout DIG10;
+ inout DIG09;
+ inout DIG08;
+ inout DIG07;
+ inout DIG06;
+ inout DIG05;
+ inout DIG04;
+ inout DIG03;
+ inout DIG02;
+ inout DIG01;
+ inout GENERALGATE02;
+ inout DRAINOUT;
+ inout ROWTERM2;
+ inout COLUMN2;
+ inout COLUMN1;
+ inout GATE2;
+ inout DRAININJECT;
+ inout VTUN;
+ inout VREFCHAR;
+ inout CHAROUTPUT;
+ inout LARGECAPACITOR;
+ inout DRAIN6N;
+ inout DRAIN6P;
+ inout DRAIN5P;
+ inout DARIN4P;
+ inout DRAIN5N;
+ inout DRAIN4N;
+ inout DRAIN3P;
+ inout DRAIN2P;
+ inout DRAIN3N;
+ inout SOURCEN;
+ inout SOURCEP;
+ inout GATE1;
+ inout VINJ;
+endmodule
+`endcelldefine
+
+/*********************************************************/
+`endif // USE_POWER_PINS
+
+`default_nettype wire
+`endif // SKY130_HILAS_TOPLEVELTESTSTRUCTURE
