commit | ba97310c7e3d8a3e4e46de03679c72a474c943e7 | [log] [tgz] |
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author | Jeff DiCorpo <jeffdi@efabless.com> | Mon Dec 06 03:42:17 2021 +0000 |
committer | Jeff DiCorpo <jeffdi@efabless.com> | Mon Dec 06 03:42:17 2021 +0000 |
tree | 8dbbdb3d20fce67e1899cd358e511a455fcd981d | |
parent | 45604fee32606622e6476626320ddcab33f07d90 [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.