| commit | b314bfe5017405ac20e374f20c44911756ab04c5 | [log] [tgz] |
|---|---|---|
| author | komaljaved-lm <72543615+komaljaved-lm@users.noreply.github.com> | Wed Jun 16 20:52:59 2021 +0500 |
| committer | GitHub <noreply@github.com> | Wed Jun 16 20:52:59 2021 +0500 |
| tree | 8396d0561d45f332f329f87b48d932a452e4f325 | |
| parent | ad0e0b9835dac231b5cffd813909612268187a4d [diff] |
Update README.md
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.