commit | ad0e0b9835dac231b5cffd813909612268187a4d | [log] [tgz] |
---|---|---|
author | komaljaved-lm <komal.javed@lampromellon.com> | Wed Jun 16 18:29:42 2021 +0500 |
committer | komaljaved-lm <komal.javed@lampromellon.com> | Wed Jun 16 18:29:42 2021 +0500 |
tree | 15375182e2add8e4c71bd9c58fea2fc15f3f0994 | |
parent | e982868a52db107efeac4423eaf60336689753fe [diff] |
updated readme
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.