commit | ab46779aedfeadbe9ac3e49c939ecd888153bdab | [log] [tgz] |
---|---|---|
author | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jul 18 13:22:46 2021 +0000 |
committer | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jul 18 13:22:46 2021 +0000 |
tree | 09d27459494d5595f27020536da27f7994e09922 | |
parent | 1577fb1350f6dc41e30fe7d2278a3f4dce161f6c [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.