commit: 9d4e78bf8939d2d814f480fcaebc606ccbbb8871
[log] [tgz]
author: Tim 'mithro' Ansell <me@mith.ro>
Thu Dec 29 23:53:45 2022 +0000
committer: Tim 'mithro' Ansell <me@mith.ro>
Thu Dec 29 23:53:45 2022 +0000
tree: 3d2840a254e79c8b98dfdb776eb9e9718f4085e7
parent: 2842014e1f2f19be9840618aab579aa1f1f2e52d [diff]

Updating the shuttle_url value in `info.yaml` file.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>

info.yaml[diff]

1 file changed

tree: 3d2840a254e79c8b98dfdb776eb9e9718f4085e7

README.md

Table of contents

Caravel FPU

Caravel FPU

Floating Point Unit

FPU Architecture

The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.

FPU Exceptions

Integration of FPU as Memory Mapped Peripheral

Wishbone Interface

Logic Analyzer

GPIO

Result of FPU calculation also appers at the 32 GPIO pins.

CSRs for FPU

Instruction Flow