| commit | 73908374d4c4e0752a9f5984148dcbd5df4dc735 | [log] [tgz] |
|---|---|---|
| author | komaljaved-lm <72543615+komaljaved-lm@users.noreply.github.com> | Mon Jun 28 15:43:25 2021 +0500 |
| committer | GitHub <noreply@github.com> | Mon Jun 28 15:43:25 2021 +0500 |
| tree | 545144725451068c8d2dff8489711eee17acf177 | |
| parent | a9b8033c97489e33384e25d3789e4c60ce4c163a [diff] |
Update user_project_ci.yml
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.