| commit | 778fabb90caa810a95d95dfb7f9a30efe6c4a008 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Fri Dec 10 01:25:21 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Fri Dec 10 01:25:21 2021 +0000 |
| tree | 73ef9a2f1d16ca927db1f18d6b6ff35c9c403997 | |
| parent | 27e63523d416d022d66918e041f144221d1518fd [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.