| commit | 44c57dd2594cfbec09ea824189d0ff6e547196ae | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jul 18 14:40:01 2021 -0700 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jul 18 14:40:01 2021 -0700 |
| tree | 3bc3517ef23540364d3c0281fac289162f97c01b | |
| parent | 7d0a6f8700a3ac8b939d882ed3911dd57ff0af5a [diff] |
updating ./signoff
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.