| commit | 40b8cad60d3e30c45c16abf985d3fb31fa86e9f6 | [log] [tgz] |
|---|---|---|
| author | komaljaved-lm <72543615+komaljaved-lm@users.noreply.github.com> | Wed Jun 16 11:24:49 2021 +0500 |
| committer | GitHub <noreply@github.com> | Wed Jun 16 11:24:49 2021 +0500 |
| tree | e73a601f10ce30d57e2ebf1f537fb59a5c300226 | |
| parent | 81a0bec5eaf9167d80a0a97e5da71ba4f824396e [diff] |
Update README.md
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.