| commit | 3949442842a1ef336875a49b04d2193268a33db2 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Thu Dec 09 17:15:26 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Thu Dec 09 17:15:26 2021 +0000 |
| tree | 3d7c09b7b5be886c850994ffe7f66f4fd2cab8e0 | |
| parent | aff4e2cc731a75a26f6c5593f904d8dbf5835c18 [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.