| commit | 2842014e1f2f19be9840618aab579aa1f1f2e52d | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Tue Dec 28 01:27:33 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Tue Dec 28 01:27:33 2021 +0000 |
| tree | 428d6f878d60cf36e68d14b4ffa0721e50c08446 | |
| parent | 5f3e9d129170584b851d029dc83e8dede30dcea8 [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.