| commit | 15eef5147472e8eb54a00f807e362ed4a62fe22e | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Wed Dec 08 05:25:23 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Wed Dec 08 05:25:23 2021 +0000 |
| tree | 11b456094dd1736d46c0854ebf46ffecf7ce9694 | |
| parent | 9e4b7981ce2f82fa6de2e2b05d695e807b80340f [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.