commit | 034463dbf8631f2b31ae89bbae7952c1a4de380b | [log] [tgz] |
---|---|---|
author | Jeff DiCorpo <jeffdi@efabless.com> | Fri Dec 03 09:06:37 2021 +0000 |
committer | Jeff DiCorpo <jeffdi@efabless.com> | Fri Dec 03 09:06:37 2021 +0000 |
tree | 39636a7572fe039a821e5af1c56edf67f45278d3 | |
parent | 4563b3dd3a17db956bc44d624b9cc00ad16428ab [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.