Added top level makefile
diff --git a/Makefile b/Makefile deleted file mode 120000 index ae125c1..0000000 --- a/Makefile +++ /dev/null
@@ -1 +0,0 @@ -caravel-lite/Makefile \ No newline at end of file
diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..f8fc12f --- /dev/null +++ b/Makefile
@@ -0,0 +1,105 @@ +# SPDX-FileCopyrightText: 2020 Efabless Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# SPDX-License-Identifier: Apache-2.0 + +CARAVEL_ROOT?=$(shell pwd)/caravel-lite +UPRJ_ROOT?=$(shell pwd) + +# Install lite version of caravel, (1): caravel-lite, (0): caravel +CARAVEL_LITE?=1 + +ifeq ($(CARAVEL_LITE),1) + CARAVEL_NAME := caravel-lite + CARAVEL_REPO := https://github.com/Manarabdelaty/caravel-lite +else + CARAVEL_NAME := caravel + CARAVEL_REPO := https://github.com/efabless/caravel +endif + +# Install caravel as submodule, (1): submodule, (0): clone +SUBMODULE?=1 + +# Include Caravel Makefile Targets +.PHONY: % +%: + $(MAKE) -f $(CARAVEL_ROOT)/Makefile $@ + +# Verify Target for running simulations +.PHONY: verify +verify: + cd ./verilog/dv/ && \ + $(MAKE) -j$(THREADS) all + cd ./verilog/dv/ && \ + SIM=GL $(MAKE) -j$(THREADS) all + +# Openlane Makefile Targets +BLOCKS = $(shell cd openlane && find * -maxdepth 0 -type d) +.PHONY: $(BLOCKS) +$(BLOCKS): + cd openlane && $(MAKE) $* + +# Install caravel +.PHONY: install +install: +ifeq ($(SUBMODULE),1) + @echo "Installing $(CARAVEL_NAME) as a submodule.." + @git submodule add $(CARAVEL_REPO) + $(MAKE) simlink +else + @echo "Installing $(CARAVEL_NAME).." + @git clone $(CARAVEL_REPO) $(CARAVEL_ROOT) +endif + +# Create symbolic links to caravel's main files +.PHONY: simlink +simlink: check-caravel + @ln -sf $(CARAVEL_ROOT)/openlane/Makefile openlane/Makefile + @ln -sf $(CARAVEL_ROOT)/openlane/user_project_wrapper_empty/pin_order.cfg openlane/user_project_wrapper/pin_order.cfg + +# Update Caravel +.PHONY: update_caravel +update_caravel: check-caravel +ifeq ($(CARAVEL_LITE),1) + cd $(CARAVEL_ROOT)/ && \ + git checkout main && \ + git pull +else + cd $(CARAVEL_ROOT)/ && \ + git checkout master && \ + git pull +endif + +# Uninstall Caravel +.PHONY: uninstall +uninstall: +ifeq ($(SUBMODULE),1) + git submodule deinit -f $(CARAVEL_ROOT) + rm -rf .git/modules/$(CARAVEL_NAME) + git rm -f $(CARAVEL_ROOT) +else + rm -rf $(CARAVEL_ROOT) +endif + +# Clean +.PHONY: clean +clean: + cd ./verilog/dv/ && \ + $(MAKE) -j$(THREADS) clean + +check-caravel: + @if [ ! -d "$(CARAVEL_ROOT)" ]; then \ + echo "Caravel Root: "$(CARAVEL_ROOT)" doesn't exists, please export the correct path before running make. "; \ + exit 1; \ + fi \ No newline at end of file
diff --git a/openlane/Makefile b/openlane/Makefile index f242a3c..aad81ae 120000 --- a/openlane/Makefile +++ b/openlane/Makefile
@@ -1 +1 @@ -caravel-lite/openlane/Makefile \ No newline at end of file +/home/ma/ef/caravel_project_example/caravel-lite/openlane/Makefile \ No newline at end of file
diff --git a/openlane/user_proj_example/config.tcl b/openlane/user_proj_example/config.tcl index 4ea25c6..0de7a65 100755 --- a/openlane/user_proj_example/config.tcl +++ b/openlane/user_proj_example/config.tcl
@@ -18,7 +18,7 @@ set ::env(DESIGN_NAME) user_proj_example set ::env(VERILOG_FILES) "\ - $script_dir/../../caravel/verilog/rtl/defines.v \ + $script_dir/../../caravel-lite/verilog/rtl/defines.v \ $script_dir/../../verilog/rtl/user_proj_example.v" set ::env(CLOCK_PORT) ""
diff --git a/openlane/user_project_wrapper/config.tcl b/openlane/user_project_wrapper/config.tcl index 82814d4..cf90dec 100755 --- a/openlane/user_project_wrapper/config.tcl +++ b/openlane/user_project_wrapper/config.tcl
@@ -26,7 +26,7 @@ ## Source Verilog Files set ::env(VERILOG_FILES) "\ - $script_dir/../../caravel/verilog/rtl/defines.v \ + $script_dir/../../caravel-lite/verilog/rtl/defines.v \ $script_dir/../../verilog/rtl/user_project_wrapper.v" ## Clock configurations
diff --git a/openlane/user_project_wrapper/pin_order.cfg b/openlane/user_project_wrapper/pin_order.cfg index 5e924e2..ae292ce 120000 --- a/openlane/user_project_wrapper/pin_order.cfg +++ b/openlane/user_project_wrapper/pin_order.cfg
@@ -1 +1 @@ -caravel-lite/openlane/user_project_wrapper_empty/pin_order.cfg \ No newline at end of file +/home/ma/ef/caravel_project_example/caravel-lite/openlane/user_project_wrapper_empty/pin_order.cfg \ No newline at end of file
diff --git a/verilog/dv/Makefile b/verilog/dv/Makefile index 7895a6e..73d7868 100644 --- a/verilog/dv/Makefile +++ b/verilog/dv/Makefile
@@ -30,5 +30,6 @@ for i in ${PATTERNS}; do \ ( cd $$i && make clean ) ; \ done - + rm -rf *.log + .PHONY: clean all