final gds & signoff results
diff --git a/signoff/build/gpio_defaults.out b/signoff/build/gpio_defaults.out
new file mode 100644
index 0000000..31aab63
--- /dev/null
+++ b/signoff/build/gpio_defaults.out
@@ -0,0 +1,69 @@
+Step 1:  Create new cells for new GPIO default vectors.
+Creating new layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag
+Creating new gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-031/renml/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Step 2:  Modify top-level layouts to use the specified defaults.
+Done.