| <!--- |
| # SPDX-FileCopyrightText: 2020 Efabless Corporation |
| # |
| # Licensed under the Apache License, Version 2.0 (the "License"); |
| # you may not use this file except in compliance with the License. |
| # You may obtain a copy of the License at |
| # |
| # http://www.apache.org/licenses/LICENSE-2.0 |
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| # Unless required by applicable law or agreed to in writing, software |
| # distributed under the License is distributed on an "AS IS" BASIS, |
| # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| # See the License for the specific language governing permissions and |
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| # SPDX-License-Identifier: Apache-2.0 |
| --> |
| # Caravel User Project |
| |
| [](https://opensource.org/licenses/Apache-2.0) [](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml) [](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml) |
| |
| # Azadi RISC-V SoC |
| Azadi is an SoC with a 32-bit RISC-V signal core extended version of [ibex](https://github.com/lowRISC/ibex) we named it "buraq", it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found [here](https://github.com/merledu/azadi). |
| |
| ## Azadi SoC DFFRAM: Flattened with user_project_wrapper |
|  |
