| commit | dcf4c4021ba05c09a1965ac5d5f38f6c3fbd6c16 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Mon Dec 06 03:29:52 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Mon Dec 06 03:29:52 2021 +0000 |
| tree | f8452e51e861c2ab36dadc1dcc141544b52cd7dd | |
| parent | 2bde7b1d95f2d1c0be59301c09841624bb6abdd1 [diff] |
final gds oasis
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.
