commit | d418fd4d0c17d714d2ed5c67ddbea3ae960f57ec | [log] [tgz] |
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author | Jeff DiCorpo <jeffdi@efabless.com> | Mon Dec 27 08:33:22 2021 +0000 |
committer | Jeff DiCorpo <jeffdi@efabless.com> | Mon Dec 27 08:33:22 2021 +0000 |
tree | 757d6195b29b45dd5a02aff102d8d0cf9117c316 | |
parent | 858ed9506ecc6e897fba49a99ea82c1fc6a1969e [diff] |
final gds oasis
Azadi is an SoC with a 32-bit RISC-V signal core extended version of ibex we named it “buraq”, it is a 3-stage pipeline core that implements the RV32IMF instruction set architecture, a limited number of peripherals UART, SPI, GPIO, PWM, and timer. The parent repository of azadi-soc can be found here.